V4L/DVB (9223): MFE: Fix a number of bugs and some tidying up
[deliverable/linux.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
5823b3a6 36#include <dvb_frontend.h>
1da177e4 37
1f10c7af
AQ
38#include "mt352.h"
39#include "mt352_priv.h" /* FIXME */
40#include "tda1004x.h"
41#include "nxt200x.h"
bc36a686 42#include "tuner-xc2028.h"
1da177e4 43
e2ac28fa
IL
44#include "tda10086.h"
45#include "tda826x.h"
8ce47dad 46#include "tda827x.h"
e2ac28fa 47#include "isl6421.h"
4b1431ca 48#include "isl6405.h"
6ab465a8 49#include "lnbp21.h"
cb89cd33 50#include "tuner-simple.h"
8ce47dad 51
1da177e4
LT
52MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
53MODULE_LICENSE("GPL");
54
ff699e6b 55static unsigned int antenna_pwr;
86ddd96f 56
1da177e4
LT
57module_param(antenna_pwr, int, 0444);
58MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
59
ff699e6b 60static int use_frontend;
b331daa0
SB
61module_param(use_frontend, int, 0644);
62MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 63
ff699e6b 64static int debug;
58ef4f92
HH
65module_param(debug, int, 0644);
66MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
67
78e92006
JG
68DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
69
cf3c34c8
TP
70#define dprintk(fmt, arg...) do { if (debug) \
71 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
72
73/* Print a warning */
74#define wprintk(fmt, arg...) \
75 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
76
77/* ------------------------------------------------------------------
78 * mt352 based DVB-T cards
79 */
80
1da177e4
LT
81static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
82{
83 u32 ok;
84
85 if (!on) {
86 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
87 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
88 return 0;
89 }
90
91 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
92 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
93 udelay(10);
94
95 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
96 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
97 udelay(10);
98 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
99 udelay(10);
100 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 101 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT
102
103 if (!ok)
104 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
105 return ok;
106}
107
108static int mt352_pinnacle_init(struct dvb_frontend* fe)
109{
110 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
111 static u8 reset [] = { RESET, 0x80 };
112 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
113 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
114 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
115 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
116 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
117 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
118 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
119 struct saa7134_dev *dev= fe->dvb->priv;
120
5823b3a6 121 dprintk("%s called\n", __func__);
1da177e4
LT
122
123 mt352_write(fe, clock_config, sizeof(clock_config));
124 udelay(200);
125 mt352_write(fe, reset, sizeof(reset));
126 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
127 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
128 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
129 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
130
131 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
132 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
133 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 134
1da177e4
LT
135 return 0;
136}
137
a78d0bfa
JAR
138static int mt352_aver777_init(struct dvb_frontend* fe)
139{
140 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
141 static u8 reset [] = { RESET, 0x80 };
142 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
143 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
144 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
145
146 mt352_write(fe, clock_config, sizeof(clock_config));
147 udelay(200);
148 mt352_write(fe, reset, sizeof(reset));
149 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
150 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
151 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
152
153 return 0;
154}
155
6e501a3f 156static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 157{
6e501a3f
TF
158 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
159 static u8 reset [] = { RESET, 0x80 };
160 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
161 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC
162 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
163
164 mt352_write(fe, clock_config, sizeof(clock_config));
165 udelay(200);
166 mt352_write(fe, reset, sizeof(reset));
167 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
168 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
169 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC
170 return 0;
171}
172
0463f12c
AQ
173static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
174 struct dvb_frontend_parameters* params)
1da177e4 175{
df8cf706
HH
176 u8 off[] = { 0x00, 0xf1};
177 u8 on[] = { 0x00, 0x71};
178 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
179
1da177e4
LT
180 struct saa7134_dev *dev = fe->dvb->priv;
181 struct v4l2_frequency f;
182
183 /* set frequency (mt2050) */
184 f.tuner = 0;
185 f.type = V4L2_TUNER_DIGITAL_TV;
186 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
187 if (fe->ops.i2c_gate_ctrl)
188 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 189 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 190 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 191 msg.buf = on;
dea74869
PB
192 if (fe->ops.i2c_gate_ctrl)
193 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 194 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
195
196 pinnacle_antenna_pwr(dev, antenna_pwr);
197
198 /* mt352 setup */
0463f12c 199 return mt352_pinnacle_init(fe);
1da177e4
LT
200}
201
202static struct mt352_config pinnacle_300i = {
203 .demod_address = 0x3c >> 1,
204 .adc_clock = 20333,
205 .if2 = 36150,
206 .no_tuner = 1,
207 .demod_init = mt352_pinnacle_init,
1da177e4 208};
a78d0bfa
JAR
209
210static struct mt352_config avermedia_777 = {
211 .demod_address = 0xf,
212 .demod_init = mt352_aver777_init,
a78d0bfa 213};
1da177e4 214
6e501a3f 215static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC
216 .demod_address = (0x1e >> 1),
217 .no_tuner = 1,
6e501a3f 218 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC
219};
220
58ef4f92
HH
221/* ==================================================================
222 * tda1004x based DVB-T cards, helper functions
223 */
224
225static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
226 const struct firmware **fw, char *name)
1da177e4
LT
227{
228 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
229 return request_firmware(fw, name, &dev->pci->dev);
230}
231
58ef4f92
HH
232/* ------------------------------------------------------------------
233 * these tuners are tu1216, td1316(a)
234 */
235
236static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
237{
238 struct saa7134_dev *dev = fe->dvb->priv;
239 struct tda1004x_state *state = fe->demodulator_priv;
240 u8 addr = state->config->tuner_address;
86ddd96f 241 u8 tuner_buf[4];
2cf36ac4 242 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
243 sizeof(tuner_buf) };
244 int tuner_frequency = 0;
245 u8 band, cp, filter;
246
247 /* determine charge pump */
248 tuner_frequency = params->frequency + 36166000;
249 if (tuner_frequency < 87000000)
250 return -EINVAL;
251 else if (tuner_frequency < 130000000)
252 cp = 3;
253 else if (tuner_frequency < 160000000)
254 cp = 5;
255 else if (tuner_frequency < 200000000)
256 cp = 6;
257 else if (tuner_frequency < 290000000)
258 cp = 3;
259 else if (tuner_frequency < 420000000)
260 cp = 5;
261 else if (tuner_frequency < 480000000)
262 cp = 6;
263 else if (tuner_frequency < 620000000)
264 cp = 3;
265 else if (tuner_frequency < 830000000)
266 cp = 5;
267 else if (tuner_frequency < 895000000)
268 cp = 7;
269 else
270 return -EINVAL;
271
272 /* determine band */
273 if (params->frequency < 49000000)
274 return -EINVAL;
275 else if (params->frequency < 161000000)
276 band = 1;
277 else if (params->frequency < 444000000)
278 band = 2;
279 else if (params->frequency < 861000000)
280 band = 4;
281 else
282 return -EINVAL;
283
284 /* setup PLL filter */
285 switch (params->u.ofdm.bandwidth) {
286 case BANDWIDTH_6_MHZ:
287 filter = 0;
288 break;
289
290 case BANDWIDTH_7_MHZ:
291 filter = 0;
292 break;
293
294 case BANDWIDTH_8_MHZ:
295 filter = 1;
296 break;
1da177e4 297
86ddd96f
MCC
298 default:
299 return -EINVAL;
300 }
301
302 /* calculate divisor
303 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 304 */
86ddd96f
MCC
305 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
306
307 /* setup tuner buffer */
308 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
309 tuner_buf[1] = tuner_frequency & 0xff;
310 tuner_buf[2] = 0xca;
311 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
312
dea74869
PB
313 if (fe->ops.i2c_gate_ctrl)
314 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 315 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
316 wprintk("could not write to tuner at addr: 0x%02x\n",
317 addr << 1);
86ddd96f 318 return -EIO;
58ef4f92 319 }
2cf36ac4
HH
320 msleep(1);
321 return 0;
322}
323
58ef4f92 324static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
325{
326 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
327 struct tda1004x_state *state = fe->demodulator_priv;
328 u8 addr = state->config->tuner_address;
2cf36ac4
HH
329 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
330 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 331
2cf36ac4 332 /* setup PLL configuration */
dea74869
PB
333 if (fe->ops.i2c_gate_ctrl)
334 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
335 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
336 return -EIO;
86ddd96f 337 msleep(1);
2cf36ac4 338
1da177e4
LT
339 return 0;
340}
341
2cf36ac4
HH
342/* ------------------------------------------------------------------ */
343
2cf36ac4 344static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
345 .demod_address = 0x8,
346 .invert = 1,
2cf36ac4 347 .invert_oclk = 0,
86ddd96f
MCC
348 .xtal_freq = TDA10046_XTAL_4M,
349 .agc_config = TDA10046_AGC_DEFAULT,
350 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
351 .tuner_address = 0x60,
352 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
353};
354
2cf36ac4
HH
355static struct tda1004x_config philips_tu1216_61_config = {
356
357 .demod_address = 0x8,
358 .invert = 1,
359 .invert_oclk = 0,
360 .xtal_freq = TDA10046_XTAL_4M,
361 .agc_config = TDA10046_AGC_DEFAULT,
362 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
363 .tuner_address = 0x61,
364 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
365};
366
367/* ------------------------------------------------------------------ */
368
cbb94521 369static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
370{
371 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
372 struct tda1004x_state *state = fe->demodulator_priv;
373 u8 addr = state->config->tuner_address;
2cf36ac4 374 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 375 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
376
377 /* setup PLL configuration */
dea74869
PB
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
380 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
381 return -EIO;
2cf36ac4
HH
382 return 0;
383}
384
a79ddae9 385static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 386{
58ef4f92
HH
387 return philips_tda6651_pll_set(fe, params);
388}
389
390static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
391{
392 struct saa7134_dev *dev = fe->dvb->priv;
393 struct tda1004x_state *state = fe->demodulator_priv;
394 u8 addr = state->config->tuner_address;
395 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
396 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
397
398 /* switch the tuner to analog mode */
399 if (fe->ops.i2c_gate_ctrl)
400 fe->ops.i2c_gate_ctrl(fe, 1);
401 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
402 return -EIO;
403 return 0;
2cf36ac4
HH
404}
405
58ef4f92
HH
406/* ------------------------------------------------------------------ */
407
cbb94521
HH
408static int philips_europa_tuner_init(struct dvb_frontend *fe)
409{
410 struct saa7134_dev *dev = fe->dvb->priv;
411 static u8 msg[] = { 0x00, 0x40};
412 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
413
414
415 if (philips_td1316_tuner_init(fe))
416 return -EIO;
417 msleep(1);
418 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
419 return -EIO;
420
421 return 0;
422}
423
a79ddae9 424static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
425{
426 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 427
58ef4f92
HH
428 static u8 msg[] = { 0x00, 0x14 };
429 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
430
431 if (philips_td1316_tuner_sleep(fe))
432 return -EIO;
2cf36ac4
HH
433
434 /* switch the board to analog mode */
dea74869
PB
435 if (fe->ops.i2c_gate_ctrl)
436 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 437 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
438 return 0;
439}
440
441static int philips_europa_demod_sleep(struct dvb_frontend *fe)
442{
443 struct saa7134_dev *dev = fe->dvb->priv;
444
445 if (dev->original_demod_sleep)
446 dev->original_demod_sleep(fe);
dea74869 447 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 448 return 0;
2cf36ac4
HH
449}
450
451static struct tda1004x_config philips_europa_config = {
452
453 .demod_address = 0x8,
454 .invert = 0,
455 .invert_oclk = 0,
456 .xtal_freq = TDA10046_XTAL_4M,
457 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
458 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
459 .tuner_address = 0x61,
460 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
461};
462
408b664a 463static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
464 .demod_address = 0x08,
465 .invert = 1,
466 .invert_oclk = 0,
467 .xtal_freq = TDA10046_XTAL_16M,
468 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
469 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
470 .tuner_address = 0x61,
471 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
472};
473
58ef4f92
HH
474/* ------------------------------------------------------------------
475 * tda 1004x based cards with philips silicon tuner
476 */
477
58ef4f92
HH
478static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
479{
58ef4f92
HH
480 struct tda1004x_state *state = fe->demodulator_priv;
481
482 u8 addr = state->config->i2c_gate;
483 static u8 tda8290_close[] = { 0x21, 0xc0};
484 static u8 tda8290_open[] = { 0x21, 0x80};
485 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
486 if (enable) {
487 tda8290_msg.buf = tda8290_close;
488 } else {
489 tda8290_msg.buf = tda8290_open;
490 }
06be3035 491 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
492 struct saa7134_dev *dev = fe->dvb->priv;
493 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
494 return -EIO;
495 }
496 msleep(20);
497 return 0;
498}
499
58ef4f92 500static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 501{
90e9df7f 502 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 503 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 504
58ef4f92
HH
505 switch (state->config->antenna_switch) {
506 case 0: break;
507 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
508 saa7134_set_gpio(dev, 21, 0);
509 break;
510 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
511 saa7134_set_gpio(dev, 21, 1);
512 break;
587d2fd7 513 }
587d2fd7
HH
514 return 0;
515}
516
58ef4f92 517static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 518{
58ef4f92
HH
519 struct saa7134_dev *dev = fe->dvb->priv;
520 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 521
58ef4f92
HH
522 switch (state->config->antenna_switch) {
523 case 0: break;
524 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
525 saa7134_set_gpio(dev, 21, 1);
526 break;
527 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
528 saa7134_set_gpio(dev, 21, 0);
529 break;
530 }
587d2fd7 531 return 0;
2d6b5f62 532}
90e9df7f 533
d557dab5
MCC
534static int configure_tda827x_fe(struct saa7134_dev *dev,
535 struct tda1004x_config *cdec_conf,
536 struct tda827x_config *tuner_conf)
90e9df7f 537{
363c35fc
ST
538 struct videobuf_dvb_frontend *fe0;
539
92abe9ee
DB
540 /* Get the first frontend */
541 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST
542
543 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
544 if (fe0->dvb.frontend) {
7bff4b4d 545 if (cdec_conf->i2c_gate)
363c35fc
ST
546 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
547 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC
548 cdec_conf->tuner_address,
549 &dev->i2c_adap, tuner_conf))
550 return 0;
551
552 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 553 cdec_conf->tuner_address);
58ef4f92 554 }
d557dab5 555 return -EINVAL;
90e9df7f
HH
556}
557
58ef4f92 558/* ------------------------------------------------------------------ */
261f5081 559
7bff4b4d 560static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH
561 .init = philips_tda827x_tuner_init,
562 .sleep = philips_tda827x_tuner_sleep,
563 .config = 0,
564 .switch_addr = 0
565};
566
567static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH
568 .init = philips_tda827x_tuner_init,
569 .sleep = philips_tda827x_tuner_sleep,
570 .config = 1,
571 .switch_addr = 0x4b
572};
573
574static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH
575 .init = philips_tda827x_tuner_init,
576 .sleep = philips_tda827x_tuner_sleep,
577 .config = 2,
578 .switch_addr = 0x4b
579};
580
581static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH
582 .init = philips_tda827x_tuner_init,
583 .sleep = philips_tda827x_tuner_sleep,
584 .config = 2,
585 .switch_addr = 0x42
586};
587
588/* ------------------------------------------------------------------ */
589
58ef4f92 590static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
591 .demod_address = 0x08,
592 .invert = 1,
593 .invert_oclk = 0,
594 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
595 .agc_config = TDA10046_AGC_TDA827X,
596 .gpio_config = TDA10046_GP11_I,
550a9a5e 597 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
598 .tuner_address = 0x60,
599 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 600};
550a9a5e 601
58ef4f92
HH
602static struct tda1004x_config philips_tiger_config = {
603 .demod_address = 0x08,
604 .invert = 1,
605 .invert_oclk = 0,
606 .xtal_freq = TDA10046_XTAL_16M,
607 .agc_config = TDA10046_AGC_TDA827X,
608 .gpio_config = TDA10046_GP11_I,
609 .if_freq = TDA10046_FREQ_045,
610 .i2c_gate = 0x4b,
611 .tuner_address = 0x61,
58ef4f92
HH
612 .antenna_switch= 1,
613 .request_firmware = philips_tda1004x_request_firmware
614};
550a9a5e
HH
615
616static struct tda1004x_config cinergy_ht_config = {
617 .demod_address = 0x08,
618 .invert = 1,
619 .invert_oclk = 0,
620 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
621 .agc_config = TDA10046_AGC_TDA827X,
622 .gpio_config = TDA10046_GP01_I,
90e9df7f 623 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
624 .i2c_gate = 0x4b,
625 .tuner_address = 0x61,
58ef4f92 626 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
627};
628
58ef4f92
HH
629static struct tda1004x_config cinergy_ht_pci_config = {
630 .demod_address = 0x08,
631 .invert = 1,
632 .invert_oclk = 0,
633 .xtal_freq = TDA10046_XTAL_16M,
634 .agc_config = TDA10046_AGC_TDA827X,
635 .gpio_config = TDA10046_GP01_I,
636 .if_freq = TDA10046_FREQ_045,
637 .i2c_gate = 0x4b,
638 .tuner_address = 0x60,
58ef4f92
HH
639 .request_firmware = philips_tda1004x_request_firmware
640};
641
642static struct tda1004x_config philips_tiger_s_config = {
643 .demod_address = 0x08,
644 .invert = 1,
645 .invert_oclk = 0,
646 .xtal_freq = TDA10046_XTAL_16M,
647 .agc_config = TDA10046_AGC_TDA827X,
648 .gpio_config = TDA10046_GP01_I,
649 .if_freq = TDA10046_FREQ_045,
650 .i2c_gate = 0x4b,
651 .tuner_address = 0x61,
58ef4f92
HH
652 .antenna_switch= 1,
653 .request_firmware = philips_tda1004x_request_firmware
654};
df42eaf2 655
587d2fd7
HH
656static struct tda1004x_config pinnacle_pctv_310i_config = {
657 .demod_address = 0x08,
658 .invert = 1,
659 .invert_oclk = 0,
660 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
661 .agc_config = TDA10046_AGC_TDA827X,
662 .gpio_config = TDA10046_GP11_I,
587d2fd7 663 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
664 .i2c_gate = 0x4b,
665 .tuner_address = 0x61,
58ef4f92 666 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
667};
668
c6e53daf
TG
669static struct tda1004x_config hauppauge_hvr_1110_config = {
670 .demod_address = 0x08,
671 .invert = 1,
672 .invert_oclk = 0,
673 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
674 .agc_config = TDA10046_AGC_TDA827X,
675 .gpio_config = TDA10046_GP11_I,
c6e53daf 676 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
677 .i2c_gate = 0x4b,
678 .tuner_address = 0x61,
679 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
680};
681
83646817
HH
682static struct tda1004x_config asus_p7131_dual_config = {
683 .demod_address = 0x08,
684 .invert = 1,
685 .invert_oclk = 0,
686 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
687 .agc_config = TDA10046_AGC_TDA827X,
688 .gpio_config = TDA10046_GP11_I,
83646817 689 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
690 .i2c_gate = 0x4b,
691 .tuner_address = 0x61,
58ef4f92
HH
692 .antenna_switch= 2,
693 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
694};
695
420f32fe
NS
696static struct tda1004x_config lifeview_trio_config = {
697 .demod_address = 0x09,
698 .invert = 1,
699 .invert_oclk = 0,
700 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
701 .agc_config = TDA10046_AGC_TDA827X,
702 .gpio_config = TDA10046_GP00_I,
420f32fe 703 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
704 .tuner_address = 0x60,
705 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
706};
707
58ef4f92 708static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
709 .demod_address = 0x08,
710 .invert = 1,
711 .invert_oclk = 0,
712 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 713 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 714 .gpio_config = TDA10046_GP11_I,
df42eaf2 715 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
716 .tuner_address = 0x60,
717 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
718};
719
58ef4f92 720static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
721 .demod_address = 0x08,
722 .invert = 1,
723 .invert_oclk = 0,
724 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 725 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 726 .gpio_config = TDA10046_GP01_I,
3dfb729f 727 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
728 .i2c_gate = 0x4b,
729 .tuner_address = 0x60,
58ef4f92 730 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
731};
732
e06cea4c
HH
733static struct tda1004x_config asus_p7131_4871_config = {
734 .demod_address = 0x08,
735 .invert = 1,
736 .invert_oclk = 0,
737 .xtal_freq = TDA10046_XTAL_16M,
738 .agc_config = TDA10046_AGC_TDA827X,
739 .gpio_config = TDA10046_GP01_I,
740 .if_freq = TDA10046_FREQ_045,
741 .i2c_gate = 0x4b,
742 .tuner_address = 0x61,
e06cea4c
HH
743 .antenna_switch= 2,
744 .request_firmware = philips_tda1004x_request_firmware
745};
746
f3eec0c0 747static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
748 .demod_address = 0x08,
749 .invert = 1,
750 .invert_oclk = 0,
751 .xtal_freq = TDA10046_XTAL_16M,
752 .agc_config = TDA10046_AGC_TDA827X,
753 .gpio_config = TDA10046_GP11_I,
754 .if_freq = TDA10046_FREQ_045,
755 .i2c_gate = 0x4b,
756 .tuner_address = 0x61,
e06cea4c
HH
757 .antenna_switch= 2,
758 .request_firmware = philips_tda1004x_request_firmware
759};
261f5081 760
b39423a9
SF
761static struct tda1004x_config kworld_dvb_t_210_config = {
762 .demod_address = 0x08,
763 .invert = 1,
764 .invert_oclk = 0,
765 .xtal_freq = TDA10046_XTAL_16M,
766 .agc_config = TDA10046_AGC_TDA827X,
767 .gpio_config = TDA10046_GP11_I,
768 .if_freq = TDA10046_FREQ_045,
769 .i2c_gate = 0x4b,
770 .tuner_address = 0x61,
b39423a9
SF
771 .antenna_switch= 1,
772 .request_firmware = philips_tda1004x_request_firmware
773};
261f5081 774
d90d9f5a
ES
775static struct tda1004x_config avermedia_super_007_config = {
776 .demod_address = 0x08,
777 .invert = 1,
778 .invert_oclk = 0,
779 .xtal_freq = TDA10046_XTAL_16M,
780 .agc_config = TDA10046_AGC_TDA827X,
781 .gpio_config = TDA10046_GP01_I,
782 .if_freq = TDA10046_FREQ_045,
783 .i2c_gate = 0x4b,
784 .tuner_address = 0x60,
d90d9f5a
ES
785 .antenna_switch= 1,
786 .request_firmware = philips_tda1004x_request_firmware
787};
788
4ba24373
HP
789static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
790 .demod_address = 0x08,
791 .invert = 1,
792 .invert_oclk = 0,
793 .xtal_freq = TDA10046_XTAL_16M,
794 .agc_config = TDA10046_AGC_TDA827X,
795 .gpio_config = TDA10046_GP01_I,
796 .if_freq = TDA10046_FREQ_045,
797 .i2c_gate = 0x42,
798 .tuner_address = 0x61,
4ba24373
HP
799 .antenna_switch = 1,
800 .request_firmware = philips_tda1004x_request_firmware
801};
802
301e9d64 803static struct tda1004x_config asus_tiger_3in1_config = {
804 .demod_address = 0x0b,
805 .invert = 1,
806 .invert_oclk = 0,
807 .xtal_freq = TDA10046_XTAL_16M,
808 .agc_config = TDA10046_AGC_TDA827X,
809 .gpio_config = TDA10046_GP11_I,
810 .if_freq = TDA10046_FREQ_045,
811 .i2c_gate = 0x4b,
812 .tuner_address = 0x61,
813 .antenna_switch = 1,
814 .request_firmware = philips_tda1004x_request_firmware
815};
816
58ef4f92
HH
817/* ------------------------------------------------------------------
818 * special case: this card uses saa713x GPIO22 for the mode switch
819 */
5eda227f 820
58ef4f92 821static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
822{
823 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
824 philips_tda827x_tuner_init(fe);
825 /* route TDA8275a AGC input to the channel decoder */
06be3035 826 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
827 return 0;
828}
829
58ef4f92 830static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 831{
5eda227f 832 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 833 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 834 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
835 philips_tda827x_tuner_sleep(fe);
836 return 0;
5eda227f
HH
837}
838
8ce47dad 839static struct tda827x_config ads_duo_cfg = {
8ce47dad 840 .init = ads_duo_tuner_init,
7bff4b4d
HH
841 .sleep = ads_duo_tuner_sleep,
842 .config = 0
8ce47dad
MK
843};
844
58ef4f92 845static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
846 .demod_address = 0x08,
847 .invert = 1,
848 .invert_oclk = 0,
849 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 850 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 851 .gpio_config = TDA10046_GP00_I,
5eda227f 852 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
853 .tuner_address = 0x61,
854 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
855};
856
58ef4f92
HH
857/* ==================================================================
858 * tda10086 based DVB-S cards, helper functions
859 */
860
e2ac28fa
IL
861static struct tda10086_config flydvbs = {
862 .demod_address = 0x0e,
863 .invert = 0,
ea75baf4 864 .diseqc_tone = 0,
9a1b04e4
HH
865 .xtal_freq = TDA10086_XTAL_16M,
866};
867
868static struct tda10086_config sd1878_4m = {
869 .demod_address = 0x0e,
870 .invert = 0,
871 .diseqc_tone = 0,
872 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL
873};
874
1b1cee35
HH
875/* ------------------------------------------------------------------
876 * special case: lnb supply is connected to the gated i2c
877 */
878
879static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
880{
881 int res = -EIO;
882 struct saa7134_dev *dev = fe->dvb->priv;
883 if (fe->ops.i2c_gate_ctrl) {
884 fe->ops.i2c_gate_ctrl(fe, 1);
885 if (dev->original_set_voltage)
886 res = dev->original_set_voltage(fe, voltage);
887 fe->ops.i2c_gate_ctrl(fe, 0);
888 }
889 return res;
890};
891
892static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
893{
894 int res = -EIO;
895 struct saa7134_dev *dev = fe->dvb->priv;
896 if (fe->ops.i2c_gate_ctrl) {
897 fe->ops.i2c_gate_ctrl(fe, 1);
898 if (dev->original_set_high_voltage)
899 res = dev->original_set_high_voltage(fe, arg);
900 fe->ops.i2c_gate_ctrl(fe, 0);
901 }
902 return res;
903};
904
5823b3a6
HH
905static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
906{
907 struct saa7134_dev *dev = fe->dvb->priv;
908 u8 wbuf[2] = { 0x1f, 00 };
909 u8 rbuf;
910 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
911 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
912
913 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
914 return -EIO;
915 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
916 if (voltage == SEC_VOLTAGE_18)
917 wbuf[1] = rbuf | 0x10;
918 else
919 wbuf[1] = rbuf & 0xef;
920 msg[0].len = 2;
921 i2c_transfer(&dev->i2c_adap, msg, 1);
922 return 0;
923}
924
925static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
926{
927 struct saa7134_dev *dev = fe->dvb->priv;
928 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
929 return -EIO;
930}
931
58ef4f92
HH
932/* ==================================================================
933 * nxt200x based ATSC cards, helper functions
934 */
90e9df7f 935
3b64e8e2
MK
936static struct nxt200x_config avertvhda180 = {
937 .demod_address = 0x0a,
3b64e8e2 938};
3e1410ad
AB
939
940static struct nxt200x_config kworldatsc110 = {
941 .demod_address = 0x0a,
3e1410ad 942};
3b64e8e2 943
58ef4f92
HH
944/* ==================================================================
945 * Core code
946 */
1da177e4
LT
947
948static int dvb_init(struct saa7134_dev *dev)
949{
1c4f76ab 950 int ret;
bc36a686 951 int attach_xc3028 = 0;
363c35fc
ST
952 struct videobuf_dvb_frontend *fe0;
953
954 /* Get the first frontend */
92abe9ee 955 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST
956 if (!fe0)
957 return -EINVAL;
bc36a686 958
1da177e4
LT
959 /* init struct videobuf_dvb */
960 dev->ts.nr_bufs = 32;
961 dev->ts.nr_packets = 32*4;
363c35fc
ST
962 fe0->dvb.name = dev->name;
963 videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops,
0705135e 964 &dev->pci->dev, &dev->slock,
1da177e4
LT
965 V4L2_BUF_TYPE_VIDEO_CAPTURE,
966 V4L2_FIELD_ALTERNATE,
967 sizeof(struct saa7134_buf),
968 dev);
969
970 switch (dev->board) {
971 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 972 dprintk("pinnacle 300i dvb setup\n");
363c35fc 973 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 974 &dev->i2c_adap);
363c35fc
ST
975 if (fe0->dvb.frontend) {
976 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 977 }
1da177e4 978 break;
a78d0bfa 979 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 980 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 981 dprintk("avertv 777 dvb setup\n");
363c35fc 982 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 983 &dev->i2c_adap);
363c35fc
ST
984 if (fe0->dvb.frontend) {
985 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK
986 &dev->i2c_adap, 0x61,
987 TUNER_PHILIPS_TD1316);
6b3ccab7 988 }
a78d0bfa 989 break;
95a2fdb6 990 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f 991 dprintk("AverMedia A16D dvb setup\n");
363c35fc 992 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
993 &avermedia_xc3028_mt352_dev,
994 &dev->i2c_adap);
95a2fdb6
MCC
995 attach_xc3028 = 1;
996 break;
1da177e4 997 case SAA7134_BOARD_MD7134:
363c35fc 998 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
999 &medion_cardbus,
1000 &dev->i2c_adap);
363c35fc
ST
1001 if (fe0->dvb.frontend) {
1002 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1003 &dev->i2c_adap, medion_cardbus.tuner_address,
1004 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1005 }
1da177e4 1006 break;
86ddd96f 1007 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1008 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1009 &philips_tu1216_60_config,
1010 &dev->i2c_adap);
363c35fc
ST
1011 if (fe0->dvb.frontend) {
1012 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1013 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1014 }
86ddd96f
MCC
1015 break;
1016 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1017 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC
1018 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1019 &tda827x_cfg_0) < 0)
1020 goto dettach_frontend;
86ddd96f 1021 break;
2cf36ac4 1022 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1023 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
363c35fc 1024 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1025 &philips_europa_config,
1026 &dev->i2c_adap);
363c35fc
ST
1027 if (fe0->dvb.frontend) {
1028 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1029 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1030 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1031 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1032 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1033 }
2cf36ac4
HH
1034 break;
1035 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1036 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1037 &philips_tu1216_61_config,
1038 &dev->i2c_adap);
363c35fc
ST
1039 if (fe0->dvb.frontend) {
1040 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1041 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1042 }
2cf36ac4 1043 break;
b39423a9 1044 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC
1045 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1046 &tda827x_cfg_2) < 0)
1047 goto dettach_frontend;
b39423a9 1048 break;
90e9df7f 1049 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC
1050 if (configure_tda827x_fe(dev, &philips_tiger_config,
1051 &tda827x_cfg_0) < 0)
1052 goto dettach_frontend;
587d2fd7
HH
1053 break;
1054 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC
1055 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1056 &tda827x_cfg_1) < 0)
1057 goto dettach_frontend;
90e9df7f 1058 break;
c6e53daf 1059 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC
1060 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1061 &tda827x_cfg_1) < 0)
1062 goto dettach_frontend;
c6e53daf 1063 break;
d4b0aba4 1064 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC
1065 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1066 &tda827x_cfg_0) < 0)
1067 goto dettach_frontend;
d4b0aba4 1068 break;
3d8466ec 1069 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC
1070 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1071 &tda827x_cfg_0) < 0)
1072 goto dettach_frontend;
3d8466ec 1073 break;
92abe9ee 1074 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC
1075 if (!use_frontend) { /* terrestrial */
1076 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1077 &tda827x_cfg_0) < 0)
1078 goto dettach_frontend;
7bff4b4d 1079 } else { /* satellite */
363c35fc
ST
1080 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1081 if (fe0->dvb.frontend) {
1082 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1083 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1084 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
d557dab5 1085 goto dettach_frontend;
1f683cd8 1086 }
363c35fc 1087 if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap,
1f683cd8 1088 0x08, 0, 0) == NULL) {
5823b3a6 1089 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
d557dab5 1090 goto dettach_frontend;
1f683cd8
NS
1091 }
1092 }
6b3ccab7 1093 }
420f32fe 1094 break;
df42eaf2 1095 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1096 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1097 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1098 &ads_tech_duo_config,
1099 &dev->i2c_adap);
363c35fc
ST
1100 if (fe0->dvb.frontend) {
1101 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH
1102 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1103 &ads_duo_cfg) == NULL) {
cf3c34c8 1104 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1105 ads_tech_duo_config.tuner_address);
d557dab5 1106 goto dettach_frontend;
ede2200d 1107 }
bc36ec74
MCC
1108 } else
1109 wprintk("failed to attach tda10046\n");
df42eaf2 1110 break;
3dfb729f 1111 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC
1112 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1113 &tda827x_cfg_0) < 0)
1114 goto dettach_frontend;
d95b8942 1115 break;
5eda227f 1116 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1117 if (!use_frontend) { /* terrestrial */
d557dab5
MCC
1118 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1119 &tda827x_cfg_0) < 0)
1120 goto dettach_frontend;
4b1431ca 1121 } else { /* satellite */
363c35fc 1122 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1123 &flydvbs, &dev->i2c_adap);
363c35fc
ST
1124 if (fe0->dvb.frontend) {
1125 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH
1126 u8 dev_id = dev->eedata[2];
1127 u8 data = 0xc4;
1128 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1129
363c35fc 1130 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1131 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1132 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1133 "found !\n", __func__);
d557dab5
MCC
1134 goto dettach_frontend;
1135 }
5823b3a6
HH
1136 if (dev_id != 0x08) {
1137 /* we need to open the i2c gate (we know it exists) */
1138 fe->ops.i2c_gate_ctrl(fe, 1);
1139 if (dvb_attach(isl6405_attach, fe,
d557dab5 1140 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH
1141 wprintk("%s: Medion Quadro, no ISL6405 "
1142 "found !\n", __func__);
d557dab5
MCC
1143 goto dettach_frontend;
1144 }
e9c1ac9d
HH
1145 if (dev_id == 0x07) {
1146 /* fire up the 2nd section of the LNB supply since
1147 we can't do this from the other section */
1148 msg.buf = &data;
1149 i2c_transfer(&dev->i2c_adap, &msg, 1);
1150 }
5823b3a6
HH
1151 fe->ops.i2c_gate_ctrl(fe, 0);
1152 dev->original_set_voltage = fe->ops.set_voltage;
1153 fe->ops.set_voltage = md8800_set_voltage;
1154 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1155 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1156 } else {
1157 fe->ops.set_voltage = md8800_set_voltage2;
1158 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1159 }
4b1431ca
HH
1160 }
1161 }
5eda227f 1162 break;
3b64e8e2 1163 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1164 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1165 &dev->i2c_adap);
363c35fc
ST
1166 if (fe0->dvb.frontend)
1167 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1168 NULL, DVB_PLL_TDHU2);
3b64e8e2 1169 break;
f689d908 1170 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1171 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1172 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1173 &dev->i2c_adap);
363c35fc
ST
1174 if (fe0->dvb.frontend)
1175 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK
1176 &dev->i2c_adap, 0x61,
1177 TUNER_PHILIPS_TUV1236D);
3e1410ad 1178 break;
e2ac28fa 1179 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1180 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1181 &dev->i2c_adap);
363c35fc
ST
1182 if (fe0->dvb.frontend) {
1183 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1184 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1185 wprintk("%s: No tda826x found!\n", __func__);
d557dab5 1186 goto dettach_frontend;
e2ac28fa 1187 }
363c35fc 1188 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
f7b54b10 1189 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1190 wprintk("%s: No ISL6421 found!\n", __func__);
d557dab5 1191 goto dettach_frontend;
e2ac28fa
IL
1192 }
1193 }
1194 break;
cf146ca4 1195 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1196 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS
1197 &medion_cardbus,
1198 &dev->i2c_adap);
363c35fc
ST
1199 if (fe0->dvb.frontend) {
1200 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1201 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1202
363c35fc 1203 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1204 &dev->i2c_adap, medion_cardbus.tuner_address,
1205 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH
1206 }
1207 break;
cbb94521 1208 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1209 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH
1210 &philips_europa_config,
1211 &dev->i2c_adap);
363c35fc
ST
1212 if (fe0->dvb.frontend) {
1213 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1214 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH
1215 }
1216 break;
550a9a5e 1217 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC
1218 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1219 &tda827x_cfg_0) < 0)
1220 goto dettach_frontend;
9de271e6
MK
1221 break;
1222 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC
1223 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1224 &tda827x_cfg_0) < 0)
1225 goto dettach_frontend;
58ef4f92
HH
1226 break;
1227 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC
1228 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1229 &tda827x_cfg_2) < 0)
1230 goto dettach_frontend;
550a9a5e 1231 break;
e06cea4c 1232 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC
1233 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1234 &tda827x_cfg_2) < 0)
1235 goto dettach_frontend;
e06cea4c 1236 break;
f3eec0c0 1237 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC
1238 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1239 &tda827x_cfg_2) < 0)
1240 goto dettach_frontend;
e06cea4c 1241 break;
d90d9f5a 1242 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC
1243 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1244 &tda827x_cfg_0) < 0)
1245 goto dettach_frontend;
d90d9f5a 1246 break;
4ba24373 1247 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC
1248 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1249 &tda827x_cfg_2_sw42) < 0)
1250 goto dettach_frontend;
4ba24373 1251 break;
6ab465a8 1252 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1253 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1254 &dev->i2c_adap);
363c35fc
ST
1255 if (fe0->dvb.frontend) {
1256 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1257 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1258 wprintk("%s: No tda826x found!\n", __func__);
d557dab5
MCC
1259 goto dettach_frontend;
1260 }
363c35fc 1261 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1262 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1263 wprintk("%s: No lnbp21 found!\n", __func__);
d557dab5
MCC
1264 goto dettach_frontend;
1265 }
6ab465a8
HH
1266 }
1267 break;
7b5b3f17 1268 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC
1269 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1270 &tda827x_cfg_0) < 0)
1271 goto dettach_frontend;
7b5b3f17 1272 break;
6a6179b6 1273 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC
1274 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1275 &tda827x_cfg_2) < 0)
1276 goto dettach_frontend;
6a6179b6 1277 break;
bc36a686 1278 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF
1279 dprintk("AverMedia E506R dvb setup\n");
1280 saa7134_set_gpio(dev, 25, 0);
1281 msleep(10);
1282 saa7134_set_gpio(dev, 25, 1);
363c35fc 1283 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1284 &avermedia_xc3028_mt352_dev,
1285 &dev->i2c_adap);
bc36a686 1286 attach_xc3028 = 1;
e2fc00c2 1287 break;
637afdb5 1288 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1289 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1290 &sd1878_4m, &dev->i2c_adap);
363c35fc 1291 if (fe0->dvb.frontend) {
637afdb5 1292 struct dvb_frontend *fe;
363c35fc 1293 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1294 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1295 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1296 "found !\n", __func__);
d557dab5
MCC
1297 goto dettach_frontend;
1298 }
637afdb5 1299 /* we need to open the i2c gate (we know it exists) */
363c35fc 1300 fe = fe0->dvb.frontend;
637afdb5
HH
1301 fe->ops.i2c_gate_ctrl(fe, 1);
1302 if (dvb_attach(isl6405_attach, fe,
d557dab5 1303 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1304 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1305 "found !\n", __func__);
d557dab5
MCC
1306 goto dettach_frontend;
1307 }
637afdb5
HH
1308 fe->ops.i2c_gate_ctrl(fe, 0);
1309 dev->original_set_voltage = fe->ops.set_voltage;
1310 fe->ops.set_voltage = md8800_set_voltage;
1311 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1312 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1313 }
1314 break;
e2fc00c2
MP
1315 case SAA7134_BOARD_AVERMEDIA_M103:
1316 saa7134_set_gpio(dev, 25, 0);
1317 msleep(10);
1318 saa7134_set_gpio(dev, 25, 1);
363c35fc 1319 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP
1320 &avermedia_xc3028_mt352_dev,
1321 &dev->i2c_adap);
1322 attach_xc3028 = 1;
1323 break;
301e9d64 1324 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1325 if (!use_frontend) { /* terrestrial */
1326 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1327 &tda827x_cfg_2) < 0)
1328 goto dettach_frontend;
1329 } else { /* satellite */
363c35fc 1330 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1331 &flydvbs, &dev->i2c_adap);
363c35fc 1332 if (fe0->dvb.frontend) {
301e9d64 1333 if (dvb_attach(tda826x_attach,
363c35fc 1334 fe0->dvb.frontend, 0x60,
301e9d64 1335 &dev->i2c_adap, 0) == NULL) {
1336 wprintk("%s: Asus Tiger 3in1, no "
1337 "tda826x found!\n", __func__);
1338 goto dettach_frontend;
1339 }
363c35fc 1340 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1341 &dev->i2c_adap, 0, 0) == NULL) {
1342 wprintk("%s: Asus Tiger 3in1, no lnbp21"
1343 " found!\n", __func__);
1344 goto dettach_frontend;
1345 }
1346 }
1347 }
1348 break;
028165a3
HP
1349 case SAA7134_BOARD_ASUSTeK_TIGER:
1350 if (configure_tda827x_fe(dev, &philips_tiger_config,
1351 &tda827x_cfg_0) < 0)
1352 goto dettach_frontend;
1353 break;
1da177e4 1354 default:
cf3c34c8 1355 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1356 break;
1357 }
1358
bc36a686
MCC
1359 if (attach_xc3028) {
1360 struct dvb_frontend *fe;
1361 struct xc2028_config cfg = {
1362 .i2c_adap = &dev->i2c_adap,
1363 .i2c_addr = 0x61,
bc36a686 1364 };
95a2fdb6 1365
363c35fc 1366 if (!fe0->dvb.frontend)
95a2fdb6
MCC
1367 return -1;
1368
363c35fc 1369 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686
MCC
1370 if (!fe) {
1371 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1372 dev->name);
d557dab5 1373 goto dettach_frontend;
bc36a686
MCC
1374 }
1375 }
1376
363c35fc 1377 if (NULL == fe0->dvb.frontend) {
cf3c34c8 1378 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
1da177e4
LT
1379 return -1;
1380 }
d7cba043 1381 /* define general-purpose callback pointer */
363c35fc 1382 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT
1383
1384 /* register everything else */
363c35fc
ST
1385 ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1386 &dev->pci->dev, adapter_nr);
1c4f76ab
HH
1387
1388 /* this sequence is necessary to make the tda1004x load its firmware
1389 * and to enter analog mode of hybrid boards
1390 */
1391 if (!ret) {
363c35fc
ST
1392 if (fe0->dvb.frontend->ops.init)
1393 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1394 if (fe0->dvb.frontend->ops.sleep)
1395 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1396 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1397 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH
1398 }
1399 return ret;
d557dab5
MCC
1400
1401dettach_frontend:
363c35fc
ST
1402 if (fe0->dvb.frontend)
1403 dvb_frontend_detach(fe0->dvb.frontend);
1404 fe0->dvb.frontend = NULL;
d557dab5
MCC
1405
1406 return -1;
1da177e4
LT
1407}
1408
1409static int dvb_fini(struct saa7134_dev *dev)
1410{
363c35fc
ST
1411 struct videobuf_dvb_frontend *fe0;
1412
1413 /* Get the first frontend */
1414 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
1415 if (!fe0)
1416 return -EINVAL;
1417
7f171123
MCC
1418 /* FIXME: I suspect that this code is bogus, since the entry for
1419 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1420 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1421 */
1422 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1423 struct v4l2_priv_tun_config tda9887_cfg;
1424 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1425
1426 tda9887_cfg.tuner = TUNER_TDA9887;
1427 tda9887_cfg.priv = &on;
1da177e4 1428
1da177e4 1429 /* otherwise we don't detect the tuner on next insmod */
7f171123 1430 saa7134_i2c_call_clients(dev, TUNER_SET_CONFIG, &tda9887_cfg);
5823b3a6 1431 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1432 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH
1433 /* turn off the 2nd lnb supply */
1434 u8 data = 0x80;
1435 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1436 struct dvb_frontend *fe;
363c35fc 1437 fe = fe0->dvb.frontend;
5823b3a6
HH
1438 if (fe->ops.i2c_gate_ctrl) {
1439 fe->ops.i2c_gate_ctrl(fe, 1);
1440 i2c_transfer(&dev->i2c_adap, &msg, 1);
1441 fe->ops.i2c_gate_ctrl(fe, 0);
1442 }
1443 }
7f171123 1444 }
363c35fc
ST
1445 if (fe0->dvb.frontend)
1446 videobuf_dvb_unregister_bus(&dev->frontends);
1da177e4
LT
1447 return 0;
1448}
1449
1450static struct saa7134_mpeg_ops dvb_ops = {
1451 .type = SAA7134_MPEG_DVB,
1452 .init = dvb_init,
1453 .fini = dvb_fini,
1454};
1455
1456static int __init dvb_register(void)
1457{
1458 return saa7134_ts_register(&dvb_ops);
1459}
1460
1461static void __exit dvb_unregister(void)
1462{
1463 saa7134_ts_unregister(&dvb_ops);
1464}
1465
1466module_init(dvb_register);
1467module_exit(dvb_unregister);
1468
1469/* ------------------------------------------------------------------ */
1470/*
1471 * Local variables:
1472 * c-basic-offset: 8
1473 * End:
1474 */
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