Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
5823b3a6 | 36 | #include <dvb_frontend.h> |
1da177e4 | 37 | |
1f10c7af AQ |
38 | #include "mt352.h" |
39 | #include "mt352_priv.h" /* FIXME */ | |
40 | #include "tda1004x.h" | |
41 | #include "nxt200x.h" | |
bc36a686 | 42 | #include "tuner-xc2028.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
8ce47dad | 50 | |
1da177e4 LT |
51 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
52 | MODULE_LICENSE("GPL"); | |
53 | ||
ff699e6b | 54 | static unsigned int antenna_pwr; |
86ddd96f | 55 | |
1da177e4 LT |
56 | module_param(antenna_pwr, int, 0444); |
57 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
58 | ||
ff699e6b | 59 | static int use_frontend; |
b331daa0 SB |
60 | module_param(use_frontend, int, 0644); |
61 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 62 | |
ff699e6b | 63 | static int debug; |
58ef4f92 HH |
64 | module_param(debug, int, 0644); |
65 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
66 | ||
cf3c34c8 TP |
67 | #define dprintk(fmt, arg...) do { if (debug) \ |
68 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
69 | ||
70 | /* Print a warning */ | |
71 | #define wprintk(fmt, arg...) \ | |
72 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
73 | |
74 | /* ------------------------------------------------------------------ | |
75 | * mt352 based DVB-T cards | |
76 | */ | |
77 | ||
1da177e4 LT |
78 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
79 | { | |
80 | u32 ok; | |
81 | ||
82 | if (!on) { | |
83 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
84 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
85 | return 0; | |
86 | } | |
87 | ||
88 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
89 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
90 | udelay(10); | |
91 | ||
92 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
93 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
94 | udelay(10); | |
95 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
96 | udelay(10); | |
97 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 98 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
99 | |
100 | if (!ok) | |
101 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
102 | return ok; | |
103 | } | |
104 | ||
105 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
106 | { | |
107 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
108 | static u8 reset [] = { RESET, 0x80 }; | |
109 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
110 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
111 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
112 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
113 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
114 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
115 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
116 | struct saa7134_dev *dev= fe->dvb->priv; | |
117 | ||
5823b3a6 | 118 | dprintk("%s called\n", __func__); |
1da177e4 LT |
119 | |
120 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
121 | udelay(200); | |
122 | mt352_write(fe, reset, sizeof(reset)); | |
123 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
124 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
125 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
126 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
127 | ||
128 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
129 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
130 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 131 | |
1da177e4 LT |
132 | return 0; |
133 | } | |
134 | ||
a78d0bfa JAR |
135 | static int mt352_aver777_init(struct dvb_frontend* fe) |
136 | { | |
137 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
138 | static u8 reset [] = { RESET, 0x80 }; | |
139 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
140 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
141 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
142 | ||
143 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
144 | udelay(200); | |
145 | mt352_write(fe, reset, sizeof(reset)); | |
146 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
147 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
148 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
0463f12c AQ |
153 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
154 | struct dvb_frontend_parameters* params) | |
1da177e4 | 155 | { |
df8cf706 HH |
156 | u8 off[] = { 0x00, 0xf1}; |
157 | u8 on[] = { 0x00, 0x71}; | |
158 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
159 | ||
1da177e4 LT |
160 | struct saa7134_dev *dev = fe->dvb->priv; |
161 | struct v4l2_frequency f; | |
162 | ||
163 | /* set frequency (mt2050) */ | |
164 | f.tuner = 0; | |
165 | f.type = V4L2_TUNER_DIGITAL_TV; | |
166 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
167 | if (fe->ops.i2c_gate_ctrl) |
168 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 169 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 | 170 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); |
df8cf706 | 171 | msg.buf = on; |
dea74869 PB |
172 | if (fe->ops.i2c_gate_ctrl) |
173 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 174 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
175 | |
176 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
177 | ||
178 | /* mt352 setup */ | |
0463f12c | 179 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
180 | } |
181 | ||
182 | static struct mt352_config pinnacle_300i = { | |
183 | .demod_address = 0x3c >> 1, | |
184 | .adc_clock = 20333, | |
185 | .if2 = 36150, | |
186 | .no_tuner = 1, | |
187 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 188 | }; |
a78d0bfa JAR |
189 | |
190 | static struct mt352_config avermedia_777 = { | |
191 | .demod_address = 0xf, | |
192 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 193 | }; |
1da177e4 | 194 | |
bc36a686 MCC |
195 | static struct mt352_config avermedia_e506r_mt352_dev = { |
196 | .demod_address = (0x1e >> 1), | |
197 | .no_tuner = 1, | |
198 | }; | |
199 | ||
58ef4f92 HH |
200 | /* ================================================================== |
201 | * tda1004x based DVB-T cards, helper functions | |
202 | */ | |
203 | ||
204 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
205 | const struct firmware **fw, char *name) | |
1da177e4 LT |
206 | { |
207 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
208 | return request_firmware(fw, name, &dev->pci->dev); |
209 | } | |
210 | ||
58ef4f92 HH |
211 | /* ------------------------------------------------------------------ |
212 | * these tuners are tu1216, td1316(a) | |
213 | */ | |
214 | ||
215 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
216 | { | |
217 | struct saa7134_dev *dev = fe->dvb->priv; | |
218 | struct tda1004x_state *state = fe->demodulator_priv; | |
219 | u8 addr = state->config->tuner_address; | |
86ddd96f | 220 | u8 tuner_buf[4]; |
2cf36ac4 | 221 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
222 | sizeof(tuner_buf) }; |
223 | int tuner_frequency = 0; | |
224 | u8 band, cp, filter; | |
225 | ||
226 | /* determine charge pump */ | |
227 | tuner_frequency = params->frequency + 36166000; | |
228 | if (tuner_frequency < 87000000) | |
229 | return -EINVAL; | |
230 | else if (tuner_frequency < 130000000) | |
231 | cp = 3; | |
232 | else if (tuner_frequency < 160000000) | |
233 | cp = 5; | |
234 | else if (tuner_frequency < 200000000) | |
235 | cp = 6; | |
236 | else if (tuner_frequency < 290000000) | |
237 | cp = 3; | |
238 | else if (tuner_frequency < 420000000) | |
239 | cp = 5; | |
240 | else if (tuner_frequency < 480000000) | |
241 | cp = 6; | |
242 | else if (tuner_frequency < 620000000) | |
243 | cp = 3; | |
244 | else if (tuner_frequency < 830000000) | |
245 | cp = 5; | |
246 | else if (tuner_frequency < 895000000) | |
247 | cp = 7; | |
248 | else | |
249 | return -EINVAL; | |
250 | ||
251 | /* determine band */ | |
252 | if (params->frequency < 49000000) | |
253 | return -EINVAL; | |
254 | else if (params->frequency < 161000000) | |
255 | band = 1; | |
256 | else if (params->frequency < 444000000) | |
257 | band = 2; | |
258 | else if (params->frequency < 861000000) | |
259 | band = 4; | |
260 | else | |
261 | return -EINVAL; | |
262 | ||
263 | /* setup PLL filter */ | |
264 | switch (params->u.ofdm.bandwidth) { | |
265 | case BANDWIDTH_6_MHZ: | |
266 | filter = 0; | |
267 | break; | |
268 | ||
269 | case BANDWIDTH_7_MHZ: | |
270 | filter = 0; | |
271 | break; | |
272 | ||
273 | case BANDWIDTH_8_MHZ: | |
274 | filter = 1; | |
275 | break; | |
1da177e4 | 276 | |
86ddd96f MCC |
277 | default: |
278 | return -EINVAL; | |
279 | } | |
280 | ||
281 | /* calculate divisor | |
282 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 283 | */ |
86ddd96f MCC |
284 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
285 | ||
286 | /* setup tuner buffer */ | |
287 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
288 | tuner_buf[1] = tuner_frequency & 0xff; | |
289 | tuner_buf[2] = 0xca; | |
290 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
291 | ||
dea74869 PB |
292 | if (fe->ops.i2c_gate_ctrl) |
293 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 294 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
295 | wprintk("could not write to tuner at addr: 0x%02x\n", |
296 | addr << 1); | |
86ddd96f | 297 | return -EIO; |
58ef4f92 | 298 | } |
2cf36ac4 HH |
299 | msleep(1); |
300 | return 0; | |
301 | } | |
302 | ||
58ef4f92 | 303 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
304 | { |
305 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
306 | struct tda1004x_state *state = fe->demodulator_priv; |
307 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
308 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
309 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 310 | |
2cf36ac4 | 311 | /* setup PLL configuration */ |
dea74869 PB |
312 | if (fe->ops.i2c_gate_ctrl) |
313 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
314 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
315 | return -EIO; | |
86ddd96f | 316 | msleep(1); |
2cf36ac4 | 317 | |
1da177e4 LT |
318 | return 0; |
319 | } | |
320 | ||
2cf36ac4 HH |
321 | /* ------------------------------------------------------------------ */ |
322 | ||
2cf36ac4 | 323 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
324 | .demod_address = 0x8, |
325 | .invert = 1, | |
2cf36ac4 | 326 | .invert_oclk = 0, |
86ddd96f MCC |
327 | .xtal_freq = TDA10046_XTAL_4M, |
328 | .agc_config = TDA10046_AGC_DEFAULT, | |
329 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
330 | .tuner_address = 0x60, |
331 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
332 | }; |
333 | ||
2cf36ac4 HH |
334 | static struct tda1004x_config philips_tu1216_61_config = { |
335 | ||
336 | .demod_address = 0x8, | |
337 | .invert = 1, | |
338 | .invert_oclk = 0, | |
339 | .xtal_freq = TDA10046_XTAL_4M, | |
340 | .agc_config = TDA10046_AGC_DEFAULT, | |
341 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
342 | .tuner_address = 0x61, |
343 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
344 | }; |
345 | ||
346 | /* ------------------------------------------------------------------ */ | |
347 | ||
cbb94521 | 348 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
349 | { |
350 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
351 | struct tda1004x_state *state = fe->demodulator_priv; |
352 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 353 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 354 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
355 | |
356 | /* setup PLL configuration */ | |
dea74869 PB |
357 | if (fe->ops.i2c_gate_ctrl) |
358 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
359 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
360 | return -EIO; | |
2cf36ac4 HH |
361 | return 0; |
362 | } | |
363 | ||
a79ddae9 | 364 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 365 | { |
58ef4f92 HH |
366 | return philips_tda6651_pll_set(fe, params); |
367 | } | |
368 | ||
369 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
370 | { | |
371 | struct saa7134_dev *dev = fe->dvb->priv; | |
372 | struct tda1004x_state *state = fe->demodulator_priv; | |
373 | u8 addr = state->config->tuner_address; | |
374 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
375 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
376 | ||
377 | /* switch the tuner to analog mode */ | |
378 | if (fe->ops.i2c_gate_ctrl) | |
379 | fe->ops.i2c_gate_ctrl(fe, 1); | |
380 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
381 | return -EIO; | |
382 | return 0; | |
2cf36ac4 HH |
383 | } |
384 | ||
58ef4f92 HH |
385 | /* ------------------------------------------------------------------ */ |
386 | ||
cbb94521 HH |
387 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
388 | { | |
389 | struct saa7134_dev *dev = fe->dvb->priv; | |
390 | static u8 msg[] = { 0x00, 0x40}; | |
391 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
392 | ||
393 | ||
394 | if (philips_td1316_tuner_init(fe)) | |
395 | return -EIO; | |
396 | msleep(1); | |
397 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
398 | return -EIO; | |
399 | ||
400 | return 0; | |
401 | } | |
402 | ||
a79ddae9 | 403 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
404 | { |
405 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 406 | |
58ef4f92 HH |
407 | static u8 msg[] = { 0x00, 0x14 }; |
408 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
409 | ||
410 | if (philips_td1316_tuner_sleep(fe)) | |
411 | return -EIO; | |
2cf36ac4 HH |
412 | |
413 | /* switch the board to analog mode */ | |
dea74869 PB |
414 | if (fe->ops.i2c_gate_ctrl) |
415 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 416 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
417 | return 0; |
418 | } | |
419 | ||
420 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
421 | { | |
422 | struct saa7134_dev *dev = fe->dvb->priv; | |
423 | ||
424 | if (dev->original_demod_sleep) | |
425 | dev->original_demod_sleep(fe); | |
dea74869 | 426 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 427 | return 0; |
2cf36ac4 HH |
428 | } |
429 | ||
430 | static struct tda1004x_config philips_europa_config = { | |
431 | ||
432 | .demod_address = 0x8, | |
433 | .invert = 0, | |
434 | .invert_oclk = 0, | |
435 | .xtal_freq = TDA10046_XTAL_4M, | |
436 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
437 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
438 | .tuner_address = 0x61, |
439 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
440 | }; |
441 | ||
408b664a | 442 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
443 | .demod_address = 0x08, |
444 | .invert = 1, | |
445 | .invert_oclk = 0, | |
446 | .xtal_freq = TDA10046_XTAL_16M, | |
447 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
448 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
449 | .tuner_address = 0x61, |
450 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
451 | }; |
452 | ||
58ef4f92 HH |
453 | /* ------------------------------------------------------------------ |
454 | * tda 1004x based cards with philips silicon tuner | |
455 | */ | |
456 | ||
58ef4f92 HH |
457 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
458 | { | |
58ef4f92 HH |
459 | struct tda1004x_state *state = fe->demodulator_priv; |
460 | ||
461 | u8 addr = state->config->i2c_gate; | |
462 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
463 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
464 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
465 | if (enable) { | |
466 | tda8290_msg.buf = tda8290_close; | |
467 | } else { | |
468 | tda8290_msg.buf = tda8290_open; | |
469 | } | |
06be3035 | 470 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
471 | struct saa7134_dev *dev = fe->dvb->priv; |
472 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
473 | return -EIO; |
474 | } | |
475 | msleep(20); | |
476 | return 0; | |
477 | } | |
478 | ||
58ef4f92 | 479 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 480 | { |
90e9df7f | 481 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 482 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 483 | |
58ef4f92 HH |
484 | switch (state->config->antenna_switch) { |
485 | case 0: break; | |
486 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
487 | saa7134_set_gpio(dev, 21, 0); | |
488 | break; | |
489 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
490 | saa7134_set_gpio(dev, 21, 1); | |
491 | break; | |
587d2fd7 | 492 | } |
587d2fd7 HH |
493 | return 0; |
494 | } | |
495 | ||
58ef4f92 | 496 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 497 | { |
58ef4f92 HH |
498 | struct saa7134_dev *dev = fe->dvb->priv; |
499 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 500 | |
58ef4f92 HH |
501 | switch (state->config->antenna_switch) { |
502 | case 0: break; | |
503 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
504 | saa7134_set_gpio(dev, 21, 1); | |
505 | break; | |
506 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
507 | saa7134_set_gpio(dev, 21, 0); | |
508 | break; | |
509 | } | |
587d2fd7 | 510 | return 0; |
2d6b5f62 | 511 | } |
90e9df7f | 512 | |
7bff4b4d HH |
513 | static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config *cdec_conf, |
514 | struct tda827x_config *tuner_conf) | |
90e9df7f | 515 | { |
7bff4b4d | 516 | dev->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); |
58ef4f92 | 517 | if (dev->dvb.frontend) { |
7bff4b4d | 518 | if (cdec_conf->i2c_gate) |
58ef4f92 | 519 | dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
7bff4b4d HH |
520 | if (dvb_attach(tda827x_attach, dev->dvb.frontend, cdec_conf->tuner_address, |
521 | &dev->i2c_adap, tuner_conf) == NULL) { | |
cf3c34c8 | 522 | wprintk("no tda827x tuner found at addr: %02x\n", |
7bff4b4d | 523 | cdec_conf->tuner_address); |
ede2200d | 524 | } |
58ef4f92 | 525 | } |
90e9df7f HH |
526 | } |
527 | ||
58ef4f92 | 528 | /* ------------------------------------------------------------------ */ |
261f5081 | 529 | |
7bff4b4d HH |
530 | static struct tda827x_config tda827x_cfg_0 = { |
531 | .tuner_callback = saa7134_tuner_callback, | |
532 | .init = philips_tda827x_tuner_init, | |
533 | .sleep = philips_tda827x_tuner_sleep, | |
534 | .config = 0, | |
535 | .switch_addr = 0 | |
536 | }; | |
537 | ||
538 | static struct tda827x_config tda827x_cfg_1 = { | |
539 | .tuner_callback = saa7134_tuner_callback, | |
540 | .init = philips_tda827x_tuner_init, | |
541 | .sleep = philips_tda827x_tuner_sleep, | |
542 | .config = 1, | |
543 | .switch_addr = 0x4b | |
544 | }; | |
545 | ||
546 | static struct tda827x_config tda827x_cfg_2 = { | |
547 | .tuner_callback = saa7134_tuner_callback, | |
548 | .init = philips_tda827x_tuner_init, | |
549 | .sleep = philips_tda827x_tuner_sleep, | |
550 | .config = 2, | |
551 | .switch_addr = 0x4b | |
552 | }; | |
553 | ||
554 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
555 | .tuner_callback = saa7134_tuner_callback, | |
556 | .init = philips_tda827x_tuner_init, | |
557 | .sleep = philips_tda827x_tuner_sleep, | |
558 | .config = 2, | |
559 | .switch_addr = 0x42 | |
560 | }; | |
561 | ||
562 | /* ------------------------------------------------------------------ */ | |
563 | ||
58ef4f92 | 564 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
565 | .demod_address = 0x08, |
566 | .invert = 1, | |
567 | .invert_oclk = 0, | |
568 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
569 | .agc_config = TDA10046_AGC_TDA827X, |
570 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 571 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
572 | .tuner_address = 0x60, |
573 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 574 | }; |
550a9a5e | 575 | |
58ef4f92 HH |
576 | static struct tda1004x_config philips_tiger_config = { |
577 | .demod_address = 0x08, | |
578 | .invert = 1, | |
579 | .invert_oclk = 0, | |
580 | .xtal_freq = TDA10046_XTAL_16M, | |
581 | .agc_config = TDA10046_AGC_TDA827X, | |
582 | .gpio_config = TDA10046_GP11_I, | |
583 | .if_freq = TDA10046_FREQ_045, | |
584 | .i2c_gate = 0x4b, | |
585 | .tuner_address = 0x61, | |
58ef4f92 HH |
586 | .antenna_switch= 1, |
587 | .request_firmware = philips_tda1004x_request_firmware | |
588 | }; | |
550a9a5e HH |
589 | |
590 | static struct tda1004x_config cinergy_ht_config = { | |
591 | .demod_address = 0x08, | |
592 | .invert = 1, | |
593 | .invert_oclk = 0, | |
594 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
595 | .agc_config = TDA10046_AGC_TDA827X, |
596 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 597 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
598 | .i2c_gate = 0x4b, |
599 | .tuner_address = 0x61, | |
58ef4f92 | 600 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
601 | }; |
602 | ||
58ef4f92 HH |
603 | static struct tda1004x_config cinergy_ht_pci_config = { |
604 | .demod_address = 0x08, | |
605 | .invert = 1, | |
606 | .invert_oclk = 0, | |
607 | .xtal_freq = TDA10046_XTAL_16M, | |
608 | .agc_config = TDA10046_AGC_TDA827X, | |
609 | .gpio_config = TDA10046_GP01_I, | |
610 | .if_freq = TDA10046_FREQ_045, | |
611 | .i2c_gate = 0x4b, | |
612 | .tuner_address = 0x60, | |
58ef4f92 HH |
613 | .request_firmware = philips_tda1004x_request_firmware |
614 | }; | |
615 | ||
616 | static struct tda1004x_config philips_tiger_s_config = { | |
617 | .demod_address = 0x08, | |
618 | .invert = 1, | |
619 | .invert_oclk = 0, | |
620 | .xtal_freq = TDA10046_XTAL_16M, | |
621 | .agc_config = TDA10046_AGC_TDA827X, | |
622 | .gpio_config = TDA10046_GP01_I, | |
623 | .if_freq = TDA10046_FREQ_045, | |
624 | .i2c_gate = 0x4b, | |
625 | .tuner_address = 0x61, | |
58ef4f92 HH |
626 | .antenna_switch= 1, |
627 | .request_firmware = philips_tda1004x_request_firmware | |
628 | }; | |
df42eaf2 | 629 | |
587d2fd7 HH |
630 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
631 | .demod_address = 0x08, | |
632 | .invert = 1, | |
633 | .invert_oclk = 0, | |
634 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
635 | .agc_config = TDA10046_AGC_TDA827X, |
636 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 637 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
638 | .i2c_gate = 0x4b, |
639 | .tuner_address = 0x61, | |
58ef4f92 | 640 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
641 | }; |
642 | ||
c6e53daf TG |
643 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
644 | .demod_address = 0x08, | |
645 | .invert = 1, | |
646 | .invert_oclk = 0, | |
647 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
648 | .agc_config = TDA10046_AGC_TDA827X, |
649 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 650 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
651 | .i2c_gate = 0x4b, |
652 | .tuner_address = 0x61, | |
653 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
654 | }; |
655 | ||
83646817 HH |
656 | static struct tda1004x_config asus_p7131_dual_config = { |
657 | .demod_address = 0x08, | |
658 | .invert = 1, | |
659 | .invert_oclk = 0, | |
660 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
661 | .agc_config = TDA10046_AGC_TDA827X, |
662 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 663 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
664 | .i2c_gate = 0x4b, |
665 | .tuner_address = 0x61, | |
58ef4f92 HH |
666 | .antenna_switch= 2, |
667 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
668 | }; |
669 | ||
420f32fe NS |
670 | static struct tda1004x_config lifeview_trio_config = { |
671 | .demod_address = 0x09, | |
672 | .invert = 1, | |
673 | .invert_oclk = 0, | |
674 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
675 | .agc_config = TDA10046_AGC_TDA827X, |
676 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 677 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
678 | .tuner_address = 0x60, |
679 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
680 | }; |
681 | ||
58ef4f92 | 682 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
683 | .demod_address = 0x08, |
684 | .invert = 1, | |
685 | .invert_oclk = 0, | |
686 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 687 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 688 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 689 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
690 | .tuner_address = 0x60, |
691 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
692 | }; |
693 | ||
58ef4f92 | 694 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
695 | .demod_address = 0x08, |
696 | .invert = 1, | |
697 | .invert_oclk = 0, | |
698 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 699 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 700 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 701 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
702 | .i2c_gate = 0x4b, |
703 | .tuner_address = 0x60, | |
58ef4f92 | 704 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
705 | }; |
706 | ||
e06cea4c HH |
707 | static struct tda1004x_config asus_p7131_4871_config = { |
708 | .demod_address = 0x08, | |
709 | .invert = 1, | |
710 | .invert_oclk = 0, | |
711 | .xtal_freq = TDA10046_XTAL_16M, | |
712 | .agc_config = TDA10046_AGC_TDA827X, | |
713 | .gpio_config = TDA10046_GP01_I, | |
714 | .if_freq = TDA10046_FREQ_045, | |
715 | .i2c_gate = 0x4b, | |
716 | .tuner_address = 0x61, | |
e06cea4c HH |
717 | .antenna_switch= 2, |
718 | .request_firmware = philips_tda1004x_request_firmware | |
719 | }; | |
720 | ||
f3eec0c0 | 721 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
722 | .demod_address = 0x08, |
723 | .invert = 1, | |
724 | .invert_oclk = 0, | |
725 | .xtal_freq = TDA10046_XTAL_16M, | |
726 | .agc_config = TDA10046_AGC_TDA827X, | |
727 | .gpio_config = TDA10046_GP11_I, | |
728 | .if_freq = TDA10046_FREQ_045, | |
729 | .i2c_gate = 0x4b, | |
730 | .tuner_address = 0x61, | |
e06cea4c HH |
731 | .antenna_switch= 2, |
732 | .request_firmware = philips_tda1004x_request_firmware | |
733 | }; | |
261f5081 | 734 | |
b39423a9 SF |
735 | static struct tda1004x_config kworld_dvb_t_210_config = { |
736 | .demod_address = 0x08, | |
737 | .invert = 1, | |
738 | .invert_oclk = 0, | |
739 | .xtal_freq = TDA10046_XTAL_16M, | |
740 | .agc_config = TDA10046_AGC_TDA827X, | |
741 | .gpio_config = TDA10046_GP11_I, | |
742 | .if_freq = TDA10046_FREQ_045, | |
743 | .i2c_gate = 0x4b, | |
744 | .tuner_address = 0x61, | |
b39423a9 SF |
745 | .antenna_switch= 1, |
746 | .request_firmware = philips_tda1004x_request_firmware | |
747 | }; | |
261f5081 | 748 | |
d90d9f5a ES |
749 | static struct tda1004x_config avermedia_super_007_config = { |
750 | .demod_address = 0x08, | |
751 | .invert = 1, | |
752 | .invert_oclk = 0, | |
753 | .xtal_freq = TDA10046_XTAL_16M, | |
754 | .agc_config = TDA10046_AGC_TDA827X, | |
755 | .gpio_config = TDA10046_GP01_I, | |
756 | .if_freq = TDA10046_FREQ_045, | |
757 | .i2c_gate = 0x4b, | |
758 | .tuner_address = 0x60, | |
d90d9f5a ES |
759 | .antenna_switch= 1, |
760 | .request_firmware = philips_tda1004x_request_firmware | |
761 | }; | |
762 | ||
4ba24373 HP |
763 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
764 | .demod_address = 0x08, | |
765 | .invert = 1, | |
766 | .invert_oclk = 0, | |
767 | .xtal_freq = TDA10046_XTAL_16M, | |
768 | .agc_config = TDA10046_AGC_TDA827X, | |
769 | .gpio_config = TDA10046_GP01_I, | |
770 | .if_freq = TDA10046_FREQ_045, | |
771 | .i2c_gate = 0x42, | |
772 | .tuner_address = 0x61, | |
4ba24373 HP |
773 | .antenna_switch = 1, |
774 | .request_firmware = philips_tda1004x_request_firmware | |
775 | }; | |
776 | ||
58ef4f92 HH |
777 | /* ------------------------------------------------------------------ |
778 | * special case: this card uses saa713x GPIO22 for the mode switch | |
779 | */ | |
5eda227f | 780 | |
58ef4f92 | 781 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
782 | { |
783 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
784 | philips_tda827x_tuner_init(fe); |
785 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 786 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
787 | return 0; |
788 | } | |
789 | ||
58ef4f92 | 790 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 791 | { |
5eda227f | 792 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 793 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 794 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
795 | philips_tda827x_tuner_sleep(fe); |
796 | return 0; | |
5eda227f HH |
797 | } |
798 | ||
8ce47dad | 799 | static struct tda827x_config ads_duo_cfg = { |
7bff4b4d | 800 | .tuner_callback = saa7134_tuner_callback, |
8ce47dad | 801 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
802 | .sleep = ads_duo_tuner_sleep, |
803 | .config = 0 | |
8ce47dad MK |
804 | }; |
805 | ||
58ef4f92 | 806 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
807 | .demod_address = 0x08, |
808 | .invert = 1, | |
809 | .invert_oclk = 0, | |
810 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 811 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 812 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 813 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
814 | .tuner_address = 0x61, |
815 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
816 | }; |
817 | ||
58ef4f92 HH |
818 | /* ================================================================== |
819 | * tda10086 based DVB-S cards, helper functions | |
820 | */ | |
821 | ||
e2ac28fa IL |
822 | static struct tda10086_config flydvbs = { |
823 | .demod_address = 0x0e, | |
824 | .invert = 0, | |
ea75baf4 | 825 | .diseqc_tone = 0, |
e2ac28fa IL |
826 | }; |
827 | ||
1b1cee35 HH |
828 | /* ------------------------------------------------------------------ |
829 | * special case: lnb supply is connected to the gated i2c | |
830 | */ | |
831 | ||
832 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
833 | { | |
834 | int res = -EIO; | |
835 | struct saa7134_dev *dev = fe->dvb->priv; | |
836 | if (fe->ops.i2c_gate_ctrl) { | |
837 | fe->ops.i2c_gate_ctrl(fe, 1); | |
838 | if (dev->original_set_voltage) | |
839 | res = dev->original_set_voltage(fe, voltage); | |
840 | fe->ops.i2c_gate_ctrl(fe, 0); | |
841 | } | |
842 | return res; | |
843 | }; | |
844 | ||
845 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
846 | { | |
847 | int res = -EIO; | |
848 | struct saa7134_dev *dev = fe->dvb->priv; | |
849 | if (fe->ops.i2c_gate_ctrl) { | |
850 | fe->ops.i2c_gate_ctrl(fe, 1); | |
851 | if (dev->original_set_high_voltage) | |
852 | res = dev->original_set_high_voltage(fe, arg); | |
853 | fe->ops.i2c_gate_ctrl(fe, 0); | |
854 | } | |
855 | return res; | |
856 | }; | |
857 | ||
5823b3a6 HH |
858 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
859 | { | |
860 | struct saa7134_dev *dev = fe->dvb->priv; | |
861 | u8 wbuf[2] = { 0x1f, 00 }; | |
862 | u8 rbuf; | |
863 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
864 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
865 | ||
866 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
867 | return -EIO; | |
868 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
869 | if (voltage == SEC_VOLTAGE_18) | |
870 | wbuf[1] = rbuf | 0x10; | |
871 | else | |
872 | wbuf[1] = rbuf & 0xef; | |
873 | msg[0].len = 2; | |
874 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
875 | return 0; | |
876 | } | |
877 | ||
878 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
879 | { | |
880 | struct saa7134_dev *dev = fe->dvb->priv; | |
881 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
882 | return -EIO; | |
883 | } | |
884 | ||
58ef4f92 HH |
885 | /* ================================================================== |
886 | * nxt200x based ATSC cards, helper functions | |
887 | */ | |
90e9df7f | 888 | |
3b64e8e2 MK |
889 | static struct nxt200x_config avertvhda180 = { |
890 | .demod_address = 0x0a, | |
3b64e8e2 | 891 | }; |
3e1410ad AB |
892 | |
893 | static struct nxt200x_config kworldatsc110 = { | |
894 | .demod_address = 0x0a, | |
3e1410ad | 895 | }; |
3b64e8e2 | 896 | |
58ef4f92 HH |
897 | /* ================================================================== |
898 | * Core code | |
899 | */ | |
1da177e4 LT |
900 | |
901 | static int dvb_init(struct saa7134_dev *dev) | |
902 | { | |
1c4f76ab | 903 | int ret; |
bc36a686 MCC |
904 | int attach_xc3028 = 0; |
905 | ||
1da177e4 LT |
906 | /* init struct videobuf_dvb */ |
907 | dev->ts.nr_bufs = 32; | |
908 | dev->ts.nr_packets = 32*4; | |
909 | dev->dvb.name = dev->name; | |
0705135e GL |
910 | videobuf_queue_sg_init(&dev->dvb.dvbq, &saa7134_ts_qops, |
911 | &dev->pci->dev, &dev->slock, | |
1da177e4 LT |
912 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
913 | V4L2_FIELD_ALTERNATE, | |
914 | sizeof(struct saa7134_buf), | |
915 | dev); | |
916 | ||
917 | switch (dev->board) { | |
918 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 919 | dprintk("pinnacle 300i dvb setup\n"); |
2bfe031d | 920 | dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 921 | &dev->i2c_adap); |
6b3ccab7 | 922 | if (dev->dvb.frontend) { |
dea74869 | 923 | dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; |
6b3ccab7 | 924 | } |
1da177e4 | 925 | break; |
a78d0bfa | 926 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 927 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 928 | dprintk("avertv 777 dvb setup\n"); |
2bfe031d | 929 | dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 930 | &dev->i2c_adap); |
6b3ccab7 | 931 | if (dev->dvb.frontend) { |
8511df9e | 932 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
47a9991e | 933 | NULL, DVB_PLL_PHILIPS_TD1316); |
6b3ccab7 | 934 | } |
a78d0bfa | 935 | break; |
1da177e4 | 936 | case SAA7134_BOARD_MD7134: |
f7b54b10 MK |
937 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
938 | &medion_cardbus, | |
939 | &dev->i2c_adap); | |
6b3ccab7 | 940 | if (dev->dvb.frontend) { |
b7754d74 | 941 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address, |
47a9991e | 942 | &dev->i2c_adap, DVB_PLL_FMD1216ME); |
6b3ccab7 | 943 | } |
1da177e4 | 944 | break; |
86ddd96f | 945 | case SAA7134_BOARD_PHILIPS_TOUGH: |
f7b54b10 MK |
946 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
947 | &philips_tu1216_60_config, | |
948 | &dev->i2c_adap); | |
6b3ccab7 | 949 | if (dev->dvb.frontend) { |
58ef4f92 HH |
950 | dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; |
951 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 952 | } |
86ddd96f MCC |
953 | break; |
954 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 955 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
7bff4b4d | 956 | configure_tda827x_fe(dev, &tda827x_lifeview_config, &tda827x_cfg_0); |
86ddd96f | 957 | break; |
2cf36ac4 | 958 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 959 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
f7b54b10 MK |
960 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
961 | &philips_europa_config, | |
962 | &dev->i2c_adap); | |
6b3ccab7 | 963 | if (dev->dvb.frontend) { |
588f9831 HH |
964 | dev->original_demod_sleep = dev->dvb.frontend->ops.sleep; |
965 | dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
dea74869 PB |
966 | dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; |
967 | dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
968 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 969 | } |
2cf36ac4 HH |
970 | break; |
971 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
f7b54b10 MK |
972 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
973 | &philips_tu1216_61_config, | |
974 | &dev->i2c_adap); | |
6b3ccab7 | 975 | if (dev->dvb.frontend) { |
58ef4f92 HH |
976 | dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; |
977 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 978 | } |
2cf36ac4 | 979 | break; |
b39423a9 | 980 | case SAA7134_BOARD_KWORLD_DVBT_210: |
7bff4b4d | 981 | configure_tda827x_fe(dev, &kworld_dvb_t_210_config, &tda827x_cfg_2); |
b39423a9 | 982 | break; |
90e9df7f | 983 | case SAA7134_BOARD_PHILIPS_TIGER: |
7bff4b4d | 984 | configure_tda827x_fe(dev, &philips_tiger_config, &tda827x_cfg_0); |
587d2fd7 HH |
985 | break; |
986 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
7bff4b4d | 987 | configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, &tda827x_cfg_1); |
90e9df7f | 988 | break; |
c6e53daf | 989 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
7bff4b4d | 990 | configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, &tda827x_cfg_1); |
c6e53daf | 991 | break; |
d4b0aba4 | 992 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
7bff4b4d | 993 | configure_tda827x_fe(dev, &asus_p7131_dual_config, &tda827x_cfg_0); |
d4b0aba4 | 994 | break; |
3d8466ec | 995 | case SAA7134_BOARD_FLYDVBT_LR301: |
7bff4b4d | 996 | configure_tda827x_fe(dev, &tda827x_lifeview_config, &tda827x_cfg_0); |
3d8466ec | 997 | break; |
420f32fe | 998 | case SAA7134_BOARD_FLYDVB_TRIO: |
ea75baf4 | 999 | if(! use_frontend) { /* terrestrial */ |
7bff4b4d HH |
1000 | configure_tda827x_fe(dev, &lifeview_trio_config, &tda827x_cfg_0); |
1001 | } else { /* satellite */ | |
1f683cd8 NS |
1002 | dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1003 | if (dev->dvb.frontend) { | |
1004 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63, | |
1005 | &dev->i2c_adap, 0) == NULL) { | |
5823b3a6 | 1006 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
1f683cd8 NS |
1007 | } |
1008 | if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap, | |
1009 | 0x08, 0, 0) == NULL) { | |
5823b3a6 | 1010 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
1f683cd8 NS |
1011 | } |
1012 | } | |
6b3ccab7 | 1013 | } |
420f32fe | 1014 | break; |
df42eaf2 | 1015 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1016 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
f7b54b10 MK |
1017 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
1018 | &ads_tech_duo_config, | |
1019 | &dev->i2c_adap); | |
6b3ccab7 | 1020 | if (dev->dvb.frontend) { |
ede2200d | 1021 | if (dvb_attach(tda827x_attach,dev->dvb.frontend, |
7bff4b4d HH |
1022 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1023 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1024 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d HH |
1025 | ads_tech_duo_config.tuner_address); |
1026 | } | |
6b3ccab7 | 1027 | } |
df42eaf2 | 1028 | break; |
3dfb729f | 1029 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
7bff4b4d | 1030 | configure_tda827x_fe(dev, &tevion_dvbt220rf_config, &tda827x_cfg_0); |
d95b8942 | 1031 | break; |
5eda227f | 1032 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1033 | if (!use_frontend) { /* terrestrial */ |
7bff4b4d | 1034 | configure_tda827x_fe(dev, &md8800_dvbt_config, &tda827x_cfg_0); |
4b1431ca HH |
1035 | } else { /* satellite */ |
1036 | dev->dvb.frontend = dvb_attach(tda10086_attach, | |
1037 | &flydvbs, &dev->i2c_adap); | |
1038 | if (dev->dvb.frontend) { | |
5823b3a6 HH |
1039 | struct dvb_frontend *fe = dev->dvb.frontend; |
1040 | u8 dev_id = dev->eedata[2]; | |
1041 | u8 data = 0xc4; | |
1042 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1043 | ||
4b1431ca HH |
1044 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, |
1045 | 0x60, &dev->i2c_adap, 0) == NULL) | |
1046 | wprintk("%s: Medion Quadro, no tda826x " | |
5823b3a6 HH |
1047 | "found !\n", __func__); |
1048 | if (dev_id != 0x08) { | |
1049 | /* we need to open the i2c gate (we know it exists) */ | |
1050 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1051 | if (dvb_attach(isl6405_attach, fe, | |
1052 | &dev->i2c_adap, 0x08, 0, 0) == NULL) | |
1053 | wprintk("%s: Medion Quadro, no ISL6405 " | |
1054 | "found !\n", __func__); | |
1055 | /* fire up the 2nd section of the LNB supply since we can't do | |
1056 | this from the other section */ | |
1057 | msg.buf = &data; | |
1058 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1059 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1060 | dev->original_set_voltage = fe->ops.set_voltage; | |
1061 | fe->ops.set_voltage = md8800_set_voltage; | |
1062 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1063 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1064 | } else { | |
1065 | fe->ops.set_voltage = md8800_set_voltage2; | |
1066 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1067 | } | |
4b1431ca HH |
1068 | } |
1069 | } | |
5eda227f | 1070 | break; |
3b64e8e2 | 1071 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
f7b54b10 MK |
1072 | dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
1073 | &dev->i2c_adap); | |
a79ddae9 | 1074 | if (dev->dvb.frontend) { |
4ad8eee5 | 1075 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
47a9991e | 1076 | NULL, DVB_PLL_TDHU2); |
a79ddae9 | 1077 | } |
3b64e8e2 | 1078 | break; |
3e1410ad | 1079 | case SAA7134_BOARD_KWORLD_ATSC110: |
f7b54b10 MK |
1080 | dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
1081 | &dev->i2c_adap); | |
a79ddae9 | 1082 | if (dev->dvb.frontend) { |
4ad8eee5 | 1083 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
47a9991e | 1084 | NULL, DVB_PLL_TUV1236D); |
a79ddae9 | 1085 | } |
3e1410ad | 1086 | break; |
e2ac28fa | 1087 | case SAA7134_BOARD_FLYDVBS_LR300: |
f7b54b10 MK |
1088 | dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
1089 | &dev->i2c_adap); | |
e2ac28fa | 1090 | if (dev->dvb.frontend) { |
f7b54b10 MK |
1091 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60, |
1092 | &dev->i2c_adap, 0) == NULL) { | |
5823b3a6 | 1093 | wprintk("%s: No tda826x found!\n", __func__); |
e2ac28fa | 1094 | } |
f7b54b10 MK |
1095 | if (dvb_attach(isl6421_attach, dev->dvb.frontend, |
1096 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { | |
5823b3a6 | 1097 | wprintk("%s: No ISL6421 found!\n", __func__); |
e2ac28fa IL |
1098 | } |
1099 | } | |
1100 | break; | |
cf146ca4 | 1101 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
0e8f4cc5 MS |
1102 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
1103 | &medion_cardbus, | |
1104 | &dev->i2c_adap); | |
cf146ca4 HH |
1105 | if (dev->dvb.frontend) { |
1106 | dev->original_demod_sleep = dev->dvb.frontend->ops.sleep; | |
1107 | dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 TP |
1108 | |
1109 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address, | |
47a9991e | 1110 | &dev->i2c_adap, DVB_PLL_FMD1216ME); |
cf146ca4 HH |
1111 | } |
1112 | break; | |
cbb94521 HH |
1113 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
1114 | dev->dvb.frontend = dvb_attach(tda10046_attach, | |
1115 | &philips_europa_config, | |
1116 | &dev->i2c_adap); | |
1117 | if (dev->dvb.frontend) { | |
1118 | dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1119 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
1120 | } | |
1121 | break; | |
550a9a5e | 1122 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
7bff4b4d | 1123 | configure_tda827x_fe(dev, &cinergy_ht_config, &tda827x_cfg_0); |
9de271e6 MK |
1124 | break; |
1125 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
7bff4b4d | 1126 | configure_tda827x_fe(dev, &cinergy_ht_pci_config, &tda827x_cfg_0); |
58ef4f92 HH |
1127 | break; |
1128 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
7bff4b4d | 1129 | configure_tda827x_fe(dev, &philips_tiger_s_config, &tda827x_cfg_2); |
550a9a5e | 1130 | break; |
e06cea4c | 1131 | case SAA7134_BOARD_ASUS_P7131_4871: |
7bff4b4d | 1132 | configure_tda827x_fe(dev, &asus_p7131_4871_config, &tda827x_cfg_2); |
e06cea4c | 1133 | break; |
f3eec0c0 | 1134 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
7bff4b4d | 1135 | configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, &tda827x_cfg_2); |
e06cea4c | 1136 | break; |
d90d9f5a | 1137 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
7bff4b4d | 1138 | configure_tda827x_fe(dev, &avermedia_super_007_config, &tda827x_cfg_0); |
d90d9f5a | 1139 | break; |
4ba24373 | 1140 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
7bff4b4d | 1141 | configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, &tda827x_cfg_2_sw42); |
4ba24373 | 1142 | break; |
6ab465a8 HH |
1143 | case SAA7134_BOARD_PHILIPS_SNAKE: |
1144 | dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, | |
1145 | &dev->i2c_adap); | |
1146 | if (dev->dvb.frontend) { | |
1147 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60, | |
1148 | &dev->i2c_adap, 0) == NULL) | |
5823b3a6 | 1149 | wprintk("%s: No tda826x found!\n", __func__); |
6ab465a8 HH |
1150 | if (dvb_attach(lnbp21_attach, dev->dvb.frontend, |
1151 | &dev->i2c_adap, 0, 0) == NULL) | |
5823b3a6 | 1152 | wprintk("%s: No lnbp21 found!\n", __func__); |
6ab465a8 HH |
1153 | } |
1154 | break; | |
7b5b3f17 | 1155 | case SAA7134_BOARD_CREATIX_CTX953: |
7bff4b4d | 1156 | configure_tda827x_fe(dev, &md8800_dvbt_config, &tda827x_cfg_0); |
7b5b3f17 | 1157 | break; |
6a6179b6 | 1158 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
7bff4b4d | 1159 | configure_tda827x_fe(dev, &philips_tiger_s_config, &tda827x_cfg_2); |
6a6179b6 | 1160 | break; |
bc36a686 MCC |
1161 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
1162 | dev->dvb.frontend = dvb_attach(mt352_attach, | |
1163 | &avermedia_e506r_mt352_dev, | |
1164 | &dev->i2c_adap); | |
1165 | attach_xc3028 = 1; | |
1166 | break; | |
637afdb5 HH |
1167 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
1168 | dev->dvb.frontend = dvb_attach(tda10086_attach, | |
1169 | &flydvbs, &dev->i2c_adap); | |
1170 | if (dev->dvb.frontend) { | |
1171 | struct dvb_frontend *fe; | |
1172 | if (dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60, | |
1173 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) | |
1174 | wprintk("%s: MD7134 DVB-S, no SD1878 " | |
5823b3a6 | 1175 | "found !\n", __func__); |
637afdb5 HH |
1176 | /* we need to open the i2c gate (we know it exists) */ |
1177 | fe = dev->dvb.frontend; | |
1178 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1179 | if (dvb_attach(isl6405_attach, fe, | |
1180 | &dev->i2c_adap, 0x08, 0, 0) == NULL) | |
1181 | wprintk("%s: MD7134 DVB-S, no ISL6405 " | |
5823b3a6 | 1182 | "found !\n", __func__); |
637afdb5 HH |
1183 | fe->ops.i2c_gate_ctrl(fe, 0); |
1184 | dev->original_set_voltage = fe->ops.set_voltage; | |
1185 | fe->ops.set_voltage = md8800_set_voltage; | |
1186 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1187 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1188 | } | |
1189 | break; | |
1da177e4 | 1190 | default: |
cf3c34c8 | 1191 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1192 | break; |
1193 | } | |
1194 | ||
bc36a686 MCC |
1195 | if (attach_xc3028) { |
1196 | struct dvb_frontend *fe; | |
1197 | struct xc2028_config cfg = { | |
1198 | .i2c_adap = &dev->i2c_adap, | |
1199 | .i2c_addr = 0x61, | |
50407f99 | 1200 | .video_dev = dev->i2c_adap.algo_data, |
bc36a686 MCC |
1201 | }; |
1202 | fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg); | |
1203 | if (!fe) { | |
1204 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1205 | dev->name); | |
1206 | dvb_frontend_detach(dev->dvb.frontend); | |
1207 | dvb_unregister_frontend(dev->dvb.frontend); | |
1208 | dev->dvb.frontend = NULL; | |
1209 | return -1; | |
1210 | } | |
1211 | } | |
1212 | ||
1da177e4 | 1213 | if (NULL == dev->dvb.frontend) { |
cf3c34c8 | 1214 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
1da177e4 LT |
1215 | return -1; |
1216 | } | |
1217 | ||
1218 | /* register everything else */ | |
1c4f76ab HH |
1219 | ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev); |
1220 | ||
1221 | /* this sequence is necessary to make the tda1004x load its firmware | |
1222 | * and to enter analog mode of hybrid boards | |
1223 | */ | |
1224 | if (!ret) { | |
1225 | if (dev->dvb.frontend->ops.init) | |
1226 | dev->dvb.frontend->ops.init(dev->dvb.frontend); | |
1227 | if (dev->dvb.frontend->ops.sleep) | |
1228 | dev->dvb.frontend->ops.sleep(dev->dvb.frontend); | |
9971f4f1 HH |
1229 | if (dev->dvb.frontend->ops.tuner_ops.sleep) |
1230 | dev->dvb.frontend->ops.tuner_ops.sleep(dev->dvb.frontend); | |
1c4f76ab HH |
1231 | } |
1232 | return ret; | |
1da177e4 LT |
1233 | } |
1234 | ||
1235 | static int dvb_fini(struct saa7134_dev *dev) | |
1236 | { | |
7f171123 MCC |
1237 | /* FIXME: I suspect that this code is bogus, since the entry for |
1238 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1239 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1240 | */ | |
1241 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1242 | struct v4l2_priv_tun_config tda9887_cfg; | |
1243 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1244 | ||
1245 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1246 | tda9887_cfg.priv = &on; | |
1da177e4 | 1247 | |
1da177e4 | 1248 | /* otherwise we don't detect the tuner on next insmod */ |
7f171123 | 1249 | saa7134_i2c_call_clients(dev, TUNER_SET_CONFIG, &tda9887_cfg); |
5823b3a6 HH |
1250 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
1251 | if ((dev->eedata[2] != 0x08) && use_frontend) { | |
1252 | /* turn off the 2nd lnb supply */ | |
1253 | u8 data = 0x80; | |
1254 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1255 | struct dvb_frontend *fe; | |
1256 | fe = dev->dvb.frontend; | |
1257 | if (fe->ops.i2c_gate_ctrl) { | |
1258 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1259 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1260 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1261 | } | |
1262 | } | |
7f171123 | 1263 | } |
1da177e4 LT |
1264 | videobuf_dvb_unregister(&dev->dvb); |
1265 | return 0; | |
1266 | } | |
1267 | ||
1268 | static struct saa7134_mpeg_ops dvb_ops = { | |
1269 | .type = SAA7134_MPEG_DVB, | |
1270 | .init = dvb_init, | |
1271 | .fini = dvb_fini, | |
1272 | }; | |
1273 | ||
1274 | static int __init dvb_register(void) | |
1275 | { | |
1276 | return saa7134_ts_register(&dvb_ops); | |
1277 | } | |
1278 | ||
1279 | static void __exit dvb_unregister(void) | |
1280 | { | |
1281 | saa7134_ts_unregister(&dvb_ops); | |
1282 | } | |
1283 | ||
1284 | module_init(dvb_register); | |
1285 | module_exit(dvb_unregister); | |
1286 | ||
1287 | /* ------------------------------------------------------------------ */ | |
1288 | /* | |
1289 | * Local variables: | |
1290 | * c-basic-offset: 8 | |
1291 | * End: | |
1292 | */ |