V4L/DVB (4436): Dvb-pll support for MT352/ZL10353 based tuners.
[deliverable/linux.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
1da177e4 36
1f10c7af
AQ
37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
1da177e4 41
e2ac28fa
IL
42#include "tda10086.h"
43#include "tda826x.h"
44#include "isl6421.h"
1da177e4
LT
45MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
46MODULE_LICENSE("GPL");
47
48static unsigned int antenna_pwr = 0;
86ddd96f 49
1da177e4
LT
50module_param(antenna_pwr, int, 0444);
51MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
52
53/* ------------------------------------------------------------------ */
1da177e4
LT
54static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
55{
56 u32 ok;
57
58 if (!on) {
59 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
60 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
61 return 0;
62 }
63
64 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
65 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
66 udelay(10);
67
68 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
69 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
70 udelay(10);
71 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
72 udelay(10);
73 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
74 printk("%s: %s %s\n", dev->name, __FUNCTION__,
75 ok ? "on" : "off");
76
77 if (!ok)
78 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
79 return ok;
80}
81
82static int mt352_pinnacle_init(struct dvb_frontend* fe)
83{
84 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
85 static u8 reset [] = { RESET, 0x80 };
86 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
87 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
88 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
89 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
90 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
91 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
92 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
93 struct saa7134_dev *dev= fe->dvb->priv;
94
95 printk("%s: %s called\n",dev->name,__FUNCTION__);
96
97 mt352_write(fe, clock_config, sizeof(clock_config));
98 udelay(200);
99 mt352_write(fe, reset, sizeof(reset));
100 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
101 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
102 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
103 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
104
105 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
106 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
107 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 108
1da177e4
LT
109 return 0;
110}
111
a78d0bfa
JAR
112static int mt352_aver777_init(struct dvb_frontend* fe)
113{
114 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
115 static u8 reset [] = { RESET, 0x80 };
116 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
117 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
118 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
119
120 mt352_write(fe, clock_config, sizeof(clock_config));
121 udelay(200);
122 mt352_write(fe, reset, sizeof(reset));
123 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
124 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
125 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
126
127 return 0;
128}
129
0463f12c
AQ
130static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
131 struct dvb_frontend_parameters* params)
1da177e4 132{
df8cf706
HH
133 u8 off[] = { 0x00, 0xf1};
134 u8 on[] = { 0x00, 0x71};
135 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
136
1da177e4
LT
137 struct saa7134_dev *dev = fe->dvb->priv;
138 struct v4l2_frequency f;
139
140 /* set frequency (mt2050) */
141 f.tuner = 0;
142 f.type = V4L2_TUNER_DIGITAL_TV;
143 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
144 if (fe->ops.i2c_gate_ctrl)
145 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 146 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 147 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 148 msg.buf = on;
dea74869
PB
149 if (fe->ops.i2c_gate_ctrl)
150 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 151 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
152
153 pinnacle_antenna_pwr(dev, antenna_pwr);
154
155 /* mt352 setup */
0463f12c 156 return mt352_pinnacle_init(fe);
1da177e4
LT
157}
158
bd4956b8 159static int mt352_aver777_tuner_calc_regs(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf, int buf_len)
a78d0bfa 160{
a79ddae9
AQ
161 if (buf_len < 5)
162 return -EINVAL;
163
164 pllbuf[0] = 0x61;
a78d0bfa
JAR
165 dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1,
166 params->frequency,
167 params->u.ofdm.bandwidth);
a79ddae9 168 return 5;
a78d0bfa
JAR
169}
170
1da177e4
LT
171static struct mt352_config pinnacle_300i = {
172 .demod_address = 0x3c >> 1,
173 .adc_clock = 20333,
174 .if2 = 36150,
175 .no_tuner = 1,
176 .demod_init = mt352_pinnacle_init,
1da177e4 177};
a78d0bfa
JAR
178
179static struct mt352_config avermedia_777 = {
180 .demod_address = 0xf,
181 .demod_init = mt352_aver777_init,
a78d0bfa 182};
1da177e4
LT
183
184/* ------------------------------------------------------------------ */
2cf36ac4 185static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
1da177e4
LT
186{
187 struct saa7134_dev *dev = fe->dvb->priv;
86ddd96f 188 u8 tuner_buf[4];
2cf36ac4 189 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
190 sizeof(tuner_buf) };
191 int tuner_frequency = 0;
192 u8 band, cp, filter;
193
194 /* determine charge pump */
195 tuner_frequency = params->frequency + 36166000;
196 if (tuner_frequency < 87000000)
197 return -EINVAL;
198 else if (tuner_frequency < 130000000)
199 cp = 3;
200 else if (tuner_frequency < 160000000)
201 cp = 5;
202 else if (tuner_frequency < 200000000)
203 cp = 6;
204 else if (tuner_frequency < 290000000)
205 cp = 3;
206 else if (tuner_frequency < 420000000)
207 cp = 5;
208 else if (tuner_frequency < 480000000)
209 cp = 6;
210 else if (tuner_frequency < 620000000)
211 cp = 3;
212 else if (tuner_frequency < 830000000)
213 cp = 5;
214 else if (tuner_frequency < 895000000)
215 cp = 7;
216 else
217 return -EINVAL;
218
219 /* determine band */
220 if (params->frequency < 49000000)
221 return -EINVAL;
222 else if (params->frequency < 161000000)
223 band = 1;
224 else if (params->frequency < 444000000)
225 band = 2;
226 else if (params->frequency < 861000000)
227 band = 4;
228 else
229 return -EINVAL;
230
231 /* setup PLL filter */
232 switch (params->u.ofdm.bandwidth) {
233 case BANDWIDTH_6_MHZ:
234 filter = 0;
235 break;
236
237 case BANDWIDTH_7_MHZ:
238 filter = 0;
239 break;
240
241 case BANDWIDTH_8_MHZ:
242 filter = 1;
243 break;
1da177e4 244
86ddd96f
MCC
245 default:
246 return -EINVAL;
247 }
248
249 /* calculate divisor
250 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 251 */
86ddd96f
MCC
252 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
253
254 /* setup tuner buffer */
255 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
256 tuner_buf[1] = tuner_frequency & 0xff;
257 tuner_buf[2] = 0xca;
258 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
259
dea74869
PB
260 if (fe->ops.i2c_gate_ctrl)
261 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC
262 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
263 return -EIO;
2cf36ac4
HH
264 msleep(1);
265 return 0;
266}
267
268static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
269{
270 struct saa7134_dev *dev = fe->dvb->priv;
271 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
272 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 273
2cf36ac4 274 /* setup PLL configuration */
dea74869
PB
275 if (fe->ops.i2c_gate_ctrl)
276 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
277 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
278 return -EIO;
86ddd96f 279 msleep(1);
2cf36ac4 280
1da177e4
LT
281 return 0;
282}
283
2cf36ac4
HH
284/* ------------------------------------------------------------------ */
285
a79ddae9 286static int philips_tu1216_tuner_60_init(struct dvb_frontend *fe)
2cf36ac4
HH
287{
288 return philips_tda6651_pll_init(0x60, fe);
289}
290
a79ddae9 291static int philips_tu1216_tuner_60_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH
292{
293 return philips_tda6651_pll_set(0x60, fe, params);
294}
295
86ddd96f
MCC
296static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
297 const struct firmware **fw, char *name)
1da177e4
LT
298{
299 struct saa7134_dev *dev = fe->dvb->priv;
300 return request_firmware(fw, name, &dev->pci->dev);
301}
302
2cf36ac4 303static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
304
305 .demod_address = 0x8,
306 .invert = 1,
2cf36ac4 307 .invert_oclk = 0,
86ddd96f
MCC
308 .xtal_freq = TDA10046_XTAL_4M,
309 .agc_config = TDA10046_AGC_DEFAULT,
310 .if_freq = TDA10046_FREQ_3617,
86ddd96f
MCC
311 .request_firmware = philips_tu1216_request_firmware,
312};
313
314/* ------------------------------------------------------------------ */
315
a79ddae9 316static int philips_tu1216_tuner_61_init(struct dvb_frontend *fe)
2cf36ac4
HH
317{
318 return philips_tda6651_pll_init(0x61, fe);
319}
320
a79ddae9 321static int philips_tu1216_tuner_61_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH
322{
323 return philips_tda6651_pll_set(0x61, fe, params);
324}
325
326static struct tda1004x_config philips_tu1216_61_config = {
327
328 .demod_address = 0x8,
329 .invert = 1,
330 .invert_oclk = 0,
331 .xtal_freq = TDA10046_XTAL_4M,
332 .agc_config = TDA10046_AGC_DEFAULT,
333 .if_freq = TDA10046_FREQ_3617,
2cf36ac4
HH
334 .request_firmware = philips_tu1216_request_firmware,
335};
336
337/* ------------------------------------------------------------------ */
338
a79ddae9 339static int philips_europa_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
340{
341 struct saa7134_dev *dev = fe->dvb->priv;
342 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
343 struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
344
345 /* setup PLL configuration */
dea74869
PB
346 if (fe->ops.i2c_gate_ctrl)
347 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
348 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
349 return -EIO;
350 msleep(1);
351
352 /* switch the board to dvb mode */
353 init_msg.addr = 0x43;
354 init_msg.len = 0x02;
355 msg[0] = 0x00;
356 msg[1] = 0x40;
dea74869
PB
357 if (fe->ops.i2c_gate_ctrl)
358 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
359 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
360 return -EIO;
361
362 return 0;
363}
364
a79ddae9 365static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH
366{
367 return philips_tda6651_pll_set(0x61, fe, params);
368}
369
a79ddae9 370static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
371{
372 struct saa7134_dev *dev = fe->dvb->priv;
373 /* this message actually turns the tuner back to analog mode */
374 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
375 struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
376
377 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
378 msleep(1);
379
380 /* switch the board to analog mode */
381 analog_msg.addr = 0x43;
382 analog_msg.len = 0x02;
383 msg[0] = 0x00;
384 msg[1] = 0x14;
dea74869
PB
385 if (fe->ops.i2c_gate_ctrl)
386 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 387 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
388 return 0;
389}
390
391static int philips_europa_demod_sleep(struct dvb_frontend *fe)
392{
393 struct saa7134_dev *dev = fe->dvb->priv;
394
395 if (dev->original_demod_sleep)
396 dev->original_demod_sleep(fe);
dea74869 397 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 398 return 0;
2cf36ac4
HH
399}
400
401static struct tda1004x_config philips_europa_config = {
402
403 .demod_address = 0x8,
404 .invert = 0,
405 .invert_oclk = 0,
406 .xtal_freq = TDA10046_XTAL_4M,
407 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
408 .if_freq = TDA10046_FREQ_052,
2cf36ac4
HH
409 .request_firmware = NULL,
410};
411
412/* ------------------------------------------------------------------ */
86ddd96f 413
a79ddae9 414static int philips_fmd1216_tuner_init(struct dvb_frontend *fe)
86ddd96f
MCC
415{
416 struct saa7134_dev *dev = fe->dvb->priv;
417 /* this message is to set up ATC and ALC */
418 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
419 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
420
dea74869
PB
421 if (fe->ops.i2c_gate_ctrl)
422 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC
423 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
424 return -EIO;
425 msleep(1);
426
427 return 0;
428}
429
a79ddae9 430static int philips_fmd1216_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC
431{
432 struct saa7134_dev *dev = fe->dvb->priv;
433 /* this message actually turns the tuner back to analog mode */
434 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
435 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
436
dea74869
PB
437 if (fe->ops.i2c_gate_ctrl)
438 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC
439 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
440 msleep(1);
441 fmd1216_init[2] = 0x86;
442 fmd1216_init[3] = 0x54;
dea74869
PB
443 if (fe->ops.i2c_gate_ctrl)
444 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC
445 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
446 msleep(1);
a79ddae9 447 return 0;
86ddd96f
MCC
448}
449
a79ddae9 450static int philips_fmd1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC
451{
452 struct saa7134_dev *dev = fe->dvb->priv;
453 u8 tuner_buf[4];
454 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
455 sizeof(tuner_buf) };
456 int tuner_frequency = 0;
457 int divider = 0;
458 u8 band, mode, cp;
459
460 /* determine charge pump */
461 tuner_frequency = params->frequency + 36130000;
462 if (tuner_frequency < 87000000)
463 return -EINVAL;
464 /* low band */
465 else if (tuner_frequency < 180000000) {
466 band = 1;
467 mode = 7;
468 cp = 0;
469 } else if (tuner_frequency < 195000000) {
470 band = 1;
471 mode = 6;
472 cp = 1;
473 /* mid band */
474 } else if (tuner_frequency < 366000000) {
475 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
476 band = 10;
477 } else {
478 band = 2;
479 }
480 mode = 7;
481 cp = 0;
482 } else if (tuner_frequency < 478000000) {
483 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
484 band = 10;
485 } else {
486 band = 2;
487 }
488 mode = 6;
489 cp = 1;
490 /* high band */
491 } else if (tuner_frequency < 662000000) {
492 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
493 band = 12;
494 } else {
495 band = 4;
496 }
497 mode = 7;
498 cp = 0;
499 } else if (tuner_frequency < 840000000) {
500 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
501 band = 12;
502 } else {
503 band = 4;
504 }
505 mode = 6;
506 cp = 1;
507 } else {
508 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
509 band = 12;
510 } else {
511 band = 4;
512 }
513 mode = 7;
514 cp = 1;
515
516 }
517 /* calculate divisor */
518 /* ((36166000 + Finput) / 166666) rounded! */
519 divider = (tuner_frequency + 83333) / 166667;
520
521 /* setup tuner buffer */
522 tuner_buf[0] = (divider >> 8) & 0x7f;
523 tuner_buf[1] = divider & 0xff;
524 tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
525 tuner_buf[3] = 0x40 | band;
526
dea74869
PB
527 if (fe->ops.i2c_gate_ctrl)
528 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC
529 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
530 return -EIO;
531 return 0;
532}
533
408b664a 534static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
535 .demod_address = 0x08,
536 .invert = 1,
537 .invert_oclk = 0,
538 .xtal_freq = TDA10046_XTAL_16M,
539 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
540 .if_freq = TDA10046_FREQ_3613,
86ddd96f
MCC
541 .request_firmware = NULL,
542};
543
544/* ------------------------------------------------------------------ */
545
546struct tda827x_data {
547 u32 lomax;
548 u8 spd;
549 u8 bs;
550 u8 bp;
551 u8 cp;
552 u8 gc3;
553 u8 div1p5;
554};
555
556static struct tda827x_data tda827x_dvbt[] = {
557 { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
558 { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
559 { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
560 { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
561 { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
562 { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
563 { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
564 { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
565 { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
566 { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
567 { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
568 { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
569 { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
570 { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
571 { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
572 { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
573 { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
574 { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
575 { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
576 { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
577 { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
578 { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
579 { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
580 { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
581 { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
582 { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
583 { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
584 { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
585 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
586};
587
a79ddae9 588static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
86ddd96f
MCC
589{
590 return 0;
591}
592
a79ddae9 593static int philips_tda827x_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC
594{
595 struct saa7134_dev *dev = fe->dvb->priv;
596 u8 tuner_buf[14];
597
598 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
f2421ca3 599 .len = sizeof(tuner_buf) };
86ddd96f
MCC
600 int i, tuner_freq, if_freq;
601 u32 N;
602 switch (params->u.ofdm.bandwidth) {
603 case BANDWIDTH_6_MHZ:
604 if_freq = 4000000;
605 break;
606 case BANDWIDTH_7_MHZ:
607 if_freq = 4500000;
608 break;
609 default: /* 8 MHz or Auto */
610 if_freq = 5000000;
611 break;
612 }
613 tuner_freq = params->frequency + if_freq;
614
615 i = 0;
616 while (tda827x_dvbt[i].lomax < tuner_freq) {
617 if(tda827x_dvbt[i + 1].lomax == 0)
618 break;
619 i++;
620 }
621
622 N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
623 tuner_buf[0] = 0;
624 tuner_buf[1] = (N>>8) | 0x40;
625 tuner_buf[2] = N & 0xff;
626 tuner_buf[3] = 0;
627 tuner_buf[4] = 0x52;
628 tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
629 (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
630 tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
631 tuner_buf[7] = 0xbf;
632 tuner_buf[8] = 0x2a;
633 tuner_buf[9] = 0x05;
634 tuner_buf[10] = 0xff;
635 tuner_buf[11] = 0x00;
636 tuner_buf[12] = 0x00;
637 tuner_buf[13] = 0x40;
638
639 tuner_msg.len = 14;
dea74869
PB
640 if (fe->ops.i2c_gate_ctrl)
641 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC
642 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
643 return -EIO;
644
645 msleep(500);
646 /* correct CP value */
647 tuner_buf[0] = 0x30;
648 tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
649 tuner_msg.len = 2;
dea74869
PB
650 if (fe->ops.i2c_gate_ctrl)
651 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC
652 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
653
654 return 0;
655}
656
a79ddae9 657static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC
658{
659 struct saa7134_dev *dev = fe->dvb->priv;
660 static u8 tda827x_sleep[] = { 0x30, 0xd0};
661 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
f2421ca3 662 .len = sizeof(tda827x_sleep) };
dea74869
PB
663 if (fe->ops.i2c_gate_ctrl)
664 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f 665 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
a79ddae9 666 return 0;
86ddd96f
MCC
667}
668
669static struct tda1004x_config tda827x_lifeview_config = {
670 .demod_address = 0x08,
671 .invert = 1,
672 .invert_oclk = 0,
673 .xtal_freq = TDA10046_XTAL_16M,
674 .agc_config = TDA10046_AGC_TDA827X,
675 .if_freq = TDA10046_FREQ_045,
86ddd96f 676 .request_firmware = NULL,
1da177e4 677};
90e9df7f
HH
678
679/* ------------------------------------------------------------------ */
680
681struct tda827xa_data {
682 u32 lomax;
683 u8 svco;
684 u8 spd;
685 u8 scr;
686 u8 sbs;
687 u8 gc3;
688};
689
690static struct tda827xa_data tda827xa_dvbt[] = {
691 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
692 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
693 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
694 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
695 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
696 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
697 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
698 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
699 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
700 { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
701 { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
702 { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
703 { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
704 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
705 { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
706 { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
707 { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
708 { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
709 { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
710 { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
711 { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
712 { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
713 { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
714 { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
715 { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
716 { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
717 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
718
719
720static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
721{
722 struct saa7134_dev *dev = fe->dvb->priv;
723 u8 tuner_buf[14];
724 unsigned char reg2[2];
725
726 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
727 int i, tuner_freq, if_freq;
728 u32 N;
729
730 switch (params->u.ofdm.bandwidth) {
731 case BANDWIDTH_6_MHZ:
732 if_freq = 4000000;
733 break;
734 case BANDWIDTH_7_MHZ:
735 if_freq = 4500000;
736 break;
737 default: /* 8 MHz or Auto */
738 if_freq = 5000000;
739 break;
740 }
741 tuner_freq = params->frequency + if_freq;
742
743 i = 0;
744 while (tda827xa_dvbt[i].lomax < tuner_freq) {
745 if(tda827xa_dvbt[i + 1].lomax == 0)
746 break;
747 i++;
748 }
749
750 N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
751 tuner_buf[0] = 0; // subaddress
752 tuner_buf[1] = N >> 8;
753 tuner_buf[2] = N & 0xff;
754 tuner_buf[3] = 0;
755 tuner_buf[4] = 0x16;
756 tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
757 tda827xa_dvbt[i].sbs;
758 tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
759 tuner_buf[7] = 0x0c;
760 tuner_buf[8] = 0x06;
761 tuner_buf[9] = 0x24;
762 tuner_buf[10] = 0xff;
763 tuner_buf[11] = 0x60;
764 tuner_buf[12] = 0x00;
765 tuner_buf[13] = 0x39; // lpsel
766 msg.len = 14;
dea74869
PB
767 if (fe->ops.i2c_gate_ctrl)
768 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH
769 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
770 return -EIO;
771
772 msg.buf= reg2;
773 msg.len = 2;
774 reg2[0] = 0x60;
775 reg2[1] = 0x3c;
dea74869
PB
776 if (fe->ops.i2c_gate_ctrl)
777 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH
778 i2c_transfer(&dev->i2c_adap, &msg, 1);
779
780 reg2[0] = 0xa0;
781 reg2[1] = 0x40;
dea74869
PB
782 if (fe->ops.i2c_gate_ctrl)
783 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH
784 i2c_transfer(&dev->i2c_adap, &msg, 1);
785
786 msleep(2);
787 /* correct CP value */
788 reg2[0] = 0x30;
789 reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
790 msg.len = 2;
dea74869
PB
791 if (fe->ops.i2c_gate_ctrl)
792 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH
793 i2c_transfer(&dev->i2c_adap, &msg, 1);
794
795 msleep(550);
796 reg2[0] = 0x50;
797 reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
dea74869
PB
798 if (fe->ops.i2c_gate_ctrl)
799 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH
800 i2c_transfer(&dev->i2c_adap, &msg, 1);
801
802 return 0;
803
804}
805
a79ddae9 806static int philips_tda827xa_tuner_sleep(u8 addr, struct dvb_frontend *fe)
90e9df7f
HH
807{
808 struct saa7134_dev *dev = fe->dvb->priv;
809 static u8 tda827xa_sleep[] = { 0x30, 0x90};
810 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
f1bcef88 811 .len = sizeof(tda827xa_sleep) };
dea74869
PB
812 if (fe->ops.i2c_gate_ctrl)
813 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f 814 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
a79ddae9 815 return 0;
90e9df7f
HH
816}
817
818/* ------------------------------------------------------------------ */
819
a79ddae9 820static int philips_tiger_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
90e9df7f
HH
821{
822 int ret;
823 struct saa7134_dev *dev = fe->dvb->priv;
824 static u8 tda8290_close[] = { 0x21, 0xc0};
825 static u8 tda8290_open[] = { 0x21, 0x80};
826 struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
a79ddae9 827
90e9df7f
HH
828 /* close tda8290 i2c bridge */
829 tda8290_msg.buf = tda8290_close;
830 ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
831 if (ret != 1)
832 return -EIO;
833 msleep(20);
834 ret = philips_tda827xa_pll_set(0x61, fe, params);
835 if (ret != 0)
836 return ret;
837 /* open tda8290 i2c bridge */
838 tda8290_msg.buf = tda8290_open;
839 i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
840 return ret;
2d6b5f62 841}
90e9df7f 842
a79ddae9 843static int philips_tiger_tuner_init(struct dvb_frontend *fe)
90e9df7f
HH
844{
845 struct saa7134_dev *dev = fe->dvb->priv;
846 static u8 data[] = { 0x3c, 0x33, 0x6a};
847 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
848
849 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
850 return -EIO;
851 return 0;
852}
853
a79ddae9 854static int philips_tiger_tuner_sleep(struct dvb_frontend *fe)
90e9df7f
HH
855{
856 struct saa7134_dev *dev = fe->dvb->priv;
857 static u8 data[] = { 0x3c, 0x33, 0x68};
858 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
859
860 i2c_transfer(&dev->i2c_adap, &msg, 1);
a79ddae9
AQ
861 philips_tda827xa_tuner_sleep( 0x61, fe);
862 return 0;
90e9df7f
HH
863}
864
865static struct tda1004x_config philips_tiger_config = {
866 .demod_address = 0x08,
867 .invert = 1,
868 .invert_oclk = 0,
869 .xtal_freq = TDA10046_XTAL_16M,
870 .agc_config = TDA10046_AGC_TDA827X,
871 .if_freq = TDA10046_FREQ_045,
90e9df7f
HH
872 .request_firmware = NULL,
873};
874
df42eaf2
HH
875/* ------------------------------------------------------------------ */
876
a79ddae9 877static int lifeview_trio_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
420f32fe
NS
878{
879 int ret;
880
881 ret = philips_tda827xa_pll_set(0x60, fe, params);
882 return ret;
883}
884
a79ddae9 885static int lifeview_trio_tuner_sleep(struct dvb_frontend *fe)
420f32fe 886{
a79ddae9 887 philips_tda827xa_tuner_sleep(0x60, fe);
420f32fe
NS
888 return 0;
889}
890
420f32fe
NS
891static struct tda1004x_config lifeview_trio_config = {
892 .demod_address = 0x09,
893 .invert = 1,
894 .invert_oclk = 0,
895 .xtal_freq = TDA10046_XTAL_16M,
896 .agc_config = TDA10046_AGC_TDA827X_GPL,
897 .if_freq = TDA10046_FREQ_045,
420f32fe
NS
898 .request_firmware = NULL,
899};
900
901/* ------------------------------------------------------------------ */
902
a79ddae9 903static int ads_duo_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
df42eaf2
HH
904{
905 int ret;
906
907 ret = philips_tda827xa_pll_set(0x61, fe, params);
908 return ret;
2d6b5f62 909}
df42eaf2 910
a79ddae9 911static int ads_duo_tuner_init(struct dvb_frontend *fe)
df42eaf2
HH
912{
913 struct saa7134_dev *dev = fe->dvb->priv;
914 /* route TDA8275a AGC input to the channel decoder */
915 saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x60);
916 return 0;
917}
918
a79ddae9 919static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
df42eaf2
HH
920{
921 struct saa7134_dev *dev = fe->dvb->priv;
922 /* route TDA8275a AGC input to the analog IF chip*/
923 saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x20);
a79ddae9
AQ
924 philips_tda827xa_tuner_sleep( 0x61, fe);
925 return 0;
df42eaf2
HH
926}
927
928static struct tda1004x_config ads_tech_duo_config = {
929 .demod_address = 0x08,
930 .invert = 1,
931 .invert_oclk = 0,
932 .xtal_freq = TDA10046_XTAL_16M,
933 .agc_config = TDA10046_AGC_TDA827X_GPL,
934 .if_freq = TDA10046_FREQ_045,
df42eaf2
HH
935 .request_firmware = NULL,
936};
937
3dfb729f
PH
938/* ------------------------------------------------------------------ */
939
a79ddae9 940static int tevion_dvb220rf_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
3dfb729f
PH
941{
942 int ret;
943 ret = philips_tda827xa_pll_set(0x60, fe, params);
944 return ret;
945}
946
a79ddae9 947static int tevion_dvb220rf_tuner_sleep(struct dvb_frontend *fe)
3dfb729f 948{
a79ddae9 949 philips_tda827xa_tuner_sleep( 0x61, fe);
3dfb729f
PH
950 return 0;
951}
952
3dfb729f
PH
953static struct tda1004x_config tevion_dvbt220rf_config = {
954 .demod_address = 0x08,
955 .invert = 1,
956 .invert_oclk = 0,
957 .xtal_freq = TDA10046_XTAL_16M,
958 .agc_config = TDA10046_AGC_TDA827X,
959 .if_freq = TDA10046_FREQ_045,
3dfb729f
PH
960 .request_firmware = NULL,
961};
962
5eda227f
HH
963/* ------------------------------------------------------------------ */
964
965static int md8800_dvbt_analog_mode(struct dvb_frontend *fe)
966{
967 struct saa7134_dev *dev = fe->dvb->priv;
968 static u8 data[] = { 0x3c, 0x33, 0x68};
969 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
970
971 i2c_transfer(&dev->i2c_adap, &msg, 1);
972 philips_tda827xa_tuner_sleep( 0x61, fe);
973 return 0;
974}
975
976static int md8800_dvbt_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
977{
978 int ret;
979 struct saa7134_dev *dev = fe->dvb->priv;
980 static u8 tda8290_close[] = { 0x21, 0xc0};
981 static u8 tda8290_open[] = { 0x21, 0x80};
982 struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
983 /* close tda8290 i2c bridge */
984 tda8290_msg.buf = tda8290_close;
985 ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
986 if (ret != 1)
987 return -EIO;
988 msleep(20);
989 ret = philips_tda827xa_pll_set(0x60, fe, params);
990 if (ret != 0)
991 return ret;
992 /* open tda8290 i2c bridge */
993 tda8290_msg.buf = tda8290_open;
994 i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
995 return ret;
996}
997
998static struct tda1004x_config md8800_dvbt_config = {
999 .demod_address = 0x08,
1000 .invert = 1,
1001 .invert_oclk = 0,
1002 .xtal_freq = TDA10046_XTAL_16M,
1003 .agc_config = TDA10046_AGC_TDA827X,
1004 .if_freq = TDA10046_FREQ_045,
1005 .request_firmware = NULL,
1006};
1007
e2ac28fa
IL
1008static struct tda10086_config flydvbs = {
1009 .demod_address = 0x0e,
1010 .invert = 0,
1011};
1012
90e9df7f
HH
1013/* ------------------------------------------------------------------ */
1014
3b64e8e2
MK
1015static struct nxt200x_config avertvhda180 = {
1016 .demod_address = 0x0a,
3b64e8e2 1017};
3e1410ad 1018
fbc81c07
CM
1019static int nxt200x_set_pll_input(u8 *buf, int input)
1020{
1021 if (input)
1022 buf[3] |= 0x08;
1023 else
1024 buf[3] &= ~0x08;
1025 return 0;
1026}
1027
3e1410ad
AB
1028static struct nxt200x_config kworldatsc110 = {
1029 .demod_address = 0x0a,
fbc81c07 1030 .set_pll_input = nxt200x_set_pll_input,
3e1410ad 1031};
3b64e8e2 1032
1da177e4
LT
1033/* ------------------------------------------------------------------ */
1034
1035static int dvb_init(struct saa7134_dev *dev)
1036{
1037 /* init struct videobuf_dvb */
1038 dev->ts.nr_bufs = 32;
1039 dev->ts.nr_packets = 32*4;
1040 dev->dvb.name = dev->name;
1041 videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
1042 dev->pci, &dev->slock,
1043 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1044 V4L2_FIELD_ALTERNATE,
1045 sizeof(struct saa7134_buf),
1046 dev);
1047
1048 switch (dev->board) {
1049 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1050 printk("%s: pinnacle 300i dvb setup\n",dev->name);
2bfe031d 1051 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
1da177e4 1052 &dev->i2c_adap);
6b3ccab7 1053 if (dev->dvb.frontend) {
dea74869 1054 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1055 }
1da177e4 1056 break;
a78d0bfa
JAR
1057 case SAA7134_BOARD_AVERMEDIA_777:
1058 printk("%s: avertv 777 dvb setup\n",dev->name);
2bfe031d 1059 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
a78d0bfa 1060 &dev->i2c_adap);
6b3ccab7 1061 if (dev->dvb.frontend) {
dea74869 1062 dev->dvb.frontend->ops.tuner_ops.calc_regs = mt352_aver777_tuner_calc_regs;
6b3ccab7 1063 }
a78d0bfa 1064 break;
1da177e4 1065 case SAA7134_BOARD_MD7134:
2bfe031d 1066 dev->dvb.frontend = dvb_attach(tda10046_attach, &medion_cardbus,
1da177e4 1067 &dev->i2c_adap);
6b3ccab7 1068 if (dev->dvb.frontend) {
dea74869
PB
1069 dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init;
1070 dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep;
1071 dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params;
6b3ccab7 1072 }
1da177e4 1073 break;
86ddd96f 1074 case SAA7134_BOARD_PHILIPS_TOUGH:
2bfe031d 1075 dev->dvb.frontend = dvb_attach(tda10046_attach, &philips_tu1216_60_config,
86ddd96f 1076 &dev->i2c_adap);
6b3ccab7 1077 if (dev->dvb.frontend) {
dea74869
PB
1078 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_tuner_60_init;
1079 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tu1216_tuner_60_set_params;
6b3ccab7 1080 }
86ddd96f
MCC
1081 break;
1082 case SAA7134_BOARD_FLYDVBTDUO:
2bfe031d 1083 dev->dvb.frontend = dvb_attach(tda10046_attach, &tda827x_lifeview_config,
86ddd96f 1084 &dev->i2c_adap);
6b3ccab7 1085 if (dev->dvb.frontend) {
dea74869
PB
1086 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1087 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1088 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1089 }
86ddd96f 1090 break;
10b7a903 1091 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
2bfe031d 1092 dev->dvb.frontend = dvb_attach(tda10046_attach, &tda827x_lifeview_config,
86ddd96f 1093 &dev->i2c_adap);
6b3ccab7 1094 if (dev->dvb.frontend) {
dea74869
PB
1095 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1096 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1097 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1098 }
86ddd96f 1099 break;
2cf36ac4 1100 case SAA7134_BOARD_PHILIPS_EUROPA:
2bfe031d 1101 dev->dvb.frontend = dvb_attach(tda10046_attach, &philips_europa_config,
2cf36ac4 1102 &dev->i2c_adap);
6b3ccab7 1103 if (dev->dvb.frontend) {
dea74869
PB
1104 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1105 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1106 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1107 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1108 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1109 }
2cf36ac4
HH
1110 break;
1111 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
2bfe031d 1112 dev->dvb.frontend = dvb_attach(tda10046_attach, &philips_europa_config,
2cf36ac4 1113 &dev->i2c_adap);
6b3ccab7 1114 if (dev->dvb.frontend) {
dea74869
PB
1115 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1116 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1117 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1118 }
2cf36ac4
HH
1119 break;
1120 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
2bfe031d 1121 dev->dvb.frontend = dvb_attach(tda10046_attach, &philips_tu1216_61_config,
2cf36ac4 1122 &dev->i2c_adap);
6b3ccab7 1123 if (dev->dvb.frontend) {
dea74869
PB
1124 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_tuner_61_init;
1125 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tu1216_tuner_61_set_params;
6b3ccab7 1126 }
2cf36ac4 1127 break;
90e9df7f 1128 case SAA7134_BOARD_PHILIPS_TIGER:
2bfe031d 1129 dev->dvb.frontend = dvb_attach(tda10046_attach, &philips_tiger_config,
90e9df7f 1130 &dev->i2c_adap);
6b3ccab7 1131 if (dev->dvb.frontend) {
dea74869
PB
1132 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1133 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tiger_tuner_sleep;
1134 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
6b3ccab7 1135 }
90e9df7f 1136 break;
d4b0aba4 1137 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
2bfe031d 1138 dev->dvb.frontend = dvb_attach(tda10046_attach, &philips_tiger_config,
d4b0aba4 1139 &dev->i2c_adap);
6b3ccab7 1140 if (dev->dvb.frontend) {
dea74869
PB
1141 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1142 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tiger_tuner_sleep;
1143 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
6b3ccab7 1144 }
d4b0aba4 1145 break;
3d8466ec 1146 case SAA7134_BOARD_FLYDVBT_LR301:
2bfe031d 1147 dev->dvb.frontend = dvb_attach(tda10046_attach, &tda827x_lifeview_config,
3d8466ec 1148 &dev->i2c_adap);
6b3ccab7 1149 if (dev->dvb.frontend) {
dea74869
PB
1150 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1151 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1152 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1153 }
3d8466ec 1154 break;
420f32fe 1155 case SAA7134_BOARD_FLYDVB_TRIO:
2bfe031d 1156 dev->dvb.frontend = dvb_attach(tda10046_attach, &lifeview_trio_config,
420f32fe 1157 &dev->i2c_adap);
6b3ccab7 1158 if (dev->dvb.frontend) {
dea74869
PB
1159 dev->dvb.frontend->ops.tuner_ops.sleep = lifeview_trio_tuner_sleep;
1160 dev->dvb.frontend->ops.tuner_ops.set_params = lifeview_trio_tuner_set_params;
6b3ccab7 1161 }
420f32fe 1162 break;
df42eaf2 1163 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
2bfe031d 1164 dev->dvb.frontend = dvb_attach(tda10046_attach, &ads_tech_duo_config,
df42eaf2 1165 &dev->i2c_adap);
6b3ccab7 1166 if (dev->dvb.frontend) {
dea74869
PB
1167 dev->dvb.frontend->ops.tuner_ops.init = ads_duo_tuner_init;
1168 dev->dvb.frontend->ops.tuner_ops.sleep = ads_duo_tuner_sleep;
1169 dev->dvb.frontend->ops.tuner_ops.set_params = ads_duo_tuner_set_params;
6b3ccab7 1170 }
df42eaf2 1171 break;
3dfb729f 1172 case SAA7134_BOARD_TEVION_DVBT_220RF:
2bfe031d 1173 dev->dvb.frontend = dvb_attach(tda10046_attach, &tevion_dvbt220rf_config,
3dfb729f 1174 &dev->i2c_adap);
6b3ccab7 1175 if (dev->dvb.frontend) {
dea74869
PB
1176 dev->dvb.frontend->ops.tuner_ops.sleep = tevion_dvb220rf_tuner_sleep;
1177 dev->dvb.frontend->ops.tuner_ops.set_params = tevion_dvb220rf_tuner_set_params;
6b3ccab7 1178 }
3dfb729f 1179 break;
d95b8942 1180 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
2bfe031d 1181 dev->dvb.frontend = dvb_attach(tda10046_attach, &ads_tech_duo_config,
d95b8942 1182 &dev->i2c_adap);
6b3ccab7 1183 if (dev->dvb.frontend) {
dea74869
PB
1184 dev->dvb.frontend->ops.tuner_ops.init = ads_duo_tuner_init;
1185 dev->dvb.frontend->ops.tuner_ops.sleep = ads_duo_tuner_sleep;
1186 dev->dvb.frontend->ops.tuner_ops.set_params = ads_duo_tuner_set_params;
6b3ccab7 1187 }
d95b8942 1188 break;
5eda227f
HH
1189 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
1190 dev->dvb.frontend = tda10046_attach(&md8800_dvbt_config,
1191 &dev->i2c_adap);
1192 if (dev->dvb.frontend) {
1193 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1194 dev->dvb.frontend->ops.tuner_ops.sleep = md8800_dvbt_analog_mode;
1195 dev->dvb.frontend->ops.tuner_ops.set_params = md8800_dvbt_pll_set;
1196 }
1197 break;
3b64e8e2 1198 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
2bfe031d 1199 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, &dev->i2c_adap);
a79ddae9 1200 if (dev->dvb.frontend) {
2bfe031d 1201 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, &dev->i2c_adap, &dvb_pll_tdhu2);
a79ddae9 1202 }
3b64e8e2 1203 break;
3e1410ad 1204 case SAA7134_BOARD_KWORLD_ATSC110:
2bfe031d 1205 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, &dev->i2c_adap);
a79ddae9 1206 if (dev->dvb.frontend) {
2bfe031d 1207 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, &dev->i2c_adap, &dvb_pll_tuv1236d);
a79ddae9 1208 }
3e1410ad 1209 break;
e2ac28fa
IL
1210 case SAA7134_BOARD_FLYDVBS_LR300:
1211 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1212 if (dev->dvb.frontend) {
1213 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60, &dev->i2c_adap, 0) == NULL) {
1214 printk("%s: No tda826x found!\n", __FUNCTION__);
1215 }
1216 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap, 0x08, 0, 0) == NULL) {
1217 printk("%s: No ISL6421 found!\n", __FUNCTION__);
1218 }
1219 }
1220 break;
1da177e4
LT
1221 default:
1222 printk("%s: Huh? unknown DVB card?\n",dev->name);
1223 break;
1224 }
1225
1226 if (NULL == dev->dvb.frontend) {
1227 printk("%s: frontend initialization failed\n",dev->name);
1228 return -1;
1229 }
1230
1231 /* register everything else */
d09dbf92 1232 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
1da177e4
LT
1233}
1234
1235static int dvb_fini(struct saa7134_dev *dev)
1236{
1237 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1238
1da177e4
LT
1239 switch (dev->board) {
1240 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1241 /* otherwise we don't detect the tuner on next insmod */
1242 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
1243 break;
1244 };
1245 videobuf_dvb_unregister(&dev->dvb);
1246 return 0;
1247}
1248
1249static struct saa7134_mpeg_ops dvb_ops = {
1250 .type = SAA7134_MPEG_DVB,
1251 .init = dvb_init,
1252 .fini = dvb_fini,
1253};
1254
1255static int __init dvb_register(void)
1256{
1257 return saa7134_ts_register(&dvb_ops);
1258}
1259
1260static void __exit dvb_unregister(void)
1261{
1262 saa7134_ts_unregister(&dvb_ops);
1263}
1264
1265module_init(dvb_register);
1266module_exit(dvb_unregister);
1267
1268/* ------------------------------------------------------------------ */
1269/*
1270 * Local variables:
1271 * c-basic-offset: 8
1272 * End:
1273 */
This page took 0.229959 seconds and 5 git commands to generate.