V4L/DVB (6252): Adapt drivers to use the newer videobuf modules
[deliverable/linux.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
1da177e4 36
1f10c7af
AQ
37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
1da177e4 41
e2ac28fa
IL
42#include "tda10086.h"
43#include "tda826x.h"
8ce47dad 44#include "tda827x.h"
e2ac28fa 45#include "isl6421.h"
8ce47dad 46
1da177e4
LT
47MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
48MODULE_LICENSE("GPL");
49
50static unsigned int antenna_pwr = 0;
86ddd96f 51
1da177e4
LT
52module_param(antenna_pwr, int, 0444);
53MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
54
b331daa0
SB
55static int use_frontend = 0;
56module_param(use_frontend, int, 0644);
57MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 58
58ef4f92
HH
59static int debug = 0;
60module_param(debug, int, 0644);
61MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
62
cf3c34c8
TP
63#define dprintk(fmt, arg...) do { if (debug) \
64 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
65
66/* Print a warning */
67#define wprintk(fmt, arg...) \
68 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
69
70/* ------------------------------------------------------------------
71 * mt352 based DVB-T cards
72 */
73
1da177e4
LT
74static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
75{
76 u32 ok;
77
78 if (!on) {
79 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
80 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
81 return 0;
82 }
83
84 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
85 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
86 udelay(10);
87
88 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
89 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
90 udelay(10);
91 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
92 udelay(10);
93 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
cf3c34c8 94 dprintk("%s %s\n", __FUNCTION__, ok ? "on" : "off");
1da177e4
LT
95
96 if (!ok)
97 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
98 return ok;
99}
100
101static int mt352_pinnacle_init(struct dvb_frontend* fe)
102{
103 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
104 static u8 reset [] = { RESET, 0x80 };
105 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
106 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
107 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
108 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
109 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
110 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
111 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
112 struct saa7134_dev *dev= fe->dvb->priv;
113
cf3c34c8 114 dprintk("%s called\n", __FUNCTION__);
1da177e4
LT
115
116 mt352_write(fe, clock_config, sizeof(clock_config));
117 udelay(200);
118 mt352_write(fe, reset, sizeof(reset));
119 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
120 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
121 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
122 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
123
124 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
125 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
126 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 127
1da177e4
LT
128 return 0;
129}
130
a78d0bfa
JAR
131static int mt352_aver777_init(struct dvb_frontend* fe)
132{
133 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
134 static u8 reset [] = { RESET, 0x80 };
135 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
136 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
137 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
138
139 mt352_write(fe, clock_config, sizeof(clock_config));
140 udelay(200);
141 mt352_write(fe, reset, sizeof(reset));
142 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
143 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
144 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
145
146 return 0;
147}
148
0463f12c
AQ
149static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
150 struct dvb_frontend_parameters* params)
1da177e4 151{
df8cf706
HH
152 u8 off[] = { 0x00, 0xf1};
153 u8 on[] = { 0x00, 0x71};
154 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
155
1da177e4
LT
156 struct saa7134_dev *dev = fe->dvb->priv;
157 struct v4l2_frequency f;
158
159 /* set frequency (mt2050) */
160 f.tuner = 0;
161 f.type = V4L2_TUNER_DIGITAL_TV;
162 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
163 if (fe->ops.i2c_gate_ctrl)
164 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 165 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 166 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 167 msg.buf = on;
dea74869
PB
168 if (fe->ops.i2c_gate_ctrl)
169 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 170 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
171
172 pinnacle_antenna_pwr(dev, antenna_pwr);
173
174 /* mt352 setup */
0463f12c 175 return mt352_pinnacle_init(fe);
1da177e4
LT
176}
177
178static struct mt352_config pinnacle_300i = {
179 .demod_address = 0x3c >> 1,
180 .adc_clock = 20333,
181 .if2 = 36150,
182 .no_tuner = 1,
183 .demod_init = mt352_pinnacle_init,
1da177e4 184};
a78d0bfa
JAR
185
186static struct mt352_config avermedia_777 = {
187 .demod_address = 0xf,
188 .demod_init = mt352_aver777_init,
a78d0bfa 189};
1da177e4 190
58ef4f92
HH
191/* ==================================================================
192 * tda1004x based DVB-T cards, helper functions
193 */
194
195static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
196 const struct firmware **fw, char *name)
1da177e4
LT
197{
198 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
199 return request_firmware(fw, name, &dev->pci->dev);
200}
201
58ef4f92
HH
202/* ------------------------------------------------------------------
203 * these tuners are tu1216, td1316(a)
204 */
205
206static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
207{
208 struct saa7134_dev *dev = fe->dvb->priv;
209 struct tda1004x_state *state = fe->demodulator_priv;
210 u8 addr = state->config->tuner_address;
86ddd96f 211 u8 tuner_buf[4];
2cf36ac4 212 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
213 sizeof(tuner_buf) };
214 int tuner_frequency = 0;
215 u8 band, cp, filter;
216
217 /* determine charge pump */
218 tuner_frequency = params->frequency + 36166000;
219 if (tuner_frequency < 87000000)
220 return -EINVAL;
221 else if (tuner_frequency < 130000000)
222 cp = 3;
223 else if (tuner_frequency < 160000000)
224 cp = 5;
225 else if (tuner_frequency < 200000000)
226 cp = 6;
227 else if (tuner_frequency < 290000000)
228 cp = 3;
229 else if (tuner_frequency < 420000000)
230 cp = 5;
231 else if (tuner_frequency < 480000000)
232 cp = 6;
233 else if (tuner_frequency < 620000000)
234 cp = 3;
235 else if (tuner_frequency < 830000000)
236 cp = 5;
237 else if (tuner_frequency < 895000000)
238 cp = 7;
239 else
240 return -EINVAL;
241
242 /* determine band */
243 if (params->frequency < 49000000)
244 return -EINVAL;
245 else if (params->frequency < 161000000)
246 band = 1;
247 else if (params->frequency < 444000000)
248 band = 2;
249 else if (params->frequency < 861000000)
250 band = 4;
251 else
252 return -EINVAL;
253
254 /* setup PLL filter */
255 switch (params->u.ofdm.bandwidth) {
256 case BANDWIDTH_6_MHZ:
257 filter = 0;
258 break;
259
260 case BANDWIDTH_7_MHZ:
261 filter = 0;
262 break;
263
264 case BANDWIDTH_8_MHZ:
265 filter = 1;
266 break;
1da177e4 267
86ddd96f
MCC
268 default:
269 return -EINVAL;
270 }
271
272 /* calculate divisor
273 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 274 */
86ddd96f
MCC
275 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
276
277 /* setup tuner buffer */
278 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
279 tuner_buf[1] = tuner_frequency & 0xff;
280 tuner_buf[2] = 0xca;
281 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
282
dea74869
PB
283 if (fe->ops.i2c_gate_ctrl)
284 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 285 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
286 wprintk("could not write to tuner at addr: 0x%02x\n",
287 addr << 1);
86ddd96f 288 return -EIO;
58ef4f92 289 }
2cf36ac4
HH
290 msleep(1);
291 return 0;
292}
293
58ef4f92 294static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
295{
296 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
297 struct tda1004x_state *state = fe->demodulator_priv;
298 u8 addr = state->config->tuner_address;
2cf36ac4
HH
299 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
300 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 301
2cf36ac4 302 /* setup PLL configuration */
dea74869
PB
303 if (fe->ops.i2c_gate_ctrl)
304 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
305 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
306 return -EIO;
86ddd96f 307 msleep(1);
2cf36ac4 308
1da177e4
LT
309 return 0;
310}
311
2cf36ac4
HH
312/* ------------------------------------------------------------------ */
313
2cf36ac4 314static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
315 .demod_address = 0x8,
316 .invert = 1,
2cf36ac4 317 .invert_oclk = 0,
86ddd96f
MCC
318 .xtal_freq = TDA10046_XTAL_4M,
319 .agc_config = TDA10046_AGC_DEFAULT,
320 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
321 .tuner_address = 0x60,
322 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
323};
324
2cf36ac4
HH
325static struct tda1004x_config philips_tu1216_61_config = {
326
327 .demod_address = 0x8,
328 .invert = 1,
329 .invert_oclk = 0,
330 .xtal_freq = TDA10046_XTAL_4M,
331 .agc_config = TDA10046_AGC_DEFAULT,
332 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
333 .tuner_address = 0x61,
334 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
335};
336
337/* ------------------------------------------------------------------ */
338
cbb94521 339static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
340{
341 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
342 struct tda1004x_state *state = fe->demodulator_priv;
343 u8 addr = state->config->tuner_address;
2cf36ac4 344 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 345 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
346
347 /* setup PLL configuration */
dea74869
PB
348 if (fe->ops.i2c_gate_ctrl)
349 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
350 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
351 return -EIO;
2cf36ac4
HH
352 return 0;
353}
354
a79ddae9 355static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 356{
58ef4f92
HH
357 return philips_tda6651_pll_set(fe, params);
358}
359
360static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
361{
362 struct saa7134_dev *dev = fe->dvb->priv;
363 struct tda1004x_state *state = fe->demodulator_priv;
364 u8 addr = state->config->tuner_address;
365 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
366 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
367
368 /* switch the tuner to analog mode */
369 if (fe->ops.i2c_gate_ctrl)
370 fe->ops.i2c_gate_ctrl(fe, 1);
371 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
372 return -EIO;
373 return 0;
2cf36ac4
HH
374}
375
58ef4f92
HH
376/* ------------------------------------------------------------------ */
377
cbb94521
HH
378static int philips_europa_tuner_init(struct dvb_frontend *fe)
379{
380 struct saa7134_dev *dev = fe->dvb->priv;
381 static u8 msg[] = { 0x00, 0x40};
382 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
383
384
385 if (philips_td1316_tuner_init(fe))
386 return -EIO;
387 msleep(1);
388 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
389 return -EIO;
390
391 return 0;
392}
393
a79ddae9 394static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
395{
396 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 397
58ef4f92
HH
398 static u8 msg[] = { 0x00, 0x14 };
399 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
400
401 if (philips_td1316_tuner_sleep(fe))
402 return -EIO;
2cf36ac4
HH
403
404 /* switch the board to analog mode */
dea74869
PB
405 if (fe->ops.i2c_gate_ctrl)
406 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 407 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
408 return 0;
409}
410
411static int philips_europa_demod_sleep(struct dvb_frontend *fe)
412{
413 struct saa7134_dev *dev = fe->dvb->priv;
414
415 if (dev->original_demod_sleep)
416 dev->original_demod_sleep(fe);
dea74869 417 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 418 return 0;
2cf36ac4
HH
419}
420
421static struct tda1004x_config philips_europa_config = {
422
423 .demod_address = 0x8,
424 .invert = 0,
425 .invert_oclk = 0,
426 .xtal_freq = TDA10046_XTAL_4M,
427 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
428 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
429 .tuner_address = 0x61,
430 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
431};
432
433/* ------------------------------------------------------------------ */
86ddd96f 434
408b664a 435static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
436 .demod_address = 0x08,
437 .invert = 1,
438 .invert_oclk = 0,
439 .xtal_freq = TDA10046_XTAL_16M,
440 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
441 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
442 .tuner_address = 0x61,
443 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
444};
445
58ef4f92
HH
446/* ------------------------------------------------------------------
447 * tda 1004x based cards with philips silicon tuner
448 */
449
450static void philips_tda827x_lna_gain(struct dvb_frontend *fe, int high)
451{
452 struct saa7134_dev *dev = fe->dvb->priv;
453 struct tda1004x_state *state = fe->demodulator_priv;
454 u8 addr = state->config->i2c_gate;
455 u8 config = state->config->tuner_config;
456 u8 GP00_CF[] = {0x20, 0x01};
457 u8 GP00_LEV[] = {0x22, 0x00};
458
459 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = GP00_CF, .len = 2};
460 if (config) {
461 if (high) {
462 dprintk("setting LNA to high gain\n");
463 } else {
464 dprintk("setting LNA to low gain\n");
465 }
466 }
467 switch (config) {
468 case 0: /* no LNA */
469 break;
470 case 1: /* switch is GPIO 0 of tda8290 */
471 case 2:
472 /* turn Vsync off */
473 saa7134_set_gpio(dev, 22, 0);
474 GP00_LEV[1] = high ? 0 : 1;
475 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
cf3c34c8
TP
476 wprintk("could not access tda8290 at addr: 0x%02x\n",
477 addr << 1);
58ef4f92
HH
478 return;
479 }
480 msg.buf = GP00_LEV;
481 if (config == 2)
482 GP00_LEV[1] = high ? 1 : 0;
483 i2c_transfer(&dev->i2c_adap, &msg, 1);
484 break;
485 case 3: /* switch with GPIO of saa713x */
486 saa7134_set_gpio(dev, 22, high);
487 break;
488 }
489}
490
491static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
492{
58ef4f92
HH
493 struct tda1004x_state *state = fe->demodulator_priv;
494
495 u8 addr = state->config->i2c_gate;
496 static u8 tda8290_close[] = { 0x21, 0xc0};
497 static u8 tda8290_open[] = { 0x21, 0x80};
498 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
499 if (enable) {
500 tda8290_msg.buf = tda8290_close;
501 } else {
502 tda8290_msg.buf = tda8290_open;
503 }
06be3035 504 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
505 struct saa7134_dev *dev = fe->dvb->priv;
506 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
507 return -EIO;
508 }
509 msleep(20);
510 return 0;
511}
512
86ddd96f
MCC
513/* ------------------------------------------------------------------ */
514
58ef4f92 515static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 516{
90e9df7f 517 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 518 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 519
58ef4f92
HH
520 switch (state->config->antenna_switch) {
521 case 0: break;
522 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
523 saa7134_set_gpio(dev, 21, 0);
524 break;
525 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
526 saa7134_set_gpio(dev, 21, 1);
527 break;
587d2fd7 528 }
587d2fd7
HH
529 return 0;
530}
531
58ef4f92 532static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 533{
58ef4f92
HH
534 struct saa7134_dev *dev = fe->dvb->priv;
535 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 536
58ef4f92
HH
537 switch (state->config->antenna_switch) {
538 case 0: break;
539 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
540 saa7134_set_gpio(dev, 21, 1);
541 break;
542 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
543 saa7134_set_gpio(dev, 21, 0);
544 break;
545 }
587d2fd7 546 return 0;
2d6b5f62 547}
90e9df7f 548
8ce47dad
MK
549static struct tda827x_config tda827x_cfg = {
550 .lna_gain = philips_tda827x_lna_gain,
551 .init = philips_tda827x_tuner_init,
552 .sleep = philips_tda827x_tuner_sleep
553};
90e9df7f 554
b8bc76d8 555static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config *tda_conf)
90e9df7f 556{
58ef4f92
HH
557 dev->dvb.frontend = dvb_attach(tda10046_attach, tda_conf, &dev->i2c_adap);
558 if (dev->dvb.frontend) {
559 if (tda_conf->i2c_gate)
560 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
ede2200d
HH
561 if (dvb_attach(tda827x_attach, dev->dvb.frontend, tda_conf->tuner_address,
562 &dev->i2c_adap,&tda827x_cfg) == NULL) {
cf3c34c8 563 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d
HH
564 tda_conf->tuner_address);
565 }
58ef4f92 566 }
90e9df7f
HH
567}
568
58ef4f92 569/* ------------------------------------------------------------------ */
261f5081 570
58ef4f92 571static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
572 .demod_address = 0x08,
573 .invert = 1,
574 .invert_oclk = 0,
575 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
576 .agc_config = TDA10046_AGC_TDA827X,
577 .gpio_config = TDA10046_GP11_I,
550a9a5e 578 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
579 .tuner_address = 0x60,
580 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 581};
550a9a5e 582
58ef4f92
HH
583static struct tda1004x_config philips_tiger_config = {
584 .demod_address = 0x08,
585 .invert = 1,
586 .invert_oclk = 0,
587 .xtal_freq = TDA10046_XTAL_16M,
588 .agc_config = TDA10046_AGC_TDA827X,
589 .gpio_config = TDA10046_GP11_I,
590 .if_freq = TDA10046_FREQ_045,
591 .i2c_gate = 0x4b,
592 .tuner_address = 0x61,
593 .tuner_config = 0,
594 .antenna_switch= 1,
595 .request_firmware = philips_tda1004x_request_firmware
596};
550a9a5e
HH
597
598static struct tda1004x_config cinergy_ht_config = {
599 .demod_address = 0x08,
600 .invert = 1,
601 .invert_oclk = 0,
602 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
603 .agc_config = TDA10046_AGC_TDA827X,
604 .gpio_config = TDA10046_GP01_I,
90e9df7f 605 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
606 .i2c_gate = 0x4b,
607 .tuner_address = 0x61,
608 .tuner_config = 0,
609 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
610};
611
58ef4f92
HH
612static struct tda1004x_config cinergy_ht_pci_config = {
613 .demod_address = 0x08,
614 .invert = 1,
615 .invert_oclk = 0,
616 .xtal_freq = TDA10046_XTAL_16M,
617 .agc_config = TDA10046_AGC_TDA827X,
618 .gpio_config = TDA10046_GP01_I,
619 .if_freq = TDA10046_FREQ_045,
620 .i2c_gate = 0x4b,
621 .tuner_address = 0x60,
622 .tuner_config = 0,
623 .request_firmware = philips_tda1004x_request_firmware
624};
625
626static struct tda1004x_config philips_tiger_s_config = {
627 .demod_address = 0x08,
628 .invert = 1,
629 .invert_oclk = 0,
630 .xtal_freq = TDA10046_XTAL_16M,
631 .agc_config = TDA10046_AGC_TDA827X,
632 .gpio_config = TDA10046_GP01_I,
633 .if_freq = TDA10046_FREQ_045,
634 .i2c_gate = 0x4b,
635 .tuner_address = 0x61,
636 .tuner_config = 2,
637 .antenna_switch= 1,
638 .request_firmware = philips_tda1004x_request_firmware
639};
df42eaf2 640
587d2fd7
HH
641static struct tda1004x_config pinnacle_pctv_310i_config = {
642 .demod_address = 0x08,
643 .invert = 1,
644 .invert_oclk = 0,
645 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
646 .agc_config = TDA10046_AGC_TDA827X,
647 .gpio_config = TDA10046_GP11_I,
587d2fd7 648 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
649 .i2c_gate = 0x4b,
650 .tuner_address = 0x61,
651 .tuner_config = 1,
652 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
653};
654
c6e53daf
TG
655static struct tda1004x_config hauppauge_hvr_1110_config = {
656 .demod_address = 0x08,
657 .invert = 1,
658 .invert_oclk = 0,
659 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
660 .agc_config = TDA10046_AGC_TDA827X,
661 .gpio_config = TDA10046_GP11_I,
c6e53daf 662 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
663 .i2c_gate = 0x4b,
664 .tuner_address = 0x61,
665 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
666};
667
83646817
HH
668static struct tda1004x_config asus_p7131_dual_config = {
669 .demod_address = 0x08,
670 .invert = 1,
671 .invert_oclk = 0,
672 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
673 .agc_config = TDA10046_AGC_TDA827X,
674 .gpio_config = TDA10046_GP11_I,
83646817 675 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
676 .i2c_gate = 0x4b,
677 .tuner_address = 0x61,
678 .tuner_config = 0,
679 .antenna_switch= 2,
680 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
681};
682
420f32fe
NS
683static struct tda1004x_config lifeview_trio_config = {
684 .demod_address = 0x09,
685 .invert = 1,
686 .invert_oclk = 0,
687 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
688 .agc_config = TDA10046_AGC_TDA827X,
689 .gpio_config = TDA10046_GP00_I,
420f32fe 690 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
691 .tuner_address = 0x60,
692 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
693};
694
58ef4f92 695static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
696 .demod_address = 0x08,
697 .invert = 1,
698 .invert_oclk = 0,
699 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 700 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 701 .gpio_config = TDA10046_GP11_I,
df42eaf2 702 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
703 .tuner_address = 0x60,
704 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
705};
706
58ef4f92 707static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
708 .demod_address = 0x08,
709 .invert = 1,
710 .invert_oclk = 0,
711 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 712 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 713 .gpio_config = TDA10046_GP01_I,
3dfb729f 714 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
715 .i2c_gate = 0x4b,
716 .tuner_address = 0x60,
717 .tuner_config = 0,
718 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
719};
720
e06cea4c
HH
721static struct tda1004x_config asus_p7131_4871_config = {
722 .demod_address = 0x08,
723 .invert = 1,
724 .invert_oclk = 0,
725 .xtal_freq = TDA10046_XTAL_16M,
726 .agc_config = TDA10046_AGC_TDA827X,
727 .gpio_config = TDA10046_GP01_I,
728 .if_freq = TDA10046_FREQ_045,
729 .i2c_gate = 0x4b,
730 .tuner_address = 0x61,
731 .tuner_config = 2,
732 .antenna_switch= 2,
733 .request_firmware = philips_tda1004x_request_firmware
734};
735
f3eec0c0 736static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
737 .demod_address = 0x08,
738 .invert = 1,
739 .invert_oclk = 0,
740 .xtal_freq = TDA10046_XTAL_16M,
741 .agc_config = TDA10046_AGC_TDA827X,
742 .gpio_config = TDA10046_GP11_I,
743 .if_freq = TDA10046_FREQ_045,
744 .i2c_gate = 0x4b,
745 .tuner_address = 0x61,
746 .tuner_config = 2,
747 .antenna_switch= 2,
748 .request_firmware = philips_tda1004x_request_firmware
749};
261f5081 750
b39423a9
SF
751static struct tda1004x_config kworld_dvb_t_210_config = {
752 .demod_address = 0x08,
753 .invert = 1,
754 .invert_oclk = 0,
755 .xtal_freq = TDA10046_XTAL_16M,
756 .agc_config = TDA10046_AGC_TDA827X,
757 .gpio_config = TDA10046_GP11_I,
758 .if_freq = TDA10046_FREQ_045,
759 .i2c_gate = 0x4b,
760 .tuner_address = 0x61,
761 .tuner_config = 2,
762 .antenna_switch= 1,
763 .request_firmware = philips_tda1004x_request_firmware
764};
261f5081 765
d90d9f5a
ES
766static struct tda1004x_config avermedia_super_007_config = {
767 .demod_address = 0x08,
768 .invert = 1,
769 .invert_oclk = 0,
770 .xtal_freq = TDA10046_XTAL_16M,
771 .agc_config = TDA10046_AGC_TDA827X,
772 .gpio_config = TDA10046_GP01_I,
773 .if_freq = TDA10046_FREQ_045,
774 .i2c_gate = 0x4b,
775 .tuner_address = 0x60,
776 .tuner_config = 0,
777 .antenna_switch= 1,
778 .request_firmware = philips_tda1004x_request_firmware
779};
780
58ef4f92
HH
781/* ------------------------------------------------------------------
782 * special case: this card uses saa713x GPIO22 for the mode switch
783 */
5eda227f 784
58ef4f92 785static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
786{
787 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
788 philips_tda827x_tuner_init(fe);
789 /* route TDA8275a AGC input to the channel decoder */
06be3035 790 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
791 return 0;
792}
793
58ef4f92 794static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 795{
5eda227f 796 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 797 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 798 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
799 philips_tda827x_tuner_sleep(fe);
800 return 0;
5eda227f
HH
801}
802
8ce47dad
MK
803static struct tda827x_config ads_duo_cfg = {
804 .lna_gain = philips_tda827x_lna_gain,
805 .init = ads_duo_tuner_init,
806 .sleep = ads_duo_tuner_sleep
807};
808
58ef4f92 809static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
810 .demod_address = 0x08,
811 .invert = 1,
812 .invert_oclk = 0,
813 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 814 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 815 .gpio_config = TDA10046_GP00_I,
5eda227f 816 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
817 .tuner_address = 0x61,
818 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
819};
820
58ef4f92
HH
821/* ==================================================================
822 * tda10086 based DVB-S cards, helper functions
823 */
824
e2ac28fa
IL
825static struct tda10086_config flydvbs = {
826 .demod_address = 0x0e,
827 .invert = 0,
828};
829
58ef4f92
HH
830/* ==================================================================
831 * nxt200x based ATSC cards, helper functions
832 */
90e9df7f 833
3b64e8e2
MK
834static struct nxt200x_config avertvhda180 = {
835 .demod_address = 0x0a,
3b64e8e2 836};
3e1410ad
AB
837
838static struct nxt200x_config kworldatsc110 = {
839 .demod_address = 0x0a,
3e1410ad 840};
3b64e8e2 841
58ef4f92
HH
842/* ==================================================================
843 * Core code
844 */
1da177e4
LT
845
846static int dvb_init(struct saa7134_dev *dev)
847{
1c4f76ab 848 int ret;
1da177e4
LT
849 /* init struct videobuf_dvb */
850 dev->ts.nr_bufs = 32;
851 dev->ts.nr_packets = 32*4;
852 dev->dvb.name = dev->name;
c1accaa2 853 videobuf_queue_pci_init(&dev->dvb.dvbq, &saa7134_ts_qops,
1da177e4
LT
854 dev->pci, &dev->slock,
855 V4L2_BUF_TYPE_VIDEO_CAPTURE,
856 V4L2_FIELD_ALTERNATE,
857 sizeof(struct saa7134_buf),
858 dev);
859
860 switch (dev->board) {
861 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 862 dprintk("pinnacle 300i dvb setup\n");
2bfe031d 863 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 864 &dev->i2c_adap);
6b3ccab7 865 if (dev->dvb.frontend) {
dea74869 866 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 867 }
1da177e4 868 break;
a78d0bfa 869 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 870 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 871 dprintk("avertv 777 dvb setup\n");
2bfe031d 872 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 873 &dev->i2c_adap);
6b3ccab7 874 if (dev->dvb.frontend) {
8511df9e 875 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 876 NULL, DVB_PLL_PHILIPS_TD1316);
6b3ccab7 877 }
a78d0bfa 878 break;
1da177e4 879 case SAA7134_BOARD_MD7134:
f7b54b10
MK
880 dev->dvb.frontend = dvb_attach(tda10046_attach,
881 &medion_cardbus,
882 &dev->i2c_adap);
6b3ccab7 883 if (dev->dvb.frontend) {
b7754d74 884 dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address,
47a9991e 885 &dev->i2c_adap, DVB_PLL_FMD1216ME);
6b3ccab7 886 }
1da177e4 887 break;
86ddd96f 888 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK
889 dev->dvb.frontend = dvb_attach(tda10046_attach,
890 &philips_tu1216_60_config,
891 &dev->i2c_adap);
6b3ccab7 892 if (dev->dvb.frontend) {
58ef4f92
HH
893 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
894 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 895 }
86ddd96f
MCC
896 break;
897 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 898 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
b8bc76d8 899 configure_tda827x_fe(dev, &tda827x_lifeview_config);
86ddd96f 900 break;
2cf36ac4 901 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 902 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK
903 dev->dvb.frontend = dvb_attach(tda10046_attach,
904 &philips_europa_config,
905 &dev->i2c_adap);
6b3ccab7 906 if (dev->dvb.frontend) {
588f9831
HH
907 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
908 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB
909 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
910 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
911 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 912 }
2cf36ac4
HH
913 break;
914 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK
915 dev->dvb.frontend = dvb_attach(tda10046_attach,
916 &philips_tu1216_61_config,
917 &dev->i2c_adap);
6b3ccab7 918 if (dev->dvb.frontend) {
58ef4f92
HH
919 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
920 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 921 }
2cf36ac4 922 break;
b39423a9
SF
923 case SAA7134_BOARD_KWORLD_DVBT_210:
924 configure_tda827x_fe(dev, &kworld_dvb_t_210_config);
925 break;
90e9df7f 926 case SAA7134_BOARD_PHILIPS_TIGER:
b8bc76d8 927 configure_tda827x_fe(dev, &philips_tiger_config);
587d2fd7
HH
928 break;
929 case SAA7134_BOARD_PINNACLE_PCTV_310i:
b8bc76d8 930 configure_tda827x_fe(dev, &pinnacle_pctv_310i_config);
90e9df7f 931 break;
c6e53daf 932 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
b8bc76d8 933 configure_tda827x_fe(dev, &hauppauge_hvr_1110_config);
c6e53daf 934 break;
d4b0aba4 935 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
b8bc76d8 936 configure_tda827x_fe(dev, &asus_p7131_dual_config);
d4b0aba4 937 break;
3d8466ec 938 case SAA7134_BOARD_FLYDVBT_LR301:
b8bc76d8 939 configure_tda827x_fe(dev, &tda827x_lifeview_config);
3d8466ec 940 break;
420f32fe 941 case SAA7134_BOARD_FLYDVB_TRIO:
b331daa0 942 if(! use_frontend) { //terrestrial
b8bc76d8 943 configure_tda827x_fe(dev, &lifeview_trio_config);
1f683cd8
NS
944 } else { //satellite
945 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
946 if (dev->dvb.frontend) {
947 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63,
948 &dev->i2c_adap, 0) == NULL) {
cf3c34c8 949 wprintk("%s: Lifeview Trio, No tda826x found!\n", __FUNCTION__);
1f683cd8
NS
950 }
951 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap,
952 0x08, 0, 0) == NULL) {
cf3c34c8 953 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __FUNCTION__);
1f683cd8
NS
954 }
955 }
6b3ccab7 956 }
420f32fe 957 break;
df42eaf2 958 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 959 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK
960 dev->dvb.frontend = dvb_attach(tda10046_attach,
961 &ads_tech_duo_config,
962 &dev->i2c_adap);
6b3ccab7 963 if (dev->dvb.frontend) {
ede2200d 964 if (dvb_attach(tda827x_attach,dev->dvb.frontend,
8ce47dad 965 ads_tech_duo_config.tuner_address,
ede2200d 966 &dev->i2c_adap,&ads_duo_cfg) == NULL) {
cf3c34c8 967 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d
HH
968 ads_tech_duo_config.tuner_address);
969 }
6b3ccab7 970 }
df42eaf2 971 break;
3dfb729f 972 case SAA7134_BOARD_TEVION_DVBT_220RF:
b8bc76d8 973 configure_tda827x_fe(dev, &tevion_dvbt220rf_config);
d95b8942 974 break;
5eda227f 975 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
b8bc76d8 976 configure_tda827x_fe(dev, &md8800_dvbt_config);
5eda227f 977 break;
3b64e8e2 978 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK
979 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
980 &dev->i2c_adap);
a79ddae9 981 if (dev->dvb.frontend) {
4ad8eee5 982 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 983 NULL, DVB_PLL_TDHU2);
a79ddae9 984 }
3b64e8e2 985 break;
3e1410ad 986 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK
987 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
988 &dev->i2c_adap);
a79ddae9 989 if (dev->dvb.frontend) {
4ad8eee5 990 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 991 NULL, DVB_PLL_TUV1236D);
a79ddae9 992 }
3e1410ad 993 break;
e2ac28fa 994 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK
995 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
996 &dev->i2c_adap);
e2ac28fa 997 if (dev->dvb.frontend) {
f7b54b10
MK
998 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
999 &dev->i2c_adap, 0) == NULL) {
cf3c34c8 1000 wprintk("%s: No tda826x found!\n", __FUNCTION__);
e2ac28fa 1001 }
f7b54b10
MK
1002 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1003 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
cf3c34c8 1004 wprintk("%s: No ISL6421 found!\n", __FUNCTION__);
e2ac28fa
IL
1005 }
1006 }
1007 break;
cf146ca4
HH
1008 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
1009 dev->dvb.frontend = tda10046_attach(&medion_cardbus,
1010 &dev->i2c_adap);
1011 if (dev->dvb.frontend) {
1012 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1013 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74
TP
1014
1015 dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address,
47a9991e 1016 &dev->i2c_adap, DVB_PLL_FMD1216ME);
cf146ca4
HH
1017 }
1018 break;
cbb94521
HH
1019 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
1020 dev->dvb.frontend = dvb_attach(tda10046_attach,
1021 &philips_europa_config,
1022 &dev->i2c_adap);
1023 if (dev->dvb.frontend) {
1024 dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1025 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1026 }
1027 break;
550a9a5e 1028 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
b8bc76d8 1029 configure_tda827x_fe(dev, &cinergy_ht_config);
9de271e6
MK
1030 break;
1031 case SAA7134_BOARD_CINERGY_HT_PCI:
b8bc76d8 1032 configure_tda827x_fe(dev, &cinergy_ht_pci_config);
58ef4f92
HH
1033 break;
1034 case SAA7134_BOARD_PHILIPS_TIGER_S:
b8bc76d8 1035 configure_tda827x_fe(dev, &philips_tiger_s_config);
550a9a5e 1036 break;
e06cea4c
HH
1037 case SAA7134_BOARD_ASUS_P7131_4871:
1038 configure_tda827x_fe(dev, &asus_p7131_4871_config);
1039 break;
f3eec0c0
HH
1040 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
1041 configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config);
e06cea4c 1042 break;
d90d9f5a
ES
1043 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
1044 configure_tda827x_fe(dev, &avermedia_super_007_config);
1045 break;
1da177e4 1046 default:
cf3c34c8 1047 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1048 break;
1049 }
1050
1051 if (NULL == dev->dvb.frontend) {
cf3c34c8 1052 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
1da177e4
LT
1053 return -1;
1054 }
1055
1056 /* register everything else */
1c4f76ab
HH
1057 ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
1058
1059 /* this sequence is necessary to make the tda1004x load its firmware
1060 * and to enter analog mode of hybrid boards
1061 */
1062 if (!ret) {
1063 if (dev->dvb.frontend->ops.init)
1064 dev->dvb.frontend->ops.init(dev->dvb.frontend);
1065 if (dev->dvb.frontend->ops.sleep)
1066 dev->dvb.frontend->ops.sleep(dev->dvb.frontend);
9971f4f1
HH
1067 if (dev->dvb.frontend->ops.tuner_ops.sleep)
1068 dev->dvb.frontend->ops.tuner_ops.sleep(dev->dvb.frontend);
1c4f76ab
HH
1069 }
1070 return ret;
1da177e4
LT
1071}
1072
1073static int dvb_fini(struct saa7134_dev *dev)
1074{
1075 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1076
1da177e4
LT
1077 switch (dev->board) {
1078 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1079 /* otherwise we don't detect the tuner on next insmod */
1080 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
1081 break;
1082 };
1083 videobuf_dvb_unregister(&dev->dvb);
1084 return 0;
1085}
1086
1087static struct saa7134_mpeg_ops dvb_ops = {
1088 .type = SAA7134_MPEG_DVB,
1089 .init = dvb_init,
1090 .fini = dvb_fini,
1091};
1092
1093static int __init dvb_register(void)
1094{
1095 return saa7134_ts_register(&dvb_ops);
1096}
1097
1098static void __exit dvb_unregister(void)
1099{
1100 saa7134_ts_unregister(&dvb_ops);
1101}
1102
1103module_init(dvb_register);
1104module_exit(dvb_unregister);
1105
1106/* ------------------------------------------------------------------ */
1107/*
1108 * Local variables:
1109 * c-basic-offset: 8
1110 * End:
1111 */
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