Commit | Line | Data |
---|---|---|
443c1228 ST |
1 | /* |
2 | * Driver for the NXP SAA7164 PCIe bridge | |
3 | * | |
9b8b0199 | 4 | * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com> |
443c1228 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/kmod.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/delay.h> | |
31 | #include <asm/div64.h> | |
32 | ||
33 | #include "saa7164.h" | |
34 | ||
35 | MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards"); | |
9d119c33 | 36 | MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>"); |
443c1228 ST |
37 | MODULE_LICENSE("GPL"); |
38 | ||
39 | /* | |
40 | 1 Basic | |
41 | 2 | |
42 | 4 i2c | |
43 | 8 api | |
44 | 16 cmd | |
45 | 32 bus | |
46 | */ | |
47 | ||
b1912a85 IM |
48 | unsigned int saa_debug; |
49 | module_param_named(debug, saa_debug, int, 0644); | |
443c1228 ST |
50 | MODULE_PARM_DESC(debug, "enable debug messages"); |
51 | ||
66e1d378 ST |
52 | unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS; |
53 | module_param(encoder_buffers, int, 0644); | |
54 | MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64"); | |
55 | ||
bbf504c3 | 56 | unsigned int waitsecs = 10; |
dd1ee444 | 57 | module_param(waitsecs, int, 0644); |
66e1d378 | 58 | MODULE_PARM_DESC(waitsecs, "timeout on firmware messages"); |
dd1ee444 | 59 | |
443c1228 ST |
60 | static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET }; |
61 | module_param_array(card, int, NULL, 0444); | |
62 | MODULE_PARM_DESC(card, "card type"); | |
63 | ||
91d80189 ST |
64 | unsigned int print_histogram = 64; |
65 | module_param(print_histogram, int, 0644); | |
66e1d378 | 66 | MODULE_PARM_DESC(print_histogram, "print histogram values once"); |
91d80189 | 67 | |
443c1228 ST |
68 | static unsigned int saa7164_devcount; |
69 | ||
70 | static DEFINE_MUTEX(devlist); | |
71 | LIST_HEAD(saa7164_devlist); | |
72 | ||
73 | #define INT_SIZE 16 | |
74 | ||
12d3203e ST |
75 | void saa7164_dumphex16FF(struct saa7164_dev *dev, u8 *buf, int len) |
76 | { | |
77 | int i; | |
78 | u8 tmp[16]; | |
79 | memset(&tmp[0], 0xff, sizeof(tmp)); | |
80 | ||
81 | printk(KERN_INFO "--------------------> " | |
82 | "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); | |
83 | ||
84 | for (i = 0; i < len; i += 16) { | |
85 | if (memcmp(&tmp, buf + i, sizeof(tmp)) != 0) { | |
86 | printk(KERN_INFO " [0x%08x] " | |
87 | "%02x %02x %02x %02x %02x %02x %02x %02x " | |
88 | "%02x %02x %02x %02x %02x %02x %02x %02x\n", i, | |
89 | *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3), | |
90 | *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7), | |
91 | *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11), | |
92 | *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15)); | |
93 | } | |
94 | } | |
95 | } | |
96 | ||
a97781ac ST |
97 | static void saa7164_pack_verifier(struct saa7164_buffer *buf) |
98 | { | |
99 | u8 *p = (u8 *)buf->cpu; | |
100 | int i; | |
101 | ||
102 | for (i = 0; i < buf->actual_size; i += 2048) { | |
103 | ||
104 | if ( (*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) || (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA) ) | |
105 | printk(KERN_ERR "No pack at 0x%x\n", i); | |
106 | } | |
107 | } | |
108 | ||
9230acaa ST |
109 | static void saa7164_ts_verifier(struct saa7164_buffer *buf) |
110 | { | |
111 | struct saa7164_port *port = buf->port; | |
9230acaa ST |
112 | u32 i; |
113 | u8 tmp, cc, a; | |
114 | u8 *bufcpu = (u8 *)buf->cpu; | |
115 | ||
116 | port->sync_errors = 0; | |
117 | port->v_cc_errors = 0; | |
118 | port->a_cc_errors = 0; | |
119 | ||
120 | for (i = 0; i < buf->actual_size; i += 188) { | |
121 | if (*(bufcpu + i) != 0x47) | |
122 | port->sync_errors++; | |
123 | ||
124 | /* Query pid lower 8 bits */ | |
125 | tmp = *(bufcpu + i + 2); | |
126 | cc = *(bufcpu + i + 3) & 0x0f; | |
127 | ||
128 | if (tmp == 0xf1) { | |
129 | a = ((port->last_v_cc + 1) & 0x0f); | |
130 | if (a != cc) { | |
131 | printk(KERN_ERR "video cc last = %x current = %x i = %d\n", port->last_v_cc, cc, i); | |
132 | port->v_cc_errors++; | |
133 | } | |
134 | ||
135 | port->last_v_cc = cc; | |
136 | } else | |
137 | if (tmp == 0xf2) { | |
138 | a = ((port->last_a_cc + 1) & 0x0f); | |
139 | if (a != cc) { | |
140 | printk(KERN_ERR "audio cc last = %x current = %x i = %d\n", port->last_a_cc, cc, i); | |
141 | port->a_cc_errors++; | |
142 | } | |
143 | ||
144 | port->last_a_cc = cc; | |
145 | } | |
146 | ||
147 | } | |
148 | ||
149 | if (port->v_cc_errors) | |
150 | printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors); | |
151 | ||
152 | if (port->a_cc_errors) | |
153 | printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors); | |
154 | ||
155 | if (port->sync_errors) | |
156 | printk(KERN_ERR "sync_errors = %d\n", port->sync_errors); | |
157 | } | |
158 | ||
91d80189 | 159 | static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name) |
443c1228 | 160 | { |
91d80189 | 161 | int i; |
443c1228 | 162 | |
91d80189 ST |
163 | memset(hg, 0, sizeof(struct saa7164_histogram)); |
164 | strcpy(hg->name, name); | |
165 | ||
166 | /* First 30ms x 1ms */ | |
167 | for (i = 0; i < 30; i++) { | |
168 | hg->counter1[0 + i].val = i; | |
169 | } | |
170 | ||
171 | /* 30 - 200ms x 10ms */ | |
172 | for (i = 0; i < 18; i++) { | |
173 | hg->counter1[30 + i].val = 30 + (i * 10); | |
174 | } | |
175 | ||
176 | /* 200 - 2000ms x 100ms */ | |
177 | for (i = 0; i < 15; i++) { | |
58acca10 | 178 | hg->counter1[48 + i].val = 200 + (i * 200); |
91d80189 ST |
179 | } |
180 | ||
58acca10 ST |
181 | /* Catch all massive value (2secs) */ |
182 | hg->counter1[55].val = 2000; | |
183 | ||
184 | /* Catch all massive value (4secs) */ | |
185 | hg->counter1[56].val = 4000; | |
186 | ||
187 | /* Catch all massive value (8secs) */ | |
188 | hg->counter1[57].val = 8000; | |
189 | ||
190 | /* Catch all massive value (15secs) */ | |
191 | hg->counter1[58].val = 15000; | |
192 | ||
193 | /* Catch all massive value (30secs) */ | |
194 | hg->counter1[59].val = 30000; | |
195 | ||
196 | /* Catch all massive value (60secs) */ | |
197 | hg->counter1[60].val = 60000; | |
198 | ||
199 | /* Catch all massive value (5mins) */ | |
200 | hg->counter1[61].val = 300000; | |
201 | ||
202 | /* Catch all massive value (15mins) */ | |
203 | hg->counter1[62].val = 900000; | |
204 | ||
205 | /* Catch all massive values (1hr) */ | |
91d80189 | 206 | hg->counter1[63].val = 3600000; |
443c1228 ST |
207 | } |
208 | ||
58acca10 | 209 | void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val) |
443c1228 | 210 | { |
91d80189 ST |
211 | int i; |
212 | for (i = 0; i < 64; i++ ) { | |
213 | if (val <= hg->counter1[i].val) { | |
214 | hg->counter1[i].count++; | |
215 | hg->counter1[i].update_time = jiffies; | |
216 | break; | |
217 | } | |
218 | } | |
219 | } | |
443c1228 | 220 | |
91d80189 ST |
221 | static void saa7164_histogram_print(struct saa7164_port *port, |
222 | struct saa7164_histogram *hg) | |
223 | { | |
91d80189 ST |
224 | u32 entries = 0; |
225 | int i; | |
226 | ||
58acca10 | 227 | printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name); |
91d80189 ST |
228 | for (i = 0; i < 64; i++ ) { |
229 | if (hg->counter1[i].count == 0) | |
230 | continue; | |
443c1228 | 231 | |
91d80189 ST |
232 | printk(KERN_ERR " %4d %12d %Ld\n", |
233 | hg->counter1[i].val, | |
234 | hg->counter1[i].count, | |
235 | hg->counter1[i].update_time); | |
236 | ||
237 | entries++; | |
238 | } | |
239 | printk(KERN_ERR "Total: %d\n", entries); | |
443c1228 ST |
240 | } |
241 | ||
91d80189 | 242 | static void saa7164_work_enchandler(struct work_struct *w) |
7615e434 | 243 | { |
91d80189 ST |
244 | struct saa7164_port *port = |
245 | container_of(w, struct saa7164_port, workenc); | |
7615e434 ST |
246 | struct saa7164_dev *dev = port->dev; |
247 | struct saa7164_buffer *buf; | |
248 | struct saa7164_user_buffer *ubuf; | |
249 | struct list_head *c, *n; | |
91d80189 | 250 | int wp, rp, i = 0; |
12d3203e | 251 | u32 crc, ok = 0; |
46eeb8dd | 252 | u8 *p; |
7615e434 | 253 | |
91d80189 ST |
254 | port->last_svc_msecs_diff = port->last_svc_msecs; |
255 | port->last_svc_msecs = jiffies_to_msecs(jiffies); | |
256 | port->last_svc_wp = saa7164_readl(port->bufcounter); | |
257 | port->last_svc_rp = port->last_irq_rp; | |
258 | wp = port->last_svc_wp; | |
259 | rp = port->last_svc_rp; | |
7615e434 | 260 | |
7615e434 | 261 | |
91d80189 ST |
262 | port->last_svc_msecs_diff = port->last_svc_msecs - |
263 | port->last_svc_msecs_diff; | |
264 | ||
265 | saa7164_histogram_update(&port->svc_interval, | |
266 | port->last_svc_msecs_diff); | |
267 | ||
268 | port->last_irq_svc_msecs_diff = port->last_svc_msecs - | |
269 | port->last_irq_msecs; | |
270 | ||
271 | saa7164_histogram_update(&port->irq_svc_interval, | |
272 | port->last_irq_svc_msecs_diff); | |
273 | ||
274 | dprintk(DBGLVL_IRQ, | |
275 | "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n", | |
276 | __func__, | |
277 | port->last_svc_msecs_diff, | |
278 | port->last_irq_svc_msecs_diff, | |
279 | port->last_svc_wp, | |
280 | port->last_svc_rp | |
281 | ); | |
282 | ||
283 | if ((rp < 0) || (rp > 7)) { | |
284 | printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); | |
285 | return; | |
286 | } | |
287 | ||
288 | mutex_lock(&port->dmaqueue_lock); | |
289 | ||
7615e434 | 290 | list_for_each_safe(c, n, &port->dmaqueue.list) { |
91d80189 | 291 | |
7615e434 | 292 | buf = list_entry(c, struct saa7164_buffer, list); |
91d80189 ST |
293 | if (i++ > port->hwcfg.buffercount) { |
294 | printk(KERN_ERR "%s() illegal i count %d\n", | |
295 | __func__, i); | |
296 | break; | |
297 | } | |
7615e434 | 298 | |
46eeb8dd ST |
299 | p = (u8 *)buf->cpu; |
300 | if ( (*(p + buf->actual_size + 0) != 0xff) || | |
301 | (*(p + buf->actual_size + 1) != 0xff) || | |
302 | (*(p + buf->actual_size + 2) != 0xff) || | |
303 | (*(p + buf->actual_size + 3) != 0xff) || | |
304 | (*(p + buf->actual_size + 0x10) != 0xff) || | |
305 | (*(p + buf->actual_size + 0x11) != 0xff) || | |
306 | (*(p + buf->actual_size + 0x12) != 0xff) || | |
307 | (*(p + buf->actual_size + 0x13) != 0xff) ) | |
308 | { | |
a97781ac | 309 | printk(KERN_ERR "%s() buf %p failed guard check\n", __func__, buf); |
46eeb8dd ST |
310 | saa7164_dumphex16(dev, p + buf->actual_size - 32, 64); |
311 | } | |
312 | ||
12d3203e ST |
313 | if (buf->idx == wp) { |
314 | /* Ignore this, it's being updated currently by the dma engine */ | |
315 | } else | |
7615e434 | 316 | if (buf->idx == rp) { |
12d3203e ST |
317 | |
318 | crc = crc32(0, buf->cpu, buf->actual_size); | |
b31f1222 ST |
319 | // if (crc != port->shadow_crc[rp]) |
320 | // printk(KERN_ERR "%s crc didn't match shadow was 0x%x now 0x%x\n", | |
321 | // __func__, port->shadow_crc[rp], crc); | |
12d3203e | 322 | |
7615e434 | 323 | /* Found the buffer, deal with it */ |
12d3203e ST |
324 | dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d crc32: 0x%x\n", |
325 | __func__, wp, rp, buf->crc); | |
7615e434 | 326 | |
9230acaa ST |
327 | /* Validate the incoming buffer content */ |
328 | if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS) | |
329 | saa7164_ts_verifier(buf); | |
a97781ac ST |
330 | if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS) |
331 | saa7164_pack_verifier(buf); | |
9230acaa | 332 | |
7615e434 ST |
333 | /* find a free user buffer and clone to it */ |
334 | if (!list_empty(&port->list_buf_free.list)) { | |
335 | ||
336 | /* Pull the first buffer from the used list */ | |
337 | ubuf = list_first_entry(&port->list_buf_free.list, | |
338 | struct saa7164_user_buffer, list); | |
339 | ||
a97781ac ST |
340 | if (buf->actual_size <= ubuf->actual_size) { |
341 | ||
f6eeece8 ST |
342 | memcpy_fromio(ubuf->data, port->shadow_buf[rp], |
343 | ubuf->actual_size); | |
12d3203e ST |
344 | |
345 | /* Throw a new checksum on the read buffer */ | |
346 | ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size); | |
347 | ||
348 | if ((crc == port->shadow_crc[rp]) && (crc == ubuf->crc)) | |
349 | ok = 1; | |
350 | else | |
351 | ok = 0; | |
352 | ||
a97781ac ST |
353 | /* Requeue the buffer on the free list */ |
354 | ubuf->pos = 0; | |
7615e434 | 355 | |
a97781ac ST |
356 | list_move_tail(&ubuf->list, |
357 | &port->list_buf_used.list); | |
7615e434 | 358 | |
a97781ac ST |
359 | /* Flag any userland waiters */ |
360 | wake_up_interruptible(&port->wait_read); | |
7615e434 | 361 | |
a97781ac ST |
362 | } else { |
363 | printk(KERN_ERR "buf %p bufsize fails match\n", buf); | |
364 | } | |
7615e434 ST |
365 | |
366 | } else | |
66e1d378 | 367 | printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n"); |
7615e434 | 368 | |
9230acaa | 369 | /* Ensure offset into buffer remains 0, fill buffer |
a97781ac ST |
370 | * with known bad data. We check for this data at a later point |
371 | * in time. */ | |
9230acaa | 372 | saa7164_buffer_zero_offsets(port, rp); |
12d3203e ST |
373 | memset_io(buf->cpu, 0xff, buf->pci_size); |
374 | buf->crc = crc32(0, buf->cpu, buf->actual_size); | |
375 | ||
a97781ac | 376 | break; |
12d3203e ST |
377 | } else { |
378 | /* Validate all other checksums, on previous buffers - they should never change */ | |
379 | crc = crc32(0, buf->cpu, buf->actual_size); | |
380 | if (crc != buf->crc) { | |
381 | printk(KERN_ERR "buf[%d].crc became invalid, was 0x%x became 0x%x rp: %d wp: %d\n", | |
382 | buf->idx, buf->crc, crc, rp, wp); | |
383 | //saa7164_dumphex16FF(dev, (u8 *)buf->cpu, buf->actual_size); | |
384 | saa7164_dumphex16FF(dev, (u8 *)buf->cpu, 256); | |
385 | buf->crc = crc; | |
386 | } | |
9230acaa | 387 | |
7615e434 ST |
388 | } |
389 | ||
390 | } | |
91d80189 ST |
391 | mutex_unlock(&port->dmaqueue_lock); |
392 | ||
393 | if (print_histogram == port->nr) { | |
394 | saa7164_histogram_print(port, &port->irq_interval); | |
395 | saa7164_histogram_print(port, &port->svc_interval); | |
396 | saa7164_histogram_print(port, &port->irq_svc_interval); | |
58acca10 ST |
397 | saa7164_histogram_print(port, &port->read_interval); |
398 | saa7164_histogram_print(port, &port->poll_interval); | |
91d80189 ST |
399 | print_histogram = 64 + port->nr; |
400 | } | |
401 | } | |
91d80189 ST |
402 | static void saa7164_work_cmdhandler(struct work_struct *w) |
403 | { | |
404 | struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd); | |
405 | ||
406 | /* Wake up any complete commands */ | |
407 | saa7164_irq_dequeue(dev); | |
408 | } | |
409 | ||
410 | static void saa7164_buffer_deliver(struct saa7164_buffer *buf) | |
411 | { | |
412 | struct saa7164_port *port = buf->port; | |
413 | ||
414 | /* Feed the transport payload into the kernel demux */ | |
415 | dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu, | |
416 | SAA7164_TS_NUMBER_OF_LINES); | |
417 | ||
418 | } | |
419 | ||
420 | static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port) | |
421 | { | |
422 | struct saa7164_dev *dev = port->dev; | |
12d3203e | 423 | struct saa7164_buffer *buf; |
12d3203e ST |
424 | struct list_head *c, *n; |
425 | int wp, rp, i = 0; | |
426 | u8 *p; | |
b31f1222 | 427 | u32 *up, j; |
91d80189 ST |
428 | |
429 | /* Find the current write point from the hardware */ | |
430 | wp = saa7164_readl(port->bufcounter); | |
431 | if (wp > (port->hwcfg.buffercount - 1)) { | |
432 | printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp); | |
433 | return 0; | |
434 | } | |
435 | ||
b31f1222 ST |
436 | printk(KERN_ERR "port %p wp = %d\n", port, wp); |
437 | ||
91d80189 ST |
438 | /* Find the previous buffer to the current write point */ |
439 | if (wp == 0) | |
440 | rp = 7; | |
441 | else | |
442 | rp = wp - 1; | |
443 | ||
444 | if ((rp < 0) || (rp > 7)) { | |
445 | printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); | |
446 | return 0; | |
447 | } | |
448 | ||
b31f1222 ST |
449 | if (rp == port->last_irq_rp) { |
450 | printk(KERN_ERR "%s() Duplicate rp = %d port %p\n", | |
451 | __func__, rp, port); | |
452 | } | |
453 | ||
07603131 ST |
454 | if (rp != ((port->last_irq_rp + 1) % 8)) { |
455 | printk(KERN_ERR "%s() Multiple bufs on interrupt, port %p\n", | |
456 | __func__, port); | |
457 | } | |
458 | ||
459 | /* Store old time */ | |
91d80189 ST |
460 | port->last_irq_msecs_diff = port->last_irq_msecs; |
461 | ||
462 | /* Collect new stats */ | |
463 | port->last_irq_msecs = jiffies_to_msecs(jiffies); | |
464 | port->last_irq_wp = wp; | |
465 | port->last_irq_rp = rp; | |
466 | ||
467 | /* Calculate stats */ | |
468 | port->last_irq_msecs_diff = port->last_irq_msecs - | |
469 | port->last_irq_msecs_diff; | |
470 | ||
471 | saa7164_histogram_update(&port->irq_interval, | |
472 | port->last_irq_msecs_diff); | |
473 | ||
474 | dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed wp: %d rp: %d\n", | |
475 | __func__, | |
476 | port->last_irq_msecs_diff, | |
477 | port->last_irq_wp, | |
478 | port->last_irq_rp | |
479 | ); | |
12d3203e ST |
480 | /* Find the used buffer, shadow copy it before we've |
481 | * acked the interrupt. | |
482 | */ | |
483 | // mutex_lock(&port->dmaqueue_lock); | |
484 | list_for_each_safe(c, n, &port->dmaqueue.list) { | |
485 | ||
486 | buf = list_entry(c, struct saa7164_buffer, list); | |
487 | if (i++ > port->hwcfg.buffercount) { | |
488 | printk(KERN_ERR "%s() illegal i count %d\n", | |
489 | __func__, i); | |
490 | break; | |
491 | } | |
492 | ||
493 | p = (u8 *)buf->cpu; | |
494 | if ( (*(p + buf->actual_size + 0) != 0xff) || | |
495 | (*(p + buf->actual_size + 1) != 0xff) || | |
496 | (*(p + buf->actual_size + 2) != 0xff) || | |
497 | (*(p + buf->actual_size + 3) != 0xff) || | |
498 | (*(p + buf->actual_size + 0x10) != 0xff) || | |
499 | (*(p + buf->actual_size + 0x11) != 0xff) || | |
500 | (*(p + buf->actual_size + 0x12) != 0xff) || | |
501 | (*(p + buf->actual_size + 0x13) != 0xff) ) | |
502 | { | |
503 | printk(KERN_ERR "buf %p failed guard check\n", buf); | |
504 | saa7164_dumphex16(dev, p + buf->actual_size - 32, 64); | |
505 | } | |
506 | ||
507 | if (buf->idx == rp) { | |
b31f1222 ST |
508 | up = (u32 *)port->shadow_buf[rp]; |
509 | for (j = 0 ; j < (buf->actual_size / sizeof(u32)); j++) { | |
510 | *(up + j) = (rp << 28) | port->counter++; | |
511 | } | |
a97781ac ST |
512 | port->shadow_crc[rp] = crc32(0, port->shadow_buf[rp], buf->actual_size); |
513 | ||
514 | buf->crc = crc32(0, buf->cpu, buf->actual_size); | |
12d3203e | 515 | |
b31f1222 ST |
516 | // if (port->shadow_crc[rp] != buf->crc) |
517 | // printk(KERN_ERR "%s() crc check failed 0x%x vs 0x%x\n", | |
518 | // __func__, port->shadow_crc[rp], buf->crc); | |
12d3203e ST |
519 | break; |
520 | } | |
521 | ||
522 | } | |
523 | // mutex_unlock(&port->dmaqueue_lock); | |
91d80189 ST |
524 | schedule_work(&port->workenc); |
525 | ||
7615e434 ST |
526 | return 0; |
527 | } | |
528 | ||
add3f580 | 529 | static irqreturn_t saa7164_irq_ts(struct saa7164_port *port) |
443c1228 ST |
530 | { |
531 | struct saa7164_dev *dev = port->dev; | |
532 | struct saa7164_buffer *buf; | |
533 | struct list_head *c, *n; | |
534 | int wp, i = 0, rp; | |
535 | ||
536 | /* Find the current write point from the hardware */ | |
537 | wp = saa7164_readl(port->bufcounter); | |
538 | if (wp > (port->hwcfg.buffercount - 1)) | |
539 | BUG(); | |
540 | ||
541 | /* Find the previous buffer to the current write point */ | |
542 | if (wp == 0) | |
543 | rp = 7; | |
544 | else | |
545 | rp = wp - 1; | |
546 | ||
547 | /* Lookup the WP in the buffer list */ | |
548 | /* TODO: turn this into a worker thread */ | |
549 | list_for_each_safe(c, n, &port->dmaqueue.list) { | |
550 | buf = list_entry(c, struct saa7164_buffer, list); | |
551 | if (i++ > port->hwcfg.buffercount) | |
552 | BUG(); | |
553 | ||
add3f580 | 554 | if (buf->idx == rp) { |
443c1228 ST |
555 | /* Found the buffer, deal with it */ |
556 | dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n", | |
557 | __func__, wp, rp); | |
558 | saa7164_buffer_deliver(buf); | |
559 | break; | |
560 | } | |
561 | ||
562 | } | |
563 | return 0; | |
564 | } | |
565 | ||
566 | /* Primary IRQ handler and dispatch mechanism */ | |
567 | static irqreturn_t saa7164_irq(int irq, void *dev_id) | |
568 | { | |
569 | struct saa7164_dev *dev = dev_id; | |
7615e434 ST |
570 | struct saa7164_port *porta = &dev->ports[ SAA7164_PORT_TS1 ]; |
571 | struct saa7164_port *portb = &dev->ports[ SAA7164_PORT_TS2 ]; | |
572 | struct saa7164_port *portc = &dev->ports[ SAA7164_PORT_ENC1 ]; | |
573 | struct saa7164_port *portd = &dev->ports[ SAA7164_PORT_ENC2 ]; | |
574 | ||
50bcb4ae | 575 | u32 intid, intstat[INT_SIZE/4]; |
443c1228 ST |
576 | int i, handled = 0, bit; |
577 | ||
d888ea03 ST |
578 | if (dev == 0) { |
579 | printk(KERN_ERR "%s() No device specified\n", __func__); | |
580 | handled = 0; | |
581 | goto out; | |
582 | } | |
583 | ||
443c1228 ST |
584 | /* Check that the hardware is accessable. If the status bytes are |
585 | * 0xFF then the device is not accessable, the the IRQ belongs | |
586 | * to another driver. | |
1a6450d4 | 587 | * 4 x u32 interrupt registers. |
443c1228 ST |
588 | */ |
589 | for (i = 0; i < INT_SIZE/4; i++) { | |
590 | ||
591 | /* TODO: Convert into saa7164_readl() */ | |
592 | /* Read the 4 hardware interrupt registers */ | |
1a6450d4 | 593 | intstat[i] = saa7164_readl(dev->int_status + (i * 4)); |
443c1228 | 594 | |
50bcb4ae ST |
595 | if (intstat[i]) |
596 | handled = 1; | |
443c1228 | 597 | } |
50bcb4ae | 598 | if (handled == 0) |
443c1228 | 599 | goto out; |
443c1228 ST |
600 | |
601 | /* For each of the HW interrupt registers */ | |
602 | for (i = 0; i < INT_SIZE/4; i++) { | |
603 | ||
604 | if (intstat[i]) { | |
605 | /* Each function of the board has it's own interruptid. | |
606 | * Find the function that triggered then call | |
607 | * it's handler. | |
608 | */ | |
609 | for (bit = 0; bit < 32; bit++) { | |
610 | ||
611 | if (((intstat[i] >> bit) & 0x00000001) == 0) | |
612 | continue; | |
613 | ||
614 | /* Calculate the interrupt id (0x00 to 0x7f) */ | |
615 | ||
50bcb4ae ST |
616 | intid = (i * 32) + bit; |
617 | if (intid == dev->intfdesc.bInterruptId) { | |
443c1228 ST |
618 | /* A response to an cmd/api call */ |
619 | schedule_work(&dev->workcmd); | |
7615e434 | 620 | } else if (intid == porta->hwcfg.interruptid) { |
443c1228 ST |
621 | |
622 | /* Transport path 1 */ | |
7615e434 | 623 | saa7164_irq_ts(porta); |
443c1228 | 624 | |
7615e434 | 625 | } else if (intid == portb->hwcfg.interruptid) { |
443c1228 ST |
626 | |
627 | /* Transport path 2 */ | |
7615e434 ST |
628 | saa7164_irq_ts(portb); |
629 | ||
630 | } else if (intid == portc->hwcfg.interruptid) { | |
631 | ||
632 | /* Encoder path 1 */ | |
633 | saa7164_irq_encoder(portc); | |
634 | ||
635 | } else if (intid == portd->hwcfg.interruptid) { | |
636 | ||
637 | /* Encoder path 1 */ | |
638 | saa7164_irq_encoder(portd); | |
443c1228 ST |
639 | |
640 | } else { | |
641 | /* Find the function */ | |
642 | dprintk(DBGLVL_IRQ, | |
643 | "%s() unhandled interrupt " | |
644 | "reg 0x%x bit 0x%x " | |
645 | "intid = 0x%x\n", | |
50bcb4ae | 646 | __func__, i, bit, intid); |
443c1228 ST |
647 | } |
648 | } | |
649 | ||
443c1228 | 650 | /* Ack it */ |
1a6450d4 | 651 | saa7164_writel(dev->int_ack + (i * 4), intstat[i]); |
443c1228 ST |
652 | |
653 | } | |
654 | } | |
655 | out: | |
656 | return IRQ_RETVAL(handled); | |
657 | } | |
658 | ||
659 | void saa7164_getfirmwarestatus(struct saa7164_dev *dev) | |
660 | { | |
661 | struct saa7164_fw_status *s = &dev->fw_status; | |
662 | ||
663 | dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS); | |
664 | dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE); | |
665 | dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC); | |
666 | dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST); | |
667 | dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD); | |
668 | dev->fw_status.remainheap = | |
669 | saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP); | |
670 | ||
671 | dprintk(1, "Firmware status:\n"); | |
672 | dprintk(1, " .status = 0x%08x\n", s->status); | |
673 | dprintk(1, " .mode = 0x%08x\n", s->mode); | |
674 | dprintk(1, " .spec = 0x%08x\n", s->spec); | |
675 | dprintk(1, " .inst = 0x%08x\n", s->inst); | |
676 | dprintk(1, " .cpuload = 0x%08x\n", s->cpuload); | |
677 | dprintk(1, " .remainheap = 0x%08x\n", s->remainheap); | |
678 | } | |
679 | ||
680 | u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev) | |
681 | { | |
682 | u32 reg; | |
683 | ||
684 | reg = saa7164_readl(SAA_DEVICE_VERSION); | |
685 | dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n", | |
686 | (reg & 0x0000fc00) >> 10, | |
687 | (reg & 0x000003e0) >> 5, | |
688 | (reg & 0x0000001f), | |
689 | (reg & 0xffff0000) >> 16, | |
690 | reg); | |
691 | ||
692 | return reg; | |
693 | } | |
694 | ||
695 | /* TODO: Debugging func, remove */ | |
696 | void saa7164_dumphex16(struct saa7164_dev *dev, u8 *buf, int len) | |
697 | { | |
698 | int i; | |
699 | ||
700 | printk(KERN_INFO "--------------------> " | |
701 | "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); | |
702 | ||
703 | for (i = 0; i < len; i += 16) | |
704 | printk(KERN_INFO " [0x%08x] " | |
705 | "%02x %02x %02x %02x %02x %02x %02x %02x " | |
706 | "%02x %02x %02x %02x %02x %02x %02x %02x\n", i, | |
707 | *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3), | |
708 | *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7), | |
709 | *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11), | |
710 | *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15)); | |
711 | } | |
712 | ||
713 | /* TODO: Debugging func, remove */ | |
714 | void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr) | |
715 | { | |
716 | int i; | |
717 | ||
718 | dprintk(1, "--------------------> " | |
719 | "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); | |
720 | ||
721 | for (i = 0; i < 0x100; i += 16) | |
722 | dprintk(1, "region0[0x%08x] = " | |
723 | "%02x %02x %02x %02x %02x %02x %02x %02x" | |
724 | " %02x %02x %02x %02x %02x %02x %02x %02x\n", i, | |
725 | (u8)saa7164_readb(addr + i + 0), | |
726 | (u8)saa7164_readb(addr + i + 1), | |
727 | (u8)saa7164_readb(addr + i + 2), | |
728 | (u8)saa7164_readb(addr + i + 3), | |
729 | (u8)saa7164_readb(addr + i + 4), | |
730 | (u8)saa7164_readb(addr + i + 5), | |
731 | (u8)saa7164_readb(addr + i + 6), | |
732 | (u8)saa7164_readb(addr + i + 7), | |
733 | (u8)saa7164_readb(addr + i + 8), | |
734 | (u8)saa7164_readb(addr + i + 9), | |
735 | (u8)saa7164_readb(addr + i + 10), | |
736 | (u8)saa7164_readb(addr + i + 11), | |
737 | (u8)saa7164_readb(addr + i + 12), | |
738 | (u8)saa7164_readb(addr + i + 13), | |
739 | (u8)saa7164_readb(addr + i + 14), | |
740 | (u8)saa7164_readb(addr + i + 15) | |
741 | ); | |
742 | } | |
743 | ||
744 | static void saa7164_dump_hwdesc(struct saa7164_dev *dev) | |
745 | { | |
207b42c4 ST |
746 | dprintk(1, "@0x%p hwdesc sizeof(tmComResHWDescr_t) = %d bytes\n", |
747 | &dev->hwdesc, (u32)sizeof(tmComResHWDescr_t)); | |
443c1228 ST |
748 | |
749 | dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength); | |
750 | dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType); | |
751 | dprintk(1, " .bDescriptorSubtype = 0x%x\n", | |
752 | dev->hwdesc.bDescriptorSubtype); | |
753 | ||
754 | dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion); | |
755 | dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency); | |
756 | dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes); | |
757 | dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities); | |
758 | dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n", | |
759 | dev->hwdesc.dwDeviceRegistersLocation); | |
760 | ||
761 | dprintk(1, " .dwHostMemoryRegion = 0x%x\n", | |
762 | dev->hwdesc.dwHostMemoryRegion); | |
763 | ||
764 | dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n", | |
765 | dev->hwdesc.dwHostMemoryRegionSize); | |
766 | ||
767 | dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n", | |
768 | dev->hwdesc.dwHostHibernatMemRegion); | |
769 | ||
770 | dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n", | |
771 | dev->hwdesc.dwHostHibernatMemRegionSize); | |
772 | } | |
773 | ||
774 | static void saa7164_dump_intfdesc(struct saa7164_dev *dev) | |
775 | { | |
776 | dprintk(1, "@0x%p intfdesc " | |
207b42c4 ST |
777 | "sizeof(tmComResInterfaceDescr_t) = %d bytes\n", |
778 | &dev->intfdesc, (u32)sizeof(tmComResInterfaceDescr_t)); | |
443c1228 ST |
779 | |
780 | dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength); | |
781 | dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType); | |
782 | dprintk(1, " .bDescriptorSubtype = 0x%x\n", | |
783 | dev->intfdesc.bDescriptorSubtype); | |
784 | ||
785 | dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags); | |
786 | dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType); | |
787 | dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId); | |
788 | dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface); | |
789 | dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId); | |
790 | dprintk(1, " .bDebugInterruptId = 0x%x\n", | |
791 | dev->intfdesc.bDebugInterruptId); | |
792 | ||
793 | dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation); | |
794 | } | |
795 | ||
796 | static void saa7164_dump_busdesc(struct saa7164_dev *dev) | |
797 | { | |
207b42c4 ST |
798 | dprintk(1, "@0x%p busdesc sizeof(tmComResBusDescr_t) = %d bytes\n", |
799 | &dev->busdesc, (u32)sizeof(tmComResBusDescr_t)); | |
443c1228 ST |
800 | |
801 | dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing); | |
802 | dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing); | |
803 | dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite); | |
804 | dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead); | |
805 | dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite); | |
806 | dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead); | |
807 | } | |
808 | ||
809 | /* Much of the hardware configuration and PCI registers are configured | |
810 | * dynamically depending on firmware. We have to cache some initial | |
811 | * structures then use these to locate other important structures | |
812 | * from PCI space. | |
813 | */ | |
814 | static void saa7164_get_descriptors(struct saa7164_dev *dev) | |
815 | { | |
12d3203e ST |
816 | memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(tmComResHWDescr_t)); |
817 | memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(tmComResHWDescr_t), | |
443c1228 | 818 | sizeof(tmComResInterfaceDescr_t)); |
12d3203e | 819 | memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation, |
443c1228 ST |
820 | sizeof(tmComResBusDescr_t)); |
821 | ||
822 | if (dev->hwdesc.bLength != sizeof(tmComResHWDescr_t)) { | |
823 | printk(KERN_ERR "Structure tmComResHWDescr_t is mangled\n"); | |
207b42c4 ST |
824 | printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength, |
825 | (u32)sizeof(tmComResHWDescr_t)); | |
443c1228 ST |
826 | } else |
827 | saa7164_dump_hwdesc(dev); | |
828 | ||
829 | if (dev->intfdesc.bLength != sizeof(tmComResInterfaceDescr_t)) { | |
830 | printk(KERN_ERR "struct tmComResInterfaceDescr_t is mangled\n"); | |
207b42c4 ST |
831 | printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength, |
832 | (u32)sizeof(tmComResInterfaceDescr_t)); | |
443c1228 ST |
833 | } else |
834 | saa7164_dump_intfdesc(dev); | |
835 | ||
836 | saa7164_dump_busdesc(dev); | |
837 | } | |
838 | ||
839 | static int saa7164_pci_quirks(struct saa7164_dev *dev) | |
840 | { | |
841 | return 0; | |
842 | } | |
843 | ||
844 | static int get_resources(struct saa7164_dev *dev) | |
845 | { | |
846 | if (request_mem_region(pci_resource_start(dev->pci, 0), | |
847 | pci_resource_len(dev->pci, 0), dev->name)) { | |
848 | ||
849 | if (request_mem_region(pci_resource_start(dev->pci, 2), | |
850 | pci_resource_len(dev->pci, 2), dev->name)) | |
851 | return 0; | |
852 | } | |
853 | ||
854 | printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n", | |
855 | dev->name, | |
856 | (u64)pci_resource_start(dev->pci, 0), | |
857 | (u64)pci_resource_start(dev->pci, 2)); | |
858 | ||
859 | return -EBUSY; | |
860 | } | |
861 | ||
7615e434 ST |
862 | static int saa7164_port_init(struct saa7164_dev *dev, int portnr) |
863 | { | |
864 | struct saa7164_port *port = 0; | |
12d3203e | 865 | int i; |
7615e434 ST |
866 | |
867 | if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS)) | |
868 | BUG(); | |
869 | ||
870 | port = &dev->ports[ portnr ]; | |
871 | ||
872 | port->dev = dev; | |
873 | port->nr = portnr; | |
874 | ||
875 | if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2)) | |
876 | port->type = SAA7164_MPEG_DVB; | |
877 | else | |
878 | if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) | |
879 | port->type = SAA7164_MPEG_ENCODER; | |
880 | else | |
881 | BUG(); | |
882 | ||
883 | /* Init all the critical resources */ | |
884 | mutex_init(&port->dvb.lock); | |
885 | INIT_LIST_HEAD(&port->dmaqueue.list); | |
886 | mutex_init(&port->dmaqueue_lock); | |
887 | ||
888 | INIT_LIST_HEAD(&port->list_buf_used.list); | |
889 | INIT_LIST_HEAD(&port->list_buf_free.list); | |
890 | init_waitqueue_head(&port->wait_read); | |
91d80189 ST |
891 | |
892 | /* We need a deferred interrupt handler for cmd handling */ | |
893 | INIT_WORK(&port->workenc, saa7164_work_enchandler); | |
894 | ||
895 | saa7164_histogram_reset(&port->irq_interval, "irq intervals"); | |
896 | saa7164_histogram_reset(&port->svc_interval, "deferred intervals"); | |
897 | saa7164_histogram_reset(&port->irq_svc_interval, | |
898 | "irq to deferred intervals"); | |
58acca10 ST |
899 | saa7164_histogram_reset(&port->read_interval, |
900 | "encoder read() intervals"); | |
901 | saa7164_histogram_reset(&port->poll_interval, | |
902 | "encoder poll() intervals"); | |
91d80189 | 903 | |
12d3203e ST |
904 | if (port->type == SAA7164_MPEG_ENCODER) { |
905 | for (i = 0; i < 8; i ++) { | |
a97781ac | 906 | port->shadow_buf[i] = kzalloc(256 * 128, GFP_KERNEL); |
12d3203e ST |
907 | if (port->shadow_buf[i] == 0) |
908 | printk(KERN_ERR "%s() shadow_buf ENOMEM\n", __func__); | |
909 | else { | |
a97781ac ST |
910 | memset(port->shadow_buf[i], 0xff, 256 * 128); |
911 | port->shadow_crc[i] = crc32(0, port->shadow_buf[i], 256 * 128); | |
12d3203e ST |
912 | } |
913 | } | |
914 | } | |
915 | ||
7615e434 ST |
916 | return 0; |
917 | } | |
918 | ||
443c1228 ST |
919 | static int saa7164_dev_setup(struct saa7164_dev *dev) |
920 | { | |
921 | int i; | |
922 | ||
923 | mutex_init(&dev->lock); | |
924 | atomic_inc(&dev->refcount); | |
925 | dev->nr = saa7164_devcount++; | |
926 | ||
927 | sprintf(dev->name, "saa7164[%d]", dev->nr); | |
928 | ||
929 | mutex_lock(&devlist); | |
930 | list_add_tail(&dev->devlist, &saa7164_devlist); | |
931 | mutex_unlock(&devlist); | |
932 | ||
933 | /* board config */ | |
934 | dev->board = UNSET; | |
935 | if (card[dev->nr] < saa7164_bcount) | |
936 | dev->board = card[dev->nr]; | |
937 | ||
938 | for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++) | |
939 | if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor && | |
940 | dev->pci->subsystem_device == | |
941 | saa7164_subids[i].subdevice) | |
942 | dev->board = saa7164_subids[i].card; | |
943 | ||
944 | if (UNSET == dev->board) { | |
945 | dev->board = SAA7164_BOARD_UNKNOWN; | |
946 | saa7164_card_list(dev); | |
947 | } | |
948 | ||
949 | dev->pci_bus = dev->pci->bus->number; | |
950 | dev->pci_slot = PCI_SLOT(dev->pci->devfn); | |
951 | ||
952 | /* I2C Defaults / setup */ | |
953 | dev->i2c_bus[0].dev = dev; | |
954 | dev->i2c_bus[0].nr = 0; | |
955 | dev->i2c_bus[1].dev = dev; | |
956 | dev->i2c_bus[1].nr = 1; | |
957 | dev->i2c_bus[2].dev = dev; | |
958 | dev->i2c_bus[2].nr = 2; | |
959 | ||
7615e434 ST |
960 | /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */ |
961 | saa7164_port_init(dev, SAA7164_PORT_TS1); | |
962 | saa7164_port_init(dev, SAA7164_PORT_TS2); | |
963 | saa7164_port_init(dev, SAA7164_PORT_ENC1); | |
964 | saa7164_port_init(dev, SAA7164_PORT_ENC2); | |
443c1228 ST |
965 | |
966 | if (get_resources(dev) < 0) { | |
967 | printk(KERN_ERR "CORE %s No more PCIe resources for " | |
968 | "subsystem: %04x:%04x\n", | |
969 | dev->name, dev->pci->subsystem_vendor, | |
970 | dev->pci->subsystem_device); | |
971 | ||
972 | saa7164_devcount--; | |
973 | return -ENODEV; | |
974 | } | |
975 | ||
976 | /* PCI/e allocations */ | |
977 | dev->lmmio = ioremap(pci_resource_start(dev->pci, 0), | |
978 | pci_resource_len(dev->pci, 0)); | |
979 | ||
980 | dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2), | |
981 | pci_resource_len(dev->pci, 2)); | |
982 | ||
443c1228 ST |
983 | dev->bmmio = (u8 __iomem *)dev->lmmio; |
984 | dev->bmmio2 = (u8 __iomem *)dev->lmmio2; | |
443c1228 | 985 | |
1a6450d4 ST |
986 | /* Inerrupt and ack register locations offset of bmmio */ |
987 | dev->int_status = 0x183000 + 0xf80; | |
988 | dev->int_ack = 0x183000 + 0xf90; | |
443c1228 ST |
989 | |
990 | printk(KERN_INFO | |
991 | "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n", | |
992 | dev->name, dev->pci->subsystem_vendor, | |
993 | dev->pci->subsystem_device, saa7164_boards[dev->board].name, | |
994 | dev->board, card[dev->nr] == dev->board ? | |
995 | "insmod option" : "autodetected"); | |
996 | ||
997 | saa7164_pci_quirks(dev); | |
998 | ||
999 | return 0; | |
1000 | } | |
1001 | ||
1002 | static void saa7164_dev_unregister(struct saa7164_dev *dev) | |
1003 | { | |
1004 | dprintk(1, "%s()\n", __func__); | |
1005 | ||
1006 | release_mem_region(pci_resource_start(dev->pci, 0), | |
1007 | pci_resource_len(dev->pci, 0)); | |
1008 | ||
1009 | release_mem_region(pci_resource_start(dev->pci, 2), | |
1010 | pci_resource_len(dev->pci, 2)); | |
1011 | ||
1012 | if (!atomic_dec_and_test(&dev->refcount)) | |
1013 | return; | |
1014 | ||
1015 | iounmap(dev->lmmio); | |
1016 | iounmap(dev->lmmio2); | |
1017 | ||
1018 | return; | |
1019 | } | |
1020 | ||
1021 | static int __devinit saa7164_initdev(struct pci_dev *pci_dev, | |
1022 | const struct pci_device_id *pci_id) | |
1023 | { | |
1024 | struct saa7164_dev *dev; | |
1025 | int err, i; | |
1026 | u32 version; | |
1027 | ||
1028 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1029 | if (NULL == dev) | |
1030 | return -ENOMEM; | |
1031 | ||
1032 | /* pci init */ | |
1033 | dev->pci = pci_dev; | |
1034 | if (pci_enable_device(pci_dev)) { | |
1035 | err = -EIO; | |
1036 | goto fail_free; | |
1037 | } | |
1038 | ||
1039 | if (saa7164_dev_setup(dev) < 0) { | |
1040 | err = -EINVAL; | |
1041 | goto fail_free; | |
1042 | } | |
1043 | ||
1044 | /* print pci info */ | |
1045 | pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev); | |
1046 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); | |
1047 | printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " | |
1048 | "latency: %d, mmio: 0x%llx\n", dev->name, | |
1049 | pci_name(pci_dev), dev->pci_rev, pci_dev->irq, | |
1050 | dev->pci_lat, | |
1051 | (unsigned long long)pci_resource_start(pci_dev, 0)); | |
1052 | ||
1053 | pci_set_master(pci_dev); | |
1054 | /* TODO */ | |
1055 | if (!pci_dma_supported(pci_dev, 0xffffffff)) { | |
1056 | printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name); | |
1057 | err = -EIO; | |
1058 | goto fail_irq; | |
1059 | } | |
1060 | ||
1061 | err = request_irq(pci_dev->irq, saa7164_irq, | |
1062 | IRQF_SHARED | IRQF_DISABLED, dev->name, dev); | |
1063 | if (err < 0) { | |
1064 | printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name, | |
1065 | pci_dev->irq); | |
1066 | err = -EIO; | |
1067 | goto fail_irq; | |
1068 | } | |
1069 | ||
1070 | pci_set_drvdata(pci_dev, dev); | |
1071 | ||
443c1228 ST |
1072 | /* Init the internal command list */ |
1073 | for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) { | |
1074 | dev->cmds[i].seqno = i; | |
1075 | dev->cmds[i].inuse = 0; | |
1076 | mutex_init(&dev->cmds[i].lock); | |
1077 | init_waitqueue_head(&dev->cmds[i].wait); | |
1078 | } | |
1079 | ||
1080 | /* We need a deferred interrupt handler for cmd handling */ | |
1081 | INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler); | |
1082 | ||
1083 | /* Only load the firmware if we know the board */ | |
1084 | if (dev->board != SAA7164_BOARD_UNKNOWN) { | |
1085 | ||
1086 | err = saa7164_downloadfirmware(dev); | |
1087 | if (err < 0) { | |
1088 | printk(KERN_ERR | |
50bcb4ae ST |
1089 | "Failed to boot firmware, no features " |
1090 | "registered\n"); | |
1091 | goto fail_fw; | |
443c1228 ST |
1092 | } |
1093 | ||
1094 | saa7164_get_descriptors(dev); | |
1095 | saa7164_dumpregs(dev, 0); | |
1096 | saa7164_getcurrentfirmwareversion(dev); | |
1097 | saa7164_getfirmwarestatus(dev); | |
1098 | err = saa7164_bus_setup(dev); | |
1099 | if (err < 0) | |
1100 | printk(KERN_ERR | |
1101 | "Failed to setup the bus, will continue\n"); | |
1102 | saa7164_bus_dump(dev); | |
1103 | ||
1104 | /* Ping the running firmware via the command bus and get the | |
1105 | * firmware version, this checks the bus is running OK. | |
1106 | */ | |
1107 | version = 0; | |
1108 | if (saa7164_api_get_fw_version(dev, &version) == SAA_OK) | |
1109 | dprintk(1, "Bus is operating correctly using " | |
1110 | "version %d.%d.%d.%d (0x%x)\n", | |
1111 | (version & 0x0000fc00) >> 10, | |
1112 | (version & 0x000003e0) >> 5, | |
1113 | (version & 0x0000001f), | |
1114 | (version & 0xffff0000) >> 16, | |
1115 | version); | |
1116 | else | |
1117 | printk(KERN_ERR | |
1118 | "Failed to communicate with the firmware\n"); | |
1119 | ||
1120 | /* Bring up the I2C buses */ | |
1121 | saa7164_i2c_register(&dev->i2c_bus[0]); | |
1122 | saa7164_i2c_register(&dev->i2c_bus[1]); | |
1123 | saa7164_i2c_register(&dev->i2c_bus[2]); | |
1124 | saa7164_gpio_setup(dev); | |
1125 | saa7164_card_setup(dev); | |
1126 | ||
1127 | ||
1128 | /* Parse the dynamic device configuration, find various | |
1129 | * media endpoints (MPEG, WMV, PS, TS) and cache their | |
1130 | * configuration details into the driver, so we can | |
1131 | * reference them later during simething_register() func, | |
1132 | * interrupt handlers, deferred work handlers etc. | |
1133 | */ | |
1134 | saa7164_api_enum_subdevs(dev); | |
1135 | ||
443c1228 ST |
1136 | /* Begin to create the video sub-systems and register funcs */ |
1137 | if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) { | |
7615e434 | 1138 | if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS1 ]) < 0) { |
443c1228 ST |
1139 | printk(KERN_ERR "%s() Failed to register " |
1140 | "dvb adapters on porta\n", | |
1141 | __func__); | |
1142 | } | |
1143 | } | |
1144 | ||
1145 | if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) { | |
7615e434 | 1146 | if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS2 ]) < 0) { |
443c1228 ST |
1147 | printk(KERN_ERR"%s() Failed to register " |
1148 | "dvb adapters on portb\n", | |
1149 | __func__); | |
1150 | } | |
1151 | } | |
1152 | ||
7615e434 ST |
1153 | if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) { |
1154 | if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC1 ]) < 0) { | |
1155 | printk(KERN_ERR"%s() Failed to register " | |
1156 | "mpeg encoder\n", __func__); | |
1157 | } | |
1158 | } | |
1159 | ||
1160 | if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) { | |
1161 | if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC2 ]) < 0) { | |
1162 | printk(KERN_ERR"%s() Failed to register " | |
1163 | "mpeg encoder\n", __func__); | |
1164 | } | |
1165 | } | |
1166 | ||
443c1228 ST |
1167 | } /* != BOARD_UNKNOWN */ |
1168 | else | |
1169 | printk(KERN_ERR "%s() Unsupported board detected, " | |
1170 | "registering without firmware\n", __func__); | |
1171 | ||
b1912a85 | 1172 | dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug); |
2ceae8fd ST |
1173 | dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs); |
1174 | ||
50bcb4ae | 1175 | fail_fw: |
443c1228 ST |
1176 | return 0; |
1177 | ||
1178 | fail_irq: | |
1179 | saa7164_dev_unregister(dev); | |
1180 | fail_free: | |
1181 | kfree(dev); | |
1182 | return err; | |
1183 | } | |
1184 | ||
1185 | static void saa7164_shutdown(struct saa7164_dev *dev) | |
1186 | { | |
1187 | dprintk(1, "%s()\n", __func__); | |
1188 | } | |
1189 | ||
1190 | static void __devexit saa7164_finidev(struct pci_dev *pci_dev) | |
1191 | { | |
1192 | struct saa7164_dev *dev = pci_get_drvdata(pci_dev); | |
12d3203e ST |
1193 | struct saa7164_port *port; |
1194 | int i; | |
443c1228 | 1195 | |
91d80189 ST |
1196 | saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ], |
1197 | &dev->ports[ SAA7164_PORT_ENC1 ].irq_interval); | |
1198 | saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ], | |
1199 | &dev->ports[ SAA7164_PORT_ENC1 ].svc_interval); | |
1200 | saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ], | |
1201 | &dev->ports[ SAA7164_PORT_ENC1 ].irq_svc_interval); | |
58acca10 ST |
1202 | saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ], |
1203 | &dev->ports[ SAA7164_PORT_ENC1 ].read_interval); | |
1204 | saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ], | |
1205 | &dev->ports[ SAA7164_PORT_ENC1 ].poll_interval); | |
91d80189 | 1206 | |
443c1228 ST |
1207 | saa7164_shutdown(dev); |
1208 | ||
12d3203e ST |
1209 | port = &dev->ports[ SAA7164_PORT_ENC1 ]; |
1210 | if (port->type == SAA7164_MPEG_ENCODER) { | |
1211 | for (i = 0; i < 8; i ++) { | |
1212 | kfree(port->shadow_buf[i]); | |
1213 | port->shadow_buf[i] = 0; | |
1214 | } | |
1215 | } | |
1216 | port = &dev->ports[ SAA7164_PORT_ENC2 ]; | |
1217 | if (port->type == SAA7164_MPEG_ENCODER) { | |
1218 | for (i = 0; i < 8; i ++) { | |
1219 | kfree(port->shadow_buf[i]); | |
1220 | port->shadow_buf[i] = 0; | |
1221 | } | |
1222 | } | |
1223 | ||
1224 | ||
443c1228 | 1225 | if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) |
7615e434 | 1226 | saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS1 ]); |
443c1228 ST |
1227 | |
1228 | if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) | |
7615e434 ST |
1229 | saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS2 ]); |
1230 | ||
1231 | if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) | |
1232 | saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC1 ]); | |
1233 | ||
1234 | if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) | |
1235 | saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC2 ]); | |
443c1228 ST |
1236 | |
1237 | saa7164_i2c_unregister(&dev->i2c_bus[0]); | |
1238 | saa7164_i2c_unregister(&dev->i2c_bus[1]); | |
1239 | saa7164_i2c_unregister(&dev->i2c_bus[2]); | |
1240 | ||
1241 | pci_disable_device(pci_dev); | |
1242 | ||
1243 | /* unregister stuff */ | |
1244 | free_irq(pci_dev->irq, dev); | |
1245 | pci_set_drvdata(pci_dev, NULL); | |
1246 | ||
1247 | mutex_lock(&devlist); | |
1248 | list_del(&dev->devlist); | |
1249 | mutex_unlock(&devlist); | |
1250 | ||
1251 | saa7164_dev_unregister(dev); | |
1252 | kfree(dev); | |
1253 | } | |
1254 | ||
1255 | static struct pci_device_id saa7164_pci_tbl[] = { | |
1256 | { | |
1257 | /* SAA7164 */ | |
1258 | .vendor = 0x1131, | |
1259 | .device = 0x7164, | |
1260 | .subvendor = PCI_ANY_ID, | |
1261 | .subdevice = PCI_ANY_ID, | |
1262 | }, { | |
1263 | /* --- end of list --- */ | |
1264 | } | |
1265 | }; | |
1266 | MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl); | |
1267 | ||
1268 | static struct pci_driver saa7164_pci_driver = { | |
1269 | .name = "saa7164", | |
1270 | .id_table = saa7164_pci_tbl, | |
1271 | .probe = saa7164_initdev, | |
1272 | .remove = __devexit_p(saa7164_finidev), | |
1273 | /* TODO */ | |
1274 | .suspend = NULL, | |
1275 | .resume = NULL, | |
1276 | }; | |
1277 | ||
9d440a08 | 1278 | static int __init saa7164_init(void) |
443c1228 ST |
1279 | { |
1280 | printk(KERN_INFO "saa7164 driver loaded\n"); | |
1281 | return pci_register_driver(&saa7164_pci_driver); | |
1282 | } | |
1283 | ||
9d440a08 | 1284 | static void __exit saa7164_fini(void) |
443c1228 ST |
1285 | { |
1286 | pci_unregister_driver(&saa7164_pci_driver); | |
1287 | } | |
1288 | ||
1289 | module_init(saa7164_init); | |
1290 | module_exit(saa7164_fini); | |
1291 |