V4L/DVB (10670): tw9910: bit mask operation fix on tw9910_mask_set.
[deliverable/linux.git] / drivers / media / video / sh_mobile_ceu_camera.c
CommitLineData
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1/*
2 * V4L2 Driver for SuperH Mobile CEU interface
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * Based on V4L2 Driver for PXA camera host - "pxa_camera.c",
7 *
8 * Copyright (C) 2006, Sascha Hauer, Pengutronix
9 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 */
16
17#include <linux/init.h>
18#include <linux/module.h>
19#include <linux/io.h>
20#include <linux/delay.h>
21#include <linux/dma-mapping.h>
22#include <linux/errno.h>
23#include <linux/fs.h>
24#include <linux/interrupt.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/moduleparam.h>
28#include <linux/time.h>
29#include <linux/version.h>
30#include <linux/device.h>
31#include <linux/platform_device.h>
0d3244d6 32#include <linux/videodev2.h>
a42b6dd6 33#include <linux/clk.h>
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34
35#include <media/v4l2-common.h>
36#include <media/v4l2-dev.h>
37#include <media/soc_camera.h>
38#include <media/sh_mobile_ceu.h>
39#include <media/videobuf-dma-contig.h>
40
41/* register offsets for sh7722 / sh7723 */
42
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43#define CAPSR 0x00 /* Capture start register */
44#define CAPCR 0x04 /* Capture control register */
45#define CAMCR 0x08 /* Capture interface control register */
46#define CMCYR 0x0c /* Capture interface cycle register */
47#define CAMOR 0x10 /* Capture interface offset register */
48#define CAPWR 0x14 /* Capture interface width register */
49#define CAIFR 0x18 /* Capture interface input format register */
50#define CSTCR 0x20 /* Camera strobe control register (<= sh7722) */
51#define CSECR 0x24 /* Camera strobe emission count register (<= sh7722) */
52#define CRCNTR 0x28 /* CEU register control register */
53#define CRCMPR 0x2c /* CEU register forcible control register */
54#define CFLCR 0x30 /* Capture filter control register */
55#define CFSZR 0x34 /* Capture filter size clip register */
56#define CDWDR 0x38 /* Capture destination width register */
57#define CDAYR 0x3c /* Capture data address Y register */
58#define CDACR 0x40 /* Capture data address C register */
59#define CDBYR 0x44 /* Capture data bottom-field address Y register */
60#define CDBCR 0x48 /* Capture data bottom-field address C register */
61#define CBDSR 0x4c /* Capture bundle destination size register */
62#define CFWCR 0x5c /* Firewall operation control register */
63#define CLFCR 0x60 /* Capture low-pass filter control register */
64#define CDOCR 0x64 /* Capture data output control register */
65#define CDDCR 0x68 /* Capture data complexity level register */
66#define CDDAR 0x6c /* Capture data complexity level address register */
67#define CEIER 0x70 /* Capture event interrupt enable register */
68#define CETCR 0x74 /* Capture event flag clear register */
69#define CSTSR 0x7c /* Capture status register */
70#define CSRTR 0x80 /* Capture software reset register */
71#define CDSSR 0x84 /* Capture data size register */
72#define CDAYR2 0x90 /* Capture data address Y register 2 */
73#define CDACR2 0x94 /* Capture data address C register 2 */
74#define CDBYR2 0x98 /* Capture data bottom-field address Y register 2 */
75#define CDBCR2 0x9c /* Capture data bottom-field address C register 2 */
0d3244d6 76
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77/* per video frame buffer */
78struct sh_mobile_ceu_buffer {
79 struct videobuf_buffer vb; /* v4l buffer must be first */
80 const struct soc_camera_data_format *fmt;
81};
82
83struct sh_mobile_ceu_dev {
84 struct device *dev;
85 struct soc_camera_host ici;
86 struct soc_camera_device *icd;
87
88 unsigned int irq;
89 void __iomem *base;
a42b6dd6 90 struct clk *clk;
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91 unsigned long video_limit;
92
c60f2b5c 93 /* lock used to protect videobuf */
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94 spinlock_t lock;
95 struct list_head capture;
96 struct videobuf_buffer *active;
ccab8a29 97 int is_interlace;
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98
99 struct sh_mobile_ceu_info *pdata;
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100
101 const struct soc_camera_data_format *camera_fmt;
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102};
103
104static void ceu_write(struct sh_mobile_ceu_dev *priv,
7a1a8164 105 unsigned long reg_offs, u32 data)
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106{
107 iowrite32(data, priv->base + reg_offs);
108}
109
7a1a8164 110static u32 ceu_read(struct sh_mobile_ceu_dev *priv, unsigned long reg_offs)
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111{
112 return ioread32(priv->base + reg_offs);
113}
114
115/*
116 * Videobuf operations
117 */
118static int sh_mobile_ceu_videobuf_setup(struct videobuf_queue *vq,
119 unsigned int *count,
120 unsigned int *size)
121{
122 struct soc_camera_device *icd = vq->priv_data;
123 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
124 struct sh_mobile_ceu_dev *pcdev = ici->priv;
125 int bytes_per_pixel = (icd->current_fmt->depth + 7) >> 3;
126
127 *size = PAGE_ALIGN(icd->width * icd->height * bytes_per_pixel);
128
129 if (0 == *count)
130 *count = 2;
131
132 if (pcdev->video_limit) {
133 while (*size * *count > pcdev->video_limit)
134 (*count)--;
135 }
136
137 dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size);
138
139 return 0;
140}
141
142static void free_buffer(struct videobuf_queue *vq,
143 struct sh_mobile_ceu_buffer *buf)
144{
145 struct soc_camera_device *icd = vq->priv_data;
146
86751b01 147 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %zd\n", __func__,
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148 &buf->vb, buf->vb.baddr, buf->vb.bsize);
149
150 if (in_interrupt())
151 BUG();
152
153 videobuf_dma_contig_free(vq, &buf->vb);
154 dev_dbg(&icd->dev, "%s freed\n", __func__);
155 buf->vb.state = VIDEOBUF_NEEDS_INIT;
156}
157
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158#define CEU_CETCR_MAGIC 0x0317f313 /* acknowledge magical interrupt sources */
159#define CEU_CETCR_IGRW (1 << 4) /* prohibited register access interrupt bit */
160#define CEU_CEIER_CPEIE (1 << 0) /* one-frame capture end interrupt */
161#define CEU_CAPCR_CTNCP (1 << 16) /* continuous capture mode (if set) */
162
163
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164static void sh_mobile_ceu_capture(struct sh_mobile_ceu_dev *pcdev)
165{
8be65dc5 166 struct soc_camera_device *icd = pcdev->icd;
ccab8a29 167 dma_addr_t phys_addr_top, phys_addr_bottom;
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168
169 /* The hardware is _very_ picky about this sequence. Especially
170 * the CEU_CETCR_MAGIC value. It seems like we need to acknowledge
171 * several not-so-well documented interrupt sources in CETCR.
172 */
173 ceu_write(pcdev, CEIER, ceu_read(pcdev, CEIER) & ~CEU_CEIER_CPEIE);
174 ceu_write(pcdev, CETCR, ~ceu_read(pcdev, CETCR) & CEU_CETCR_MAGIC);
175 ceu_write(pcdev, CEIER, ceu_read(pcdev, CEIER) | CEU_CEIER_CPEIE);
176 ceu_write(pcdev, CAPCR, ceu_read(pcdev, CAPCR) & ~CEU_CAPCR_CTNCP);
177 ceu_write(pcdev, CETCR, CEU_CETCR_MAGIC ^ CEU_CETCR_IGRW);
0d3244d6 178
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179 if (!pcdev->active)
180 return;
181
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182 phys_addr_top = videobuf_to_dma_contig(pcdev->active);
183 ceu_write(pcdev, CDAYR, phys_addr_top);
184 if (pcdev->is_interlace) {
185 phys_addr_bottom = phys_addr_top + icd->width;
186 ceu_write(pcdev, CDBYR, phys_addr_bottom);
187 }
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188
189 switch (icd->current_fmt->fourcc) {
190 case V4L2_PIX_FMT_NV12:
191 case V4L2_PIX_FMT_NV21:
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192 case V4L2_PIX_FMT_NV16:
193 case V4L2_PIX_FMT_NV61:
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194 phys_addr_top += icd->width * icd->height;
195 ceu_write(pcdev, CDACR, phys_addr_top);
196 if (pcdev->is_interlace) {
197 phys_addr_bottom = phys_addr_top + icd->width;
198 ceu_write(pcdev, CDBCR, phys_addr_bottom);
199 }
0d3244d6 200 }
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201
202 pcdev->active->state = VIDEOBUF_ACTIVE;
203 ceu_write(pcdev, CAPSR, 0x1); /* start capture */
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204}
205
206static int sh_mobile_ceu_videobuf_prepare(struct videobuf_queue *vq,
207 struct videobuf_buffer *vb,
208 enum v4l2_field field)
209{
210 struct soc_camera_device *icd = vq->priv_data;
211 struct sh_mobile_ceu_buffer *buf;
212 int ret;
213
214 buf = container_of(vb, struct sh_mobile_ceu_buffer, vb);
215
86751b01 216 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %zd\n", __func__,
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217 vb, vb->baddr, vb->bsize);
218
219 /* Added list head initialization on alloc */
220 WARN_ON(!list_empty(&vb->queue));
221
222#ifdef DEBUG
223 /* This can be useful if you want to see if we actually fill
224 * the buffer with something */
225 memset((void *)vb->baddr, 0xaa, vb->bsize);
226#endif
227
228 BUG_ON(NULL == icd->current_fmt);
229
230 if (buf->fmt != icd->current_fmt ||
231 vb->width != icd->width ||
232 vb->height != icd->height ||
233 vb->field != field) {
234 buf->fmt = icd->current_fmt;
235 vb->width = icd->width;
236 vb->height = icd->height;
237 vb->field = field;
238 vb->state = VIDEOBUF_NEEDS_INIT;
239 }
240
241 vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
242 if (0 != vb->baddr && vb->bsize < vb->size) {
243 ret = -EINVAL;
244 goto out;
245 }
246
247 if (vb->state == VIDEOBUF_NEEDS_INIT) {
248 ret = videobuf_iolock(vq, vb, NULL);
249 if (ret)
250 goto fail;
251 vb->state = VIDEOBUF_PREPARED;
252 }
253
254 return 0;
255fail:
256 free_buffer(vq, buf);
257out:
258 return ret;
259}
260
261static void sh_mobile_ceu_videobuf_queue(struct videobuf_queue *vq,
262 struct videobuf_buffer *vb)
263{
264 struct soc_camera_device *icd = vq->priv_data;
265 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
266 struct sh_mobile_ceu_dev *pcdev = ici->priv;
267 unsigned long flags;
268
86751b01 269 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %zd\n", __func__,
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270 vb, vb->baddr, vb->bsize);
271
51354cc3 272 vb->state = VIDEOBUF_QUEUED;
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273 spin_lock_irqsave(&pcdev->lock, flags);
274 list_add_tail(&vb->queue, &pcdev->capture);
275
276 if (!pcdev->active) {
277 pcdev->active = vb;
278 sh_mobile_ceu_capture(pcdev);
279 }
280
281 spin_unlock_irqrestore(&pcdev->lock, flags);
282}
283
284static void sh_mobile_ceu_videobuf_release(struct videobuf_queue *vq,
285 struct videobuf_buffer *vb)
286{
287 free_buffer(vq, container_of(vb, struct sh_mobile_ceu_buffer, vb));
288}
289
290static struct videobuf_queue_ops sh_mobile_ceu_videobuf_ops = {
291 .buf_setup = sh_mobile_ceu_videobuf_setup,
292 .buf_prepare = sh_mobile_ceu_videobuf_prepare,
293 .buf_queue = sh_mobile_ceu_videobuf_queue,
294 .buf_release = sh_mobile_ceu_videobuf_release,
295};
296
297static irqreturn_t sh_mobile_ceu_irq(int irq, void *data)
298{
299 struct sh_mobile_ceu_dev *pcdev = data;
300 struct videobuf_buffer *vb;
301 unsigned long flags;
302
303 spin_lock_irqsave(&pcdev->lock, flags);
304
305 vb = pcdev->active;
306 list_del_init(&vb->queue);
307
308 if (!list_empty(&pcdev->capture))
309 pcdev->active = list_entry(pcdev->capture.next,
310 struct videobuf_buffer, queue);
311 else
312 pcdev->active = NULL;
313
314 sh_mobile_ceu_capture(pcdev);
315
316 vb->state = VIDEOBUF_DONE;
317 do_gettimeofday(&vb->ts);
318 vb->field_count++;
319 wake_up(&vb->done);
320 spin_unlock_irqrestore(&pcdev->lock, flags);
321
322 return IRQ_HANDLED;
323}
324
1c3bb743 325/* Called with .video_lock held */
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326static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
327{
328 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
329 struct sh_mobile_ceu_dev *pcdev = ici->priv;
330 int ret = -EBUSY;
331
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332 if (pcdev->icd)
333 goto err;
334
335 dev_info(&icd->dev,
336 "SuperH Mobile CEU driver attached to camera %d\n",
337 icd->devnum);
338
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339 ret = icd->ops->init(icd);
340 if (ret)
341 goto err;
342
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343 clk_enable(pcdev->clk);
344
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345 ceu_write(pcdev, CAPSR, 1 << 16); /* reset */
346 while (ceu_read(pcdev, CSTSR) & 1)
347 msleep(1);
348
349 pcdev->icd = icd;
350err:
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351 return ret;
352}
353
1c3bb743 354/* Called with .video_lock held */
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355static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
356{
357 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
358 struct sh_mobile_ceu_dev *pcdev = ici->priv;
51354cc3 359 unsigned long flags;
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360
361 BUG_ON(icd != pcdev->icd);
362
363 /* disable capture, disable interrupts */
364 ceu_write(pcdev, CEIER, 0);
365 ceu_write(pcdev, CAPSR, 1 << 16); /* reset */
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366
367 /* make sure active buffer is canceled */
368 spin_lock_irqsave(&pcdev->lock, flags);
369 if (pcdev->active) {
370 list_del(&pcdev->active->queue);
371 pcdev->active->state = VIDEOBUF_ERROR;
372 wake_up_all(&pcdev->active->done);
373 pcdev->active = NULL;
374 }
375 spin_unlock_irqrestore(&pcdev->lock, flags);
376
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377 clk_disable(pcdev->clk);
378
0d3244d6 379 icd->ops->release(icd);
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380
381 dev_info(&icd->dev,
382 "SuperH Mobile CEU driver detached from camera %d\n",
383 icd->devnum);
384
385 pcdev->icd = NULL;
386}
387
388static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd,
389 __u32 pixfmt)
390{
391 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
392 struct sh_mobile_ceu_dev *pcdev = ici->priv;
ccab8a29 393 int ret, buswidth, width, height, cfszr_width, cdwdr_width;
0d3244d6 394 unsigned long camera_flags, common_flags, value;
8be65dc5 395 int yuv_mode, yuv_lineskip;
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396
397 camera_flags = icd->ops->query_bus_param(icd);
398 common_flags = soc_camera_bus_param_compatible(camera_flags,
399 pcdev->pdata->flags);
400 if (!common_flags)
401 return -EINVAL;
402
403 ret = icd->ops->set_bus_param(icd, common_flags);
404 if (ret < 0)
405 return ret;
406
407 switch (common_flags & SOCAM_DATAWIDTH_MASK) {
408 case SOCAM_DATAWIDTH_8:
409 buswidth = 8;
410 break;
411 case SOCAM_DATAWIDTH_16:
412 buswidth = 16;
413 break;
414 default:
415 return -EINVAL;
416 }
417
418 ceu_write(pcdev, CRCNTR, 0);
419 ceu_write(pcdev, CRCMPR, 0);
420
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421 value = 0x00000010; /* data fetch by default */
422 yuv_mode = yuv_lineskip = 0;
423
424 switch (icd->current_fmt->fourcc) {
425 case V4L2_PIX_FMT_NV12:
426 case V4L2_PIX_FMT_NV21:
427 yuv_lineskip = 1; /* skip for NV12/21, no skip for NV16/61 */
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428 /* fall-through */
429 case V4L2_PIX_FMT_NV16:
430 case V4L2_PIX_FMT_NV61:
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431 yuv_mode = 1;
432 switch (pcdev->camera_fmt->fourcc) {
433 case V4L2_PIX_FMT_UYVY:
434 value = 0x00000000; /* Cb0, Y0, Cr0, Y1 */
435 break;
436 case V4L2_PIX_FMT_VYUY:
437 value = 0x00000100; /* Cr0, Y0, Cb0, Y1 */
438 break;
439 case V4L2_PIX_FMT_YUYV:
440 value = 0x00000200; /* Y0, Cb0, Y1, Cr0 */
441 break;
442 case V4L2_PIX_FMT_YVYU:
443 value = 0x00000300; /* Y0, Cr0, Y1, Cb0 */
444 break;
445 default:
446 BUG();
447 }
448 }
449
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450 if (icd->current_fmt->fourcc == V4L2_PIX_FMT_NV21 ||
451 icd->current_fmt->fourcc == V4L2_PIX_FMT_NV61)
9e4a56d2 452 value ^= 0x00000100; /* swap U, V to change from NV1x->NVx1 */
8be65dc5 453
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454 value |= common_flags & SOCAM_VSYNC_ACTIVE_LOW ? 1 << 1 : 0;
455 value |= common_flags & SOCAM_HSYNC_ACTIVE_LOW ? 1 << 0 : 0;
456 value |= buswidth == 16 ? 1 << 12 : 0;
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457 ceu_write(pcdev, CAMCR, value);
458
459 ceu_write(pcdev, CAPCR, 0x00300000);
ccab8a29 460 ceu_write(pcdev, CAIFR, (pcdev->is_interlace) ? 0x101 : 0);
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461
462 mdelay(1);
463
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464 if (yuv_mode) {
465 width = icd->width * 2;
7a1a8164 466 width = buswidth == 16 ? width / 2 : width;
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467 cfszr_width = cdwdr_width = icd->width;
468 } else {
469 width = icd->width * ((icd->current_fmt->depth + 7) >> 3);
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470 width = buswidth == 16 ? width / 2 : width;
471 cfszr_width = buswidth == 8 ? width / 2 : width;
472 cdwdr_width = buswidth == 16 ? width * 2 : width;
8be65dc5 473 }
0d3244d6 474
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475 height = icd->height;
476 if (pcdev->is_interlace) {
477 height /= 2;
478 cdwdr_width *= 2;
479 }
480
0d3244d6 481 ceu_write(pcdev, CAMOR, 0);
ccab8a29 482 ceu_write(pcdev, CAPWR, (height << 16) | width);
8be65dc5 483 ceu_write(pcdev, CFLCR, 0); /* no scaling */
ccab8a29 484 ceu_write(pcdev, CFSZR, (height << 16) | cfszr_width);
8be65dc5 485 ceu_write(pcdev, CLFCR, 0); /* no lowpass filter */
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486
487 /* A few words about byte order (observed in Big Endian mode)
488 *
489 * In data fetch mode bytes are received in chunks of 8 bytes.
490 * D0, D1, D2, D3, D4, D5, D6, D7 (D0 received first)
491 *
492 * The data is however by default written to memory in reverse order:
493 * D7, D6, D5, D4, D3, D2, D1, D0 (D7 written to lowest byte)
494 *
495 * The lowest three bits of CDOCR allows us to do swapping,
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496 * using 7 we swap the data bytes to match the incoming order:
497 * D0, D1, D2, D3, D4, D5, D6, D7
dd54203b 498 */
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499 value = 0x00000017;
500 if (yuv_lineskip)
501 value &= ~0x00000010; /* convert 4:2:2 -> 4:2:0 */
502
503 ceu_write(pcdev, CDOCR, value);
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504
505 ceu_write(pcdev, CDWDR, cdwdr_width);
506 ceu_write(pcdev, CFWCR, 0); /* keep "datafetch firewall" disabled */
507
508 /* not in bundle mode: skip CBDSR, CDAYR2, CDACR2, CDBYR2, CDBCR2 */
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509 return 0;
510}
511
9414de39 512static int sh_mobile_ceu_try_bus_param(struct soc_camera_device *icd)
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513{
514 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
515 struct sh_mobile_ceu_dev *pcdev = ici->priv;
516 unsigned long camera_flags, common_flags;
517
518 camera_flags = icd->ops->query_bus_param(icd);
519 common_flags = soc_camera_bus_param_compatible(camera_flags,
520 pcdev->pdata->flags);
521 if (!common_flags)
522 return -EINVAL;
523
524 return 0;
525}
526
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527static const struct soc_camera_data_format sh_mobile_ceu_formats[] = {
528 {
529 .name = "NV12",
530 .depth = 12,
531 .fourcc = V4L2_PIX_FMT_NV12,
532 .colorspace = V4L2_COLORSPACE_JPEG,
533 },
534 {
535 .name = "NV21",
536 .depth = 12,
537 .fourcc = V4L2_PIX_FMT_NV21,
538 .colorspace = V4L2_COLORSPACE_JPEG,
539 },
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540 {
541 .name = "NV16",
542 .depth = 16,
543 .fourcc = V4L2_PIX_FMT_NV16,
544 .colorspace = V4L2_COLORSPACE_JPEG,
545 },
546 {
547 .name = "NV61",
548 .depth = 16,
549 .fourcc = V4L2_PIX_FMT_NV61,
550 .colorspace = V4L2_COLORSPACE_JPEG,
551 },
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552};
553
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554static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, int idx,
555 struct soc_camera_format_xlate *xlate)
556{
557 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
8be65dc5 558 int ret, k, n;
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559 int formats = 0;
560
561 ret = sh_mobile_ceu_try_bus_param(icd);
562 if (ret < 0)
563 return 0;
564
565 switch (icd->formats[idx].fourcc) {
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566 case V4L2_PIX_FMT_UYVY:
567 case V4L2_PIX_FMT_VYUY:
568 case V4L2_PIX_FMT_YUYV:
569 case V4L2_PIX_FMT_YVYU:
570 n = ARRAY_SIZE(sh_mobile_ceu_formats);
571 formats += n;
572 for (k = 0; xlate && k < n; k++) {
573 xlate->host_fmt = &sh_mobile_ceu_formats[k];
574 xlate->cam_fmt = icd->formats + idx;
575 xlate->buswidth = icd->formats[idx].depth;
576 xlate++;
577 dev_dbg(&ici->dev, "Providing format %s using %s\n",
578 sh_mobile_ceu_formats[k].name,
579 icd->formats[idx].name);
580 }
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MD
581 default:
582 /* Generic pass-through */
583 formats++;
584 if (xlate) {
585 xlate->host_fmt = icd->formats + idx;
586 xlate->cam_fmt = icd->formats + idx;
587 xlate->buswidth = icd->formats[idx].depth;
588 xlate++;
589 dev_dbg(&ici->dev,
590 "Providing format %s in pass-through mode\n",
591 icd->formats[idx].name);
592 }
593 }
594
595 return formats;
596}
597
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GL
598static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
599 __u32 pixfmt, struct v4l2_rect *rect)
0d3244d6 600{
9414de39 601 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
8be65dc5 602 struct sh_mobile_ceu_dev *pcdev = ici->priv;
9414de39 603 const struct soc_camera_format_xlate *xlate;
25c4d74e
GL
604 int ret;
605
0ad675eb
GL
606 if (!pixfmt)
607 return icd->ops->set_fmt(icd, pixfmt, rect);
608
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MD
609 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
610 if (!xlate) {
611 dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
612 return -EINVAL;
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GL
613 }
614
0ad675eb 615 ret = icd->ops->set_fmt(icd, xlate->cam_fmt->fourcc, rect);
9414de39 616
0ad675eb 617 if (!ret) {
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MD
618 icd->buswidth = xlate->buswidth;
619 icd->current_fmt = xlate->host_fmt;
8be65dc5 620 pcdev->camera_fmt = xlate->cam_fmt;
9414de39 621 }
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GL
622
623 return ret;
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MD
624}
625
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626static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
627 struct v4l2_format *f)
0d3244d6 628{
9414de39 629 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
ccab8a29 630 struct sh_mobile_ceu_dev *pcdev = ici->priv;
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MD
631 const struct soc_camera_format_xlate *xlate;
632 __u32 pixfmt = f->fmt.pix.pixelformat;
ccab8a29 633 int ret;
a2c8c68c 634
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MD
635 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
636 if (!xlate) {
637 dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
25c4d74e 638 return -EINVAL;
9414de39 639 }
25c4d74e 640
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MD
641 /* FIXME: calculate using depth and bus width */
642
643 if (f->fmt.pix.height < 4)
644 f->fmt.pix.height = 4;
645 if (f->fmt.pix.height > 1920)
646 f->fmt.pix.height = 1920;
647 if (f->fmt.pix.width < 2)
648 f->fmt.pix.width = 2;
649 if (f->fmt.pix.width > 2560)
650 f->fmt.pix.width = 2560;
651 f->fmt.pix.width &= ~0x01;
652 f->fmt.pix.height &= ~0x03;
653
25c4d74e 654 f->fmt.pix.bytesperline = f->fmt.pix.width *
9414de39 655 DIV_ROUND_UP(xlate->host_fmt->depth, 8);
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GL
656 f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
657
0d3244d6 658 /* limit to sensor capabilities */
ccab8a29
KM
659 ret = icd->ops->try_fmt(icd, f);
660 if (ret < 0)
661 return ret;
662
663 switch (f->fmt.pix.field) {
664 case V4L2_FIELD_INTERLACED:
665 pcdev->is_interlace = 1;
666 break;
667 case V4L2_FIELD_ANY:
668 f->fmt.pix.field = V4L2_FIELD_NONE;
669 /* fall-through */
670 case V4L2_FIELD_NONE:
671 pcdev->is_interlace = 0;
672 break;
673 default:
674 ret = -EINVAL;
675 break;
676 }
677
678 return ret;
0d3244d6
MD
679}
680
681static int sh_mobile_ceu_reqbufs(struct soc_camera_file *icf,
682 struct v4l2_requestbuffers *p)
683{
684 int i;
685
686 /* This is for locking debugging only. I removed spinlocks and now I
687 * check whether .prepare is ever called on a linked buffer, or whether
688 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
689 * it hadn't triggered */
690 for (i = 0; i < p->count; i++) {
691 struct sh_mobile_ceu_buffer *buf;
692
693 buf = container_of(icf->vb_vidq.bufs[i],
694 struct sh_mobile_ceu_buffer, vb);
695 INIT_LIST_HEAD(&buf->vb.queue);
696 }
697
698 return 0;
699}
700
701static unsigned int sh_mobile_ceu_poll(struct file *file, poll_table *pt)
702{
703 struct soc_camera_file *icf = file->private_data;
704 struct sh_mobile_ceu_buffer *buf;
705
706 buf = list_entry(icf->vb_vidq.stream.next,
707 struct sh_mobile_ceu_buffer, vb.stream);
708
709 poll_wait(file, &buf->vb.done, pt);
710
711 if (buf->vb.state == VIDEOBUF_DONE ||
712 buf->vb.state == VIDEOBUF_ERROR)
713 return POLLIN|POLLRDNORM;
714
715 return 0;
716}
717
718static int sh_mobile_ceu_querycap(struct soc_camera_host *ici,
719 struct v4l2_capability *cap)
720{
721 strlcpy(cap->card, "SuperH_Mobile_CEU", sizeof(cap->card));
722 cap->version = KERNEL_VERSION(0, 0, 5);
723 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
724 return 0;
725}
726
727static void sh_mobile_ceu_init_videobuf(struct videobuf_queue *q,
728 struct soc_camera_device *icd)
729{
730 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
731 struct sh_mobile_ceu_dev *pcdev = ici->priv;
732
733 videobuf_queue_dma_contig_init(q,
734 &sh_mobile_ceu_videobuf_ops,
735 &ici->dev, &pcdev->lock,
736 V4L2_BUF_TYPE_VIDEO_CAPTURE,
b6c6173e 737 V4L2_FIELD_ANY,
0d3244d6
MD
738 sizeof(struct sh_mobile_ceu_buffer),
739 icd);
740}
741
742static struct soc_camera_host_ops sh_mobile_ceu_host_ops = {
743 .owner = THIS_MODULE,
744 .add = sh_mobile_ceu_add_device,
745 .remove = sh_mobile_ceu_remove_device,
9414de39 746 .get_formats = sh_mobile_ceu_get_formats,
d8fac217
GL
747 .set_fmt = sh_mobile_ceu_set_fmt,
748 .try_fmt = sh_mobile_ceu_try_fmt,
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MD
749 .reqbufs = sh_mobile_ceu_reqbufs,
750 .poll = sh_mobile_ceu_poll,
751 .querycap = sh_mobile_ceu_querycap,
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MD
752 .set_bus_param = sh_mobile_ceu_set_bus_param,
753 .init_videobuf = sh_mobile_ceu_init_videobuf,
754};
755
756static int sh_mobile_ceu_probe(struct platform_device *pdev)
757{
758 struct sh_mobile_ceu_dev *pcdev;
759 struct resource *res;
760 void __iomem *base;
a42b6dd6 761 char clk_name[8];
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MD
762 unsigned int irq;
763 int err = 0;
764
765 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
766 irq = platform_get_irq(pdev, 0);
767 if (!res || !irq) {
768 dev_err(&pdev->dev, "Not enough CEU platform resources.\n");
769 err = -ENODEV;
770 goto exit;
771 }
772
773 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
774 if (!pcdev) {
775 dev_err(&pdev->dev, "Could not allocate pcdev\n");
776 err = -ENOMEM;
777 goto exit;
778 }
779
780 platform_set_drvdata(pdev, pcdev);
781 INIT_LIST_HEAD(&pcdev->capture);
782 spin_lock_init(&pcdev->lock);
783
784 pcdev->pdata = pdev->dev.platform_data;
785 if (!pcdev->pdata) {
786 err = -EINVAL;
787 dev_err(&pdev->dev, "CEU platform data not set.\n");
788 goto exit_kfree;
789 }
790
791 base = ioremap_nocache(res->start, res->end - res->start + 1);
792 if (!base) {
793 err = -ENXIO;
794 dev_err(&pdev->dev, "Unable to ioremap CEU registers.\n");
795 goto exit_kfree;
796 }
797
798 pcdev->irq = irq;
799 pcdev->base = base;
800 pcdev->video_limit = 0; /* only enabled if second resource exists */
801 pcdev->dev = &pdev->dev;
802
803 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
804 if (res) {
805 err = dma_declare_coherent_memory(&pdev->dev, res->start,
806 res->start,
807 (res->end - res->start) + 1,
808 DMA_MEMORY_MAP |
809 DMA_MEMORY_EXCLUSIVE);
810 if (!err) {
811 dev_err(&pdev->dev, "Unable to declare CEU memory.\n");
812 err = -ENXIO;
813 goto exit_iounmap;
814 }
815
816 pcdev->video_limit = (res->end - res->start) + 1;
817 }
818
819 /* request irq */
820 err = request_irq(pcdev->irq, sh_mobile_ceu_irq, IRQF_DISABLED,
af128a10 821 dev_name(&pdev->dev), pcdev);
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MD
822 if (err) {
823 dev_err(&pdev->dev, "Unable to register CEU interrupt.\n");
824 goto exit_release_mem;
825 }
826
a42b6dd6
MD
827 snprintf(clk_name, sizeof(clk_name), "ceu%d", pdev->id);
828 pcdev->clk = clk_get(&pdev->dev, clk_name);
829 if (IS_ERR(pcdev->clk)) {
830 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
831 err = PTR_ERR(pcdev->clk);
832 goto exit_free_irq;
833 }
834
0d3244d6
MD
835 pcdev->ici.priv = pcdev;
836 pcdev->ici.dev.parent = &pdev->dev;
837 pcdev->ici.nr = pdev->id;
af128a10
KS
838 pcdev->ici.drv_name = dev_name(&pdev->dev);
839 pcdev->ici.ops = &sh_mobile_ceu_host_ops;
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MD
840
841 err = soc_camera_host_register(&pcdev->ici);
842 if (err)
a42b6dd6 843 goto exit_free_clk;
0d3244d6
MD
844
845 return 0;
846
a42b6dd6
MD
847exit_free_clk:
848 clk_put(pcdev->clk);
0d3244d6
MD
849exit_free_irq:
850 free_irq(pcdev->irq, pcdev);
851exit_release_mem:
852 if (platform_get_resource(pdev, IORESOURCE_MEM, 1))
853 dma_release_declared_memory(&pdev->dev);
854exit_iounmap:
855 iounmap(base);
856exit_kfree:
857 kfree(pcdev);
858exit:
859 return err;
860}
861
862static int sh_mobile_ceu_remove(struct platform_device *pdev)
863{
864 struct sh_mobile_ceu_dev *pcdev = platform_get_drvdata(pdev);
865
866 soc_camera_host_unregister(&pcdev->ici);
a42b6dd6 867 clk_put(pcdev->clk);
0d3244d6
MD
868 free_irq(pcdev->irq, pcdev);
869 if (platform_get_resource(pdev, IORESOURCE_MEM, 1))
870 dma_release_declared_memory(&pdev->dev);
871 iounmap(pcdev->base);
872 kfree(pcdev);
873 return 0;
874}
875
876static struct platform_driver sh_mobile_ceu_driver = {
877 .driver = {
878 .name = "sh_mobile_ceu",
879 },
880 .probe = sh_mobile_ceu_probe,
881 .remove = sh_mobile_ceu_remove,
882};
883
884static int __init sh_mobile_ceu_init(void)
885{
886 return platform_driver_register(&sh_mobile_ceu_driver);
887}
888
889static void __exit sh_mobile_ceu_exit(void)
890{
01c1e4ca 891 platform_driver_unregister(&sh_mobile_ceu_driver);
0d3244d6
MD
892}
893
894module_init(sh_mobile_ceu_init);
895module_exit(sh_mobile_ceu_exit);
896
897MODULE_DESCRIPTION("SuperH Mobile CEU driver");
898MODULE_AUTHOR("Magnus Damm");
899MODULE_LICENSE("GPL");
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