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V4L/DVB (3305): Replaces old debug msgs to newer ones
[deliverable/linux.git] / drivers / media / video / tvaudio.c
CommitLineData
1da177e4
LT		 1/*
2 * experimental driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * This code is placed under the terms of the GNU General Public License
11 *
12 * OPTIONS:
13 * debug - set to 1 if you'd like to see debug messages
14 *
15 */
16
17#include <linux/config.h>
18#include <linux/module.h>
19#include <linux/moduleparam.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/string.h>
23#include <linux/timer.h>
24#include <linux/delay.h>
25#include <linux/errno.h>
26#include <linux/slab.h>
27#include <linux/videodev.h>
28#include <linux/i2c.h>
29#include <linux/i2c-algo-bit.h>
30#include <linux/init.h>
31#include <linux/smp_lock.h>
32
33#include <media/audiochip.h>
5e453dc7 34#include <media/v4l2-common.h>
1da177e4
LT		 35
36#include "tvaudio.h"
37
38/* ---------------------------------------------------------------------- */
39/* insmod args */
40
41static int debug = 0; /* insmod parameter */
42module_param(debug, int, 0644);
43
44MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46MODULE_LICENSE("GPL");
47
48#define UNSET (-1U)
18fc59e2 49
1da177e4
LT		 50/* ---------------------------------------------------------------------- */
51/* our structs */
52
53#define MAXREGS 64
54
55struct CHIPSTATE;
56typedef int (*getvalue)(int);
57typedef int (*checkit)(struct CHIPSTATE*);
58typedef int (*initialize)(struct CHIPSTATE*);
59typedef int (*getmode)(struct CHIPSTATE*);
60typedef void (*setmode)(struct CHIPSTATE*, int mode);
61typedef void (*checkmode)(struct CHIPSTATE*);
62
63/* i2c command */
64typedef struct AUDIOCMD {
65 int count; /* # of bytes to send */
66 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
67} audiocmd;
68
69/* chip description */
70struct CHIPDESC {
71 char *name; /* chip name */
72 int id; /* ID */
73 int addr_lo, addr_hi; /* i2c address range */
74 int registers; /* # of registers */
75
76 int *insmodopt;
77 checkit checkit;
78 initialize initialize;
79 int flags;
80#define CHIP_HAS_VOLUME 1
81#define CHIP_HAS_BASSTREBLE 2
82#define CHIP_HAS_INPUTSEL 4
83
84 /* various i2c command sequences */
85 audiocmd init;
86
87 /* which register has which value */
88 int leftreg,rightreg,treblereg,bassreg;
89
90 /* initialize with (defaults to 65535/65535/32768/32768 */
91 int leftinit,rightinit,trebleinit,bassinit;
92
93 /* functions to convert the values (v4l -> chip) */
94 getvalue volfunc,treblefunc,bassfunc;
95
96 /* get/set mode */
97 getmode getmode;
98 setmode setmode;
99
100 /* check / autoswitch audio after channel switches */
101 checkmode checkmode;
102
103 /* input switch register + values for v4l inputs */
104 int inputreg;
105 int inputmap[8];
106 int inputmute;
107 int inputmask;
108};
109static struct CHIPDESC chiplist[];
110
111/* current state of the chip */
112struct CHIPSTATE {
113 struct i2c_client c;
114
115 /* index into CHIPDESC array */
116 int type;
117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
122 __u16 left,right,treble,bass,mode;
123 int prevmode;
8a854284 124 int radio;
1da177e4
LT		 125
126 /* thread */
127 pid_t tpid;
128 struct completion texit;
129 wait_queue_head_t wq;
130 struct timer_list wt;
131 int done;
132 int watch_stereo;
133};
134
1da177e4
LT		 135/* ---------------------------------------------------------------------- */
136/* i2c addresses */
137
138static unsigned short normal_i2c[] = {
139 I2C_TDA8425 >> 1,
140 I2C_TEA6300 >> 1,
141 I2C_TEA6420 >> 1,
142 I2C_TDA9840 >> 1,
143 I2C_TDA985x_L >> 1,
144 I2C_TDA985x_H >> 1,
145 I2C_TDA9874 >> 1,
146 I2C_PIC16C54 >> 1,
147 I2C_CLIENT_END };
1da177e4
LT		 148I2C_CLIENT_INSMOD;
149
150static struct i2c_driver driver;
151static struct i2c_client client_template;
152
153
154/* ---------------------------------------------------------------------- */
155/* i2c I/O functions */
156
157static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
158{
159 unsigned char buffer[2];
160
161 if (-1 == subaddr) {
fac9e899 162 v4l_dbg(1, &chip->c, "%s: chip_write: 0x%x\n",
18fc59e2 163 chip->c.name, val);
1da177e4
LT		 164 chip->shadow.bytes[1] = val;
165 buffer[0] = val;
166 if (1 != i2c_master_send(&chip->c,buffer,1)) {
fac9e899 167 v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
18fc59e2 168 chip->c.name, val);
1da177e4
LT		 169 return -1;
170 }
171 } else {
fac9e899 172 v4l_dbg(1, &chip->c, "%s: chip_write: reg%d=0x%x\n",
fae91e72 173 chip->c.name, subaddr, val);
1da177e4
LT		 174 chip->shadow.bytes[subaddr+1] = val;
175 buffer[0] = subaddr;
176 buffer[1] = val;
177 if (2 != i2c_master_send(&chip->c,buffer,2)) {
fac9e899 178 v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
674434c6 179 chip->c.name, subaddr, val);
1da177e4
LT		 180 return -1;
181 }
182 }
183 return 0;
184}
185
186static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
187{
188 if (mask != 0) {
189 if (-1 == subaddr) {
190 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
191 } else {
192 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
193 }
194 }
195 return chip_write(chip, subaddr, val);
196}
197
198static int chip_read(struct CHIPSTATE *chip)
199{
200 unsigned char buffer;
201
202 if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
fac9e899 203 v4l_warn(&chip->c, "%s: I/O error (read)\n",
18fc59e2 204 chip->c.name);
1da177e4
LT		 205 return -1;
206 }
fac9e899 207 v4l_dbg(1, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
1da177e4
LT		 208 return buffer;
209}
210
211static int chip_read2(struct CHIPSTATE *chip, int subaddr)
212{
18fc59e2
MCC		 213 unsigned char write[1];
214 unsigned char read[1];
215 struct i2c_msg msgs[2] = {
216 { chip->c.addr, 0, 1, write },
217 { chip->c.addr, I2C_M_RD, 1, read }
218 };
219 write[0] = subaddr;
1da177e4
LT		 220
221 if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
fac9e899 222 v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
1da177e4
LT		 223 return -1;
224 }
fac9e899 225 v4l_dbg(1, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
674434c6 226 chip->c.name, subaddr,read[0]);
1da177e4
LT		 227 return read[0];
228}
229
230static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
231{
232 int i;
233
234 if (0 == cmd->count)
235 return 0;
236
237 /* update our shadow register set; print bytes if (debug > 0) */
fac9e899 238 v4l_dbg(1, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
674434c6 239 chip->c.name, name,cmd->bytes[0]);
1da177e4 240 for (i = 1; i < cmd->count; i++) {
18fc59e2
MCC		 241 if (debug)
242 printk(" 0x%x",cmd->bytes[i]);
1da177e4
LT		 243 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
244 }
18fc59e2
MCC		 245 if (debug)
246 printk("\n");
1da177e4
LT		 247
248 /* send data to the chip */
249 if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
fac9e899 250 v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
1da177e4
LT		 251 return -1;
252 }
253 return 0;
254}
255
256/* ---------------------------------------------------------------------- */
257/* kernel thread for doing i2c stuff asyncronly
258 * right now it is used only to check the audio mode (mono/stereo/whatever)
259 * some time after switching to another TV channel, then turn on stereo
260 * if available, ...
261 */
262
263static void chip_thread_wake(unsigned long data)
264{
18fc59e2 265 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
1da177e4
LT		 266 wake_up_interruptible(&chip->wq);
267}
268
269static int chip_thread(void *data)
270{
271 DECLARE_WAITQUEUE(wait, current);
18fc59e2 272 struct CHIPSTATE *chip = data;
1da177e4
LT		 273 struct CHIPDESC *desc = chiplist + chip->type;
274
fae91e72 275 daemonize("%s", chip->c.name);
1da177e4 276 allow_signal(SIGTERM);
fac9e899 277 v4l_dbg(1, &chip->c, "%s: thread started\n", chip->c.name);
1da177e4
LT		 278
279 for (;;) {
280 add_wait_queue(&chip->wq, &wait);
281 if (!chip->done) {
282 set_current_state(TASK_INTERRUPTIBLE);
283 schedule();
284 }
285 remove_wait_queue(&chip->wq, &wait);
5e50e7a9 286 try_to_freeze();
1da177e4
LT		 287 if (chip->done || signal_pending(current))
288 break;
fac9e899 289 v4l_dbg(1, &chip->c, "%s: thread wakeup\n", chip->c.name);
1da177e4
LT		 290
291 /* don't do anything for radio or if mode != auto */
8a854284 292 if (chip->radio || chip->mode != 0)
1da177e4
LT		 293 continue;
294
295 /* have a look what's going on */
296 desc->checkmode(chip);
297
298 /* schedule next check */
299 mod_timer(&chip->wt, jiffies+2*HZ);
300 }
301
fac9e899 302 v4l_dbg(1, &chip->c, "%s: thread exiting\n", chip->c.name);
18fc59e2 303 complete_and_exit(&chip->texit, 0);
1da177e4
LT		 304 return 0;
305}
306
307static void generic_checkmode(struct CHIPSTATE *chip)
308{
309 struct CHIPDESC *desc = chiplist + chip->type;
310 int mode = desc->getmode(chip);
311
312 if (mode == chip->prevmode)
674434c6 313 return;
1da177e4 314
fac9e899 315 v4l_dbg(1, &chip->c, "%s: thread checkmode\n", chip->c.name);
1da177e4
LT		 316 chip->prevmode = mode;
317
318 if (mode & VIDEO_SOUND_STEREO)
319 desc->setmode(chip,VIDEO_SOUND_STEREO);
320 else if (mode & VIDEO_SOUND_LANG1)
321 desc->setmode(chip,VIDEO_SOUND_LANG1);
322 else if (mode & VIDEO_SOUND_LANG2)
323 desc->setmode(chip,VIDEO_SOUND_LANG2);
324 else
325 desc->setmode(chip,VIDEO_SOUND_MONO);
326}
327
328/* ---------------------------------------------------------------------- */
329/* audio chip descriptions - defines+functions for tda9840 */
330
331#define TDA9840_SW 0x00
332#define TDA9840_LVADJ 0x02
333#define TDA9840_STADJ 0x03
334#define TDA9840_TEST 0x04
335
336#define TDA9840_MONO 0x10
337#define TDA9840_STEREO 0x2a
338#define TDA9840_DUALA 0x12
339#define TDA9840_DUALB 0x1e
340#define TDA9840_DUALAB 0x1a
341#define TDA9840_DUALBA 0x16
342#define TDA9840_EXTERNAL 0x7a
343
344#define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
345#define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
346#define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
347
348#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
349#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
350
351static int tda9840_getmode(struct CHIPSTATE *chip)
352{
353 int val, mode;
354
355 val = chip_read(chip);
356 mode = VIDEO_SOUND_MONO;
357 if (val & TDA9840_DS_DUAL)
358 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
359 if (val & TDA9840_ST_STEREO)
360 mode |= VIDEO_SOUND_STEREO;
361
fac9e899 362 v4l_dbg(1, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 363 val, mode);
1da177e4
LT		 364 return mode;
365}
366
367static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
368{
369 int update = 1;
370 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
371
372 switch (mode) {
373 case VIDEO_SOUND_MONO:
374 t |= TDA9840_MONO;
375 break;
376 case VIDEO_SOUND_STEREO:
377 t |= TDA9840_STEREO;
378 break;
379 case VIDEO_SOUND_LANG1:
380 t |= TDA9840_DUALA;
381 break;
382 case VIDEO_SOUND_LANG2:
383 t |= TDA9840_DUALB;
384 break;
385 default:
386 update = 0;
387 }
388
389 if (update)
390 chip_write(chip, TDA9840_SW, t);
391}
392
393/* ---------------------------------------------------------------------- */
394/* audio chip descriptions - defines+functions for tda985x */
395
396/* subaddresses for TDA9855 */
397#define TDA9855_VR 0x00 /* Volume, right */
398#define TDA9855_VL 0x01 /* Volume, left */
399#define TDA9855_BA 0x02 /* Bass */
400#define TDA9855_TR 0x03 /* Treble */
401#define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
402
403/* subaddresses for TDA9850 */
404#define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
405
406/* subaddesses for both chips */
407#define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
408#define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
409#define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
410#define TDA985x_A1 0x08 /* Alignment 1 for both chips */
411#define TDA985x_A2 0x09 /* Alignment 2 for both chips */
412#define TDA985x_A3 0x0a /* Alignment 3 for both chips */
413
414/* Masks for bits in TDA9855 subaddresses */
415/* 0x00 - VR in TDA9855 */
416/* 0x01 - VL in TDA9855 */
417/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
418 * in 1dB steps - mute is 0x27 */
419
420
421/* 0x02 - BA in TDA9855 */
422/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
423 * in .5dB steps - 0 is 0x0E */
424
425
426/* 0x03 - TR in TDA9855 */
427/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
428 * in 3dB steps - 0 is 0x7 */
429
430/* Masks for bits in both chips' subaddresses */
431/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
432/* Unique to TDA9855: */
433/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
434 * in 3dB steps - mute is 0x0 */
435
436/* Unique to TDA9850: */
437/* lower 4 bits control stereo noise threshold, over which stereo turns off
438 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
439
440
441/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
442/* Unique to TDA9855: */
443#define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
444#define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
445#define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
446#define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
447 /* Bits 0 to 3 select various combinations
4ac97914
MCC		 448 * of line in and line out, only the
449 * interesting ones are defined */
1da177e4
LT		 450#define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
451#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
452
453/* Unique to TDA9850: */
454/* lower 4 bits contol SAP noise threshold, over which SAP turns off
455 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
456
457
458/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
459/* Common to TDA9855 and TDA9850: */
460#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
461#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
462#define TDA985x_MONO 0 /* Forces Mono output */
463#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
464
465/* Unique to TDA9855: */
466#define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
467#define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
468#define TDA9855_LINEAR 0 /* Linear Stereo */
469#define TDA9855_PSEUDO 1 /* Pseudo Stereo */
470#define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
471#define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
472#define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
473
474/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
475/* Common to both TDA9855 and TDA9850: */
476/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
477 * in .5dB steps - 0dB is 0x7 */
478
479/* 0x08, 0x09 - A1 and A2 (read/write) */
480/* Common to both TDA9855 and TDA9850: */
481/* lower 5 bites are wideband and spectral expander alignment
482 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
483#define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
484#define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
485#define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
486
487/* 0x0a - A3 */
488/* Common to both TDA9855 and TDA9850: */
489/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
490 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
491#define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
492
493static int tda9855_volume(int val) { return val/0x2e8+0x27; }
494static int tda9855_bass(int val) { return val/0xccc+0x06; }
495static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
496
497static int tda985x_getmode(struct CHIPSTATE *chip)
498{
499 int mode;
500
501 mode = ((TDA985x_STP | TDA985x_SAPP) &
502 chip_read(chip)) >> 4;
503 /* Add mono mode regardless of SAP and stereo */
504 /* Allows forced mono */
505 return mode | VIDEO_SOUND_MONO;
506}
507
508static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
509{
510 int update = 1;
511 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
512
513 switch (mode) {
514 case VIDEO_SOUND_MONO:
515 c6 |= TDA985x_MONO;
516 break;
517 case VIDEO_SOUND_STEREO:
518 c6 |= TDA985x_STEREO;
519 break;
520 case VIDEO_SOUND_LANG1:
521 c6 |= TDA985x_SAP;
522 break;
523 default:
524 update = 0;
525 }
526 if (update)
527 chip_write(chip,TDA985x_C6,c6);
528}
529
530
531/* ---------------------------------------------------------------------- */
532/* audio chip descriptions - defines+functions for tda9873h */
533
534/* Subaddresses for TDA9873H */
535
536#define TDA9873_SW 0x00 /* Switching */
537#define TDA9873_AD 0x01 /* Adjust */
538#define TDA9873_PT 0x02 /* Port */
539
540/* Subaddress 0x00: Switching Data
541 * B7..B0:
542 *
543 * B1, B0: Input source selection
544 * 0, 0 internal
545 * 1, 0 external stereo
546 * 0, 1 external mono
547 */
548#define TDA9873_INP_MASK 3
549#define TDA9873_INTERNAL 0
550#define TDA9873_EXT_STEREO 2
551#define TDA9873_EXT_MONO 1
552
553/* B3, B2: output signal select
554 * B4 : transmission mode
555 * 0, 0, 1 Mono
556 * 1, 0, 0 Stereo
557 * 1, 1, 1 Stereo (reversed channel)
558 * 0, 0, 0 Dual AB
559 * 0, 0, 1 Dual AA
560 * 0, 1, 0 Dual BB
561 * 0, 1, 1 Dual BA
562 */
563
564#define TDA9873_TR_MASK (7 << 2)
565#define TDA9873_TR_MONO 4
566#define TDA9873_TR_STEREO 1 << 4
567#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
568#define TDA9873_TR_DUALA 1 << 2
569#define TDA9873_TR_DUALB 1 << 3
570
571/* output level controls
572 * B5: output level switch (0 = reduced gain, 1 = normal gain)
573 * B6: mute (1 = muted)
574 * B7: auto-mute (1 = auto-mute enabled)
575 */
576
577#define TDA9873_GAIN_NORMAL 1 << 5
578#define TDA9873_MUTE 1 << 6
579#define TDA9873_AUTOMUTE 1 << 7
580
581/* Subaddress 0x01: Adjust/standard */
582
583/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
584 * Recommended value is +0 dB
585 */
586
587#define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
588
589/* Bits C6..C4 control FM stantard
590 * C6, C5, C4
591 * 0, 0, 0 B/G (PAL FM)
592 * 0, 0, 1 M
593 * 0, 1, 0 D/K(1)
594 * 0, 1, 1 D/K(2)
595 * 1, 0, 0 D/K(3)
596 * 1, 0, 1 I
597 */
598#define TDA9873_BG 0
599#define TDA9873_M 1
600#define TDA9873_DK1 2
601#define TDA9873_DK2 3
602#define TDA9873_DK3 4
603#define TDA9873_I 5
604
605/* C7 controls identification response time (1=fast/0=normal)
606 */
607#define TDA9873_IDR_NORM 0
608#define TDA9873_IDR_FAST 1 << 7
609
610
611/* Subaddress 0x02: Port data */
612
613/* E1, E0 free programmable ports P1/P2
614 0, 0 both ports low
615 0, 1 P1 high
616 1, 0 P2 high
617 1, 1 both ports high
618*/
619
620#define TDA9873_PORTS 3
621
622/* E2: test port */
623#define TDA9873_TST_PORT 1 << 2
624
625/* E5..E3 control mono output channel (together with transmission mode bit B4)
626 *
627 * E5 E4 E3 B4 OUTM
628 * 0 0 0 0 mono
629 * 0 0 1 0 DUAL B
630 * 0 1 0 1 mono (from stereo decoder)
631 */
632#define TDA9873_MOUT_MONO 0
633#define TDA9873_MOUT_FMONO 0
634#define TDA9873_MOUT_DUALA 0
635#define TDA9873_MOUT_DUALB 1 << 3
636#define TDA9873_MOUT_ST 1 << 4
637#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
638#define TDA9873_MOUT_EXTL 1 << 5
639#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
640#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
641#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
642
643/* Status bits: (chip read) */
644#define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
645#define TDA9873_STEREO 2 /* Stereo sound is identified */
646#define TDA9873_DUAL 4 /* Dual sound is identified */
647
648static int tda9873_getmode(struct CHIPSTATE *chip)
649{
650 int val,mode;
651
652 val = chip_read(chip);
653 mode = VIDEO_SOUND_MONO;
654 if (val & TDA9873_STEREO)
655 mode |= VIDEO_SOUND_STEREO;
656 if (val & TDA9873_DUAL)
657 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
fac9e899 658 v4l_dbg(1, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 659 val, mode);
1da177e4
LT		 660 return mode;
661}
662
663static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
664{
665 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
666 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
667
668 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
fac9e899 669 v4l_dbg(1, &chip->c, "tda9873_setmode(): external input\n");
1da177e4
LT		 670 return;
671 }
672
fac9e899
HV		 673 v4l_dbg(1, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
674 v4l_dbg(1, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
1da177e4
LT		 675
676 switch (mode) {
677 case VIDEO_SOUND_MONO:
678 sw_data |= TDA9873_TR_MONO;
679 break;
680 case VIDEO_SOUND_STEREO:
681 sw_data |= TDA9873_TR_STEREO;
682 break;
683 case VIDEO_SOUND_LANG1:
684 sw_data |= TDA9873_TR_DUALA;
685 break;
686 case VIDEO_SOUND_LANG2:
687 sw_data |= TDA9873_TR_DUALB;
688 break;
689 default:
690 chip->mode = 0;
691 return;
692 }
693
694 chip_write(chip, TDA9873_SW, sw_data);
fac9e899 695 v4l_dbg(1, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
1da177e4
LT		 696 mode, sw_data);
697}
698
699static int tda9873_checkit(struct CHIPSTATE *chip)
700{
701 int rc;
702
703 if (-1 == (rc = chip_read2(chip,254)))
704 return 0;
705 return (rc & ~0x1f) == 0x80;
706}
707
708
709/* ---------------------------------------------------------------------- */
710/* audio chip description - defines+functions for tda9874h and tda9874a */
711/* Dariusz Kowalewski <darekk@automex.pl> */
712
713/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
714#define TDA9874A_AGCGR 0x00 /* AGC gain */
715#define TDA9874A_GCONR 0x01 /* general config */
716#define TDA9874A_MSR 0x02 /* monitor select */
717#define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
718#define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
719#define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
720#define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
721#define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
722#define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
723#define TDA9874A_DCR 0x09 /* demodulator config */
724#define TDA9874A_FMER 0x0a /* FM de-emphasis */
725#define TDA9874A_FMMR 0x0b /* FM dematrix */
726#define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
727#define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
728#define TDA9874A_NCONR 0x0e /* NICAM config */
729#define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
730#define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
731#define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
732#define TDA9874A_AMCONR 0x12 /* audio mute control */
733#define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
734#define TDA9874A_AOSR 0x14 /* analog output select */
735#define TDA9874A_DAICONR 0x15 /* digital audio interface config */
736#define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
737#define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
738#define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
739#define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
740
741/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
742#define TDA9874A_DSR 0x00 /* device status */
743#define TDA9874A_NSR 0x01 /* NICAM status */
744#define TDA9874A_NECR 0x02 /* NICAM error count */
745#define TDA9874A_DR1 0x03 /* add. data LSB */
746#define TDA9874A_DR2 0x04 /* add. data MSB */
747#define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
748#define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
749#define TDA9874A_SIFLR 0x07 /* SIF level */
750#define TDA9874A_TR2 252 /* test reg. 2 */
751#define TDA9874A_TR1 253 /* test reg. 1 */
752#define TDA9874A_DIC 254 /* device id. code */
753#define TDA9874A_SIC 255 /* software id. code */
754
755
756static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
757static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
758static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
759static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
760static int tda9874a_dic = -1; /* device id. code */
761
762/* insmod options for tda9874a */
763static unsigned int tda9874a_SIF = UNSET;
764static unsigned int tda9874a_AMSEL = UNSET;
765static unsigned int tda9874a_STD = UNSET;
766module_param(tda9874a_SIF, int, 0444);
767module_param(tda9874a_AMSEL, int, 0444);
768module_param(tda9874a_STD, int, 0444);
769
770/*
771 * initialization table for tda9874 decoder:
772 * - carrier 1 freq. registers (3 bytes)
773 * - carrier 2 freq. registers (3 bytes)
774 * - demudulator config register
775 * - FM de-emphasis register (slow identification mode)
776 * Note: frequency registers must be written in single i2c transfer.
777 */
778static struct tda9874a_MODES {
779 char *name;
780 audiocmd cmd;
781} tda9874a_modelist[9] = {
782 { "A2, B/G",
783 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
784 { "A2, M (Korea)",
785 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
786 { "A2, D/K (1)",
787 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
788 { "A2, D/K (2)",
789 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
790 { "A2, D/K (3)",
791 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
792 { "NICAM, I",
793 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
794 { "NICAM, B/G",
795 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
796 { "NICAM, D/K", /* default */
797 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
798 { "NICAM, L",
799 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
800};
801
802static int tda9874a_setup(struct CHIPSTATE *chip)
803{
804 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
805 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
806 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
807 if(tda9874a_dic == 0x11) {
808 chip_write(chip, TDA9874A_FMMR, 0x80);
809 } else { /* dic == 0x07 */
810 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
811 chip_write(chip, TDA9874A_FMMR, 0x00);
812 }
813 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
814 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
815 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
816 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
817 /* Note: If signal quality is poor you may want to change NICAM */
818 /* error limit registers (NLELR and NUELR) to some greater values. */
819 /* Then the sound would remain stereo, but won't be so clear. */
820 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
821 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
822
823 if(tda9874a_dic == 0x11) {
824 chip_write(chip, TDA9874A_AMCONR, 0xf9);
825 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
826 chip_write(chip, TDA9874A_AOSR, 0x80);
827 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
828 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
829 } else { /* dic == 0x07 */
830 chip_write(chip, TDA9874A_AMCONR, 0xfb);
831 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
18fc59e2 832 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1da177e4 833 }
fac9e899 834 v4l_dbg(1, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
1da177e4
LT		 835 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
836 return 1;
837}
838
839static int tda9874a_getmode(struct CHIPSTATE *chip)
840{
841 int dsr,nsr,mode;
842 int necr; /* just for debugging */
843
844 mode = VIDEO_SOUND_MONO;
845
846 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
847 return mode;
848 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
849 return mode;
850 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
851 return mode;
852
853 /* need to store dsr/nsr somewhere */
854 chip->shadow.bytes[MAXREGS-2] = dsr;
855 chip->shadow.bytes[MAXREGS-1] = nsr;
856
857 if(tda9874a_mode) {
858 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
859 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
860 * that sound has (temporarily) switched from NICAM to
861 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
862 * error count. So in fact there is no stereo in this case :-(
863 * But changing the mode to VIDEO_SOUND_MONO would switch
864 * external 4052 multiplexer in audio_hook().
865 */
1da177e4
LT		 866 if(nsr & 0x02) /* NSR.S/MB=1 */
867 mode |= VIDEO_SOUND_STEREO;
1da177e4
LT		 868 if(nsr & 0x01) /* NSR.D/SB=1 */
869 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
870 } else {
871 if(dsr & 0x02) /* DSR.IDSTE=1 */
872 mode |= VIDEO_SOUND_STEREO;
873 if(dsr & 0x04) /* DSR.IDDUA=1 */
874 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
875 }
876
fac9e899 877 v4l_dbg(1, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
1da177e4
LT		 878 dsr, nsr, necr, mode);
879 return mode;
880}
881
882static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
883{
884 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
885 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
886 if(tda9874a_mode) {
887 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
888 tda9874a_NCONR &= 0xfe; /* enable */
889 else
890 tda9874a_NCONR |= 0x01; /* disable */
891 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
892 }
893
894 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
895 * and has auto-select function for audio output (AOSR register).
896 * Old TDA9874H doesn't support these features.
897 * TDA9874A also has additional mono output pin (OUTM), which
898 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
899 */
900 if(tda9874a_dic == 0x11) {
901 int aosr = 0x80;
902 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
903
904 switch(mode) {
905 case VIDEO_SOUND_MONO:
906 case VIDEO_SOUND_STEREO:
907 break;
908 case VIDEO_SOUND_LANG1:
909 aosr = 0x80; /* auto-select, dual A/A */
910 mdacosr = (tda9874a_mode) ? 0x82:0x80;
911 break;
912 case VIDEO_SOUND_LANG2:
913 aosr = 0xa0; /* auto-select, dual B/B */
914 mdacosr = (tda9874a_mode) ? 0x83:0x81;
915 break;
916 default:
917 chip->mode = 0;
918 return;
919 }
920 chip_write(chip, TDA9874A_AOSR, aosr);
921 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
922
fac9e899 923 v4l_dbg(1, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1da177e4
LT		 924 mode, aosr, mdacosr);
925
926 } else { /* dic == 0x07 */
927 int fmmr,aosr;
928
929 switch(mode) {
930 case VIDEO_SOUND_MONO:
931 fmmr = 0x00; /* mono */
932 aosr = 0x10; /* A/A */
933 break;
934 case VIDEO_SOUND_STEREO:
935 if(tda9874a_mode) {
936 fmmr = 0x00;
937 aosr = 0x00; /* handled by NICAM auto-mute */
938 } else {
939 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
940 aosr = 0x00;
941 }
942 break;
943 case VIDEO_SOUND_LANG1:
944 fmmr = 0x02; /* dual */
945 aosr = 0x10; /* dual A/A */
946 break;
947 case VIDEO_SOUND_LANG2:
948 fmmr = 0x02; /* dual */
949 aosr = 0x20; /* dual B/B */
950 break;
951 default:
952 chip->mode = 0;
953 return;
954 }
955 chip_write(chip, TDA9874A_FMMR, fmmr);
956 chip_write(chip, TDA9874A_AOSR, aosr);
957
fac9e899 958 v4l_dbg(1, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1da177e4
LT		 959 mode, fmmr, aosr);
960 }
961}
962
963static int tda9874a_checkit(struct CHIPSTATE *chip)
964{
965 int dic,sic; /* device id. and software id. codes */
966
967 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
968 return 0;
969 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
970 return 0;
971
fac9e899 972 v4l_dbg(1, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1da177e4
LT		 973
974 if((dic == 0x11)||(dic == 0x07)) {
fac9e899 975 v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
1da177e4
LT		 976 tda9874a_dic = dic; /* remember device id. */
977 return 1;
978 }
979 return 0; /* not found */
980}
981
982static int tda9874a_initialize(struct CHIPSTATE *chip)
983{
984 if (tda9874a_SIF > 2)
985 tda9874a_SIF = 1;
faf8b249 986 if (tda9874a_STD > 8)
1da177e4
LT		 987 tda9874a_STD = 0;
988 if(tda9874a_AMSEL > 1)
989 tda9874a_AMSEL = 0;
990
991 if(tda9874a_SIF == 1)
992 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
993 else
994 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
995
996 tda9874a_ESP = tda9874a_STD;
997 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
998
999 if(tda9874a_AMSEL == 0)
1000 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1001 else
1002 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1003
1004 tda9874a_setup(chip);
1005 return 0;
1006}
1007
1008
1009/* ---------------------------------------------------------------------- */
1010/* audio chip descriptions - defines+functions for tea6420 */
1011
1012#define TEA6300_VL 0x00 /* volume left */
1013#define TEA6300_VR 0x01 /* volume right */
1014#define TEA6300_BA 0x02 /* bass */
1015#define TEA6300_TR 0x03 /* treble */
1016#define TEA6300_FA 0x04 /* fader control */
1017#define TEA6300_S 0x05 /* switch register */
f2421ca3 1018 /* values for those registers: */
1da177e4
LT		 1019#define TEA6300_S_SA 0x01 /* stereo A input */
1020#define TEA6300_S_SB 0x02 /* stereo B */
1021#define TEA6300_S_SC 0x04 /* stereo C */
1022#define TEA6300_S_GMU 0x80 /* general mute */
1023
1024#define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1025#define TEA6320_FFR 0x01 /* fader front right (0-5) */
1026#define TEA6320_FFL 0x02 /* fader front left (0-5) */
1027#define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1028#define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1029#define TEA6320_BA 0x05 /* bass (0-4) */
1030#define TEA6320_TR 0x06 /* treble (0-4) */
1031#define TEA6320_S 0x07 /* switch register */
f2421ca3 1032 /* values for those registers: */
1da177e4
LT		 1033#define TEA6320_S_SA 0x07 /* stereo A input */
1034#define TEA6320_S_SB 0x06 /* stereo B */
1035#define TEA6320_S_SC 0x05 /* stereo C */
1036#define TEA6320_S_SD 0x04 /* stereo D */
1037#define TEA6320_S_GMU 0x80 /* general mute */
1038
1039#define TEA6420_S_SA 0x00 /* stereo A input */
1040#define TEA6420_S_SB 0x01 /* stereo B */
1041#define TEA6420_S_SC 0x02 /* stereo C */
1042#define TEA6420_S_SD 0x03 /* stereo D */
1043#define TEA6420_S_SE 0x04 /* stereo E */
1044#define TEA6420_S_GMU 0x05 /* general mute */
1045
1046static int tea6300_shift10(int val) { return val >> 10; }
1047static int tea6300_shift12(int val) { return val >> 12; }
1048
1049/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1050/* 0x0c mirror those immediately higher) */
1051static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1052static int tea6320_shift11(int val) { return val >> 11; }
1053static int tea6320_initialize(struct CHIPSTATE * chip)
1054{
1055 chip_write(chip, TEA6320_FFR, 0x3f);
1056 chip_write(chip, TEA6320_FFL, 0x3f);
1057 chip_write(chip, TEA6320_FRR, 0x3f);
1058 chip_write(chip, TEA6320_FRL, 0x3f);
1059
1060 return 0;
1061}
1062
1063
1064/* ---------------------------------------------------------------------- */
1065/* audio chip descriptions - defines+functions for tda8425 */
1066
1067#define TDA8425_VL 0x00 /* volume left */
1068#define TDA8425_VR 0x01 /* volume right */
1069#define TDA8425_BA 0x02 /* bass */
1070#define TDA8425_TR 0x03 /* treble */
1071#define TDA8425_S1 0x08 /* switch functions */
f2421ca3 1072 /* values for those registers: */
1da177e4
LT		 1073#define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1074#define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1075#define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1076#define TDA8425_S1_MU 0x20 /* mute bit */
1077#define TDA8425_S1_STEREO 0x18 /* stereo bits */
1078#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1079#define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1080#define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1081#define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1082#define TDA8425_S1_ML 0x06 /* language selector */
1083#define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1084#define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1085#define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1086#define TDA8425_S1_IS 0x01 /* channel selector */
1087
1088
1089static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1090static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1091
1092static int tda8425_initialize(struct CHIPSTATE *chip)
1093{
1094 struct CHIPDESC *desc = chiplist + chip->type;
1095 int inputmap[8] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1096 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF,
1097 /* off */ TDA8425_S1_OFF, /* on */ TDA8425_S1_CH2};
1098
c7a46533 1099 if (chip->c.adapter->id == I2C_HW_B_RIVA) {
1da177e4
LT		 1100 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1101 }
1102 return 0;
1103}
1104
1105static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1106{
1107 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1108
1109 if (mode & VIDEO_SOUND_LANG1) {
1110 s1 |= TDA8425_S1_ML_SOUND_A;
1111 s1 |= TDA8425_S1_STEREO_PSEUDO;
1112
1113 } else if (mode & VIDEO_SOUND_LANG2) {
1114 s1 |= TDA8425_S1_ML_SOUND_B;
1115 s1 |= TDA8425_S1_STEREO_PSEUDO;
1116
1117 } else {
1118 s1 |= TDA8425_S1_ML_STEREO;
1119
1120 if (mode & VIDEO_SOUND_MONO)
1121 s1 |= TDA8425_S1_STEREO_MONO;
1122 if (mode & VIDEO_SOUND_STEREO)
1123 s1 |= TDA8425_S1_STEREO_SPATIAL;
1124 }
1125 chip_write(chip,TDA8425_S1,s1);
1126}
1127
1128
1129/* ---------------------------------------------------------------------- */
1130/* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1131
1132/* the registers of 16C54, I2C sub address. */
1133#define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1134#define PIC16C54_REG_MISC 0x02
1135
1136/* bit definition of the RESET register, I2C data. */
1137#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
f2421ca3 1138 /* code of remote controller */
1da177e4
LT		 1139#define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1140#define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1141#define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1142#define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1143#define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1144#define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1145#define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1146
1147/* ---------------------------------------------------------------------- */
1148/* audio chip descriptions - defines+functions for TA8874Z */
1149
18fc59e2 1150/* write 1st byte */
1da177e4
LT		 1151#define TA8874Z_LED_STE 0x80
1152#define TA8874Z_LED_BIL 0x40
1153#define TA8874Z_LED_EXT 0x20
1154#define TA8874Z_MONO_SET 0x10
1155#define TA8874Z_MUTE 0x08
1156#define TA8874Z_F_MONO 0x04
1157#define TA8874Z_MODE_SUB 0x02
1158#define TA8874Z_MODE_MAIN 0x01
1159
18fc59e2
MCC		 1160/* write 2nd byte */
1161/*#define TA8874Z_TI 0x80 */ /* test mode */
1da177e4
LT		 1162#define TA8874Z_SEPARATION 0x3f
1163#define TA8874Z_SEPARATION_DEFAULT 0x10
1164
18fc59e2 1165/* read */
1da177e4
LT		 1166#define TA8874Z_B1 0x80
1167#define TA8874Z_B0 0x40
1168#define TA8874Z_CHAG_FLAG 0x20
1169
18fc59e2
MCC		 1170/*
1171 * B1 B0
1172 * mono L H
1173 * stereo L L
1174 * BIL H L
1175 */
1da177e4
LT		 1176static int ta8874z_getmode(struct CHIPSTATE *chip)
1177{
1178 int val, mode;
1179
1180 val = chip_read(chip);
1181 mode = VIDEO_SOUND_MONO;
1182 if (val & TA8874Z_B1){
1183 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
1184 }else if (!(val & TA8874Z_B0)){
1185 mode |= VIDEO_SOUND_STEREO;
1186 }
fac9e899 1187 /* v4l_dbg(1, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1da177e4
LT		 1188 return mode;
1189}
1190
1191static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1192static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1193static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1194static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1195
1196static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1197{
1198 int update = 1;
1199 audiocmd *t = NULL;
fac9e899 1200 v4l_dbg(1, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1da177e4
LT		 1201
1202 switch(mode){
1203 case VIDEO_SOUND_MONO:
1204 t = &ta8874z_mono;
1205 break;
1206 case VIDEO_SOUND_STEREO:
1207 t = &ta8874z_stereo;
1208 break;
1209 case VIDEO_SOUND_LANG1:
1210 t = &ta8874z_main;
1211 break;
1212 case VIDEO_SOUND_LANG2:
1213 t = &ta8874z_sub;
1214 break;
1215 default:
1216 update = 0;
1217 }
1218
1219 if(update)
1220 chip_cmd(chip, "TA8874Z", t);
1221}
1222
1223static int ta8874z_checkit(struct CHIPSTATE *chip)
1224{
1225 int rc;
1226 rc = chip_read(chip);
1227 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1228}
1229
1230/* ---------------------------------------------------------------------- */
1231/* audio chip descriptions - struct CHIPDESC */
1232
1233/* insmod options to enable/disable individual audio chips */
52c1da39
AB		 1234static int tda8425 = 1;
1235static int tda9840 = 1;
1236static int tda9850 = 1;
1237static int tda9855 = 1;
1238static int tda9873 = 1;
1239static int tda9874a = 1;
18fc59e2
MCC		 1240static int tea6300 = 0; /* address clash with msp34xx */
1241static int tea6320 = 0; /* address clash with msp34xx */
52c1da39
AB		 1242static int tea6420 = 1;
1243static int pic16c54 = 1;
18fc59e2 1244static int ta8874z = 0; /* address clash with tda9840 */
1da177e4
LT		 1245
1246module_param(tda8425, int, 0444);
1247module_param(tda9840, int, 0444);
1248module_param(tda9850, int, 0444);
1249module_param(tda9855, int, 0444);
1250module_param(tda9873, int, 0444);
1251module_param(tda9874a, int, 0444);
1252module_param(tea6300, int, 0444);
1253module_param(tea6320, int, 0444);
1254module_param(tea6420, int, 0444);
1255module_param(pic16c54, int, 0444);
1256module_param(ta8874z, int, 0444);
1257
1258static struct CHIPDESC chiplist[] = {
1259 {
1260 .name = "tda9840",
1261 .id = I2C_DRIVERID_TDA9840,
1262 .insmodopt = &tda9840,
1263 .addr_lo = I2C_TDA9840 >> 1,
1264 .addr_hi = I2C_TDA9840 >> 1,
1265 .registers = 5,
1266
1267 .getmode = tda9840_getmode,
1268 .setmode = tda9840_setmode,
1269 .checkmode = generic_checkmode,
1270
4ac97914 1271 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1da177e4
LT		 1272 /* ,TDA9840_SW, TDA9840_MONO */} }
1273 },
1274 {
1275 .name = "tda9873h",
1276 .id = I2C_DRIVERID_TDA9873,
1277 .checkit = tda9873_checkit,
1278 .insmodopt = &tda9873,
1279 .addr_lo = I2C_TDA985x_L >> 1,
1280 .addr_hi = I2C_TDA985x_H >> 1,
1281 .registers = 3,
1282 .flags = CHIP_HAS_INPUTSEL,
1283
1284 .getmode = tda9873_getmode,
1285 .setmode = tda9873_setmode,
1286 .checkmode = generic_checkmode,
1287
1288 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1289 .inputreg = TDA9873_SW,
1290 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1291 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0, 0xc0},
1292 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1293
1294 },
1295 {
1296 .name = "tda9874h/a",
1297 .id = I2C_DRIVERID_TDA9874,
1298 .checkit = tda9874a_checkit,
1299 .initialize = tda9874a_initialize,
1300 .insmodopt = &tda9874a,
1301 .addr_lo = I2C_TDA9874 >> 1,
1302 .addr_hi = I2C_TDA9874 >> 1,
1303
1304 .getmode = tda9874a_getmode,
1305 .setmode = tda9874a_setmode,
1306 .checkmode = generic_checkmode,
1307 },
1308 {
1309 .name = "tda9850",
1310 .id = I2C_DRIVERID_TDA9850,
1311 .insmodopt = &tda9850,
1312 .addr_lo = I2C_TDA985x_L >> 1,
1313 .addr_hi = I2C_TDA985x_H >> 1,
1314 .registers = 11,
1315
1316 .getmode = tda985x_getmode,
1317 .setmode = tda985x_setmode,
1318
1319 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1320 },
1321 {
1322 .name = "tda9855",
1323 .id = I2C_DRIVERID_TDA9855,
1324 .insmodopt = &tda9855,
1325 .addr_lo = I2C_TDA985x_L >> 1,
1326 .addr_hi = I2C_TDA985x_H >> 1,
1327 .registers = 11,
1328 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1329
1330 .leftreg = TDA9855_VL,
1331 .rightreg = TDA9855_VR,
1332 .bassreg = TDA9855_BA,
1333 .treblereg = TDA9855_TR,
1334 .volfunc = tda9855_volume,
1335 .bassfunc = tda9855_bass,
1336 .treblefunc = tda9855_treble,
1337
1338 .getmode = tda985x_getmode,
1339 .setmode = tda985x_setmode,
1340
1341 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1342 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1343 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1344 0x07, 0x10, 0x10, 0x03 }}
1345 },
1346 {
1347 .name = "tea6300",
1348 .id = I2C_DRIVERID_TEA6300,
1349 .insmodopt = &tea6300,
1350 .addr_lo = I2C_TEA6300 >> 1,
1351 .addr_hi = I2C_TEA6300 >> 1,
1352 .registers = 6,
1353 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1354
1355 .leftreg = TEA6300_VR,
1356 .rightreg = TEA6300_VL,
1357 .bassreg = TEA6300_BA,
1358 .treblereg = TEA6300_TR,
1359 .volfunc = tea6300_shift10,
1360 .bassfunc = tea6300_shift12,
1361 .treblefunc = tea6300_shift12,
1362
1363 .inputreg = TEA6300_S,
1364 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1365 .inputmute = TEA6300_S_GMU,
1366 },
1367 {
1368 .name = "tea6320",
1369 .id = I2C_DRIVERID_TEA6300,
1370 .initialize = tea6320_initialize,
1371 .insmodopt = &tea6320,
1372 .addr_lo = I2C_TEA6300 >> 1,
1373 .addr_hi = I2C_TEA6300 >> 1,
1374 .registers = 8,
1375 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1376
1377 .leftreg = TEA6320_V,
1378 .rightreg = TEA6320_V,
1379 .bassreg = TEA6320_BA,
1380 .treblereg = TEA6320_TR,
1381 .volfunc = tea6320_volume,
1382 .bassfunc = tea6320_shift11,
1383 .treblefunc = tea6320_shift11,
1384
1385 .inputreg = TEA6320_S,
1386 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1387 .inputmute = TEA6300_S_GMU,
1388 },
1389 {
1390 .name = "tea6420",
1391 .id = I2C_DRIVERID_TEA6420,
1392 .insmodopt = &tea6420,
1393 .addr_lo = I2C_TEA6420 >> 1,
1394 .addr_hi = I2C_TEA6420 >> 1,
1395 .registers = 1,
1396 .flags = CHIP_HAS_INPUTSEL,
1397
1398 .inputreg = -1,
1399 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1400 .inputmute = TEA6300_S_GMU,
1401 },
1402 {
1403 .name = "tda8425",
1404 .id = I2C_DRIVERID_TDA8425,
1405 .insmodopt = &tda8425,
1406 .addr_lo = I2C_TDA8425 >> 1,
1407 .addr_hi = I2C_TDA8425 >> 1,
1408 .registers = 9,
1409 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1410
1411 .leftreg = TDA8425_VL,
1412 .rightreg = TDA8425_VR,
1413 .bassreg = TDA8425_BA,
1414 .treblereg = TDA8425_TR,
1415 .volfunc = tda8425_shift10,
1416 .bassfunc = tda8425_shift12,
1417 .treblefunc = tda8425_shift12,
1418
1419 .inputreg = TDA8425_S1,
1420 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1421 .inputmute = TDA8425_S1_OFF,
1422
1423 .setmode = tda8425_setmode,
1424 .initialize = tda8425_initialize,
1425 },
1426 {
1427 .name = "pic16c54 (PV951)",
e0ec29b7 1428 .id = I2C_DRIVERID_PIC16C54_PV9,
1da177e4
LT		 1429 .insmodopt = &pic16c54,
1430 .addr_lo = I2C_PIC16C54 >> 1,
1431 .addr_hi = I2C_PIC16C54>> 1,
1432 .registers = 2,
1433 .flags = CHIP_HAS_INPUTSEL,
1434
1435 .inputreg = PIC16C54_REG_MISC,
1436 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1437 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1438 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1439 PIC16C54_MISC_SND_MUTE,PIC16C54_MISC_SND_MUTE,
1440 PIC16C54_MISC_SND_NOTMUTE},
1441 .inputmute = PIC16C54_MISC_SND_MUTE,
1442 },
1443 {
1444 .name = "ta8874z",
1445 .id = -1,
18fc59e2 1446 /*.id = I2C_DRIVERID_TA8874Z, */
1da177e4
LT		 1447 .checkit = ta8874z_checkit,
1448 .insmodopt = &ta8874z,
1449 .addr_lo = I2C_TDA9840 >> 1,
1450 .addr_hi = I2C_TDA9840 >> 1,
1451 .registers = 2,
1452
1453 .getmode = ta8874z_getmode,
1454 .setmode = ta8874z_setmode,
1455 .checkmode = generic_checkmode,
1456
4ac97914 1457 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1da177e4
LT		 1458 },
1459 { .name = NULL } /* EOF */
1460};
1461
1462
1463/* ---------------------------------------------------------------------- */
1464/* i2c registration */
1465
1466static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
1467{
1468 struct CHIPSTATE *chip;
1469 struct CHIPDESC *desc;
1470
1471 chip = kmalloc(sizeof(*chip),GFP_KERNEL);
1472 if (!chip)
1473 return -ENOMEM;
1474 memset(chip,0,sizeof(*chip));
1475 memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
4ac97914
MCC		 1476 chip->c.adapter = adap;
1477 chip->c.addr = addr;
1da177e4
LT		 1478 i2c_set_clientdata(&chip->c, chip);
1479
1480 /* find description for the chip */
fac9e899 1481 v4l_dbg(1, &chip->c, "chip found @ 0x%x\n", addr<<1);
1da177e4
LT		 1482 for (desc = chiplist; desc->name != NULL; desc++) {
1483 if (0 == *(desc->insmodopt))
1484 continue;
1485 if (addr < desc->addr_lo ||
1486 addr > desc->addr_hi)
1487 continue;
1488 if (desc->checkit && !desc->checkit(chip))
1489 continue;
1490 break;
1491 }
1492 if (desc->name == NULL) {
fac9e899 1493 v4l_dbg(1, &chip->c, "no matching chip description found\n");
1da177e4
LT		 1494 return -EIO;
1495 }
fac9e899 1496 v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
afd1a0c9 1497 if (desc->flags) {
fac9e899 1498 v4l_dbg(1, &chip->c, "matches:%s%s%s.\n",
674434c6
MCC		 1499 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1500 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1501 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
afd1a0c9 1502 }
1da177e4
LT		 1503
1504 /* fill required data structures */
674434c6 1505 strcpy(chip->c.name, desc->name);
1da177e4
LT		 1506 chip->type = desc-chiplist;
1507 chip->shadow.count = desc->registers+1;
afd1a0c9 1508 chip->prevmode = -1;
1da177e4
LT		 1509 /* register */
1510 i2c_attach_client(&chip->c);
1511
1512 /* initialization */
1513 if (desc->initialize != NULL)
1514 desc->initialize(chip);
1515 else
1516 chip_cmd(chip,"init",&desc->init);
1517
1518 if (desc->flags & CHIP_HAS_VOLUME) {
1519 chip->left = desc->leftinit ? desc->leftinit : 65535;
1520 chip->right = desc->rightinit ? desc->rightinit : 65535;
1521 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1522 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1523 }
1524 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1525 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1526 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1527 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1528 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1529 }
1530
1531 chip->tpid = -1;
1532 if (desc->checkmode) {
1533 /* start async thread */
1534 init_timer(&chip->wt);
1535 chip->wt.function = chip_thread_wake;
1536 chip->wt.data = (unsigned long)chip;
1537 init_waitqueue_head(&chip->wq);
1538 init_completion(&chip->texit);
1539 chip->tpid = kernel_thread(chip_thread,(void *)chip,0);
1540 if (chip->tpid < 0)
fac9e899 1541 v4l_warn(&chip->c, "%s: kernel_thread() failed\n",
fae91e72 1542 chip->c.name);
1da177e4
LT		 1543 wake_up_interruptible(&chip->wq);
1544 }
1545 return 0;
1546}
1547
1548static int chip_probe(struct i2c_adapter *adap)
1549{
1550 /* don't attach on saa7146 based cards,
1551 because dedicated drivers are used */
18fc59e2 1552 if ((adap->id == I2C_HW_SAA7146))
1da177e4 1553 return 0;
1da177e4
LT		 1554 if (adap->class & I2C_CLASS_TV_ANALOG)
1555 return i2c_probe(adap, &addr_data, chip_attach);
1da177e4
LT		 1556 return 0;
1557}
1558
1559static int chip_detach(struct i2c_client *client)
1560{
1561 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1562
1563 del_timer_sync(&chip->wt);
1564 if (chip->tpid >= 0) {
1565 /* shutdown async thread */
1566 chip->done = 1;
1567 wake_up_interruptible(&chip->wq);
1568 wait_for_completion(&chip->texit);
1569 }
1570
1571 i2c_detach_client(&chip->c);
1572 kfree(chip);
1573 return 0;
1574}
1575
1576/* ---------------------------------------------------------------------- */
1577/* video4linux interface */
1578
1579static int chip_command(struct i2c_client *client,
1580 unsigned int cmd, void *arg)
1581{
18fc59e2 1582 __u16 *sarg = arg;
1da177e4
LT		 1583 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1584 struct CHIPDESC *desc = chiplist + chip->type;
1585
fac9e899 1586 v4l_dbg(1, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
1da177e4
LT		 1587
1588 switch (cmd) {
1589 case AUDC_SET_INPUT:
1590 if (desc->flags & CHIP_HAS_INPUTSEL) {
1591 if (*sarg & 0x80)
1592 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1593 else
1594 chip_write_masked(chip,desc->inputreg,desc->inputmap[*sarg],desc->inputmask);
1595 }
1596 break;
1597
1598 case AUDC_SET_RADIO:
8a854284 1599 chip->radio = 1;
1da177e4
LT		 1600 chip->watch_stereo = 0;
1601 /* del_timer(&chip->wt); */
1602 break;
1603
1604 /* --- v4l ioctls --- */
1605 /* take care: bttv does userspace copying, we'll get a
674434c6 1606 kernel pointer here... */
1da177e4
LT		 1607 case VIDIOCGAUDIO:
1608 {
1609 struct video_audio *va = arg;
1610
1611 if (desc->flags & CHIP_HAS_VOLUME) {
1612 va->flags |= VIDEO_AUDIO_VOLUME;
1613 va->volume = max(chip->left,chip->right);
1614 if (va->volume)
1615 va->balance = (32768*min(chip->left,chip->right))/
1616 va->volume;
1617 else
1618 va->balance = 32768;
1619 }
1620 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1621 va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
1622 va->bass = chip->bass;
1623 va->treble = chip->treble;
1624 }
8a854284 1625 if (!chip->radio) {
1da177e4
LT		 1626 if (desc->getmode)
1627 va->mode = desc->getmode(chip);
1628 else
1629 va->mode = VIDEO_SOUND_MONO;
1630 }
1631 break;
1632 }
1633
1634 case VIDIOCSAUDIO:
1635 {
1636 struct video_audio *va = arg;
1637
1638 if (desc->flags & CHIP_HAS_VOLUME) {
1639 chip->left = (min(65536 - va->balance,32768) *
18fc59e2 1640 va->volume) / 32768;
1da177e4 1641 chip->right = (min(va->balance,(__u16)32768) *
18fc59e2 1642 va->volume) / 32768;
1da177e4
LT		 1643 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1644 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1645 }
1646 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1647 chip->bass = va->bass;
1648 chip->treble = va->treble;
1649 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1650 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1651 }
1652 if (desc->setmode && va->mode) {
1653 chip->watch_stereo = 0;
1654 /* del_timer(&chip->wt); */
1655 chip->mode = va->mode;
1656 desc->setmode(chip,va->mode);
1657 }
1658 break;
1659 }
8a854284
HV		 1660
1661 case VIDIOC_S_TUNER:
1da177e4 1662 {
8a854284
HV		 1663 struct v4l2_tuner *vt = arg;
1664 int mode = 0;
1da177e4 1665
8a854284
HV		 1666 switch (vt->audmode) {
1667 case V4L2_TUNER_MODE_MONO:
1668 mode = VIDEO_SOUND_MONO;
1669 break;
1670 case V4L2_TUNER_MODE_STEREO:
1671 mode = VIDEO_SOUND_STEREO;
1672 break;
1673 case V4L2_TUNER_MODE_LANG1:
1674 mode = VIDEO_SOUND_LANG1;
1675 break;
1676 case V4L2_TUNER_MODE_LANG2:
1677 mode = VIDEO_SOUND_LANG2;
1678 break;
1679 default:
1680 break;
1681 }
1682
1683 if (desc->setmode && mode) {
1684 chip->watch_stereo = 0;
1685 /* del_timer(&chip->wt); */
1686 chip->mode = mode;
1687 desc->setmode(chip, mode);
1688 }
1da177e4
LT		 1689 break;
1690 }
8a854284
HV		 1691
1692 case VIDIOC_G_TUNER:
1da177e4 1693 {
8a854284
HV		 1694 struct v4l2_tuner *vt = arg;
1695 int mode = VIDEO_SOUND_MONO;
1696
d3900bc4
HV		 1697 if (chip->radio)
1698 break;
8a854284
HV		 1699 vt->audmode = 0;
1700 vt->rxsubchans = 0;
1701 vt->capability = V4L2_TUNER_CAP_STEREO |
1702 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
8a854284
HV		 1703
1704 if (desc->getmode)
1705 mode = desc->getmode(chip);
1706
1707 if (mode & VIDEO_SOUND_MONO)
1708 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1709 if (mode & VIDEO_SOUND_STEREO)
1710 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1711 if (mode & VIDEO_SOUND_LANG1)
1712 vt->rxsubchans |= V4L2_TUNER_SUB_LANG1 |
1713 V4L2_TUNER_SUB_LANG2;
1714
1715 mode = chip->mode;
1716 if (mode & VIDEO_SOUND_MONO)
1717 vt->audmode = V4L2_TUNER_MODE_MONO;
1718 if (mode & VIDEO_SOUND_STEREO)
1719 vt->audmode = V4L2_TUNER_MODE_STEREO;
1720 if (mode & VIDEO_SOUND_LANG1)
1721 vt->audmode = V4L2_TUNER_MODE_LANG1;
1722 if (mode & VIDEO_SOUND_LANG2)
1723 vt->audmode = V4L2_TUNER_MODE_LANG2;
1724 break;
1725 }
1726
1727 case VIDIOCSCHAN:
1728 case VIDIOC_S_STD:
1729 chip->radio = 0;
1730 break;
1731
1732 case VIDIOCSFREQ:
1733 case VIDIOC_S_FREQUENCY:
18fc59e2 1734 chip->mode = 0; /* automatic */
1da177e4
LT		 1735 if (desc->checkmode) {
1736 desc->setmode(chip,VIDEO_SOUND_MONO);
18fc59e2
MCC		 1737 if (chip->prevmode != VIDEO_SOUND_MONO)
1738 chip->prevmode = -1; /* reset previous mode */
1da177e4
LT		 1739 mod_timer(&chip->wt, jiffies+2*HZ);
1740 /* the thread will call checkmode() later */
1741 }
8a854284 1742 break;
1da177e4
LT		 1743 }
1744 return 0;
1745}
1746
1747
1748static struct i2c_driver driver = {
604f28e2 1749 .driver = {
604f28e2
LR		 1750 .name = "generic i2c audio driver",
1751 },
18fc59e2 1752 .id = I2C_DRIVERID_TVAUDIO,
18fc59e2
MCC		 1753 .attach_adapter = chip_probe,
1754 .detach_client = chip_detach,
1755 .command = chip_command,
1da177e4
LT		 1756};
1757
1758static struct i2c_client client_template =
1759{
fae91e72 1760 .name = "(unset)",
18fc59e2 1761 .driver = &driver,
1da177e4
LT		 1762};
1763
1764static int __init audiochip_init_module(void)
1765{
1766 struct CHIPDESC *desc;
18fc59e2
MCC		 1767
1768 if (debug) {
1769 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1770 printk(KERN_INFO "tvaudio: known chips: ");
1771 for (desc = chiplist; desc->name != NULL; desc++)
1772 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1773 printk("\n");
1774 }
1da177e4
LT		 1775
1776 return i2c_add_driver(&driver);
1777}
1778
1779static void __exit audiochip_cleanup_module(void)
1780{
1781 i2c_del_driver(&driver);
1782}
1783
1784module_init(audiochip_init_module);
1785module_exit(audiochip_cleanup_module);
1786
1787/*
1788 * Local variables:
1789 * c-basic-offset: 8
1790 * End:
1791 */
Linux kernel - Deliverables
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