V4L/DVB (3254): Don't reprogram the video standard if it is unchanged.
[deliverable/linux.git] / drivers / media / video / tvaudio.c
CommitLineData
1da177e4
LT
1/*
2 * experimental driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * This code is placed under the terms of the GNU General Public License
11 *
12 * OPTIONS:
13 * debug - set to 1 if you'd like to see debug messages
14 *
15 */
16
17#include <linux/config.h>
18#include <linux/module.h>
19#include <linux/moduleparam.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/string.h>
23#include <linux/timer.h>
24#include <linux/delay.h>
25#include <linux/errno.h>
26#include <linux/slab.h>
27#include <linux/videodev.h>
28#include <linux/i2c.h>
29#include <linux/i2c-algo-bit.h>
30#include <linux/init.h>
31#include <linux/smp_lock.h>
32
33#include <media/audiochip.h>
1da177e4
LT
34
35#include "tvaudio.h"
36
37/* ---------------------------------------------------------------------- */
38/* insmod args */
39
40static int debug = 0; /* insmod parameter */
41module_param(debug, int, 0644);
42
43MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
44MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
45MODULE_LICENSE("GPL");
46
47#define UNSET (-1U)
18fc59e2 48
8a854284
HV
49#define tvaudio_info(fmt, arg...) do { \
50 printk(KERN_INFO "%s %d-%04x: " fmt, chip->c.driver->name, \
51 i2c_adapter_id(chip->c.adapter), chip->c.addr , ## arg); } while (0)
52#define tvaudio_warn(fmt, arg...) do { \
53 printk(KERN_WARNING "%s %d-%04x: " fmt, chip->c.driver->name, \
54 i2c_adapter_id(chip->c.adapter), chip->c.addr , ## arg); } while (0)
55#define tvaudio_dbg(fmt, arg...) \
56 do { \
57 if (debug) \
58 printk(KERN_INFO "%s debug %d-%04x: " fmt, chip->c.driver->name, \
59 i2c_adapter_id(chip->c.adapter), chip->c.addr , ## arg); \
60 } while (0)
1da177e4
LT
61
62/* ---------------------------------------------------------------------- */
63/* our structs */
64
65#define MAXREGS 64
66
67struct CHIPSTATE;
68typedef int (*getvalue)(int);
69typedef int (*checkit)(struct CHIPSTATE*);
70typedef int (*initialize)(struct CHIPSTATE*);
71typedef int (*getmode)(struct CHIPSTATE*);
72typedef void (*setmode)(struct CHIPSTATE*, int mode);
73typedef void (*checkmode)(struct CHIPSTATE*);
74
75/* i2c command */
76typedef struct AUDIOCMD {
77 int count; /* # of bytes to send */
78 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
79} audiocmd;
80
81/* chip description */
82struct CHIPDESC {
83 char *name; /* chip name */
84 int id; /* ID */
85 int addr_lo, addr_hi; /* i2c address range */
86 int registers; /* # of registers */
87
88 int *insmodopt;
89 checkit checkit;
90 initialize initialize;
91 int flags;
92#define CHIP_HAS_VOLUME 1
93#define CHIP_HAS_BASSTREBLE 2
94#define CHIP_HAS_INPUTSEL 4
95
96 /* various i2c command sequences */
97 audiocmd init;
98
99 /* which register has which value */
100 int leftreg,rightreg,treblereg,bassreg;
101
102 /* initialize with (defaults to 65535/65535/32768/32768 */
103 int leftinit,rightinit,trebleinit,bassinit;
104
105 /* functions to convert the values (v4l -> chip) */
106 getvalue volfunc,treblefunc,bassfunc;
107
108 /* get/set mode */
109 getmode getmode;
110 setmode setmode;
111
112 /* check / autoswitch audio after channel switches */
113 checkmode checkmode;
114
115 /* input switch register + values for v4l inputs */
116 int inputreg;
117 int inputmap[8];
118 int inputmute;
119 int inputmask;
120};
121static struct CHIPDESC chiplist[];
122
123/* current state of the chip */
124struct CHIPSTATE {
125 struct i2c_client c;
126
127 /* index into CHIPDESC array */
128 int type;
129
130 /* shadow register set */
131 audiocmd shadow;
132
133 /* current settings */
134 __u16 left,right,treble,bass,mode;
135 int prevmode;
8a854284 136 int radio;
1da177e4
LT
137
138 /* thread */
139 pid_t tpid;
140 struct completion texit;
141 wait_queue_head_t wq;
142 struct timer_list wt;
143 int done;
144 int watch_stereo;
145};
146
1da177e4
LT
147/* ---------------------------------------------------------------------- */
148/* i2c addresses */
149
150static unsigned short normal_i2c[] = {
151 I2C_TDA8425 >> 1,
152 I2C_TEA6300 >> 1,
153 I2C_TEA6420 >> 1,
154 I2C_TDA9840 >> 1,
155 I2C_TDA985x_L >> 1,
156 I2C_TDA985x_H >> 1,
157 I2C_TDA9874 >> 1,
158 I2C_PIC16C54 >> 1,
159 I2C_CLIENT_END };
1da177e4
LT
160I2C_CLIENT_INSMOD;
161
162static struct i2c_driver driver;
163static struct i2c_client client_template;
164
165
166/* ---------------------------------------------------------------------- */
167/* i2c I/O functions */
168
169static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
170{
171 unsigned char buffer[2];
172
173 if (-1 == subaddr) {
18fc59e2
MCC
174 tvaudio_dbg("%s: chip_write: 0x%x\n",
175 chip->c.name, val);
1da177e4
LT
176 chip->shadow.bytes[1] = val;
177 buffer[0] = val;
178 if (1 != i2c_master_send(&chip->c,buffer,1)) {
18fc59e2
MCC
179 tvaudio_warn("%s: I/O error (write 0x%x)\n",
180 chip->c.name, val);
1da177e4
LT
181 return -1;
182 }
183 } else {
18fc59e2 184 tvaudio_dbg("%s: chip_write: reg%d=0x%x\n",
fae91e72 185 chip->c.name, subaddr, val);
1da177e4
LT
186 chip->shadow.bytes[subaddr+1] = val;
187 buffer[0] = subaddr;
188 buffer[1] = val;
189 if (2 != i2c_master_send(&chip->c,buffer,2)) {
18fc59e2 190 tvaudio_warn("%s: I/O error (write reg%d=0x%x)\n",
674434c6 191 chip->c.name, subaddr, val);
1da177e4
LT
192 return -1;
193 }
194 }
195 return 0;
196}
197
198static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
199{
200 if (mask != 0) {
201 if (-1 == subaddr) {
202 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
203 } else {
204 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
205 }
206 }
207 return chip_write(chip, subaddr, val);
208}
209
210static int chip_read(struct CHIPSTATE *chip)
211{
212 unsigned char buffer;
213
214 if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
18fc59e2
MCC
215 tvaudio_warn("%s: I/O error (read)\n",
216 chip->c.name);
1da177e4
LT
217 return -1;
218 }
674434c6 219 tvaudio_dbg("%s: chip_read: 0x%x\n",chip->c.name, buffer);
1da177e4
LT
220 return buffer;
221}
222
223static int chip_read2(struct CHIPSTATE *chip, int subaddr)
224{
18fc59e2
MCC
225 unsigned char write[1];
226 unsigned char read[1];
227 struct i2c_msg msgs[2] = {
228 { chip->c.addr, 0, 1, write },
229 { chip->c.addr, I2C_M_RD, 1, read }
230 };
231 write[0] = subaddr;
1da177e4
LT
232
233 if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
18fc59e2 234 tvaudio_warn("%s: I/O error (read2)\n", chip->c.name);
1da177e4
LT
235 return -1;
236 }
18fc59e2 237 tvaudio_dbg("%s: chip_read2: reg%d=0x%x\n",
674434c6 238 chip->c.name, subaddr,read[0]);
1da177e4
LT
239 return read[0];
240}
241
242static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
243{
244 int i;
245
246 if (0 == cmd->count)
247 return 0;
248
249 /* update our shadow register set; print bytes if (debug > 0) */
18fc59e2 250 tvaudio_dbg("%s: chip_cmd(%s): reg=%d, data:",
674434c6 251 chip->c.name, name,cmd->bytes[0]);
1da177e4 252 for (i = 1; i < cmd->count; i++) {
18fc59e2
MCC
253 if (debug)
254 printk(" 0x%x",cmd->bytes[i]);
1da177e4
LT
255 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
256 }
18fc59e2
MCC
257 if (debug)
258 printk("\n");
1da177e4
LT
259
260 /* send data to the chip */
261 if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
18fc59e2 262 tvaudio_warn("%s: I/O error (%s)\n", chip->c.name, name);
1da177e4
LT
263 return -1;
264 }
265 return 0;
266}
267
268/* ---------------------------------------------------------------------- */
269/* kernel thread for doing i2c stuff asyncronly
270 * right now it is used only to check the audio mode (mono/stereo/whatever)
271 * some time after switching to another TV channel, then turn on stereo
272 * if available, ...
273 */
274
275static void chip_thread_wake(unsigned long data)
276{
18fc59e2 277 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
1da177e4
LT
278 wake_up_interruptible(&chip->wq);
279}
280
281static int chip_thread(void *data)
282{
283 DECLARE_WAITQUEUE(wait, current);
18fc59e2 284 struct CHIPSTATE *chip = data;
1da177e4
LT
285 struct CHIPDESC *desc = chiplist + chip->type;
286
fae91e72 287 daemonize("%s", chip->c.name);
1da177e4 288 allow_signal(SIGTERM);
18fc59e2 289 tvaudio_dbg("%s: thread started\n", chip->c.name);
1da177e4
LT
290
291 for (;;) {
292 add_wait_queue(&chip->wq, &wait);
293 if (!chip->done) {
294 set_current_state(TASK_INTERRUPTIBLE);
295 schedule();
296 }
297 remove_wait_queue(&chip->wq, &wait);
5e50e7a9 298 try_to_freeze();
1da177e4
LT
299 if (chip->done || signal_pending(current))
300 break;
18fc59e2 301 tvaudio_dbg("%s: thread wakeup\n", chip->c.name);
1da177e4
LT
302
303 /* don't do anything for radio or if mode != auto */
8a854284 304 if (chip->radio || chip->mode != 0)
1da177e4
LT
305 continue;
306
307 /* have a look what's going on */
308 desc->checkmode(chip);
309
310 /* schedule next check */
311 mod_timer(&chip->wt, jiffies+2*HZ);
312 }
313
18fc59e2
MCC
314 tvaudio_dbg("%s: thread exiting\n", chip->c.name);
315 complete_and_exit(&chip->texit, 0);
1da177e4
LT
316 return 0;
317}
318
319static void generic_checkmode(struct CHIPSTATE *chip)
320{
321 struct CHIPDESC *desc = chiplist + chip->type;
322 int mode = desc->getmode(chip);
323
324 if (mode == chip->prevmode)
674434c6 325 return;
1da177e4 326
18fc59e2 327 tvaudio_dbg("%s: thread checkmode\n", chip->c.name);
1da177e4
LT
328 chip->prevmode = mode;
329
330 if (mode & VIDEO_SOUND_STEREO)
331 desc->setmode(chip,VIDEO_SOUND_STEREO);
332 else if (mode & VIDEO_SOUND_LANG1)
333 desc->setmode(chip,VIDEO_SOUND_LANG1);
334 else if (mode & VIDEO_SOUND_LANG2)
335 desc->setmode(chip,VIDEO_SOUND_LANG2);
336 else
337 desc->setmode(chip,VIDEO_SOUND_MONO);
338}
339
340/* ---------------------------------------------------------------------- */
341/* audio chip descriptions - defines+functions for tda9840 */
342
343#define TDA9840_SW 0x00
344#define TDA9840_LVADJ 0x02
345#define TDA9840_STADJ 0x03
346#define TDA9840_TEST 0x04
347
348#define TDA9840_MONO 0x10
349#define TDA9840_STEREO 0x2a
350#define TDA9840_DUALA 0x12
351#define TDA9840_DUALB 0x1e
352#define TDA9840_DUALAB 0x1a
353#define TDA9840_DUALBA 0x16
354#define TDA9840_EXTERNAL 0x7a
355
356#define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
357#define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
358#define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
359
360#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
361#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
362
363static int tda9840_getmode(struct CHIPSTATE *chip)
364{
365 int val, mode;
366
367 val = chip_read(chip);
368 mode = VIDEO_SOUND_MONO;
369 if (val & TDA9840_DS_DUAL)
370 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
371 if (val & TDA9840_ST_STEREO)
372 mode |= VIDEO_SOUND_STEREO;
373
18fc59e2
MCC
374 tvaudio_dbg ("tda9840_getmode(): raw chip read: %d, return: %d\n",
375 val, mode);
1da177e4
LT
376 return mode;
377}
378
379static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
380{
381 int update = 1;
382 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
383
384 switch (mode) {
385 case VIDEO_SOUND_MONO:
386 t |= TDA9840_MONO;
387 break;
388 case VIDEO_SOUND_STEREO:
389 t |= TDA9840_STEREO;
390 break;
391 case VIDEO_SOUND_LANG1:
392 t |= TDA9840_DUALA;
393 break;
394 case VIDEO_SOUND_LANG2:
395 t |= TDA9840_DUALB;
396 break;
397 default:
398 update = 0;
399 }
400
401 if (update)
402 chip_write(chip, TDA9840_SW, t);
403}
404
405/* ---------------------------------------------------------------------- */
406/* audio chip descriptions - defines+functions for tda985x */
407
408/* subaddresses for TDA9855 */
409#define TDA9855_VR 0x00 /* Volume, right */
410#define TDA9855_VL 0x01 /* Volume, left */
411#define TDA9855_BA 0x02 /* Bass */
412#define TDA9855_TR 0x03 /* Treble */
413#define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
414
415/* subaddresses for TDA9850 */
416#define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
417
418/* subaddesses for both chips */
419#define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
420#define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
421#define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
422#define TDA985x_A1 0x08 /* Alignment 1 for both chips */
423#define TDA985x_A2 0x09 /* Alignment 2 for both chips */
424#define TDA985x_A3 0x0a /* Alignment 3 for both chips */
425
426/* Masks for bits in TDA9855 subaddresses */
427/* 0x00 - VR in TDA9855 */
428/* 0x01 - VL in TDA9855 */
429/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
430 * in 1dB steps - mute is 0x27 */
431
432
433/* 0x02 - BA in TDA9855 */
434/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
435 * in .5dB steps - 0 is 0x0E */
436
437
438/* 0x03 - TR in TDA9855 */
439/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
440 * in 3dB steps - 0 is 0x7 */
441
442/* Masks for bits in both chips' subaddresses */
443/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
444/* Unique to TDA9855: */
445/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
446 * in 3dB steps - mute is 0x0 */
447
448/* Unique to TDA9850: */
449/* lower 4 bits control stereo noise threshold, over which stereo turns off
450 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
451
452
453/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
454/* Unique to TDA9855: */
455#define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
456#define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
457#define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
458#define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
459 /* Bits 0 to 3 select various combinations
4ac97914
MCC
460 * of line in and line out, only the
461 * interesting ones are defined */
1da177e4
LT
462#define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
463#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
464
465/* Unique to TDA9850: */
466/* lower 4 bits contol SAP noise threshold, over which SAP turns off
467 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
468
469
470/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
471/* Common to TDA9855 and TDA9850: */
472#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
473#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
474#define TDA985x_MONO 0 /* Forces Mono output */
475#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
476
477/* Unique to TDA9855: */
478#define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
479#define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
480#define TDA9855_LINEAR 0 /* Linear Stereo */
481#define TDA9855_PSEUDO 1 /* Pseudo Stereo */
482#define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
483#define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
484#define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
485
486/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
487/* Common to both TDA9855 and TDA9850: */
488/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
489 * in .5dB steps - 0dB is 0x7 */
490
491/* 0x08, 0x09 - A1 and A2 (read/write) */
492/* Common to both TDA9855 and TDA9850: */
493/* lower 5 bites are wideband and spectral expander alignment
494 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
495#define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
496#define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
497#define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
498
499/* 0x0a - A3 */
500/* Common to both TDA9855 and TDA9850: */
501/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
502 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
503#define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
504
505static int tda9855_volume(int val) { return val/0x2e8+0x27; }
506static int tda9855_bass(int val) { return val/0xccc+0x06; }
507static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
508
509static int tda985x_getmode(struct CHIPSTATE *chip)
510{
511 int mode;
512
513 mode = ((TDA985x_STP | TDA985x_SAPP) &
514 chip_read(chip)) >> 4;
515 /* Add mono mode regardless of SAP and stereo */
516 /* Allows forced mono */
517 return mode | VIDEO_SOUND_MONO;
518}
519
520static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
521{
522 int update = 1;
523 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
524
525 switch (mode) {
526 case VIDEO_SOUND_MONO:
527 c6 |= TDA985x_MONO;
528 break;
529 case VIDEO_SOUND_STEREO:
530 c6 |= TDA985x_STEREO;
531 break;
532 case VIDEO_SOUND_LANG1:
533 c6 |= TDA985x_SAP;
534 break;
535 default:
536 update = 0;
537 }
538 if (update)
539 chip_write(chip,TDA985x_C6,c6);
540}
541
542
543/* ---------------------------------------------------------------------- */
544/* audio chip descriptions - defines+functions for tda9873h */
545
546/* Subaddresses for TDA9873H */
547
548#define TDA9873_SW 0x00 /* Switching */
549#define TDA9873_AD 0x01 /* Adjust */
550#define TDA9873_PT 0x02 /* Port */
551
552/* Subaddress 0x00: Switching Data
553 * B7..B0:
554 *
555 * B1, B0: Input source selection
556 * 0, 0 internal
557 * 1, 0 external stereo
558 * 0, 1 external mono
559 */
560#define TDA9873_INP_MASK 3
561#define TDA9873_INTERNAL 0
562#define TDA9873_EXT_STEREO 2
563#define TDA9873_EXT_MONO 1
564
565/* B3, B2: output signal select
566 * B4 : transmission mode
567 * 0, 0, 1 Mono
568 * 1, 0, 0 Stereo
569 * 1, 1, 1 Stereo (reversed channel)
570 * 0, 0, 0 Dual AB
571 * 0, 0, 1 Dual AA
572 * 0, 1, 0 Dual BB
573 * 0, 1, 1 Dual BA
574 */
575
576#define TDA9873_TR_MASK (7 << 2)
577#define TDA9873_TR_MONO 4
578#define TDA9873_TR_STEREO 1 << 4
579#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
580#define TDA9873_TR_DUALA 1 << 2
581#define TDA9873_TR_DUALB 1 << 3
582
583/* output level controls
584 * B5: output level switch (0 = reduced gain, 1 = normal gain)
585 * B6: mute (1 = muted)
586 * B7: auto-mute (1 = auto-mute enabled)
587 */
588
589#define TDA9873_GAIN_NORMAL 1 << 5
590#define TDA9873_MUTE 1 << 6
591#define TDA9873_AUTOMUTE 1 << 7
592
593/* Subaddress 0x01: Adjust/standard */
594
595/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
596 * Recommended value is +0 dB
597 */
598
599#define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
600
601/* Bits C6..C4 control FM stantard
602 * C6, C5, C4
603 * 0, 0, 0 B/G (PAL FM)
604 * 0, 0, 1 M
605 * 0, 1, 0 D/K(1)
606 * 0, 1, 1 D/K(2)
607 * 1, 0, 0 D/K(3)
608 * 1, 0, 1 I
609 */
610#define TDA9873_BG 0
611#define TDA9873_M 1
612#define TDA9873_DK1 2
613#define TDA9873_DK2 3
614#define TDA9873_DK3 4
615#define TDA9873_I 5
616
617/* C7 controls identification response time (1=fast/0=normal)
618 */
619#define TDA9873_IDR_NORM 0
620#define TDA9873_IDR_FAST 1 << 7
621
622
623/* Subaddress 0x02: Port data */
624
625/* E1, E0 free programmable ports P1/P2
626 0, 0 both ports low
627 0, 1 P1 high
628 1, 0 P2 high
629 1, 1 both ports high
630*/
631
632#define TDA9873_PORTS 3
633
634/* E2: test port */
635#define TDA9873_TST_PORT 1 << 2
636
637/* E5..E3 control mono output channel (together with transmission mode bit B4)
638 *
639 * E5 E4 E3 B4 OUTM
640 * 0 0 0 0 mono
641 * 0 0 1 0 DUAL B
642 * 0 1 0 1 mono (from stereo decoder)
643 */
644#define TDA9873_MOUT_MONO 0
645#define TDA9873_MOUT_FMONO 0
646#define TDA9873_MOUT_DUALA 0
647#define TDA9873_MOUT_DUALB 1 << 3
648#define TDA9873_MOUT_ST 1 << 4
649#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
650#define TDA9873_MOUT_EXTL 1 << 5
651#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
652#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
653#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
654
655/* Status bits: (chip read) */
656#define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
657#define TDA9873_STEREO 2 /* Stereo sound is identified */
658#define TDA9873_DUAL 4 /* Dual sound is identified */
659
660static int tda9873_getmode(struct CHIPSTATE *chip)
661{
662 int val,mode;
663
664 val = chip_read(chip);
665 mode = VIDEO_SOUND_MONO;
666 if (val & TDA9873_STEREO)
667 mode |= VIDEO_SOUND_STEREO;
668 if (val & TDA9873_DUAL)
669 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
18fc59e2
MCC
670 tvaudio_dbg ("tda9873_getmode(): raw chip read: %d, return: %d\n",
671 val, mode);
1da177e4
LT
672 return mode;
673}
674
675static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
676{
677 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
678 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
679
680 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
18fc59e2 681 tvaudio_dbg("tda9873_setmode(): external input\n");
1da177e4
LT
682 return;
683 }
684
18fc59e2
MCC
685 tvaudio_dbg("tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
686 tvaudio_dbg("tda9873_setmode(): sw_data = %d\n", sw_data);
1da177e4
LT
687
688 switch (mode) {
689 case VIDEO_SOUND_MONO:
690 sw_data |= TDA9873_TR_MONO;
691 break;
692 case VIDEO_SOUND_STEREO:
693 sw_data |= TDA9873_TR_STEREO;
694 break;
695 case VIDEO_SOUND_LANG1:
696 sw_data |= TDA9873_TR_DUALA;
697 break;
698 case VIDEO_SOUND_LANG2:
699 sw_data |= TDA9873_TR_DUALB;
700 break;
701 default:
702 chip->mode = 0;
703 return;
704 }
705
706 chip_write(chip, TDA9873_SW, sw_data);
18fc59e2 707 tvaudio_dbg("tda9873_setmode(): req. mode %d; chip_write: %d\n",
1da177e4
LT
708 mode, sw_data);
709}
710
711static int tda9873_checkit(struct CHIPSTATE *chip)
712{
713 int rc;
714
715 if (-1 == (rc = chip_read2(chip,254)))
716 return 0;
717 return (rc & ~0x1f) == 0x80;
718}
719
720
721/* ---------------------------------------------------------------------- */
722/* audio chip description - defines+functions for tda9874h and tda9874a */
723/* Dariusz Kowalewski <darekk@automex.pl> */
724
725/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
726#define TDA9874A_AGCGR 0x00 /* AGC gain */
727#define TDA9874A_GCONR 0x01 /* general config */
728#define TDA9874A_MSR 0x02 /* monitor select */
729#define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
730#define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
731#define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
732#define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
733#define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
734#define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
735#define TDA9874A_DCR 0x09 /* demodulator config */
736#define TDA9874A_FMER 0x0a /* FM de-emphasis */
737#define TDA9874A_FMMR 0x0b /* FM dematrix */
738#define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
739#define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
740#define TDA9874A_NCONR 0x0e /* NICAM config */
741#define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
742#define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
743#define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
744#define TDA9874A_AMCONR 0x12 /* audio mute control */
745#define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
746#define TDA9874A_AOSR 0x14 /* analog output select */
747#define TDA9874A_DAICONR 0x15 /* digital audio interface config */
748#define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
749#define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
750#define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
751#define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
752
753/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
754#define TDA9874A_DSR 0x00 /* device status */
755#define TDA9874A_NSR 0x01 /* NICAM status */
756#define TDA9874A_NECR 0x02 /* NICAM error count */
757#define TDA9874A_DR1 0x03 /* add. data LSB */
758#define TDA9874A_DR2 0x04 /* add. data MSB */
759#define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
760#define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
761#define TDA9874A_SIFLR 0x07 /* SIF level */
762#define TDA9874A_TR2 252 /* test reg. 2 */
763#define TDA9874A_TR1 253 /* test reg. 1 */
764#define TDA9874A_DIC 254 /* device id. code */
765#define TDA9874A_SIC 255 /* software id. code */
766
767
768static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
769static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
770static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
771static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
772static int tda9874a_dic = -1; /* device id. code */
773
774/* insmod options for tda9874a */
775static unsigned int tda9874a_SIF = UNSET;
776static unsigned int tda9874a_AMSEL = UNSET;
777static unsigned int tda9874a_STD = UNSET;
778module_param(tda9874a_SIF, int, 0444);
779module_param(tda9874a_AMSEL, int, 0444);
780module_param(tda9874a_STD, int, 0444);
781
782/*
783 * initialization table for tda9874 decoder:
784 * - carrier 1 freq. registers (3 bytes)
785 * - carrier 2 freq. registers (3 bytes)
786 * - demudulator config register
787 * - FM de-emphasis register (slow identification mode)
788 * Note: frequency registers must be written in single i2c transfer.
789 */
790static struct tda9874a_MODES {
791 char *name;
792 audiocmd cmd;
793} tda9874a_modelist[9] = {
794 { "A2, B/G",
795 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
796 { "A2, M (Korea)",
797 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
798 { "A2, D/K (1)",
799 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
800 { "A2, D/K (2)",
801 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
802 { "A2, D/K (3)",
803 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
804 { "NICAM, I",
805 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
806 { "NICAM, B/G",
807 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
808 { "NICAM, D/K", /* default */
809 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
810 { "NICAM, L",
811 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
812};
813
814static int tda9874a_setup(struct CHIPSTATE *chip)
815{
816 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
817 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
818 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
819 if(tda9874a_dic == 0x11) {
820 chip_write(chip, TDA9874A_FMMR, 0x80);
821 } else { /* dic == 0x07 */
822 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
823 chip_write(chip, TDA9874A_FMMR, 0x00);
824 }
825 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
826 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
827 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
828 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
829 /* Note: If signal quality is poor you may want to change NICAM */
830 /* error limit registers (NLELR and NUELR) to some greater values. */
831 /* Then the sound would remain stereo, but won't be so clear. */
832 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
833 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
834
835 if(tda9874a_dic == 0x11) {
836 chip_write(chip, TDA9874A_AMCONR, 0xf9);
837 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
838 chip_write(chip, TDA9874A_AOSR, 0x80);
839 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
840 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
841 } else { /* dic == 0x07 */
842 chip_write(chip, TDA9874A_AMCONR, 0xfb);
843 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
18fc59e2 844 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1da177e4 845 }
18fc59e2 846 tvaudio_dbg("tda9874a_setup(): %s [0x%02X].\n",
1da177e4
LT
847 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
848 return 1;
849}
850
851static int tda9874a_getmode(struct CHIPSTATE *chip)
852{
853 int dsr,nsr,mode;
854 int necr; /* just for debugging */
855
856 mode = VIDEO_SOUND_MONO;
857
858 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
859 return mode;
860 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
861 return mode;
862 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
863 return mode;
864
865 /* need to store dsr/nsr somewhere */
866 chip->shadow.bytes[MAXREGS-2] = dsr;
867 chip->shadow.bytes[MAXREGS-1] = nsr;
868
869 if(tda9874a_mode) {
870 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
871 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
872 * that sound has (temporarily) switched from NICAM to
873 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
874 * error count. So in fact there is no stereo in this case :-(
875 * But changing the mode to VIDEO_SOUND_MONO would switch
876 * external 4052 multiplexer in audio_hook().
877 */
1da177e4
LT
878 if(nsr & 0x02) /* NSR.S/MB=1 */
879 mode |= VIDEO_SOUND_STEREO;
1da177e4
LT
880 if(nsr & 0x01) /* NSR.D/SB=1 */
881 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
882 } else {
883 if(dsr & 0x02) /* DSR.IDSTE=1 */
884 mode |= VIDEO_SOUND_STEREO;
885 if(dsr & 0x04) /* DSR.IDDUA=1 */
886 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
887 }
888
18fc59e2 889 tvaudio_dbg("tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
1da177e4
LT
890 dsr, nsr, necr, mode);
891 return mode;
892}
893
894static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
895{
896 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
897 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
898 if(tda9874a_mode) {
899 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
900 tda9874a_NCONR &= 0xfe; /* enable */
901 else
902 tda9874a_NCONR |= 0x01; /* disable */
903 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
904 }
905
906 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
907 * and has auto-select function for audio output (AOSR register).
908 * Old TDA9874H doesn't support these features.
909 * TDA9874A also has additional mono output pin (OUTM), which
910 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
911 */
912 if(tda9874a_dic == 0x11) {
913 int aosr = 0x80;
914 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
915
916 switch(mode) {
917 case VIDEO_SOUND_MONO:
918 case VIDEO_SOUND_STEREO:
919 break;
920 case VIDEO_SOUND_LANG1:
921 aosr = 0x80; /* auto-select, dual A/A */
922 mdacosr = (tda9874a_mode) ? 0x82:0x80;
923 break;
924 case VIDEO_SOUND_LANG2:
925 aosr = 0xa0; /* auto-select, dual B/B */
926 mdacosr = (tda9874a_mode) ? 0x83:0x81;
927 break;
928 default:
929 chip->mode = 0;
930 return;
931 }
932 chip_write(chip, TDA9874A_AOSR, aosr);
933 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
934
18fc59e2 935 tvaudio_dbg("tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1da177e4
LT
936 mode, aosr, mdacosr);
937
938 } else { /* dic == 0x07 */
939 int fmmr,aosr;
940
941 switch(mode) {
942 case VIDEO_SOUND_MONO:
943 fmmr = 0x00; /* mono */
944 aosr = 0x10; /* A/A */
945 break;
946 case VIDEO_SOUND_STEREO:
947 if(tda9874a_mode) {
948 fmmr = 0x00;
949 aosr = 0x00; /* handled by NICAM auto-mute */
950 } else {
951 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
952 aosr = 0x00;
953 }
954 break;
955 case VIDEO_SOUND_LANG1:
956 fmmr = 0x02; /* dual */
957 aosr = 0x10; /* dual A/A */
958 break;
959 case VIDEO_SOUND_LANG2:
960 fmmr = 0x02; /* dual */
961 aosr = 0x20; /* dual B/B */
962 break;
963 default:
964 chip->mode = 0;
965 return;
966 }
967 chip_write(chip, TDA9874A_FMMR, fmmr);
968 chip_write(chip, TDA9874A_AOSR, aosr);
969
18fc59e2 970 tvaudio_dbg("tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1da177e4
LT
971 mode, fmmr, aosr);
972 }
973}
974
975static int tda9874a_checkit(struct CHIPSTATE *chip)
976{
977 int dic,sic; /* device id. and software id. codes */
978
979 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
980 return 0;
981 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
982 return 0;
983
18fc59e2 984 tvaudio_dbg("tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1da177e4
LT
985
986 if((dic == 0x11)||(dic == 0x07)) {
18fc59e2 987 tvaudio_info("found tda9874%s.\n", (dic == 0x11) ? "a":"h");
1da177e4
LT
988 tda9874a_dic = dic; /* remember device id. */
989 return 1;
990 }
991 return 0; /* not found */
992}
993
994static int tda9874a_initialize(struct CHIPSTATE *chip)
995{
996 if (tda9874a_SIF > 2)
997 tda9874a_SIF = 1;
faf8b249 998 if (tda9874a_STD > 8)
1da177e4
LT
999 tda9874a_STD = 0;
1000 if(tda9874a_AMSEL > 1)
1001 tda9874a_AMSEL = 0;
1002
1003 if(tda9874a_SIF == 1)
1004 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1005 else
1006 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1007
1008 tda9874a_ESP = tda9874a_STD;
1009 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1010
1011 if(tda9874a_AMSEL == 0)
1012 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1013 else
1014 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1015
1016 tda9874a_setup(chip);
1017 return 0;
1018}
1019
1020
1021/* ---------------------------------------------------------------------- */
1022/* audio chip descriptions - defines+functions for tea6420 */
1023
1024#define TEA6300_VL 0x00 /* volume left */
1025#define TEA6300_VR 0x01 /* volume right */
1026#define TEA6300_BA 0x02 /* bass */
1027#define TEA6300_TR 0x03 /* treble */
1028#define TEA6300_FA 0x04 /* fader control */
1029#define TEA6300_S 0x05 /* switch register */
f2421ca3 1030 /* values for those registers: */
1da177e4
LT
1031#define TEA6300_S_SA 0x01 /* stereo A input */
1032#define TEA6300_S_SB 0x02 /* stereo B */
1033#define TEA6300_S_SC 0x04 /* stereo C */
1034#define TEA6300_S_GMU 0x80 /* general mute */
1035
1036#define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1037#define TEA6320_FFR 0x01 /* fader front right (0-5) */
1038#define TEA6320_FFL 0x02 /* fader front left (0-5) */
1039#define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1040#define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1041#define TEA6320_BA 0x05 /* bass (0-4) */
1042#define TEA6320_TR 0x06 /* treble (0-4) */
1043#define TEA6320_S 0x07 /* switch register */
f2421ca3 1044 /* values for those registers: */
1da177e4
LT
1045#define TEA6320_S_SA 0x07 /* stereo A input */
1046#define TEA6320_S_SB 0x06 /* stereo B */
1047#define TEA6320_S_SC 0x05 /* stereo C */
1048#define TEA6320_S_SD 0x04 /* stereo D */
1049#define TEA6320_S_GMU 0x80 /* general mute */
1050
1051#define TEA6420_S_SA 0x00 /* stereo A input */
1052#define TEA6420_S_SB 0x01 /* stereo B */
1053#define TEA6420_S_SC 0x02 /* stereo C */
1054#define TEA6420_S_SD 0x03 /* stereo D */
1055#define TEA6420_S_SE 0x04 /* stereo E */
1056#define TEA6420_S_GMU 0x05 /* general mute */
1057
1058static int tea6300_shift10(int val) { return val >> 10; }
1059static int tea6300_shift12(int val) { return val >> 12; }
1060
1061/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1062/* 0x0c mirror those immediately higher) */
1063static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1064static int tea6320_shift11(int val) { return val >> 11; }
1065static int tea6320_initialize(struct CHIPSTATE * chip)
1066{
1067 chip_write(chip, TEA6320_FFR, 0x3f);
1068 chip_write(chip, TEA6320_FFL, 0x3f);
1069 chip_write(chip, TEA6320_FRR, 0x3f);
1070 chip_write(chip, TEA6320_FRL, 0x3f);
1071
1072 return 0;
1073}
1074
1075
1076/* ---------------------------------------------------------------------- */
1077/* audio chip descriptions - defines+functions for tda8425 */
1078
1079#define TDA8425_VL 0x00 /* volume left */
1080#define TDA8425_VR 0x01 /* volume right */
1081#define TDA8425_BA 0x02 /* bass */
1082#define TDA8425_TR 0x03 /* treble */
1083#define TDA8425_S1 0x08 /* switch functions */
f2421ca3 1084 /* values for those registers: */
1da177e4
LT
1085#define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1086#define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1087#define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1088#define TDA8425_S1_MU 0x20 /* mute bit */
1089#define TDA8425_S1_STEREO 0x18 /* stereo bits */
1090#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1091#define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1092#define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1093#define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1094#define TDA8425_S1_ML 0x06 /* language selector */
1095#define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1096#define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1097#define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1098#define TDA8425_S1_IS 0x01 /* channel selector */
1099
1100
1101static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1102static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1103
1104static int tda8425_initialize(struct CHIPSTATE *chip)
1105{
1106 struct CHIPDESC *desc = chiplist + chip->type;
1107 int inputmap[8] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1108 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF,
1109 /* off */ TDA8425_S1_OFF, /* on */ TDA8425_S1_CH2};
1110
c7a46533 1111 if (chip->c.adapter->id == I2C_HW_B_RIVA) {
1da177e4
LT
1112 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1113 }
1114 return 0;
1115}
1116
1117static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1118{
1119 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1120
1121 if (mode & VIDEO_SOUND_LANG1) {
1122 s1 |= TDA8425_S1_ML_SOUND_A;
1123 s1 |= TDA8425_S1_STEREO_PSEUDO;
1124
1125 } else if (mode & VIDEO_SOUND_LANG2) {
1126 s1 |= TDA8425_S1_ML_SOUND_B;
1127 s1 |= TDA8425_S1_STEREO_PSEUDO;
1128
1129 } else {
1130 s1 |= TDA8425_S1_ML_STEREO;
1131
1132 if (mode & VIDEO_SOUND_MONO)
1133 s1 |= TDA8425_S1_STEREO_MONO;
1134 if (mode & VIDEO_SOUND_STEREO)
1135 s1 |= TDA8425_S1_STEREO_SPATIAL;
1136 }
1137 chip_write(chip,TDA8425_S1,s1);
1138}
1139
1140
1141/* ---------------------------------------------------------------------- */
1142/* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1143
1144/* the registers of 16C54, I2C sub address. */
1145#define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1146#define PIC16C54_REG_MISC 0x02
1147
1148/* bit definition of the RESET register, I2C data. */
1149#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
f2421ca3 1150 /* code of remote controller */
1da177e4
LT
1151#define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1152#define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1153#define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1154#define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1155#define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1156#define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1157#define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1158
1159/* ---------------------------------------------------------------------- */
1160/* audio chip descriptions - defines+functions for TA8874Z */
1161
18fc59e2 1162/* write 1st byte */
1da177e4
LT
1163#define TA8874Z_LED_STE 0x80
1164#define TA8874Z_LED_BIL 0x40
1165#define TA8874Z_LED_EXT 0x20
1166#define TA8874Z_MONO_SET 0x10
1167#define TA8874Z_MUTE 0x08
1168#define TA8874Z_F_MONO 0x04
1169#define TA8874Z_MODE_SUB 0x02
1170#define TA8874Z_MODE_MAIN 0x01
1171
18fc59e2
MCC
1172/* write 2nd byte */
1173/*#define TA8874Z_TI 0x80 */ /* test mode */
1da177e4
LT
1174#define TA8874Z_SEPARATION 0x3f
1175#define TA8874Z_SEPARATION_DEFAULT 0x10
1176
18fc59e2 1177/* read */
1da177e4
LT
1178#define TA8874Z_B1 0x80
1179#define TA8874Z_B0 0x40
1180#define TA8874Z_CHAG_FLAG 0x20
1181
18fc59e2
MCC
1182/*
1183 * B1 B0
1184 * mono L H
1185 * stereo L L
1186 * BIL H L
1187 */
1da177e4
LT
1188static int ta8874z_getmode(struct CHIPSTATE *chip)
1189{
1190 int val, mode;
1191
1192 val = chip_read(chip);
1193 mode = VIDEO_SOUND_MONO;
1194 if (val & TA8874Z_B1){
1195 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
1196 }else if (!(val & TA8874Z_B0)){
1197 mode |= VIDEO_SOUND_STEREO;
1198 }
18fc59e2 1199 /* tvaudio_dbg ("ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1da177e4
LT
1200 return mode;
1201}
1202
1203static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1204static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1205static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1206static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1207
1208static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1209{
1210 int update = 1;
1211 audiocmd *t = NULL;
18fc59e2 1212 tvaudio_dbg("ta8874z_setmode(): mode: 0x%02x\n", mode);
1da177e4
LT
1213
1214 switch(mode){
1215 case VIDEO_SOUND_MONO:
1216 t = &ta8874z_mono;
1217 break;
1218 case VIDEO_SOUND_STEREO:
1219 t = &ta8874z_stereo;
1220 break;
1221 case VIDEO_SOUND_LANG1:
1222 t = &ta8874z_main;
1223 break;
1224 case VIDEO_SOUND_LANG2:
1225 t = &ta8874z_sub;
1226 break;
1227 default:
1228 update = 0;
1229 }
1230
1231 if(update)
1232 chip_cmd(chip, "TA8874Z", t);
1233}
1234
1235static int ta8874z_checkit(struct CHIPSTATE *chip)
1236{
1237 int rc;
1238 rc = chip_read(chip);
1239 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1240}
1241
1242/* ---------------------------------------------------------------------- */
1243/* audio chip descriptions - struct CHIPDESC */
1244
1245/* insmod options to enable/disable individual audio chips */
52c1da39
AB
1246static int tda8425 = 1;
1247static int tda9840 = 1;
1248static int tda9850 = 1;
1249static int tda9855 = 1;
1250static int tda9873 = 1;
1251static int tda9874a = 1;
18fc59e2
MCC
1252static int tea6300 = 0; /* address clash with msp34xx */
1253static int tea6320 = 0; /* address clash with msp34xx */
52c1da39
AB
1254static int tea6420 = 1;
1255static int pic16c54 = 1;
18fc59e2 1256static int ta8874z = 0; /* address clash with tda9840 */
1da177e4
LT
1257
1258module_param(tda8425, int, 0444);
1259module_param(tda9840, int, 0444);
1260module_param(tda9850, int, 0444);
1261module_param(tda9855, int, 0444);
1262module_param(tda9873, int, 0444);
1263module_param(tda9874a, int, 0444);
1264module_param(tea6300, int, 0444);
1265module_param(tea6320, int, 0444);
1266module_param(tea6420, int, 0444);
1267module_param(pic16c54, int, 0444);
1268module_param(ta8874z, int, 0444);
1269
1270static struct CHIPDESC chiplist[] = {
1271 {
1272 .name = "tda9840",
1273 .id = I2C_DRIVERID_TDA9840,
1274 .insmodopt = &tda9840,
1275 .addr_lo = I2C_TDA9840 >> 1,
1276 .addr_hi = I2C_TDA9840 >> 1,
1277 .registers = 5,
1278
1279 .getmode = tda9840_getmode,
1280 .setmode = tda9840_setmode,
1281 .checkmode = generic_checkmode,
1282
4ac97914 1283 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1da177e4
LT
1284 /* ,TDA9840_SW, TDA9840_MONO */} }
1285 },
1286 {
1287 .name = "tda9873h",
1288 .id = I2C_DRIVERID_TDA9873,
1289 .checkit = tda9873_checkit,
1290 .insmodopt = &tda9873,
1291 .addr_lo = I2C_TDA985x_L >> 1,
1292 .addr_hi = I2C_TDA985x_H >> 1,
1293 .registers = 3,
1294 .flags = CHIP_HAS_INPUTSEL,
1295
1296 .getmode = tda9873_getmode,
1297 .setmode = tda9873_setmode,
1298 .checkmode = generic_checkmode,
1299
1300 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1301 .inputreg = TDA9873_SW,
1302 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1303 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0, 0xc0},
1304 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1305
1306 },
1307 {
1308 .name = "tda9874h/a",
1309 .id = I2C_DRIVERID_TDA9874,
1310 .checkit = tda9874a_checkit,
1311 .initialize = tda9874a_initialize,
1312 .insmodopt = &tda9874a,
1313 .addr_lo = I2C_TDA9874 >> 1,
1314 .addr_hi = I2C_TDA9874 >> 1,
1315
1316 .getmode = tda9874a_getmode,
1317 .setmode = tda9874a_setmode,
1318 .checkmode = generic_checkmode,
1319 },
1320 {
1321 .name = "tda9850",
1322 .id = I2C_DRIVERID_TDA9850,
1323 .insmodopt = &tda9850,
1324 .addr_lo = I2C_TDA985x_L >> 1,
1325 .addr_hi = I2C_TDA985x_H >> 1,
1326 .registers = 11,
1327
1328 .getmode = tda985x_getmode,
1329 .setmode = tda985x_setmode,
1330
1331 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1332 },
1333 {
1334 .name = "tda9855",
1335 .id = I2C_DRIVERID_TDA9855,
1336 .insmodopt = &tda9855,
1337 .addr_lo = I2C_TDA985x_L >> 1,
1338 .addr_hi = I2C_TDA985x_H >> 1,
1339 .registers = 11,
1340 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1341
1342 .leftreg = TDA9855_VL,
1343 .rightreg = TDA9855_VR,
1344 .bassreg = TDA9855_BA,
1345 .treblereg = TDA9855_TR,
1346 .volfunc = tda9855_volume,
1347 .bassfunc = tda9855_bass,
1348 .treblefunc = tda9855_treble,
1349
1350 .getmode = tda985x_getmode,
1351 .setmode = tda985x_setmode,
1352
1353 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1354 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1355 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1356 0x07, 0x10, 0x10, 0x03 }}
1357 },
1358 {
1359 .name = "tea6300",
1360 .id = I2C_DRIVERID_TEA6300,
1361 .insmodopt = &tea6300,
1362 .addr_lo = I2C_TEA6300 >> 1,
1363 .addr_hi = I2C_TEA6300 >> 1,
1364 .registers = 6,
1365 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1366
1367 .leftreg = TEA6300_VR,
1368 .rightreg = TEA6300_VL,
1369 .bassreg = TEA6300_BA,
1370 .treblereg = TEA6300_TR,
1371 .volfunc = tea6300_shift10,
1372 .bassfunc = tea6300_shift12,
1373 .treblefunc = tea6300_shift12,
1374
1375 .inputreg = TEA6300_S,
1376 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1377 .inputmute = TEA6300_S_GMU,
1378 },
1379 {
1380 .name = "tea6320",
1381 .id = I2C_DRIVERID_TEA6300,
1382 .initialize = tea6320_initialize,
1383 .insmodopt = &tea6320,
1384 .addr_lo = I2C_TEA6300 >> 1,
1385 .addr_hi = I2C_TEA6300 >> 1,
1386 .registers = 8,
1387 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1388
1389 .leftreg = TEA6320_V,
1390 .rightreg = TEA6320_V,
1391 .bassreg = TEA6320_BA,
1392 .treblereg = TEA6320_TR,
1393 .volfunc = tea6320_volume,
1394 .bassfunc = tea6320_shift11,
1395 .treblefunc = tea6320_shift11,
1396
1397 .inputreg = TEA6320_S,
1398 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1399 .inputmute = TEA6300_S_GMU,
1400 },
1401 {
1402 .name = "tea6420",
1403 .id = I2C_DRIVERID_TEA6420,
1404 .insmodopt = &tea6420,
1405 .addr_lo = I2C_TEA6420 >> 1,
1406 .addr_hi = I2C_TEA6420 >> 1,
1407 .registers = 1,
1408 .flags = CHIP_HAS_INPUTSEL,
1409
1410 .inputreg = -1,
1411 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1412 .inputmute = TEA6300_S_GMU,
1413 },
1414 {
1415 .name = "tda8425",
1416 .id = I2C_DRIVERID_TDA8425,
1417 .insmodopt = &tda8425,
1418 .addr_lo = I2C_TDA8425 >> 1,
1419 .addr_hi = I2C_TDA8425 >> 1,
1420 .registers = 9,
1421 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1422
1423 .leftreg = TDA8425_VL,
1424 .rightreg = TDA8425_VR,
1425 .bassreg = TDA8425_BA,
1426 .treblereg = TDA8425_TR,
1427 .volfunc = tda8425_shift10,
1428 .bassfunc = tda8425_shift12,
1429 .treblefunc = tda8425_shift12,
1430
1431 .inputreg = TDA8425_S1,
1432 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1433 .inputmute = TDA8425_S1_OFF,
1434
1435 .setmode = tda8425_setmode,
1436 .initialize = tda8425_initialize,
1437 },
1438 {
1439 .name = "pic16c54 (PV951)",
e0ec29b7 1440 .id = I2C_DRIVERID_PIC16C54_PV9,
1da177e4
LT
1441 .insmodopt = &pic16c54,
1442 .addr_lo = I2C_PIC16C54 >> 1,
1443 .addr_hi = I2C_PIC16C54>> 1,
1444 .registers = 2,
1445 .flags = CHIP_HAS_INPUTSEL,
1446
1447 .inputreg = PIC16C54_REG_MISC,
1448 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1449 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1450 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1451 PIC16C54_MISC_SND_MUTE,PIC16C54_MISC_SND_MUTE,
1452 PIC16C54_MISC_SND_NOTMUTE},
1453 .inputmute = PIC16C54_MISC_SND_MUTE,
1454 },
1455 {
1456 .name = "ta8874z",
1457 .id = -1,
18fc59e2 1458 /*.id = I2C_DRIVERID_TA8874Z, */
1da177e4
LT
1459 .checkit = ta8874z_checkit,
1460 .insmodopt = &ta8874z,
1461 .addr_lo = I2C_TDA9840 >> 1,
1462 .addr_hi = I2C_TDA9840 >> 1,
1463 .registers = 2,
1464
1465 .getmode = ta8874z_getmode,
1466 .setmode = ta8874z_setmode,
1467 .checkmode = generic_checkmode,
1468
4ac97914 1469 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1da177e4
LT
1470 },
1471 { .name = NULL } /* EOF */
1472};
1473
1474
1475/* ---------------------------------------------------------------------- */
1476/* i2c registration */
1477
1478static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
1479{
1480 struct CHIPSTATE *chip;
1481 struct CHIPDESC *desc;
1482
1483 chip = kmalloc(sizeof(*chip),GFP_KERNEL);
1484 if (!chip)
1485 return -ENOMEM;
1486 memset(chip,0,sizeof(*chip));
1487 memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
4ac97914
MCC
1488 chip->c.adapter = adap;
1489 chip->c.addr = addr;
1da177e4
LT
1490 i2c_set_clientdata(&chip->c, chip);
1491
1492 /* find description for the chip */
18fc59e2 1493 tvaudio_dbg("chip found @ 0x%x\n", addr<<1);
1da177e4
LT
1494 for (desc = chiplist; desc->name != NULL; desc++) {
1495 if (0 == *(desc->insmodopt))
1496 continue;
1497 if (addr < desc->addr_lo ||
1498 addr > desc->addr_hi)
1499 continue;
1500 if (desc->checkit && !desc->checkit(chip))
1501 continue;
1502 break;
1503 }
1504 if (desc->name == NULL) {
18fc59e2 1505 tvaudio_dbg("no matching chip description found\n");
1da177e4
LT
1506 return -EIO;
1507 }
18fc59e2 1508 tvaudio_info("%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
afd1a0c9
MCC
1509 if (desc->flags) {
1510 tvaudio_dbg("matches:%s%s%s.\n",
674434c6
MCC
1511 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1512 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1513 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
afd1a0c9 1514 }
1da177e4
LT
1515
1516 /* fill required data structures */
674434c6 1517 strcpy(chip->c.name, desc->name);
1da177e4
LT
1518 chip->type = desc-chiplist;
1519 chip->shadow.count = desc->registers+1;
afd1a0c9 1520 chip->prevmode = -1;
1da177e4
LT
1521 /* register */
1522 i2c_attach_client(&chip->c);
1523
1524 /* initialization */
1525 if (desc->initialize != NULL)
1526 desc->initialize(chip);
1527 else
1528 chip_cmd(chip,"init",&desc->init);
1529
1530 if (desc->flags & CHIP_HAS_VOLUME) {
1531 chip->left = desc->leftinit ? desc->leftinit : 65535;
1532 chip->right = desc->rightinit ? desc->rightinit : 65535;
1533 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1534 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1535 }
1536 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1537 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1538 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1539 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1540 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1541 }
1542
1543 chip->tpid = -1;
1544 if (desc->checkmode) {
1545 /* start async thread */
1546 init_timer(&chip->wt);
1547 chip->wt.function = chip_thread_wake;
1548 chip->wt.data = (unsigned long)chip;
1549 init_waitqueue_head(&chip->wq);
1550 init_completion(&chip->texit);
1551 chip->tpid = kernel_thread(chip_thread,(void *)chip,0);
1552 if (chip->tpid < 0)
18fc59e2 1553 tvaudio_warn("%s: kernel_thread() failed\n",
fae91e72 1554 chip->c.name);
1da177e4
LT
1555 wake_up_interruptible(&chip->wq);
1556 }
1557 return 0;
1558}
1559
1560static int chip_probe(struct i2c_adapter *adap)
1561{
1562 /* don't attach on saa7146 based cards,
1563 because dedicated drivers are used */
18fc59e2 1564 if ((adap->id == I2C_HW_SAA7146))
1da177e4 1565 return 0;
1da177e4
LT
1566 if (adap->class & I2C_CLASS_TV_ANALOG)
1567 return i2c_probe(adap, &addr_data, chip_attach);
1da177e4
LT
1568 return 0;
1569}
1570
1571static int chip_detach(struct i2c_client *client)
1572{
1573 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1574
1575 del_timer_sync(&chip->wt);
1576 if (chip->tpid >= 0) {
1577 /* shutdown async thread */
1578 chip->done = 1;
1579 wake_up_interruptible(&chip->wq);
1580 wait_for_completion(&chip->texit);
1581 }
1582
1583 i2c_detach_client(&chip->c);
1584 kfree(chip);
1585 return 0;
1586}
1587
1588/* ---------------------------------------------------------------------- */
1589/* video4linux interface */
1590
1591static int chip_command(struct i2c_client *client,
1592 unsigned int cmd, void *arg)
1593{
18fc59e2 1594 __u16 *sarg = arg;
1da177e4
LT
1595 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1596 struct CHIPDESC *desc = chiplist + chip->type;
1597
674434c6 1598 tvaudio_dbg("%s: chip_command 0x%x\n", chip->c.name, cmd);
1da177e4
LT
1599
1600 switch (cmd) {
1601 case AUDC_SET_INPUT:
1602 if (desc->flags & CHIP_HAS_INPUTSEL) {
1603 if (*sarg & 0x80)
1604 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1605 else
1606 chip_write_masked(chip,desc->inputreg,desc->inputmap[*sarg],desc->inputmask);
1607 }
1608 break;
1609
1610 case AUDC_SET_RADIO:
8a854284 1611 chip->radio = 1;
1da177e4
LT
1612 chip->watch_stereo = 0;
1613 /* del_timer(&chip->wt); */
1614 break;
1615
1616 /* --- v4l ioctls --- */
1617 /* take care: bttv does userspace copying, we'll get a
674434c6 1618 kernel pointer here... */
1da177e4
LT
1619 case VIDIOCGAUDIO:
1620 {
1621 struct video_audio *va = arg;
1622
1623 if (desc->flags & CHIP_HAS_VOLUME) {
1624 va->flags |= VIDEO_AUDIO_VOLUME;
1625 va->volume = max(chip->left,chip->right);
1626 if (va->volume)
1627 va->balance = (32768*min(chip->left,chip->right))/
1628 va->volume;
1629 else
1630 va->balance = 32768;
1631 }
1632 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1633 va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
1634 va->bass = chip->bass;
1635 va->treble = chip->treble;
1636 }
8a854284 1637 if (!chip->radio) {
1da177e4
LT
1638 if (desc->getmode)
1639 va->mode = desc->getmode(chip);
1640 else
1641 va->mode = VIDEO_SOUND_MONO;
1642 }
1643 break;
1644 }
1645
1646 case VIDIOCSAUDIO:
1647 {
1648 struct video_audio *va = arg;
1649
1650 if (desc->flags & CHIP_HAS_VOLUME) {
1651 chip->left = (min(65536 - va->balance,32768) *
18fc59e2 1652 va->volume) / 32768;
1da177e4 1653 chip->right = (min(va->balance,(__u16)32768) *
18fc59e2 1654 va->volume) / 32768;
1da177e4
LT
1655 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1656 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1657 }
1658 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1659 chip->bass = va->bass;
1660 chip->treble = va->treble;
1661 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1662 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1663 }
1664 if (desc->setmode && va->mode) {
1665 chip->watch_stereo = 0;
1666 /* del_timer(&chip->wt); */
1667 chip->mode = va->mode;
1668 desc->setmode(chip,va->mode);
1669 }
1670 break;
1671 }
8a854284
HV
1672
1673 case VIDIOC_S_TUNER:
1da177e4 1674 {
8a854284
HV
1675 struct v4l2_tuner *vt = arg;
1676 int mode = 0;
1da177e4 1677
8a854284
HV
1678 switch (vt->audmode) {
1679 case V4L2_TUNER_MODE_MONO:
1680 mode = VIDEO_SOUND_MONO;
1681 break;
1682 case V4L2_TUNER_MODE_STEREO:
1683 mode = VIDEO_SOUND_STEREO;
1684 break;
1685 case V4L2_TUNER_MODE_LANG1:
1686 mode = VIDEO_SOUND_LANG1;
1687 break;
1688 case V4L2_TUNER_MODE_LANG2:
1689 mode = VIDEO_SOUND_LANG2;
1690 break;
1691 default:
1692 break;
1693 }
1694
1695 if (desc->setmode && mode) {
1696 chip->watch_stereo = 0;
1697 /* del_timer(&chip->wt); */
1698 chip->mode = mode;
1699 desc->setmode(chip, mode);
1700 }
1da177e4
LT
1701 break;
1702 }
8a854284
HV
1703
1704 case VIDIOC_G_TUNER:
1da177e4 1705 {
8a854284
HV
1706 struct v4l2_tuner *vt = arg;
1707 int mode = VIDEO_SOUND_MONO;
1708
1709 vt->audmode = 0;
1710 vt->rxsubchans = 0;
1711 vt->capability = V4L2_TUNER_CAP_STEREO |
1712 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1713 if (chip->radio)
1714 break;
1715
1716 if (desc->getmode)
1717 mode = desc->getmode(chip);
1718
1719 if (mode & VIDEO_SOUND_MONO)
1720 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1721 if (mode & VIDEO_SOUND_STEREO)
1722 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1723 if (mode & VIDEO_SOUND_LANG1)
1724 vt->rxsubchans |= V4L2_TUNER_SUB_LANG1 |
1725 V4L2_TUNER_SUB_LANG2;
1726
1727 mode = chip->mode;
1728 if (mode & VIDEO_SOUND_MONO)
1729 vt->audmode = V4L2_TUNER_MODE_MONO;
1730 if (mode & VIDEO_SOUND_STEREO)
1731 vt->audmode = V4L2_TUNER_MODE_STEREO;
1732 if (mode & VIDEO_SOUND_LANG1)
1733 vt->audmode = V4L2_TUNER_MODE_LANG1;
1734 if (mode & VIDEO_SOUND_LANG2)
1735 vt->audmode = V4L2_TUNER_MODE_LANG2;
1736 break;
1737 }
1738
1739 case VIDIOCSCHAN:
1740 case VIDIOC_S_STD:
1741 chip->radio = 0;
1742 break;
1743
1744 case VIDIOCSFREQ:
1745 case VIDIOC_S_FREQUENCY:
18fc59e2 1746 chip->mode = 0; /* automatic */
1da177e4
LT
1747 if (desc->checkmode) {
1748 desc->setmode(chip,VIDEO_SOUND_MONO);
18fc59e2
MCC
1749 if (chip->prevmode != VIDEO_SOUND_MONO)
1750 chip->prevmode = -1; /* reset previous mode */
1da177e4
LT
1751 mod_timer(&chip->wt, jiffies+2*HZ);
1752 /* the thread will call checkmode() later */
1753 }
8a854284 1754 break;
1da177e4
LT
1755 }
1756 return 0;
1757}
1758
1759
1760static struct i2c_driver driver = {
604f28e2 1761 .driver = {
604f28e2
LR
1762 .name = "generic i2c audio driver",
1763 },
18fc59e2 1764 .id = I2C_DRIVERID_TVAUDIO,
18fc59e2
MCC
1765 .attach_adapter = chip_probe,
1766 .detach_client = chip_detach,
1767 .command = chip_command,
1da177e4
LT
1768};
1769
1770static struct i2c_client client_template =
1771{
fae91e72 1772 .name = "(unset)",
18fc59e2 1773 .driver = &driver,
1da177e4
LT
1774};
1775
1776static int __init audiochip_init_module(void)
1777{
1778 struct CHIPDESC *desc;
18fc59e2
MCC
1779
1780 if (debug) {
1781 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1782 printk(KERN_INFO "tvaudio: known chips: ");
1783 for (desc = chiplist; desc->name != NULL; desc++)
1784 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1785 printk("\n");
1786 }
1da177e4
LT
1787
1788 return i2c_add_driver(&driver);
1789}
1790
1791static void __exit audiochip_cleanup_module(void)
1792{
1793 i2c_del_driver(&driver);
1794}
1795
1796module_init(audiochip_init_module);
1797module_exit(audiochip_cleanup_module);
1798
1799/*
1800 * Local variables:
1801 * c-basic-offset: 8
1802 * End:
1803 */
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