Merge git://git.infradead.org/iommu-2.6
[deliverable/linux.git] / drivers / media / video / tvp514x.c
CommitLineData
07b1747c
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1/*
2 * drivers/media/video/tvp514x.c
3 *
4 * TI TVP5146/47 decoder driver
5 *
6 * Copyright (C) 2008 Texas Instruments Inc
7 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
8 *
9 * Contributors:
10 * Sivaraj R <sivaraj@ti.com>
11 * Brijesh R Jadav <brijesh.j@ti.com>
12 * Hardik Shah <hardik.shah@ti.com>
13 * Manjunath Hadli <mrh@ti.com>
14 * Karicheri Muralidharan <m-karicheri2@ti.com>
15 *
16 * This package is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 */
30
31#include <linux/i2c.h>
5a0e3ad6 32#include <linux/slab.h>
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33#include <linux/delay.h>
34#include <linux/videodev2.h>
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35
36#include <media/v4l2-device.h>
37#include <media/v4l2-common.h>
83811913 38#include <media/v4l2-mediabus.h>
62ef80a1 39#include <media/v4l2-chip-ident.h>
cf6832af 40#include <media/v4l2-ctrls.h>
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41#include <media/tvp514x.h>
42
43#include "tvp514x_regs.h"
44
45/* Module Name */
46#define TVP514X_MODULE_NAME "tvp514x"
47
48/* Private macros for TVP */
49#define I2C_RETRY_COUNT (5)
50#define LOCK_RETRY_COUNT (5)
51#define LOCK_RETRY_DELAY (200)
52
53/* Debug functions */
54static int debug;
55module_param(debug, bool, 0644);
56MODULE_PARM_DESC(debug, "Debug level (0-1)");
57
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58MODULE_AUTHOR("Texas Instruments");
59MODULE_DESCRIPTION("TVP514X linux decoder driver");
60MODULE_LICENSE("GPL");
07b1747c 61
c1c9d09c 62/* enum tvp514x_std - enum for supported standards */
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63enum tvp514x_std {
64 STD_NTSC_MJ = 0,
65 STD_PAL_BDGHIN,
66 STD_INVALID
67};
68
c1c9d09c 69/**
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70 * struct tvp514x_std_info - Structure to store standard informations
71 * @width: Line width in pixels
72 * @height:Number of active lines
73 * @video_std: Value to write in REG_VIDEO_STD register
74 * @standard: v4l2 standard structure information
75 */
76struct tvp514x_std_info {
77 unsigned long width;
78 unsigned long height;
79 u8 video_std;
80 struct v4l2_standard standard;
81};
82
6722e0ef 83static struct tvp514x_reg tvp514x_reg_list_default[0x40];
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84
85static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable);
c1c9d09c 86/**
6722e0ef 87 * struct tvp514x_decoder - TVP5146/47 decoder object
62ef80a1 88 * @sd: Subdevice Slave handle
6722e0ef 89 * @tvp514x_regs: copy of hw's regs with preset values.
07b1747c 90 * @pdata: Board specific
07b1747c 91 * @ver: Chip version
62ef80a1 92 * @streaming: TVP5146/47 decoder streaming - enabled or disabled.
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93 * @current_std: Current standard
94 * @num_stds: Number of standards
95 * @std_list: Standards list
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96 * @input: Input routing at chip level
97 * @output: Output routing at chip level
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98 */
99struct tvp514x_decoder {
62ef80a1 100 struct v4l2_subdev sd;
cf6832af 101 struct v4l2_ctrl_handler hdl;
6722e0ef 102 struct tvp514x_reg tvp514x_regs[ARRAY_SIZE(tvp514x_reg_list_default)];
07b1747c 103 const struct tvp514x_platform_data *pdata;
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104
105 int ver;
62ef80a1 106 int streaming;
07b1747c 107
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108 enum tvp514x_std current_std;
109 int num_stds;
a75ffc12 110 const struct tvp514x_std_info *std_list;
c1c9d09c 111 /* Input and Output Routing parameters */
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112 u32 input;
113 u32 output;
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114};
115
116/* TVP514x default register values */
6722e0ef 117static struct tvp514x_reg tvp514x_reg_list_default[] = {
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118 /* Composite selected */
119 {TOK_WRITE, REG_INPUT_SEL, 0x05},
07b1747c 120 {TOK_WRITE, REG_AFE_GAIN_CTRL, 0x0F},
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121 /* Auto mode */
122 {TOK_WRITE, REG_VIDEO_STD, 0x00},
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123 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
124 {TOK_SKIP, REG_AUTOSWITCH_MASK, 0x3F},
125 {TOK_WRITE, REG_COLOR_KILLER, 0x10},
126 {TOK_WRITE, REG_LUMA_CONTROL1, 0x00},
127 {TOK_WRITE, REG_LUMA_CONTROL2, 0x00},
128 {TOK_WRITE, REG_LUMA_CONTROL3, 0x02},
129 {TOK_WRITE, REG_BRIGHTNESS, 0x80},
130 {TOK_WRITE, REG_CONTRAST, 0x80},
131 {TOK_WRITE, REG_SATURATION, 0x80},
132 {TOK_WRITE, REG_HUE, 0x00},
133 {TOK_WRITE, REG_CHROMA_CONTROL1, 0x00},
134 {TOK_WRITE, REG_CHROMA_CONTROL2, 0x0E},
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135 /* Reserved */
136 {TOK_SKIP, 0x0F, 0x00},
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137 {TOK_WRITE, REG_COMP_PR_SATURATION, 0x80},
138 {TOK_WRITE, REG_COMP_Y_CONTRAST, 0x80},
139 {TOK_WRITE, REG_COMP_PB_SATURATION, 0x80},
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140 /* Reserved */
141 {TOK_SKIP, 0x13, 0x00},
07b1747c 142 {TOK_WRITE, REG_COMP_Y_BRIGHTNESS, 0x80},
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143 /* Reserved */
144 {TOK_SKIP, 0x15, 0x00},
145 /* NTSC timing */
146 {TOK_SKIP, REG_AVID_START_PIXEL_LSB, 0x55},
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147 {TOK_SKIP, REG_AVID_START_PIXEL_MSB, 0x00},
148 {TOK_SKIP, REG_AVID_STOP_PIXEL_LSB, 0x25},
149 {TOK_SKIP, REG_AVID_STOP_PIXEL_MSB, 0x03},
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150 /* NTSC timing */
151 {TOK_SKIP, REG_HSYNC_START_PIXEL_LSB, 0x00},
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152 {TOK_SKIP, REG_HSYNC_START_PIXEL_MSB, 0x00},
153 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_LSB, 0x40},
154 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_MSB, 0x00},
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155 /* NTSC timing */
156 {TOK_SKIP, REG_VSYNC_START_LINE_LSB, 0x04},
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157 {TOK_SKIP, REG_VSYNC_START_LINE_MSB, 0x00},
158 {TOK_SKIP, REG_VSYNC_STOP_LINE_LSB, 0x07},
159 {TOK_SKIP, REG_VSYNC_STOP_LINE_MSB, 0x00},
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160 /* NTSC timing */
161 {TOK_SKIP, REG_VBLK_START_LINE_LSB, 0x01},
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162 {TOK_SKIP, REG_VBLK_START_LINE_MSB, 0x00},
163 {TOK_SKIP, REG_VBLK_STOP_LINE_LSB, 0x15},
164 {TOK_SKIP, REG_VBLK_STOP_LINE_MSB, 0x00},
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165 /* Reserved */
166 {TOK_SKIP, 0x26, 0x00},
167 /* Reserved */
168 {TOK_SKIP, 0x27, 0x00},
07b1747c 169 {TOK_SKIP, REG_FAST_SWTICH_CONTROL, 0xCC},
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170 /* Reserved */
171 {TOK_SKIP, 0x29, 0x00},
07b1747c 172 {TOK_SKIP, REG_FAST_SWTICH_SCART_DELAY, 0x00},
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173 /* Reserved */
174 {TOK_SKIP, 0x2B, 0x00},
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175 {TOK_SKIP, REG_SCART_DELAY, 0x00},
176 {TOK_SKIP, REG_CTI_DELAY, 0x00},
177 {TOK_SKIP, REG_CTI_CONTROL, 0x00},
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178 /* Reserved */
179 {TOK_SKIP, 0x2F, 0x00},
180 /* Reserved */
181 {TOK_SKIP, 0x30, 0x00},
182 /* Reserved */
183 {TOK_SKIP, 0x31, 0x00},
184 /* HS, VS active high */
185 {TOK_WRITE, REG_SYNC_CONTROL, 0x00},
186 /* 10-bit BT.656 */
187 {TOK_WRITE, REG_OUTPUT_FORMATTER1, 0x00},
188 /* Enable clk & data */
189 {TOK_WRITE, REG_OUTPUT_FORMATTER2, 0x11},
190 /* Enable AVID & FLD */
191 {TOK_WRITE, REG_OUTPUT_FORMATTER3, 0xEE},
192 /* Enable VS & HS */
193 {TOK_WRITE, REG_OUTPUT_FORMATTER4, 0xAF},
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194 {TOK_WRITE, REG_OUTPUT_FORMATTER5, 0xFF},
195 {TOK_WRITE, REG_OUTPUT_FORMATTER6, 0xFF},
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196 /* Clear status */
197 {TOK_WRITE, REG_CLEAR_LOST_LOCK, 0x01},
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198 {TOK_TERM, 0, 0},
199};
200
c1c9d09c 201/**
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202 * Supported standards -
203 *
204 * Currently supports two standards only, need to add support for rest of the
205 * modes, like SECAM, etc...
206 */
a75ffc12 207static const struct tvp514x_std_info tvp514x_std_list[] = {
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208 /* Standard: STD_NTSC_MJ */
209 [STD_NTSC_MJ] = {
210 .width = NTSC_NUM_ACTIVE_PIXELS,
211 .height = NTSC_NUM_ACTIVE_LINES,
212 .video_std = VIDEO_STD_NTSC_MJ_BIT,
213 .standard = {
214 .index = 0,
215 .id = V4L2_STD_NTSC,
216 .name = "NTSC",
217 .frameperiod = {1001, 30000},
218 .framelines = 525
219 },
220 /* Standard: STD_PAL_BDGHIN */
221 },
222 [STD_PAL_BDGHIN] = {
223 .width = PAL_NUM_ACTIVE_PIXELS,
224 .height = PAL_NUM_ACTIVE_LINES,
225 .video_std = VIDEO_STD_PAL_BDGHIN_BIT,
226 .standard = {
227 .index = 1,
228 .id = V4L2_STD_PAL,
229 .name = "PAL",
230 .frameperiod = {1, 25},
231 .framelines = 625
232 },
233 },
234 /* Standard: need to add for additional standard */
235};
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236
237
238static inline struct tvp514x_decoder *to_decoder(struct v4l2_subdev *sd)
239{
240 return container_of(sd, struct tvp514x_decoder, sd);
241}
242
cf6832af
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243static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
244{
245 return &container_of(ctrl->handler, struct tvp514x_decoder, hdl)->sd;
246}
247
07b1747c 248
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249/**
250 * tvp514x_read_reg() - Read a value from a register in an TVP5146/47.
251 * @sd: ptr to v4l2_subdev struct
252 * @reg: TVP5146/47 register address
253 *
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254 * Returns value read if successful, or non-zero (-1) otherwise.
255 */
62ef80a1 256static int tvp514x_read_reg(struct v4l2_subdev *sd, u8 reg)
07b1747c 257{
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258 int err, retry = 0;
259 struct i2c_client *client = v4l2_get_subdevdata(sd);
260
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261read_again:
262
263 err = i2c_smbus_read_byte_data(client, reg);
6f901a99 264 if (err < 0) {
07b1747c 265 if (retry <= I2C_RETRY_COUNT) {
62ef80a1 266 v4l2_warn(sd, "Read: retry ... %d\n", retry);
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267 retry++;
268 msleep_interruptible(10);
269 goto read_again;
270 }
271 }
272
273 return err;
274}
275
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276/**
277 * dump_reg() - dump the register content of TVP5146/47.
278 * @sd: ptr to v4l2_subdev struct
279 * @reg: TVP5146/47 register address
280 */
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281static void dump_reg(struct v4l2_subdev *sd, u8 reg)
282{
283 u32 val;
284
285 val = tvp514x_read_reg(sd, reg);
286 v4l2_info(sd, "Reg(0x%.2X): 0x%.2X\n", reg, val);
287}
288
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289/**
290 * tvp514x_write_reg() - Write a value to a register in TVP5146/47
291 * @sd: ptr to v4l2_subdev struct
292 * @reg: TVP5146/47 register address
293 * @val: value to be written to the register
294 *
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295 * Write a value to a register in an TVP5146/47 decoder device.
296 * Returns zero if successful, or non-zero otherwise.
297 */
62ef80a1 298static int tvp514x_write_reg(struct v4l2_subdev *sd, u8 reg, u8 val)
07b1747c 299{
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300 int err, retry = 0;
301 struct i2c_client *client = v4l2_get_subdevdata(sd);
302
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303write_again:
304
305 err = i2c_smbus_write_byte_data(client, reg, val);
306 if (err) {
307 if (retry <= I2C_RETRY_COUNT) {
62ef80a1 308 v4l2_warn(sd, "Write: retry ... %d\n", retry);
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309 retry++;
310 msleep_interruptible(10);
311 goto write_again;
312 }
313 }
314
315 return err;
316}
317
c1c9d09c
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318/**
319 * tvp514x_write_regs() : Initializes a list of TVP5146/47 registers
320 * @sd: ptr to v4l2_subdev struct
321 * @reglist: list of TVP5146/47 registers and values
322 *
323 * Initializes a list of TVP5146/47 registers:-
07b1747c
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324 * if token is TOK_TERM, then entire write operation terminates
325 * if token is TOK_DELAY, then a delay of 'val' msec is introduced
326 * if token is TOK_SKIP, then the register write is skipped
327 * if token is TOK_WRITE, then the register write is performed
07b1747c
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328 * Returns zero if successful, or non-zero otherwise.
329 */
62ef80a1 330static int tvp514x_write_regs(struct v4l2_subdev *sd,
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331 const struct tvp514x_reg reglist[])
332{
333 int err;
334 const struct tvp514x_reg *next = reglist;
335
336 for (; next->token != TOK_TERM; next++) {
337 if (next->token == TOK_DELAY) {
338 msleep(next->val);
339 continue;
340 }
341
342 if (next->token == TOK_SKIP)
343 continue;
344
62ef80a1 345 err = tvp514x_write_reg(sd, next->reg, (u8) next->val);
07b1747c 346 if (err) {
62ef80a1 347 v4l2_err(sd, "Write failed. Err[%d]\n", err);
07b1747c
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348 return err;
349 }
350 }
351 return 0;
352}
353
c1c9d09c 354/**
2db4e78f 355 * tvp514x_query_current_std() : Query the current standard detected by TVP5146/47
c1c9d09c
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356 * @sd: ptr to v4l2_subdev struct
357 *
2db4e78f 358 * Returns the current standard detected by TVP5146/47, STD_INVALID if there is no
c1c9d09c 359 * standard detected.
07b1747c 360 */
2db4e78f 361static enum tvp514x_std tvp514x_query_current_std(struct v4l2_subdev *sd)
07b1747c
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362{
363 u8 std, std_status;
364
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365 std = tvp514x_read_reg(sd, REG_VIDEO_STD);
366 if ((std & VIDEO_STD_MASK) == VIDEO_STD_AUTO_SWITCH_BIT)
07b1747c 367 /* use the standard status register */
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368 std_status = tvp514x_read_reg(sd, REG_VIDEO_STD_STATUS);
369 else
c1c9d09c
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370 /* use the standard register itself */
371 std_status = std;
07b1747c
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372
373 switch (std_status & VIDEO_STD_MASK) {
374 case VIDEO_STD_NTSC_MJ_BIT:
375 return STD_NTSC_MJ;
376
377 case VIDEO_STD_PAL_BDGHIN_BIT:
378 return STD_PAL_BDGHIN;
379
380 default:
381 return STD_INVALID;
382 }
383
384 return STD_INVALID;
385}
386
c1c9d09c 387/* TVP5146/47 register dump function */
62ef80a1 388static void tvp514x_reg_dump(struct v4l2_subdev *sd)
07b1747c 389{
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390 dump_reg(sd, REG_INPUT_SEL);
391 dump_reg(sd, REG_AFE_GAIN_CTRL);
392 dump_reg(sd, REG_VIDEO_STD);
393 dump_reg(sd, REG_OPERATION_MODE);
394 dump_reg(sd, REG_COLOR_KILLER);
395 dump_reg(sd, REG_LUMA_CONTROL1);
396 dump_reg(sd, REG_LUMA_CONTROL2);
397 dump_reg(sd, REG_LUMA_CONTROL3);
398 dump_reg(sd, REG_BRIGHTNESS);
399 dump_reg(sd, REG_CONTRAST);
400 dump_reg(sd, REG_SATURATION);
401 dump_reg(sd, REG_HUE);
402 dump_reg(sd, REG_CHROMA_CONTROL1);
403 dump_reg(sd, REG_CHROMA_CONTROL2);
404 dump_reg(sd, REG_COMP_PR_SATURATION);
405 dump_reg(sd, REG_COMP_Y_CONTRAST);
406 dump_reg(sd, REG_COMP_PB_SATURATION);
407 dump_reg(sd, REG_COMP_Y_BRIGHTNESS);
408 dump_reg(sd, REG_AVID_START_PIXEL_LSB);
409 dump_reg(sd, REG_AVID_START_PIXEL_MSB);
410 dump_reg(sd, REG_AVID_STOP_PIXEL_LSB);
411 dump_reg(sd, REG_AVID_STOP_PIXEL_MSB);
412 dump_reg(sd, REG_HSYNC_START_PIXEL_LSB);
413 dump_reg(sd, REG_HSYNC_START_PIXEL_MSB);
414 dump_reg(sd, REG_HSYNC_STOP_PIXEL_LSB);
415 dump_reg(sd, REG_HSYNC_STOP_PIXEL_MSB);
416 dump_reg(sd, REG_VSYNC_START_LINE_LSB);
417 dump_reg(sd, REG_VSYNC_START_LINE_MSB);
418 dump_reg(sd, REG_VSYNC_STOP_LINE_LSB);
419 dump_reg(sd, REG_VSYNC_STOP_LINE_MSB);
420 dump_reg(sd, REG_VBLK_START_LINE_LSB);
421 dump_reg(sd, REG_VBLK_START_LINE_MSB);
422 dump_reg(sd, REG_VBLK_STOP_LINE_LSB);
423 dump_reg(sd, REG_VBLK_STOP_LINE_MSB);
424 dump_reg(sd, REG_SYNC_CONTROL);
425 dump_reg(sd, REG_OUTPUT_FORMATTER1);
426 dump_reg(sd, REG_OUTPUT_FORMATTER2);
427 dump_reg(sd, REG_OUTPUT_FORMATTER3);
428 dump_reg(sd, REG_OUTPUT_FORMATTER4);
429 dump_reg(sd, REG_OUTPUT_FORMATTER5);
430 dump_reg(sd, REG_OUTPUT_FORMATTER6);
431 dump_reg(sd, REG_CLEAR_LOST_LOCK);
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432}
433
c1c9d09c
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434/**
435 * tvp514x_configure() - Configure the TVP5146/47 registers
436 * @sd: ptr to v4l2_subdev struct
437 * @decoder: ptr to tvp514x_decoder structure
438 *
07b1747c
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439 * Returns zero if successful, or non-zero otherwise.
440 */
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441static int tvp514x_configure(struct v4l2_subdev *sd,
442 struct tvp514x_decoder *decoder)
07b1747c
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443{
444 int err;
445
446 /* common register initialization */
447 err =
62ef80a1 448 tvp514x_write_regs(sd, decoder->tvp514x_regs);
07b1747c
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449 if (err)
450 return err;
451
452 if (debug)
62ef80a1 453 tvp514x_reg_dump(sd);
07b1747c
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454
455 return 0;
456}
457
c1c9d09c
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458/**
459 * tvp514x_detect() - Detect if an tvp514x is present, and if so which revision.
460 * @sd: pointer to standard V4L2 sub-device structure
461 * @decoder: pointer to tvp514x_decoder structure
462 *
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463 * A device is considered to be detected if the chip ID (LSB and MSB)
464 * registers match the expected values.
465 * Any value of the rom version register is accepted.
466 * Returns ENODEV error number if no device is detected, or zero
467 * if a device is detected.
468 */
62ef80a1
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469static int tvp514x_detect(struct v4l2_subdev *sd,
470 struct tvp514x_decoder *decoder)
07b1747c
VH
471{
472 u8 chip_id_msb, chip_id_lsb, rom_ver;
62ef80a1 473 struct i2c_client *client = v4l2_get_subdevdata(sd);
07b1747c 474
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475 chip_id_msb = tvp514x_read_reg(sd, REG_CHIP_ID_MSB);
476 chip_id_lsb = tvp514x_read_reg(sd, REG_CHIP_ID_LSB);
477 rom_ver = tvp514x_read_reg(sd, REG_ROM_VERSION);
07b1747c 478
62ef80a1 479 v4l2_dbg(1, debug, sd,
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480 "chip id detected msb:0x%x lsb:0x%x rom version:0x%x\n",
481 chip_id_msb, chip_id_lsb, rom_ver);
482 if ((chip_id_msb != TVP514X_CHIP_ID_MSB)
483 || ((chip_id_lsb != TVP5146_CHIP_ID_LSB)
484 && (chip_id_lsb != TVP5147_CHIP_ID_LSB))) {
485 /* We didn't read the values we expected, so this must not be
486 * an TVP5146/47.
487 */
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488 v4l2_err(sd, "chip id mismatch msb:0x%x lsb:0x%x\n",
489 chip_id_msb, chip_id_lsb);
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490 return -ENODEV;
491 }
492
493 decoder->ver = rom_ver;
07b1747c 494
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495 v4l2_info(sd, "%s (Version - 0x%.2x) found at 0x%x (%s)\n",
496 client->name, decoder->ver,
497 client->addr << 1, client->adapter->name);
07b1747c
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498 return 0;
499}
500
c1c9d09c
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501/**
502 * tvp514x_querystd() - V4L2 decoder interface handler for querystd
62ef80a1 503 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
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504 * @std_id: standard V4L2 std_id ioctl enum
505 *
506 * Returns the current standard detected by TVP5146/47. If no active input is
2db4e78f 507 * detected then *std_id is set to 0 and the function returns 0.
07b1747c 508 */
62ef80a1 509static int tvp514x_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id)
07b1747c 510{
62ef80a1 511 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
512 enum tvp514x_std current_std;
513 enum tvp514x_input input_sel;
514 u8 sync_lock_status, lock_mask;
515
516 if (std_id == NULL)
517 return -EINVAL;
518
2db4e78f
HV
519 *std_id = V4L2_STD_UNKNOWN;
520
521 /* query the current standard */
522 current_std = tvp514x_query_current_std(sd);
07b1747c 523 if (current_std == STD_INVALID)
2db4e78f 524 return 0;
07b1747c 525
62ef80a1 526 input_sel = decoder->input;
07b1747c
VH
527
528 switch (input_sel) {
529 case INPUT_CVBS_VI1A:
530 case INPUT_CVBS_VI1B:
531 case INPUT_CVBS_VI1C:
532 case INPUT_CVBS_VI2A:
533 case INPUT_CVBS_VI2B:
534 case INPUT_CVBS_VI2C:
535 case INPUT_CVBS_VI3A:
536 case INPUT_CVBS_VI3B:
537 case INPUT_CVBS_VI3C:
538 case INPUT_CVBS_VI4A:
539 lock_mask = STATUS_CLR_SUBCAR_LOCK_BIT |
540 STATUS_HORZ_SYNC_LOCK_BIT |
541 STATUS_VIRT_SYNC_LOCK_BIT;
542 break;
543
544 case INPUT_SVIDEO_VI2A_VI1A:
545 case INPUT_SVIDEO_VI2B_VI1B:
546 case INPUT_SVIDEO_VI2C_VI1C:
547 case INPUT_SVIDEO_VI2A_VI3A:
548 case INPUT_SVIDEO_VI2B_VI3B:
549 case INPUT_SVIDEO_VI2C_VI3C:
550 case INPUT_SVIDEO_VI4A_VI1A:
551 case INPUT_SVIDEO_VI4A_VI1B:
552 case INPUT_SVIDEO_VI4A_VI1C:
553 case INPUT_SVIDEO_VI4A_VI3A:
554 case INPUT_SVIDEO_VI4A_VI3B:
555 case INPUT_SVIDEO_VI4A_VI3C:
556 lock_mask = STATUS_HORZ_SYNC_LOCK_BIT |
557 STATUS_VIRT_SYNC_LOCK_BIT;
558 break;
559 /*Need to add other interfaces*/
560 default:
561 return -EINVAL;
562 }
563 /* check whether signal is locked */
62ef80a1 564 sync_lock_status = tvp514x_read_reg(sd, REG_STATUS1);
07b1747c 565 if (lock_mask != (sync_lock_status & lock_mask))
2db4e78f 566 return 0; /* No input detected */
07b1747c 567
07b1747c
VH
568 *std_id = decoder->std_list[current_std].standard.id;
569
2db4e78f 570 v4l2_dbg(1, debug, sd, "Current STD: %s\n",
07b1747c
VH
571 decoder->std_list[current_std].standard.name);
572 return 0;
573}
574
c1c9d09c
MK
575/**
576 * tvp514x_s_std() - V4L2 decoder interface handler for s_std
62ef80a1 577 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
578 * @std_id: standard V4L2 v4l2_std_id ioctl enum
579 *
580 * If std_id is supported, sets the requested standard. Otherwise, returns
581 * -EINVAL
582 */
62ef80a1 583static int tvp514x_s_std(struct v4l2_subdev *sd, v4l2_std_id std_id)
07b1747c 584{
62ef80a1 585 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
586 int err, i;
587
07b1747c 588 for (i = 0; i < decoder->num_stds; i++)
62ef80a1 589 if (std_id & decoder->std_list[i].standard.id)
07b1747c
VH
590 break;
591
592 if ((i == decoder->num_stds) || (i == STD_INVALID))
593 return -EINVAL;
594
62ef80a1 595 err = tvp514x_write_reg(sd, REG_VIDEO_STD,
07b1747c
VH
596 decoder->std_list[i].video_std);
597 if (err)
598 return err;
599
600 decoder->current_std = i;
6722e0ef
SAS
601 decoder->tvp514x_regs[REG_VIDEO_STD].val =
602 decoder->std_list[i].video_std;
07b1747c 603
3907b072 604 v4l2_dbg(1, debug, sd, "Standard set to: %s\n",
07b1747c
VH
605 decoder->std_list[i].standard.name);
606 return 0;
607}
608
c1c9d09c
MK
609/**
610 * tvp514x_s_routing() - V4L2 decoder interface handler for s_routing
62ef80a1 611 * @sd: pointer to standard V4L2 sub-device structure
c1c9d09c
MK
612 * @input: input selector for routing the signal
613 * @output: output selector for routing the signal
614 * @config: config value. Not used
07b1747c
VH
615 *
616 * If index is valid, selects the requested input. Otherwise, returns -EINVAL if
617 * the input is not supported or there is no active signal present in the
618 * selected input.
619 */
62ef80a1
MK
620static int tvp514x_s_routing(struct v4l2_subdev *sd,
621 u32 input, u32 output, u32 config)
07b1747c 622{
62ef80a1 623 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
624 int err;
625 enum tvp514x_input input_sel;
626 enum tvp514x_output output_sel;
07b1747c
VH
627 u8 sync_lock_status, lock_mask;
628 int try_count = LOCK_RETRY_COUNT;
629
62ef80a1
MK
630 if ((input >= INPUT_INVALID) ||
631 (output >= OUTPUT_INVALID))
c1c9d09c
MK
632 /* Index out of bound */
633 return -EINVAL;
07b1747c 634
63b59cec
VH
635 /*
636 * For the sequence streamon -> streamoff and again s_input
637 * it fails to lock the signal, since streamoff puts TVP514x
638 * into power off state which leads to failure in sub-sequent s_input.
639 *
640 * So power up the TVP514x device here, since it is important to lock
641 * the signal at this stage.
642 */
643 if (!decoder->streaming)
644 tvp514x_s_stream(sd, 1);
645
62ef80a1
MK
646 input_sel = input;
647 output_sel = output;
07b1747c 648
62ef80a1 649 err = tvp514x_write_reg(sd, REG_INPUT_SEL, input_sel);
07b1747c
VH
650 if (err)
651 return err;
652
62ef80a1 653 output_sel |= tvp514x_read_reg(sd,
07b1747c 654 REG_OUTPUT_FORMATTER1) & 0x7;
62ef80a1 655 err = tvp514x_write_reg(sd, REG_OUTPUT_FORMATTER1,
07b1747c
VH
656 output_sel);
657 if (err)
658 return err;
659
6722e0ef
SAS
660 decoder->tvp514x_regs[REG_INPUT_SEL].val = input_sel;
661 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER1].val = output_sel;
07b1747c
VH
662
663 /* Clear status */
664 msleep(LOCK_RETRY_DELAY);
665 err =
62ef80a1 666 tvp514x_write_reg(sd, REG_CLEAR_LOST_LOCK, 0x01);
07b1747c
VH
667 if (err)
668 return err;
669
670 switch (input_sel) {
671 case INPUT_CVBS_VI1A:
672 case INPUT_CVBS_VI1B:
673 case INPUT_CVBS_VI1C:
674 case INPUT_CVBS_VI2A:
675 case INPUT_CVBS_VI2B:
676 case INPUT_CVBS_VI2C:
677 case INPUT_CVBS_VI3A:
678 case INPUT_CVBS_VI3B:
679 case INPUT_CVBS_VI3C:
680 case INPUT_CVBS_VI4A:
681 lock_mask = STATUS_CLR_SUBCAR_LOCK_BIT |
682 STATUS_HORZ_SYNC_LOCK_BIT |
683 STATUS_VIRT_SYNC_LOCK_BIT;
684 break;
685
686 case INPUT_SVIDEO_VI2A_VI1A:
687 case INPUT_SVIDEO_VI2B_VI1B:
688 case INPUT_SVIDEO_VI2C_VI1C:
689 case INPUT_SVIDEO_VI2A_VI3A:
690 case INPUT_SVIDEO_VI2B_VI3B:
691 case INPUT_SVIDEO_VI2C_VI3C:
692 case INPUT_SVIDEO_VI4A_VI1A:
693 case INPUT_SVIDEO_VI4A_VI1B:
694 case INPUT_SVIDEO_VI4A_VI1C:
695 case INPUT_SVIDEO_VI4A_VI3A:
696 case INPUT_SVIDEO_VI4A_VI3B:
697 case INPUT_SVIDEO_VI4A_VI3C:
698 lock_mask = STATUS_HORZ_SYNC_LOCK_BIT |
699 STATUS_VIRT_SYNC_LOCK_BIT;
700 break;
c1c9d09c 701 /* Need to add other interfaces*/
07b1747c
VH
702 default:
703 return -EINVAL;
704 }
705
706 while (try_count-- > 0) {
707 /* Allow decoder to sync up with new input */
708 msleep(LOCK_RETRY_DELAY);
709
62ef80a1 710 sync_lock_status = tvp514x_read_reg(sd,
07b1747c
VH
711 REG_STATUS1);
712 if (lock_mask == (sync_lock_status & lock_mask))
c1c9d09c
MK
713 /* Input detected */
714 break;
07b1747c
VH
715 }
716
2db4e78f 717 if (try_count < 0)
07b1747c
VH
718 return -EINVAL;
719
62ef80a1
MK
720 decoder->input = input;
721 decoder->output = output;
07b1747c 722
2db4e78f 723 v4l2_dbg(1, debug, sd, "Input set to: %d\n", input_sel);
07b1747c
VH
724
725 return 0;
726}
727
c1c9d09c
MK
728/**
729 * tvp514x_s_ctrl() - V4L2 decoder interface handler for s_ctrl
cf6832af 730 * @ctrl: pointer to v4l2_ctrl structure
07b1747c
VH
731 *
732 * If the requested control is supported, sets the control's current
733 * value in HW. Otherwise, returns -EINVAL if the control is not supported.
734 */
cf6832af 735static int tvp514x_s_ctrl(struct v4l2_ctrl *ctrl)
07b1747c 736{
cf6832af 737 struct v4l2_subdev *sd = to_sd(ctrl);
62ef80a1 738 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
739 int err = -EINVAL, value;
740
cf6832af 741 value = ctrl->val;
07b1747c
VH
742
743 switch (ctrl->id) {
744 case V4L2_CID_BRIGHTNESS:
cf6832af
HV
745 err = tvp514x_write_reg(sd, REG_BRIGHTNESS, value);
746 if (!err)
747 decoder->tvp514x_regs[REG_BRIGHTNESS].val = value;
07b1747c
VH
748 break;
749 case V4L2_CID_CONTRAST:
62ef80a1 750 err = tvp514x_write_reg(sd, REG_CONTRAST, value);
cf6832af
HV
751 if (!err)
752 decoder->tvp514x_regs[REG_CONTRAST].val = value;
07b1747c
VH
753 break;
754 case V4L2_CID_SATURATION:
62ef80a1 755 err = tvp514x_write_reg(sd, REG_SATURATION, value);
cf6832af
HV
756 if (!err)
757 decoder->tvp514x_regs[REG_SATURATION].val = value;
07b1747c
VH
758 break;
759 case V4L2_CID_HUE:
760 if (value == 180)
761 value = 0x7F;
762 else if (value == -180)
763 value = 0x80;
62ef80a1 764 err = tvp514x_write_reg(sd, REG_HUE, value);
cf6832af
HV
765 if (!err)
766 decoder->tvp514x_regs[REG_HUE].val = value;
07b1747c
VH
767 break;
768 case V4L2_CID_AUTOGAIN:
cf6832af
HV
769 err = tvp514x_write_reg(sd, REG_AFE_GAIN_CTRL, value ? 0x0f : 0x0c);
770 if (!err)
771 decoder->tvp514x_regs[REG_AFE_GAIN_CTRL].val = value;
07b1747c 772 break;
07b1747c
VH
773 }
774
3907b072 775 v4l2_dbg(1, debug, sd, "Set Control: ID - %d - %d\n",
cf6832af 776 ctrl->id, ctrl->val);
07b1747c
VH
777 return err;
778}
779
83811913
HV
780/**
781 * tvp514x_enum_mbus_fmt() - V4L2 decoder interface handler for enum_mbus_fmt
782 * @sd: pointer to standard V4L2 sub-device structure
783 * @index: index of pixelcode to retrieve
784 * @code: receives the pixelcode
785 *
786 * Enumerates supported mediabus formats
787 */
788static int
789tvp514x_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
790 enum v4l2_mbus_pixelcode *code)
791{
792 if (index)
793 return -EINVAL;
794
795 *code = V4L2_MBUS_FMT_YUYV10_2X10;
796 return 0;
797}
798
83811913
HV
799/**
800 * tvp514x_mbus_fmt_cap() - V4L2 decoder interface handler for try/s/g_mbus_fmt
801 * @sd: pointer to standard V4L2 sub-device structure
802 * @f: pointer to the mediabus format structure
803 *
804 * Negotiates the image capture size and mediabus format.
805 */
806static int
807tvp514x_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
808{
809 struct tvp514x_decoder *decoder = to_decoder(sd);
810 enum tvp514x_std current_std;
811
812 if (f == NULL)
813 return -EINVAL;
814
815 /* Calculate height and width based on current standard */
816 current_std = decoder->current_std;
817
818 f->code = V4L2_MBUS_FMT_YUYV10_2X10;
819 f->width = decoder->std_list[current_std].width;
820 f->height = decoder->std_list[current_std].height;
821 f->field = V4L2_FIELD_INTERLACED;
822 f->colorspace = V4L2_COLORSPACE_SMPTE170M;
823
824 v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d\n",
825 f->width, f->height);
826 return 0;
827}
828
c1c9d09c
MK
829/**
830 * tvp514x_g_parm() - V4L2 decoder interface handler for g_parm
62ef80a1 831 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
832 * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure
833 *
834 * Returns the decoder's video CAPTURE parameters.
835 */
836static int
62ef80a1 837tvp514x_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *a)
07b1747c 838{
62ef80a1 839 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
840 struct v4l2_captureparm *cparm;
841 enum tvp514x_std current_std;
842
843 if (a == NULL)
844 return -EINVAL;
845
846 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
c1c9d09c
MK
847 /* only capture is supported */
848 return -EINVAL;
07b1747c 849
07b1747c 850 /* get the current standard */
2db4e78f 851 current_std = decoder->current_std;
07b1747c
VH
852
853 cparm = &a->parm.capture;
854 cparm->capability = V4L2_CAP_TIMEPERFRAME;
855 cparm->timeperframe =
856 decoder->std_list[current_std].standard.frameperiod;
857
858 return 0;
859}
860
c1c9d09c
MK
861/**
862 * tvp514x_s_parm() - V4L2 decoder interface handler for s_parm
62ef80a1 863 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
864 * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure
865 *
866 * Configures the decoder to use the input parameters, if possible. If
867 * not possible, returns the appropriate error code.
868 */
869static int
62ef80a1 870tvp514x_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *a)
07b1747c 871{
62ef80a1 872 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
873 struct v4l2_fract *timeperframe;
874 enum tvp514x_std current_std;
875
876 if (a == NULL)
877 return -EINVAL;
878
879 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
c1c9d09c
MK
880 /* only capture is supported */
881 return -EINVAL;
07b1747c
VH
882
883 timeperframe = &a->parm.capture.timeperframe;
884
885 /* get the current standard */
2db4e78f 886 current_std = decoder->current_std;
07b1747c
VH
887
888 *timeperframe =
889 decoder->std_list[current_std].standard.frameperiod;
890
891 return 0;
892}
893
c1c9d09c
MK
894/**
895 * tvp514x_s_stream() - V4L2 decoder i/f handler for s_stream
62ef80a1
MK
896 * @sd: pointer to standard V4L2 sub-device structure
897 * @enable: streaming enable or disable
07b1747c 898 *
62ef80a1 899 * Sets streaming to enable or disable, if possible.
07b1747c 900 */
62ef80a1 901static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable)
07b1747c 902{
07b1747c 903 int err = 0;
62ef80a1
MK
904 struct i2c_client *client = v4l2_get_subdevdata(sd);
905 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c 906
62ef80a1
MK
907 if (decoder->streaming == enable)
908 return 0;
07b1747c 909
62ef80a1
MK
910 switch (enable) {
911 case 0:
912 {
913 /* Power Down Sequence */
914 err = tvp514x_write_reg(sd, REG_OPERATION_MODE, 0x01);
915 if (err) {
916 v4l2_err(sd, "Unable to turn off decoder\n");
917 return err;
918 }
919 decoder->streaming = enable;
07b1747c 920 break;
62ef80a1
MK
921 }
922 case 1:
923 {
924 struct tvp514x_reg *int_seq = (struct tvp514x_reg *)
925 client->driver->id_table->driver_data;
07b1747c 926
62ef80a1
MK
927 /* Power Up Sequence */
928 err = tvp514x_write_regs(sd, int_seq);
929 if (err) {
930 v4l2_err(sd, "Unable to turn on decoder\n");
931 return err;
932 }
933 /* Detect if not already detected */
934 err = tvp514x_detect(sd, decoder);
935 if (err) {
936 v4l2_err(sd, "Unable to detect decoder\n");
937 return err;
07b1747c 938 }
62ef80a1
MK
939 err = tvp514x_configure(sd, decoder);
940 if (err) {
941 v4l2_err(sd, "Unable to configure decoder\n");
942 return err;
943 }
944 decoder->streaming = enable;
07b1747c 945 break;
62ef80a1 946 }
07b1747c
VH
947 default:
948 err = -ENODEV;
949 break;
950 }
951
952 return err;
953}
954
cf6832af 955static const struct v4l2_ctrl_ops tvp514x_ctrl_ops = {
62ef80a1 956 .s_ctrl = tvp514x_s_ctrl,
cf6832af
HV
957};
958
959static const struct v4l2_subdev_core_ops tvp514x_core_ops = {
960 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
961 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
962 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
963 .g_ctrl = v4l2_subdev_g_ctrl,
964 .s_ctrl = v4l2_subdev_s_ctrl,
965 .queryctrl = v4l2_subdev_queryctrl,
966 .querymenu = v4l2_subdev_querymenu,
62ef80a1
MK
967 .s_std = tvp514x_s_std,
968};
07b1747c 969
62ef80a1
MK
970static const struct v4l2_subdev_video_ops tvp514x_video_ops = {
971 .s_routing = tvp514x_s_routing,
972 .querystd = tvp514x_querystd,
83811913
HV
973 .enum_mbus_fmt = tvp514x_enum_mbus_fmt,
974 .g_mbus_fmt = tvp514x_mbus_fmt,
975 .try_mbus_fmt = tvp514x_mbus_fmt,
976 .s_mbus_fmt = tvp514x_mbus_fmt,
62ef80a1
MK
977 .g_parm = tvp514x_g_parm,
978 .s_parm = tvp514x_s_parm,
979 .s_stream = tvp514x_s_stream,
980};
07b1747c 981
62ef80a1
MK
982static const struct v4l2_subdev_ops tvp514x_ops = {
983 .core = &tvp514x_core_ops,
984 .video = &tvp514x_video_ops,
07b1747c
VH
985};
986
07b1747c 987static struct tvp514x_decoder tvp514x_dev = {
62ef80a1 988 .streaming = 0,
07b1747c
VH
989 .current_std = STD_NTSC_MJ,
990 .std_list = tvp514x_std_list,
991 .num_stds = ARRAY_SIZE(tvp514x_std_list),
62ef80a1 992
07b1747c
VH
993};
994
c1c9d09c
MK
995/**
996 * tvp514x_probe() - decoder driver i2c probe handler
07b1747c 997 * @client: i2c driver client device structure
62ef80a1 998 * @id: i2c driver id table
07b1747c
VH
999 *
1000 * Register decoder as an i2c client device and V4L2
1001 * device.
1002 */
1003static int
1004tvp514x_probe(struct i2c_client *client, const struct i2c_device_id *id)
1005{
6722e0ef 1006 struct tvp514x_decoder *decoder;
62ef80a1 1007 struct v4l2_subdev *sd;
07b1747c
VH
1008
1009 /* Check if the adapter supports the needed features */
1010 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1011 return -EIO;
1012
62ef80a1
MK
1013 if (!client->dev.platform_data) {
1014 v4l2_err(client, "No platform data!!\n");
1015 return -ENODEV;
1016 }
1017
6722e0ef
SAS
1018 decoder = kzalloc(sizeof(*decoder), GFP_KERNEL);
1019 if (!decoder)
1020 return -ENOMEM;
1021
c1c9d09c 1022 /* Initialize the tvp514x_decoder with default configuration */
6722e0ef 1023 *decoder = tvp514x_dev;
62ef80a1 1024 /* Copy default register configuration */
6722e0ef
SAS
1025 memcpy(decoder->tvp514x_regs, tvp514x_reg_list_default,
1026 sizeof(tvp514x_reg_list_default));
62ef80a1 1027
c1c9d09c 1028 /* Copy board specific information here */
62ef80a1
MK
1029 decoder->pdata = client->dev.platform_data;
1030
c1c9d09c 1031 /**
07b1747c
VH
1032 * Fetch platform specific data, and configure the
1033 * tvp514x_reg_list[] accordingly. Since this is one
1034 * time configuration, no need to preserve.
1035 */
6722e0ef 1036 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER2].val |=
62ef80a1 1037 (decoder->pdata->clk_polarity << 1);
6722e0ef 1038 decoder->tvp514x_regs[REG_SYNC_CONTROL].val |=
62ef80a1
MK
1039 ((decoder->pdata->hs_polarity << 2) |
1040 (decoder->pdata->vs_polarity << 3));
1041 /* Set default standard to auto */
1042 decoder->tvp514x_regs[REG_VIDEO_STD].val =
1043 VIDEO_STD_AUTO_SWITCH_BIT;
07b1747c
VH
1044
1045 /* Register with V4L2 layer as slave device */
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1046 sd = &decoder->sd;
1047 v4l2_i2c_subdev_init(sd, client, &tvp514x_ops);
1048
cf6832af
HV
1049 v4l2_ctrl_handler_init(&decoder->hdl, 5);
1050 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1051 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1052 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1053 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1054 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1055 V4L2_CID_SATURATION, 0, 255, 1, 128);
1056 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1057 V4L2_CID_HUE, -180, 180, 180, 0);
1058 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1059 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1060 sd->ctrl_handler = &decoder->hdl;
1061 if (decoder->hdl.error) {
1062 int err = decoder->hdl.error;
1063
1064 v4l2_ctrl_handler_free(&decoder->hdl);
1065 kfree(decoder);
1066 return err;
1067 }
1068 v4l2_ctrl_handler_setup(&decoder->hdl);
1069
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1070 v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
1071
07b1747c 1072 return 0;
6722e0ef 1073
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1074}
1075
c1c9d09c
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1076/**
1077 * tvp514x_remove() - decoder driver i2c remove handler
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1078 * @client: i2c driver client device structure
1079 *
1080 * Unregister decoder as an i2c client device and V4L2
1081 * device. Complement of tvp514x_probe().
1082 */
62ef80a1 1083static int tvp514x_remove(struct i2c_client *client)
07b1747c 1084{
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1085 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1086 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c 1087
62ef80a1 1088 v4l2_device_unregister_subdev(sd);
cf6832af 1089 v4l2_ctrl_handler_free(&decoder->hdl);
6722e0ef 1090 kfree(decoder);
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1091 return 0;
1092}
c1c9d09c 1093/* TVP5146 Init/Power on Sequence */
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1094static const struct tvp514x_reg tvp5146_init_reg_seq[] = {
1095 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1096 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1097 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1098 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1099 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1100 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1101 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1102 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1103 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1104 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1105 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1106 {TOK_TERM, 0, 0},
07b1747c 1107};
62ef80a1 1108
c1c9d09c 1109/* TVP5147 Init/Power on Sequence */
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1110static const struct tvp514x_reg tvp5147_init_reg_seq[] = {
1111 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1112 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1113 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1114 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1115 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1116 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1117 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1118 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1119 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x16},
1120 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1121 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xA0},
1122 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x16},
1123 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1124 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1125 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1126 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1127 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1128 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1129 {TOK_TERM, 0, 0},
07b1747c 1130};
62ef80a1 1131
c1c9d09c 1132/* TVP5146M2/TVP5147M1 Init/Power on Sequence */
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1133static const struct tvp514x_reg tvp514xm_init_reg_seq[] = {
1134 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1135 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1136 {TOK_TERM, 0, 0},
07b1747c 1137};
62ef80a1 1138
c1c9d09c 1139/**
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1140 * I2C Device Table -
1141 *
1142 * name - Name of the actual device/chip.
1143 * driver_data - Driver data
1144 */
1145static const struct i2c_device_id tvp514x_id[] = {
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1146 {"tvp5146", (unsigned long)tvp5146_init_reg_seq},
1147 {"tvp5146m2", (unsigned long)tvp514xm_init_reg_seq},
1148 {"tvp5147", (unsigned long)tvp5147_init_reg_seq},
1149 {"tvp5147m1", (unsigned long)tvp514xm_init_reg_seq},
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1150 {},
1151};
1152
1153MODULE_DEVICE_TABLE(i2c, tvp514x_id);
1154
62ef80a1 1155static struct i2c_driver tvp514x_driver = {
07b1747c 1156 .driver = {
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1157 .owner = THIS_MODULE,
1158 .name = TVP514X_MODULE_NAME,
1159 },
07b1747c 1160 .probe = tvp514x_probe,
62ef80a1 1161 .remove = tvp514x_remove,
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1162 .id_table = tvp514x_id,
1163};
1164
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1165static int __init tvp514x_init(void)
1166{
62ef80a1 1167 return i2c_add_driver(&tvp514x_driver);
07b1747c
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1168}
1169
62ef80a1 1170static void __exit tvp514x_exit(void)
07b1747c 1171{
62ef80a1 1172 i2c_del_driver(&tvp514x_driver);
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1173}
1174
1175module_init(tvp514x_init);
62ef80a1 1176module_exit(tvp514x_exit);
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