Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
33b687cf | 10 | #include <linux/videodev2.h> |
cd4665c5 | 11 | #include <linux/delay.h> |
7a707b89 | 12 | #include <linux/module.h> |
6b8fe025 | 13 | #include <media/v4l2-device.h> |
c7c0b34c | 14 | #include <media/tvp5150.h> |
bc974305 | 15 | #include <media/v4l2-chip-ident.h> |
6c45ec71 | 16 | #include <media/v4l2-ctrls.h> |
cd4665c5 MCC |
17 | |
18 | #include "tvp5150_reg.h" | |
19 | ||
963ddc63 JM |
20 | #define TVP5150_H_MAX 720 |
21 | #define TVP5150_V_MAX_525_60 480 | |
22 | #define TVP5150_V_MAX_OTHERS 576 | |
23 | #define TVP5150_MAX_CROP_LEFT 511 | |
24 | #define TVP5150_MAX_CROP_TOP 127 | |
25 | #define TVP5150_CROP_SHIFT 2 | |
26 | ||
6ac48b45 | 27 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
28 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
29 | MODULE_LICENSE("GPL"); | |
30 | ||
cd4665c5 | 31 | |
ff699e6b | 32 | static int debug; |
cd4665c5 | 33 | module_param(debug, int, 0); |
6b8fe025 | 34 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 MCC |
35 | |
36 | struct tvp5150 { | |
6b8fe025 | 37 | struct v4l2_subdev sd; |
6c45ec71 | 38 | struct v4l2_ctrl_handler hdl; |
963ddc63 | 39 | struct v4l2_rect rect; |
84486d53 | 40 | |
3ad96835 | 41 | v4l2_std_id norm; /* Current set standard */ |
5325b427 HV |
42 | u32 input; |
43 | u32 output; | |
84486d53 | 44 | int enable; |
cd4665c5 MCC |
45 | }; |
46 | ||
6b8fe025 | 47 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 48 | { |
6b8fe025 HV |
49 | return container_of(sd, struct tvp5150, sd); |
50 | } | |
51 | ||
6c45ec71 HV |
52 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) |
53 | { | |
54 | return &container_of(ctrl->handler, struct tvp5150, hdl)->sd; | |
55 | } | |
56 | ||
6b8fe025 HV |
57 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) |
58 | { | |
59 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 MCC |
60 | unsigned char buffer[1]; |
61 | int rc; | |
cd4665c5 MCC |
62 | |
63 | buffer[0] = addr; | |
8cd0d4ca DL |
64 | |
65 | rc = i2c_master_send(c, buffer, 1); | |
66 | if (rc < 0) { | |
67 | v4l2_err(sd, "i2c i/o error: rc == %d (should be 1)\n", rc); | |
68 | return rc; | |
69 | } | |
cd4665c5 MCC |
70 | |
71 | msleep(10); | |
72 | ||
8cd0d4ca DL |
73 | rc = i2c_master_recv(c, buffer, 1); |
74 | if (rc < 0) { | |
75 | v4l2_err(sd, "i2c i/o error: rc == %d (should be 1)\n", rc); | |
76 | return rc; | |
77 | } | |
e1bc80ad | 78 | |
6b8fe025 | 79 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]); |
cd4665c5 MCC |
80 | |
81 | return (buffer[0]); | |
82 | } | |
83 | ||
6b8fe025 | 84 | static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 85 | unsigned char value) |
cd4665c5 | 86 | { |
6b8fe025 | 87 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 MCC |
88 | unsigned char buffer[2]; |
89 | int rc; | |
cd4665c5 MCC |
90 | |
91 | buffer[0] = addr; | |
84486d53 | 92 | buffer[1] = value; |
6b8fe025 | 93 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]); |
cd4665c5 | 94 | if (2 != (rc = i2c_master_send(c, buffer, 2))) |
6b8fe025 | 95 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 2)\n", rc); |
cd4665c5 MCC |
96 | } |
97 | ||
6b8fe025 HV |
98 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
99 | const u8 end, int max_line) | |
3ad96835 | 100 | { |
6b8fe025 | 101 | int i = 0; |
3ad96835 | 102 | |
6b8fe025 HV |
103 | while (init != (u8)(end + 1)) { |
104 | if ((i % max_line) == 0) { | |
105 | if (i > 0) | |
3ad96835 | 106 | printk("\n"); |
6b8fe025 | 107 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 108 | } |
6b8fe025 | 109 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
110 | |
111 | init++; | |
112 | i++; | |
113 | } | |
114 | printk("\n"); | |
115 | } | |
116 | ||
6b8fe025 | 117 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 118 | { |
84486d53 | 119 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 120 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 121 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 122 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 123 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 124 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 125 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 126 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 127 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 128 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 129 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 130 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 131 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
132 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
133 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
134 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 135 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 136 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 137 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 138 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 139 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 140 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 141 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 142 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 143 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 144 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 145 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 146 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 147 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
148 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
149 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 150 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
151 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
152 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 153 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 154 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 155 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 156 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 157 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 158 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 159 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 160 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 161 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
162 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
163 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 164 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 165 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 166 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 167 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 168 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 169 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 170 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 171 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 172 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
173 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
174 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 175 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 176 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 177 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 178 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 179 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 180 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 181 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
182 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
183 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 184 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
185 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
186 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 187 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
188 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
189 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 190 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 191 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 192 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 193 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 194 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
195 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
196 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
197 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
198 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
199 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 200 | |
6b8fe025 HV |
201 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
202 | TVP5150_TELETEXT_FIL1_END, 8); | |
203 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
204 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 205 | |
84486d53 | 206 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 207 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 208 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 209 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 210 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 211 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 212 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 213 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 214 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 215 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 216 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 217 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 218 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 219 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 220 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 221 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 222 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 223 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 224 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
225 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
226 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 227 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 228 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 229 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 230 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 231 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 232 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 233 | |
6b8fe025 HV |
234 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
235 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 236 | |
6b8fe025 HV |
237 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
238 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 239 | |
6b8fe025 HV |
240 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
241 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 242 | |
6b8fe025 HV |
243 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
244 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 245 | |
6b8fe025 HV |
246 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
247 | TVP5150_LINE_MODE_END, 8); | |
248 | return 0; | |
cd4665c5 MCC |
249 | } |
250 | ||
251 | /**************************************************************************** | |
252 | Basic functions | |
253 | ****************************************************************************/ | |
cd4665c5 | 254 | |
6b8fe025 | 255 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 256 | { |
2962fc01 | 257 | int opmode = 0; |
6b8fe025 | 258 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 259 | int input = 0; |
f4b8b3ae | 260 | unsigned char val; |
84486d53 | 261 | |
5325b427 | 262 | if ((decoder->output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
c7c0b34c | 263 | input = 8; |
4c86f973 | 264 | |
5325b427 | 265 | switch (decoder->input) { |
c7c0b34c HV |
266 | case TVP5150_COMPOSITE1: |
267 | input |= 2; | |
268 | /* fall through */ | |
269 | case TVP5150_COMPOSITE0: | |
c0477ad9 | 270 | break; |
c7c0b34c | 271 | case TVP5150_SVIDEO: |
c0477ad9 | 272 | default: |
c7c0b34c | 273 | input |= 1; |
c0477ad9 MCC |
274 | break; |
275 | } | |
276 | ||
6b8fe025 | 277 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 | 278 | "=> tvp5150 input=%i, opmode=%i\n", |
5325b427 HV |
279 | decoder->input, decoder->output, |
280 | input, opmode); | |
12500f07 | 281 | |
6b8fe025 HV |
282 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
283 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
284 | |
285 | /* Svideo should enable YCrCb output and disable GPCL output | |
286 | * For Composite and TV, it should be the reverse | |
287 | */ | |
6b8fe025 | 288 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
8cd0d4ca DL |
289 | if (val < 0) { |
290 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, val); | |
291 | return; | |
292 | } | |
293 | ||
5325b427 | 294 | if (decoder->input == TVP5150_SVIDEO) |
f4b8b3ae MCC |
295 | val = (val & ~0x40) | 0x10; |
296 | else | |
297 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 298 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
299 | }; |
300 | ||
e1bc80ad MCC |
301 | struct i2c_reg_value { |
302 | unsigned char reg; | |
303 | unsigned char value; | |
304 | }; | |
305 | ||
306 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
307 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
308 | { /* 0x00 */ | |
309 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
310 | }, | |
311 | { /* 0x01 */ | |
312 | TVP5150_ANAL_CHL_CTL,0x15 | |
313 | }, | |
314 | { /* 0x02 */ | |
315 | TVP5150_OP_MODE_CTL,0x00 | |
316 | }, | |
317 | { /* 0x03 */ | |
318 | TVP5150_MISC_CTL,0x01 | |
319 | }, | |
320 | { /* 0x06 */ | |
321 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
322 | }, | |
323 | { /* 0x07 */ | |
324 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
325 | }, | |
326 | { /* 0x08 */ | |
327 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
328 | }, | |
329 | { /* 0x09 */ | |
330 | TVP5150_BRIGHT_CTL,0x80 | |
331 | }, | |
332 | { /* 0x0a */ | |
333 | TVP5150_SATURATION_CTL,0x80 | |
334 | }, | |
335 | { /* 0x0b */ | |
336 | TVP5150_HUE_CTL,0x00 | |
337 | }, | |
338 | { /* 0x0c */ | |
339 | TVP5150_CONTRAST_CTL,0x80 | |
340 | }, | |
341 | { /* 0x0d */ | |
342 | TVP5150_DATA_RATE_SEL,0x47 | |
343 | }, | |
344 | { /* 0x0e */ | |
345 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
346 | }, | |
347 | { /* 0x0f */ | |
348 | TVP5150_CONF_SHARED_PIN,0x08 | |
349 | }, | |
350 | { /* 0x11 */ | |
351 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
352 | }, | |
353 | { /* 0x12 */ | |
354 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
355 | }, | |
356 | { /* 0x13 */ | |
357 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
358 | }, | |
359 | { /* 0x14 */ | |
360 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
361 | }, | |
362 | { /* 0x15 */ | |
363 | TVP5150_GENLOCK,0x01 | |
364 | }, | |
365 | { /* 0x16 */ | |
366 | TVP5150_HORIZ_SYNC_START,0x80 | |
367 | }, | |
368 | { /* 0x18 */ | |
369 | TVP5150_VERT_BLANKING_START,0x00 | |
370 | }, | |
371 | { /* 0x19 */ | |
372 | TVP5150_VERT_BLANKING_STOP,0x00 | |
373 | }, | |
374 | { /* 0x1a */ | |
375 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
376 | }, | |
377 | { /* 0x1b */ | |
378 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
379 | }, | |
380 | { /* 0x1c */ | |
381 | TVP5150_INT_RESET_REG_B,0x00 | |
382 | }, | |
383 | { /* 0x1d */ | |
384 | TVP5150_INT_ENABLE_REG_B,0x00 | |
385 | }, | |
386 | { /* 0x1e */ | |
387 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
388 | }, | |
389 | { /* 0x28 */ | |
390 | TVP5150_VIDEO_STD,0x00 | |
391 | }, | |
392 | { /* 0x2e */ | |
393 | TVP5150_MACROVISION_ON_CTR,0x0f | |
394 | }, | |
395 | { /* 0x2f */ | |
396 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
397 | }, | |
398 | { /* 0xbb */ | |
399 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
400 | }, | |
401 | { /* 0xc0 */ | |
402 | TVP5150_INT_STATUS_REG_A,0x00 | |
403 | }, | |
404 | { /* 0xc1 */ | |
405 | TVP5150_INT_ENABLE_REG_A,0x00 | |
406 | }, | |
407 | { /* 0xc2 */ | |
408 | TVP5150_INT_CONF,0x04 | |
409 | }, | |
410 | { /* 0xc8 */ | |
411 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
412 | }, | |
413 | { /* 0xc9 */ | |
414 | TVP5150_FIFO_RESET,0x00 | |
415 | }, | |
416 | { /* 0xca */ | |
417 | TVP5150_LINE_NUMBER_INT,0x00 | |
418 | }, | |
419 | { /* 0xcb */ | |
420 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
421 | }, | |
422 | { /* 0xcc */ | |
423 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
424 | }, | |
425 | { /* 0xcd */ | |
426 | TVP5150_FIFO_OUT_CTRL,0x01 | |
427 | }, | |
428 | { /* 0xcf */ | |
3ad96835 | 429 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
430 | }, |
431 | { /* 0xd0 */ | |
3ad96835 | 432 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
433 | }, |
434 | { /* 0xfc */ | |
435 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
436 | }, | |
437 | { /* end of data */ | |
438 | 0xff,0xff | |
439 | } | |
440 | }; | |
441 | ||
442 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
443 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
444 | { | |
445 | TVP5150_CONF_SHARED_PIN, 2 | |
446 | },{ /* Automatic offset and AGC enabled */ | |
447 | TVP5150_ANAL_CHL_CTL, 0x15 | |
448 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
449 | TVP5150_MISC_CTL, 0x6f | |
450 | },{ /* Activates video std autodetection for all standards */ | |
451 | TVP5150_AUTOSW_MSK, 0x0 | |
452 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
453 | TVP5150_DATA_RATE_SEL, 0x47 | |
454 | },{ | |
455 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
456 | },{ | |
457 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
458 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
459 | 0x27, 0x20 | |
460 | },{ | |
461 | 0xff,0xff | |
462 | } | |
463 | }; | |
464 | ||
6ac48b45 MCC |
465 | struct tvp5150_vbi_type { |
466 | unsigned int vbi_type; | |
467 | unsigned int ini_line; | |
468 | unsigned int end_line; | |
469 | unsigned int by_field :1; | |
470 | }; | |
471 | ||
e1bc80ad MCC |
472 | struct i2c_vbi_ram_value { |
473 | u16 reg; | |
6ac48b45 MCC |
474 | struct tvp5150_vbi_type type; |
475 | unsigned char values[16]; | |
e1bc80ad MCC |
476 | }; |
477 | ||
6ac48b45 MCC |
478 | /* This struct have the values for each supported VBI Standard |
479 | * by | |
480 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
481 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
482 | * and so on. There are 16 possible locations from 0 to 15. | |
483 | */ | |
3ad96835 | 484 | |
a9cff90e | 485 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 486 | { |
9bc7400a HV |
487 | /* FIXME: Current api doesn't handle all VBI types, those not |
488 | yet supported are placed under #if 0 */ | |
489 | #if 0 | |
6ac48b45 MCC |
490 | {0x010, /* Teletext, SECAM, WST System A */ |
491 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
492 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
493 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 494 | }, |
9bc7400a | 495 | #endif |
6ac48b45 | 496 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 497 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
498 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
499 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 500 | }, |
9bc7400a | 501 | #if 0 |
6ac48b45 MCC |
502 | {0x050, /* Teletext, PAL, WST System C */ |
503 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
504 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
505 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 506 | }, |
6ac48b45 MCC |
507 | {0x070, /* Teletext, NTSC, WST System B */ |
508 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
509 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
510 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 511 | }, |
6ac48b45 MCC |
512 | {0x090, /* Tetetext, NTSC NABTS System C */ |
513 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
514 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
515 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 516 | }, |
6ac48b45 MCC |
517 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
518 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
519 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
520 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 521 | }, |
6ac48b45 MCC |
522 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
523 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
524 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
525 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 526 | }, |
9bc7400a | 527 | #endif |
6ac48b45 MCC |
528 | {0x0f0, /* Closed Caption, NTSC */ |
529 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
530 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
531 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 532 | }, |
6ac48b45 | 533 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 534 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
535 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
536 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 537 | }, |
9bc7400a | 538 | #if 0 |
6ac48b45 MCC |
539 | {0x130, /* Wide Screen Signal, NTSC C */ |
540 | {V4L2_SLICED_WSS_525,20,20,1}, | |
541 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
542 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 543 | }, |
6ac48b45 MCC |
544 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
545 | {V4l2_SLICED_VITC_625,6,22,0}, | |
546 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
547 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 548 | }, |
6ac48b45 MCC |
549 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
550 | {V4l2_SLICED_VITC_525,10,20,0}, | |
551 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
552 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 553 | }, |
9bc7400a | 554 | #endif |
6ac48b45 MCC |
555 | {0x190, /* Video Program System (VPS), PAL */ |
556 | {V4L2_SLICED_VPS,16,16,0}, | |
557 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
558 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 559 | }, |
6ac48b45 MCC |
560 | /* 0x1d0 User programmable */ |
561 | ||
562 | /* End of struct */ | |
563 | { (u16)-1 } | |
e1bc80ad | 564 | }; |
4c86f973 | 565 | |
6b8fe025 | 566 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 567 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
568 | { |
569 | while (regs->reg != 0xff) { | |
6b8fe025 | 570 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
571 | regs++; |
572 | } | |
573 | return 0; | |
574 | } | |
84486d53 | 575 | |
6b8fe025 | 576 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 577 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
578 | { |
579 | unsigned int i; | |
cd4665c5 | 580 | |
e1bc80ad | 581 | /* Disable Full Field */ |
6b8fe025 | 582 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 583 | |
e1bc80ad | 584 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
585 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
586 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 587 | |
e1bc80ad | 588 | /* Load Ram Table */ |
6b8fe025 HV |
589 | while (regs->reg != (u16)-1) { |
590 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
591 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 592 | |
6b8fe025 HV |
593 | for (i = 0; i < 16; i++) |
594 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 595 | |
e1bc80ad MCC |
596 | regs++; |
597 | } | |
598 | return 0; | |
599 | } | |
cd4665c5 | 600 | |
6ac48b45 | 601 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 602 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
603 | struct v4l2_sliced_vbi_cap *cap) |
604 | { | |
6b8fe025 | 605 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
606 | int line; |
607 | ||
bccfa449 | 608 | v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n"); |
6ac48b45 MCC |
609 | memset(cap, 0, sizeof *cap); |
610 | ||
611 | while (regs->reg != (u16)-1 ) { | |
612 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
613 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
614 | } | |
615 | cap->service_set |= regs->type.vbi_type; | |
616 | ||
617 | regs++; | |
618 | } | |
6b8fe025 | 619 | return 0; |
6ac48b45 MCC |
620 | } |
621 | ||
3ad96835 MCC |
622 | /* Set vbi processing |
623 | * type - one of tvp5150_vbi_types | |
624 | * line - line to gather data | |
625 | * fields: bit 0 field1, bit 1, field2 | |
626 | * flags (default=0xf0) is a bitmask, were set means: | |
627 | * bit 7: enable filtering null bytes on CC | |
628 | * bit 6: send data also to FIFO | |
629 | * bit 5: don't allow data with errors on FIFO | |
630 | * bit 4: enable ECC when possible | |
631 | * pix_align = pix alignment: | |
632 | * LSB = field1 | |
633 | * MSB = field2 | |
634 | */ | |
6b8fe025 | 635 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
636 | const struct i2c_vbi_ram_value *regs, |
637 | unsigned int type,u8 flags, int line, | |
638 | const int fields) | |
3ad96835 | 639 | { |
6b8fe025 HV |
640 | struct tvp5150 *decoder = to_tvp5150(sd); |
641 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 642 | u8 reg; |
2701dacb | 643 | int pos=0; |
3ad96835 MCC |
644 | |
645 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 646 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 647 | return 0; |
7d5b7b98 | 648 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
649 | /* Don't follow NTSC Line number convension */ |
650 | line += 3; | |
651 | } | |
652 | ||
653 | if (line<6||line>27) | |
2701dacb MCC |
654 | return 0; |
655 | ||
656 | while (regs->reg != (u16)-1 ) { | |
657 | if ((type & regs->type.vbi_type) && | |
658 | (line>=regs->type.ini_line) && | |
659 | (line<=regs->type.end_line)) { | |
660 | type=regs->type.vbi_type; | |
661 | break; | |
662 | } | |
663 | ||
664 | regs++; | |
665 | pos++; | |
666 | } | |
667 | if (regs->reg == (u16)-1) | |
668 | return 0; | |
3ad96835 | 669 | |
2701dacb | 670 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
671 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
672 | ||
673 | if (fields&1) { | |
6b8fe025 | 674 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
675 | } |
676 | ||
677 | if (fields&2) { | |
6b8fe025 | 678 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
679 | } |
680 | ||
2701dacb | 681 | return type; |
3ad96835 MCC |
682 | } |
683 | ||
6b8fe025 | 684 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
685 | const struct i2c_vbi_ram_value *regs, int line) |
686 | { | |
6b8fe025 HV |
687 | struct tvp5150 *decoder = to_tvp5150(sd); |
688 | v4l2_std_id std = decoder->norm; | |
12db5607 | 689 | u8 reg; |
6b8fe025 | 690 | int pos, type = 0; |
8cd0d4ca | 691 | int i, ret = 0; |
12db5607 MCC |
692 | |
693 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 694 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 695 | return 0; |
7d5b7b98 | 696 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
697 | /* Don't follow NTSC Line number convension */ |
698 | line += 3; | |
699 | } | |
700 | ||
6b8fe025 | 701 | if (line < 6 || line > 27) |
12db5607 MCC |
702 | return 0; |
703 | ||
6b8fe025 | 704 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 705 | |
8cd0d4ca DL |
706 | for (i = 0; i <= 1; i++) { |
707 | ret = tvp5150_read(sd, reg + i); | |
708 | if (ret < 0) { | |
709 | v4l2_err(sd, "%s: failed with error = %d\n", | |
710 | __func__, ret); | |
711 | return 0; | |
712 | } | |
713 | pos = ret & 0x0f; | |
714 | if (pos < 0x0f) | |
715 | type |= regs[pos].type.vbi_type; | |
716 | } | |
12db5607 MCC |
717 | |
718 | return type; | |
719 | } | |
6b8fe025 HV |
720 | |
721 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 722 | { |
6b8fe025 HV |
723 | struct tvp5150 *decoder = to_tvp5150(sd); |
724 | int fmt = 0; | |
e1bc80ad | 725 | |
6b8fe025 | 726 | decoder->norm = std; |
e1bc80ad MCC |
727 | |
728 | /* First tests should be against specific std */ | |
729 | ||
730 | if (std == V4L2_STD_ALL) { | |
2da12fcb | 731 | fmt = VIDEO_STD_AUTO_SWITCH_BIT; /* Autodetect mode */ |
e1bc80ad | 732 | } else if (std & V4L2_STD_NTSC_443) { |
2da12fcb | 733 | fmt = VIDEO_STD_NTSC_4_43_BIT; |
e1bc80ad | 734 | } else if (std & V4L2_STD_PAL_M) { |
2da12fcb | 735 | fmt = VIDEO_STD_PAL_M_BIT; |
6b8fe025 | 736 | } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) { |
2da12fcb | 737 | fmt = VIDEO_STD_PAL_COMBINATION_N_BIT; |
e1bc80ad MCC |
738 | } else { |
739 | /* Then, test against generic ones */ | |
6b8fe025 | 740 | if (std & V4L2_STD_NTSC) |
2da12fcb | 741 | fmt = VIDEO_STD_NTSC_MJ_BIT; |
6b8fe025 | 742 | else if (std & V4L2_STD_PAL) |
2da12fcb | 743 | fmt = VIDEO_STD_PAL_BDGHIN_BIT; |
6b8fe025 | 744 | else if (std & V4L2_STD_SECAM) |
2da12fcb | 745 | fmt = VIDEO_STD_SECAM_BIT; |
e1bc80ad | 746 | } |
84486d53 | 747 | |
6b8fe025 HV |
748 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
749 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
750 | return 0; |
751 | } | |
752 | ||
6b8fe025 HV |
753 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
754 | { | |
755 | struct tvp5150 *decoder = to_tvp5150(sd); | |
756 | ||
757 | if (decoder->norm == std) | |
758 | return 0; | |
759 | ||
963ddc63 JM |
760 | /* Change cropping height limits */ |
761 | if (std & V4L2_STD_525_60) | |
762 | decoder->rect.height = TVP5150_V_MAX_525_60; | |
763 | else | |
764 | decoder->rect.height = TVP5150_V_MAX_OTHERS; | |
765 | ||
766 | ||
6b8fe025 HV |
767 | return tvp5150_set_std(sd, std); |
768 | } | |
769 | ||
770 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 771 | { |
6b8fe025 | 772 | struct tvp5150 *decoder = to_tvp5150(sd); |
84486d53 | 773 | |
e1bc80ad | 774 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 775 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
776 | |
777 | /* Initializes VDP registers */ | |
6b8fe025 | 778 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
779 | |
780 | /* Selects decoder input */ | |
6b8fe025 | 781 | tvp5150_selmux(sd); |
e1bc80ad MCC |
782 | |
783 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 784 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
785 | |
786 | /* Initialize image preferences */ | |
6c45ec71 | 787 | v4l2_ctrl_handler_setup(&decoder->hdl); |
e1bc80ad | 788 | |
6b8fe025 HV |
789 | tvp5150_set_std(sd, decoder->norm); |
790 | return 0; | |
cd4665c5 MCC |
791 | }; |
792 | ||
6c45ec71 | 793 | static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl) |
a6c2ba28 | 794 | { |
6c45ec71 | 795 | struct v4l2_subdev *sd = to_sd(ctrl); |
a6c2ba28 | 796 | |
797 | switch (ctrl->id) { | |
798 | case V4L2_CID_BRIGHTNESS: | |
6c45ec71 | 799 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->val); |
a6c2ba28 | 800 | return 0; |
801 | case V4L2_CID_CONTRAST: | |
6c45ec71 | 802 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->val); |
a6c2ba28 | 803 | return 0; |
804 | case V4L2_CID_SATURATION: | |
6c45ec71 | 805 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->val); |
a6c2ba28 | 806 | return 0; |
807 | case V4L2_CID_HUE: | |
6c45ec71 | 808 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->val); |
a6c2ba28 | 809 | return 0; |
a6c2ba28 | 810 | } |
c0477ad9 | 811 | return -EINVAL; |
a6c2ba28 | 812 | } |
813 | ||
ec2c4f3f JM |
814 | static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd) |
815 | { | |
816 | int val = tvp5150_read(sd, TVP5150_STATUS_REG_5); | |
817 | ||
818 | switch (val & 0x0F) { | |
819 | case 0x01: | |
820 | return V4L2_STD_NTSC; | |
821 | case 0x03: | |
822 | return V4L2_STD_PAL; | |
823 | case 0x05: | |
824 | return V4L2_STD_PAL_M; | |
825 | case 0x07: | |
826 | return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc; | |
827 | case 0x09: | |
828 | return V4L2_STD_NTSC_443; | |
829 | case 0xb: | |
830 | return V4L2_STD_SECAM; | |
831 | default: | |
832 | return V4L2_STD_UNKNOWN; | |
833 | } | |
834 | } | |
835 | ||
836 | static int tvp5150_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index, | |
837 | enum v4l2_mbus_pixelcode *code) | |
838 | { | |
839 | if (index) | |
840 | return -EINVAL; | |
841 | ||
002eaf90 | 842 | *code = V4L2_MBUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
843 | return 0; |
844 | } | |
845 | ||
846 | static int tvp5150_mbus_fmt(struct v4l2_subdev *sd, | |
847 | struct v4l2_mbus_framefmt *f) | |
848 | { | |
849 | struct tvp5150 *decoder = to_tvp5150(sd); | |
ec2c4f3f JM |
850 | |
851 | if (f == NULL) | |
852 | return -EINVAL; | |
853 | ||
854 | tvp5150_reset(sd, 0); | |
855 | ||
963ddc63 JM |
856 | f->width = decoder->rect.width; |
857 | f->height = decoder->rect.height; | |
ec2c4f3f | 858 | |
002eaf90 | 859 | f->code = V4L2_MBUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
860 | f->field = V4L2_FIELD_SEQ_TB; |
861 | f->colorspace = V4L2_COLORSPACE_SMPTE170M; | |
862 | ||
863 | v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width, | |
864 | f->height); | |
865 | return 0; | |
866 | } | |
867 | ||
963ddc63 JM |
868 | static int tvp5150_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) |
869 | { | |
870 | struct v4l2_rect rect = a->c; | |
871 | struct tvp5150 *decoder = to_tvp5150(sd); | |
872 | v4l2_std_id std; | |
873 | int hmax; | |
874 | ||
875 | v4l2_dbg(1, debug, sd, "%s left=%d, top=%d, width=%d, height=%d\n", | |
876 | __func__, rect.left, rect.top, rect.width, rect.height); | |
877 | ||
878 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
879 | return -EINVAL; | |
880 | ||
881 | /* tvp5150 has some special limits */ | |
882 | rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT); | |
883 | rect.width = clamp(rect.width, | |
884 | TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left, | |
885 | TVP5150_H_MAX - rect.left); | |
886 | rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP); | |
887 | ||
888 | /* Calculate height based on current standard */ | |
889 | if (decoder->norm == V4L2_STD_ALL) | |
890 | std = tvp5150_read_std(sd); | |
891 | else | |
892 | std = decoder->norm; | |
893 | ||
894 | if (std & V4L2_STD_525_60) | |
895 | hmax = TVP5150_V_MAX_525_60; | |
896 | else | |
897 | hmax = TVP5150_V_MAX_OTHERS; | |
898 | ||
899 | rect.height = clamp(rect.height, | |
900 | hmax - TVP5150_MAX_CROP_TOP - rect.top, | |
901 | hmax - rect.top); | |
902 | ||
903 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, rect.top); | |
904 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, | |
905 | rect.top + rect.height - hmax); | |
906 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_MSB, | |
907 | rect.left >> TVP5150_CROP_SHIFT); | |
908 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_LSB, | |
909 | rect.left | (1 << TVP5150_CROP_SHIFT)); | |
910 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_MSB, | |
911 | (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >> | |
912 | TVP5150_CROP_SHIFT); | |
913 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_LSB, | |
914 | rect.left + rect.width - TVP5150_MAX_CROP_LEFT); | |
915 | ||
916 | decoder->rect = rect; | |
917 | ||
918 | return 0; | |
919 | } | |
920 | ||
921 | static int tvp5150_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
922 | { | |
923 | struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd); | |
924 | ||
925 | a->c = decoder->rect; | |
926 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
927 | ||
928 | return 0; | |
929 | } | |
930 | ||
931 | static int tvp5150_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
932 | { | |
933 | struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd); | |
934 | v4l2_std_id std; | |
935 | ||
936 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
937 | return -EINVAL; | |
938 | ||
939 | a->bounds.left = 0; | |
940 | a->bounds.top = 0; | |
941 | a->bounds.width = TVP5150_H_MAX; | |
942 | ||
943 | /* Calculate height based on current standard */ | |
944 | if (decoder->norm == V4L2_STD_ALL) | |
945 | std = tvp5150_read_std(sd); | |
946 | else | |
947 | std = decoder->norm; | |
948 | ||
949 | if (std & V4L2_STD_525_60) | |
950 | a->bounds.height = TVP5150_V_MAX_525_60; | |
951 | else | |
952 | a->bounds.height = TVP5150_V_MAX_OTHERS; | |
953 | ||
954 | a->defrect = a->bounds; | |
955 | a->pixelaspect.numerator = 1; | |
956 | a->pixelaspect.denominator = 1; | |
957 | ||
958 | return 0; | |
959 | } | |
960 | ||
84486d53 MCC |
961 | /**************************************************************************** |
962 | I2C Command | |
963 | ****************************************************************************/ | |
c7c0b34c | 964 | |
5325b427 HV |
965 | static int tvp5150_s_routing(struct v4l2_subdev *sd, |
966 | u32 input, u32 output, u32 config) | |
6b8fe025 HV |
967 | { |
968 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 969 | |
5325b427 HV |
970 | decoder->input = input; |
971 | decoder->output = output; | |
6b8fe025 HV |
972 | tvp5150_selmux(sd); |
973 | return 0; | |
974 | } | |
6ac48b45 | 975 | |
d37dad49 HV |
976 | static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt) |
977 | { | |
978 | /* this is for capturing 36 raw vbi lines | |
979 | if there's a way to cut off the beginning 2 vbi lines | |
980 | with the tvp5150 then the vbi line count could be lowered | |
981 | to 17 lines/field again, although I couldn't find a register | |
982 | which could do that cropping */ | |
983 | if (fmt->sample_format == V4L2_PIX_FMT_GREY) | |
984 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
985 | if (fmt->count[0] == 18 && fmt->count[1] == 18) { | |
986 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
987 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
988 | } | |
989 | return 0; | |
990 | } | |
991 | ||
992 | static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) | |
6b8fe025 | 993 | { |
6b8fe025 HV |
994 | int i; |
995 | ||
6b8fe025 HV |
996 | if (svbi->service_set != 0) { |
997 | for (i = 0; i <= 23; i++) { | |
998 | svbi->service_lines[1][i] = 0; | |
999 | svbi->service_lines[0][i] = | |
1000 | tvp5150_set_vbi(sd, vbi_ram_default, | |
1001 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 1002 | } |
6b8fe025 HV |
1003 | /* Enables FIFO */ |
1004 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
1005 | } else { | |
1006 | /* Disables FIFO*/ | |
1007 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 1008 | |
6b8fe025 HV |
1009 | /* Disable Full Field */ |
1010 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 1011 | |
6b8fe025 HV |
1012 | /* Disable Line modes */ |
1013 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
1014 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 1015 | } |
6b8fe025 HV |
1016 | return 0; |
1017 | } | |
12db5607 | 1018 | |
d37dad49 HV |
1019 | static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) |
1020 | { | |
1021 | int i, mask = 0; | |
1022 | ||
6b8fe025 | 1023 | memset(svbi, 0, sizeof(*svbi)); |
12db5607 | 1024 | |
6b8fe025 HV |
1025 | for (i = 0; i <= 23; i++) { |
1026 | svbi->service_lines[0][i] = | |
1027 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
1028 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 1029 | } |
6b8fe025 HV |
1030 | svbi->service_set = mask; |
1031 | return 0; | |
1032 | } | |
1033 | ||
bc974305 | 1034 | static int tvp5150_g_chip_ident(struct v4l2_subdev *sd, |
aecde8b5 | 1035 | struct v4l2_dbg_chip_ident *chip) |
bc974305 MCC |
1036 | { |
1037 | int rev; | |
1038 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
1039 | ||
1040 | rev = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER) << 8 | | |
1041 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER); | |
1042 | ||
1043 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP5150, | |
1044 | rev); | |
1045 | } | |
1046 | ||
1047 | ||
21dcd8cc | 1048 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 1049 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 | 1050 | { |
8cd0d4ca DL |
1051 | int res; |
1052 | ||
6b8fe025 | 1053 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
21dcd8cc | 1054 | |
aecde8b5 | 1055 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
1056 | return -EINVAL; |
1057 | if (!capable(CAP_SYS_ADMIN)) | |
1058 | return -EPERM; | |
8cd0d4ca DL |
1059 | res = tvp5150_read(sd, reg->reg & 0xff); |
1060 | if (res < 0) { | |
1061 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, res); | |
1062 | return res; | |
1063 | } | |
1064 | ||
1065 | reg->val = res; | |
aecde8b5 | 1066 | reg->size = 1; |
6b8fe025 HV |
1067 | return 0; |
1068 | } | |
84486d53 | 1069 | |
aecde8b5 | 1070 | static int tvp5150_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 HV |
1071 | { |
1072 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
84486d53 | 1073 | |
aecde8b5 | 1074 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
1075 | return -EINVAL; |
1076 | if (!capable(CAP_SYS_ADMIN)) | |
1077 | return -EPERM; | |
1078 | tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); | |
1079 | return 0; | |
1080 | } | |
1081 | #endif | |
a6c2ba28 | 1082 | |
6b8fe025 HV |
1083 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1084 | { | |
1085 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 1086 | |
6b8fe025 HV |
1087 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
1088 | return 0; | |
1089 | } | |
a6c2ba28 | 1090 | |
6b8fe025 HV |
1091 | /* ----------------------------------------------------------------------- */ |
1092 | ||
6c45ec71 HV |
1093 | static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = { |
1094 | .s_ctrl = tvp5150_s_ctrl, | |
1095 | }; | |
1096 | ||
6b8fe025 HV |
1097 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { |
1098 | .log_status = tvp5150_log_status, | |
6c45ec71 HV |
1099 | .g_ext_ctrls = v4l2_subdev_g_ext_ctrls, |
1100 | .try_ext_ctrls = v4l2_subdev_try_ext_ctrls, | |
1101 | .s_ext_ctrls = v4l2_subdev_s_ext_ctrls, | |
1102 | .g_ctrl = v4l2_subdev_g_ctrl, | |
1103 | .s_ctrl = v4l2_subdev_s_ctrl, | |
1104 | .queryctrl = v4l2_subdev_queryctrl, | |
1105 | .querymenu = v4l2_subdev_querymenu, | |
f41737ec | 1106 | .s_std = tvp5150_s_std, |
6b8fe025 | 1107 | .reset = tvp5150_reset, |
bc974305 | 1108 | .g_chip_ident = tvp5150_g_chip_ident, |
6b8fe025 HV |
1109 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1110 | .g_register = tvp5150_g_register, | |
1111 | .s_register = tvp5150_s_register, | |
1112 | #endif | |
1113 | }; | |
1114 | ||
1115 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
6b8fe025 HV |
1116 | .g_tuner = tvp5150_g_tuner, |
1117 | }; | |
1118 | ||
1119 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
1120 | .s_routing = tvp5150_s_routing, | |
ec2c4f3f JM |
1121 | .enum_mbus_fmt = tvp5150_enum_mbus_fmt, |
1122 | .s_mbus_fmt = tvp5150_mbus_fmt, | |
1123 | .try_mbus_fmt = tvp5150_mbus_fmt, | |
0f67a03f | 1124 | .g_mbus_fmt = tvp5150_mbus_fmt, |
963ddc63 JM |
1125 | .s_crop = tvp5150_s_crop, |
1126 | .g_crop = tvp5150_g_crop, | |
1127 | .cropcap = tvp5150_cropcap, | |
32cd527f HV |
1128 | }; |
1129 | ||
1130 | static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { | |
6b8fe025 | 1131 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, |
d37dad49 HV |
1132 | .g_sliced_fmt = tvp5150_g_sliced_fmt, |
1133 | .s_sliced_fmt = tvp5150_s_sliced_fmt, | |
1134 | .s_raw_fmt = tvp5150_s_raw_fmt, | |
6b8fe025 HV |
1135 | }; |
1136 | ||
1137 | static const struct v4l2_subdev_ops tvp5150_ops = { | |
1138 | .core = &tvp5150_core_ops, | |
1139 | .tuner = &tvp5150_tuner_ops, | |
1140 | .video = &tvp5150_video_ops, | |
32cd527f | 1141 | .vbi = &tvp5150_vbi_ops, |
6b8fe025 HV |
1142 | }; |
1143 | ||
1144 | ||
cd4665c5 MCC |
1145 | /**************************************************************************** |
1146 | I2C Client & Driver | |
1147 | ****************************************************************************/ | |
cd4665c5 | 1148 | |
6b8fe025 HV |
1149 | static int tvp5150_probe(struct i2c_client *c, |
1150 | const struct i2c_device_id *id) | |
cd4665c5 | 1151 | { |
cd4665c5 | 1152 | struct tvp5150 *core; |
6b8fe025 | 1153 | struct v4l2_subdev *sd; |
8cd0d4ca DL |
1154 | int tvp5150_id[4]; |
1155 | int i, res; | |
cd4665c5 MCC |
1156 | |
1157 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1158 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1159 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1160 | return -EIO; |
cd4665c5 | 1161 | |
7408187d | 1162 | core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL); |
5fa1247a | 1163 | if (!core) { |
cd4665c5 MCC |
1164 | return -ENOMEM; |
1165 | } | |
6b8fe025 HV |
1166 | sd = &core->sd; |
1167 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); | |
8cd0d4ca DL |
1168 | |
1169 | /* | |
1170 | * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID, | |
1171 | * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER | |
1172 | */ | |
1173 | for (i = 0; i < 4; i++) { | |
1174 | res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i); | |
1175 | if (res < 0) | |
1176 | goto free_core; | |
1177 | tvp5150_id[i] = res; | |
1178 | } | |
1179 | ||
6b8fe025 HV |
1180 | v4l_info(c, "chip found @ 0x%02x (%s)\n", |
1181 | c->addr << 1, c->adapter->name); | |
cd4665c5 | 1182 | |
8cd0d4ca DL |
1183 | if (tvp5150_id[2] == 4 && tvp5150_id[3] == 0) { /* Is TVP5150AM1 */ |
1184 | v4l2_info(sd, "tvp%02x%02xam1 detected.\n", | |
1185 | tvp5150_id[0], tvp5150_id[1]); | |
0e09a3c9 MCC |
1186 | |
1187 | /* ITU-T BT.656.4 timing */ | |
1188 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); | |
1189 | } else { | |
8cd0d4ca DL |
1190 | /* Is TVP5150A */ |
1191 | if (tvp5150_id[2] == 3 || tvp5150_id[3] == 0x21) { | |
1192 | v4l2_info(sd, "tvp%02x%02xa detected.\n", | |
1193 | tvp5150_id[2], tvp5150_id[3]); | |
0e09a3c9 MCC |
1194 | } else { |
1195 | v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n", | |
8cd0d4ca DL |
1196 | tvp5150_id[2], tvp5150_id[3]); |
1197 | v4l2_info(sd, "*** Rom ver is %d.%d\n", | |
1198 | tvp5150_id[2], tvp5150_id[3]); | |
0e09a3c9 MCC |
1199 | } |
1200 | } | |
1201 | ||
3ad96835 | 1202 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
5325b427 | 1203 | core->input = TVP5150_COMPOSITE1; |
4c86f973 | 1204 | core->enable = 1; |
6c45ec71 HV |
1205 | |
1206 | v4l2_ctrl_handler_init(&core->hdl, 4); | |
1207 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1208 | V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); | |
1209 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1210 | V4L2_CID_CONTRAST, 0, 255, 1, 128); | |
1211 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1212 | V4L2_CID_SATURATION, 0, 255, 1, 128); | |
1213 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1214 | V4L2_CID_HUE, -128, 127, 1, 0); | |
1215 | sd->ctrl_handler = &core->hdl; | |
1216 | if (core->hdl.error) { | |
8cd0d4ca | 1217 | res = core->hdl.error; |
6c45ec71 | 1218 | v4l2_ctrl_handler_free(&core->hdl); |
8cd0d4ca | 1219 | goto free_core; |
6c45ec71 HV |
1220 | } |
1221 | v4l2_ctrl_handler_setup(&core->hdl); | |
4c86f973 | 1222 | |
963ddc63 JM |
1223 | /* Default is no cropping */ |
1224 | core->rect.top = 0; | |
1225 | if (tvp5150_read_std(sd) & V4L2_STD_525_60) | |
1226 | core->rect.height = TVP5150_V_MAX_525_60; | |
1227 | else | |
1228 | core->rect.height = TVP5150_V_MAX_OTHERS; | |
1229 | core->rect.left = 0; | |
1230 | core->rect.width = TVP5150_H_MAX; | |
1231 | ||
f1e5ee45 | 1232 | if (debug > 1) |
6b8fe025 | 1233 | tvp5150_log_status(sd); |
cd4665c5 | 1234 | return 0; |
8cd0d4ca DL |
1235 | |
1236 | free_core: | |
1237 | kfree(core); | |
1238 | return res; | |
cd4665c5 MCC |
1239 | } |
1240 | ||
6b8fe025 | 1241 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1242 | { |
6b8fe025 | 1243 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
6c45ec71 | 1244 | struct tvp5150 *decoder = to_tvp5150(sd); |
cd4665c5 | 1245 | |
6b8fe025 | 1246 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1247 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1248 | c->addr << 1); | |
1249 | ||
6b8fe025 | 1250 | v4l2_device_unregister_subdev(sd); |
6c45ec71 | 1251 | v4l2_ctrl_handler_free(&decoder->hdl); |
6b8fe025 | 1252 | kfree(to_tvp5150(sd)); |
cd4665c5 MCC |
1253 | return 0; |
1254 | } | |
1255 | ||
1256 | /* ----------------------------------------------------------------------- */ | |
1257 | ||
6b8fe025 HV |
1258 | static const struct i2c_device_id tvp5150_id[] = { |
1259 | { "tvp5150", 0 }, | |
1260 | { } | |
1261 | }; | |
1262 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1263 | |
c771145b HV |
1264 | static struct i2c_driver tvp5150_driver = { |
1265 | .driver = { | |
1266 | .owner = THIS_MODULE, | |
1267 | .name = "tvp5150", | |
1268 | }, | |
1269 | .probe = tvp5150_probe, | |
1270 | .remove = tvp5150_remove, | |
1271 | .id_table = tvp5150_id, | |
cd4665c5 | 1272 | }; |
c771145b | 1273 | |
c6e8d86f | 1274 | module_i2c_driver(tvp5150_driver); |