V4L/DVB (3409): Mark Typhoon cards as Lifeview OEM's
[deliverable/linux.git] / drivers / media / video / tvp5150.c
CommitLineData
cd4665c5 1/*
6ac48b45 2 * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver
cd4665c5 3 *
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4 * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org)
5 * This code is placed under the terms of the GNU General Public License v2
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6 */
7
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8#include <linux/i2c.h>
9#include <linux/videodev.h>
10#include <linux/delay.h>
84486d53 11#include <linux/video_decoder.h>
e1bc80ad 12#include <media/v4l2-common.h>
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13
14#include "tvp5150_reg.h"
15
6ac48b45 16MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver");
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17MODULE_AUTHOR("Mauro Carvalho Chehab");
18MODULE_LICENSE("GPL");
19
6ac48b45 20/* standard i2c insmod options */
cd4665c5 21static unsigned short normal_i2c[] = {
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22 0xb8 >> 1,
23 0xba >> 1,
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24 I2C_CLIENT_END
25};
26
27I2C_CLIENT_INSMOD;
28
29static int debug = 0;
30module_param(debug, int, 0);
31MODULE_PARM_DESC(debug, "Debug level (0-1)");
32
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33#define tvp5150_err(fmt, arg...) do { \
34 printk(KERN_ERR "%s %d-%04x: " fmt, c->driver->driver.name, \
35 i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0)
e1bc80ad 36#define tvp5150_info(fmt, arg...) do { \
cab462f7 37 printk(KERN_INFO "%s %d-%04x: " fmt, c->driver->driver.name, \
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38 i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0)
39#define tvp5150_dbg(num, fmt, arg...) \
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40 do { \
41 if (debug >= num) \
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42 printk(KERN_DEBUG "%s debug %d-%04x: " fmt,\
43 c->driver->driver.name, \
44 i2c_adapter_id(c->adapter), \
45 c->addr , ## arg); } while (0)
cd4665c5 46
a6c2ba28 47/* supported controls */
48static struct v4l2_queryctrl tvp5150_qctrl[] = {
49 {
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50 .id = V4L2_CID_BRIGHTNESS,
51 .type = V4L2_CTRL_TYPE_INTEGER,
52 .name = "Brightness",
53 .minimum = 0,
54 .maximum = 255,
55 .step = 1,
56 .default_value = 0,
57 .flags = 0,
58 }, {
59 .id = V4L2_CID_CONTRAST,
60 .type = V4L2_CTRL_TYPE_INTEGER,
61 .name = "Contrast",
62 .minimum = 0,
63 .maximum = 255,
64 .step = 0x1,
65 .default_value = 0x10,
66 .flags = 0,
67 }, {
a6c2ba28 68 .id = V4L2_CID_SATURATION,
69 .type = V4L2_CTRL_TYPE_INTEGER,
70 .name = "Saturation",
71 .minimum = 0,
72 .maximum = 255,
73 .step = 0x1,
74 .default_value = 0x10,
75 .flags = 0,
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76 }, {
77 .id = V4L2_CID_HUE,
78 .type = V4L2_CTRL_TYPE_INTEGER,
79 .name = "Hue",
80 .minimum = -128,
81 .maximum = 127,
82 .step = 0x1,
83 .default_value = 0x10,
84 .flags = 0,
85 }
a6c2ba28 86};
87
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88struct tvp5150 {
89 struct i2c_client *client;
84486d53 90
3ad96835 91 v4l2_std_id norm; /* Current set standard */
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92 int input;
93 int enable;
94 int bright;
95 int contrast;
96 int hue;
97 int sat;
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98};
99
858119e1 100static int tvp5150_read(struct i2c_client *c, unsigned char addr)
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101{
102 unsigned char buffer[1];
103 int rc;
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104
105 buffer[0] = addr;
106 if (1 != (rc = i2c_master_send(c, buffer, 1)))
e1bc80ad 107 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc);
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108
109 msleep(10);
110
111 if (1 != (rc = i2c_master_recv(c, buffer, 1)))
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112 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc);
113
114 tvp5150_dbg(2, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]);
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115
116 return (buffer[0]);
117}
118
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119static inline void tvp5150_write(struct i2c_client *c, unsigned char addr,
120 unsigned char value)
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121{
122 unsigned char buffer[2];
123 int rc;
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124
125 buffer[0] = addr;
84486d53 126 buffer[1] = value;
e1bc80ad 127 tvp5150_dbg(2, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]);
cd4665c5 128 if (2 != (rc = i2c_master_send(c, buffer, 2)))
e1bc80ad 129 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 2)\n", rc);
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130}
131
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132static void dump_reg_range(struct i2c_client *c, char *s, u8 init, const u8 end,int max_line)
133{
134 int i=0;
135
136 while (init!=(u8)(end+1)) {
137 if ((i%max_line) == 0) {
138 if (i>0)
139 printk("\n");
140 printk("tvp5150: %s reg 0x%02x = ",s,init);
141 }
142 printk("%02x ",tvp5150_read(c, init));
143
144 init++;
145 i++;
146 }
147 printk("\n");
148}
149
84486d53 150static void dump_reg(struct i2c_client *c)
cd4665c5 151{
84486d53 152 printk("tvp5150: Video input source selection #1 = 0x%02x\n",
3ad96835 153 tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1));
84486d53 154 printk("tvp5150: Analog channel controls = 0x%02x\n",
3ad96835 155 tvp5150_read(c, TVP5150_ANAL_CHL_CTL));
84486d53 156 printk("tvp5150: Operation mode controls = 0x%02x\n",
3ad96835 157 tvp5150_read(c, TVP5150_OP_MODE_CTL));
84486d53 158 printk("tvp5150: Miscellaneous controls = 0x%02x\n",
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159 tvp5150_read(c, TVP5150_MISC_CTL));
160 printk("tvp5150: Autoswitch mask= 0x%02x\n",
161 tvp5150_read(c, TVP5150_AUTOSW_MSK));
84486d53 162 printk("tvp5150: Color killer threshold control = 0x%02x\n",
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163 tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL));
164 printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
165 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1),
166 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2),
167 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3));
84486d53 168 printk("tvp5150: Brightness control = 0x%02x\n",
3ad96835 169 tvp5150_read(c, TVP5150_BRIGHT_CTL));
84486d53 170 printk("tvp5150: Color saturation control = 0x%02x\n",
3ad96835 171 tvp5150_read(c, TVP5150_SATURATION_CTL));
84486d53 172 printk("tvp5150: Hue control = 0x%02x\n",
3ad96835 173 tvp5150_read(c, TVP5150_HUE_CTL));
84486d53 174 printk("tvp5150: Contrast control = 0x%02x\n",
3ad96835 175 tvp5150_read(c, TVP5150_CONTRAST_CTL));
84486d53 176 printk("tvp5150: Outputs and data rates select = 0x%02x\n",
3ad96835 177 tvp5150_read(c, TVP5150_DATA_RATE_SEL));
84486d53 178 printk("tvp5150: Configuration shared pins = 0x%02x\n",
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179 tvp5150_read(c, TVP5150_CONF_SHARED_PIN));
180 printk("tvp5150: Active video cropping start = 0x%02x%02x\n",
181 tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB),
182 tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB));
183 printk("tvp5150: Active video cropping stop = 0x%02x%02x\n",
184 tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB),
185 tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB));
84486d53 186 printk("tvp5150: Genlock/RTC = 0x%02x\n",
3ad96835 187 tvp5150_read(c, TVP5150_GENLOCK));
84486d53 188 printk("tvp5150: Horizontal sync start = 0x%02x\n",
3ad96835 189 tvp5150_read(c, TVP5150_HORIZ_SYNC_START));
84486d53 190 printk("tvp5150: Vertical blanking start = 0x%02x\n",
3ad96835 191 tvp5150_read(c, TVP5150_VERT_BLANKING_START));
84486d53 192 printk("tvp5150: Vertical blanking stop = 0x%02x\n",
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193 tvp5150_read(c, TVP5150_VERT_BLANKING_STOP));
194 printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
195 tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1),
196 tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2));
84486d53 197 printk("tvp5150: Interrupt reset register B = 0x%02x\n",
3ad96835 198 tvp5150_read(c, TVP5150_INT_RESET_REG_B));
84486d53 199 printk("tvp5150: Interrupt enable register B = 0x%02x\n",
3ad96835 200 tvp5150_read(c, TVP5150_INT_ENABLE_REG_B));
84486d53 201 printk("tvp5150: Interrupt configuration register B = 0x%02x\n",
3ad96835 202 tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B));
84486d53 203 printk("tvp5150: Video standard = 0x%02x\n",
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204 tvp5150_read(c, TVP5150_VIDEO_STD));
205 printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
206 tvp5150_read(c, TVP5150_CB_GAIN_FACT),
207 tvp5150_read(c, TVP5150_CR_GAIN_FACTOR));
84486d53 208 printk("tvp5150: Macrovision on counter = 0x%02x\n",
3ad96835 209 tvp5150_read(c, TVP5150_MACROVISION_ON_CTR));
84486d53 210 printk("tvp5150: Macrovision off counter = 0x%02x\n",
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211 tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR));
212 printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
213 (tvp5150_read(c, TVP5150_REV_SELECT)&1)?3:4);
214 printk("tvp5150: Device ID = %02x%02x\n",
215 tvp5150_read(c, TVP5150_MSB_DEV_ID),
216 tvp5150_read(c, TVP5150_LSB_DEV_ID));
217 printk("tvp5150: ROM version = (hex) %02x.%02x\n",
218 tvp5150_read(c, TVP5150_ROM_MAJOR_VER),
219 tvp5150_read(c, TVP5150_ROM_MINOR_VER));
220 printk("tvp5150: Vertical line count = 0x%02x%02x\n",
221 tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB),
222 tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB));
84486d53 223 printk("tvp5150: Interrupt status register B = 0x%02x\n",
3ad96835 224 tvp5150_read(c, TVP5150_INT_STATUS_REG_B));
84486d53 225 printk("tvp5150: Interrupt active register B = 0x%02x\n",
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226 tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B));
227 printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
228 tvp5150_read(c, TVP5150_STATUS_REG_1),
229 tvp5150_read(c, TVP5150_STATUS_REG_2),
230 tvp5150_read(c, TVP5150_STATUS_REG_3),
231 tvp5150_read(c, TVP5150_STATUS_REG_4),
232 tvp5150_read(c, TVP5150_STATUS_REG_5));
233
234 dump_reg_range(c,"Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
235 TVP5150_TELETEXT_FIL1_END,8);
236 dump_reg_range(c,"Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
237 TVP5150_TELETEXT_FIL2_END,8);
238
84486d53 239 printk("tvp5150: Teletext filter enable = 0x%02x\n",
3ad96835 240 tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA));
84486d53 241 printk("tvp5150: Interrupt status register A = 0x%02x\n",
3ad96835 242 tvp5150_read(c, TVP5150_INT_STATUS_REG_A));
84486d53 243 printk("tvp5150: Interrupt enable register A = 0x%02x\n",
3ad96835 244 tvp5150_read(c, TVP5150_INT_ENABLE_REG_A));
84486d53 245 printk("tvp5150: Interrupt configuration = 0x%02x\n",
3ad96835 246 tvp5150_read(c, TVP5150_INT_CONF));
84486d53 247 printk("tvp5150: VDP status register = 0x%02x\n",
3ad96835 248 tvp5150_read(c, TVP5150_VDP_STATUS_REG));
84486d53 249 printk("tvp5150: FIFO word count = 0x%02x\n",
3ad96835 250 tvp5150_read(c, TVP5150_FIFO_WORD_COUNT));
84486d53 251 printk("tvp5150: FIFO interrupt threshold = 0x%02x\n",
3ad96835 252 tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD));
84486d53 253 printk("tvp5150: FIFO reset = 0x%02x\n",
3ad96835 254 tvp5150_read(c, TVP5150_FIFO_RESET));
84486d53 255 printk("tvp5150: Line number interrupt = 0x%02x\n",
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256 tvp5150_read(c, TVP5150_LINE_NUMBER_INT));
257 printk("tvp5150: Pixel alignment register = 0x%02x%02x\n",
258 tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH),
259 tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW));
84486d53 260 printk("tvp5150: FIFO output control = 0x%02x\n",
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261 tvp5150_read(c, TVP5150_FIFO_OUT_CTRL));
262 printk("tvp5150: Full field enable = 0x%02x\n",
263 tvp5150_read(c, TVP5150_FULL_FIELD_ENA));
84486d53 264 printk("tvp5150: Full field mode register = 0x%02x\n",
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265 tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG));
266
267 dump_reg_range(c,"CC data", TVP5150_CC_DATA_INI,
268 TVP5150_CC_DATA_END,8);
269
270 dump_reg_range(c,"WSS data", TVP5150_WSS_DATA_INI,
271 TVP5150_WSS_DATA_END,8);
272
273 dump_reg_range(c,"VPS data", TVP5150_VPS_DATA_INI,
274 TVP5150_VPS_DATA_END,8);
275
276 dump_reg_range(c,"VITC data", TVP5150_VITC_DATA_INI,
277 TVP5150_VITC_DATA_END,10);
278
279 dump_reg_range(c,"Line mode", TVP5150_LINE_MODE_INI,
280 TVP5150_LINE_MODE_END,8);
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281}
282
283/****************************************************************************
284 Basic functions
285 ****************************************************************************/
286enum tvp5150_input {
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287 TVP5150_ANALOG_CH0 = 0,
288 TVP5150_SVIDEO = 1,
289 TVP5150_ANALOG_CH1 = 2,
290 TVP5150_BLACK_SCREEN = 8
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291};
292
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293static inline void tvp5150_selmux(struct i2c_client *c,
294 enum tvp5150_input input)
cd4665c5 295{
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296 int opmode=0;
297
4c86f973 298 struct tvp5150 *decoder = i2c_get_clientdata(c);
84486d53 299
4c86f973 300 if (!decoder->enable)
a6c2ba28 301 input |= TVP5150_BLACK_SCREEN;
4c86f973 302
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303 switch (input) {
304 case TVP5150_ANALOG_CH0:
305 case TVP5150_ANALOG_CH1:
306 opmode=0x30; /* TV Mode */
307 break;
308 default:
309 opmode=0; /* Auto Mode */
310 break;
311 }
312
313 tvp5150_write(c, TVP5150_OP_MODE_CTL, opmode);
a6c2ba28 314 tvp5150_write(c, TVP5150_VD_IN_SRC_SEL_1, input);
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315};
316
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317struct i2c_reg_value {
318 unsigned char reg;
319 unsigned char value;
320};
321
322/* Default values as sugested at TVP5150AM1 datasheet */
323static const struct i2c_reg_value tvp5150_init_default[] = {
324 { /* 0x00 */
325 TVP5150_VD_IN_SRC_SEL_1,0x00
326 },
327 { /* 0x01 */
328 TVP5150_ANAL_CHL_CTL,0x15
329 },
330 { /* 0x02 */
331 TVP5150_OP_MODE_CTL,0x00
332 },
333 { /* 0x03 */
334 TVP5150_MISC_CTL,0x01
335 },
336 { /* 0x06 */
337 TVP5150_COLOR_KIL_THSH_CTL,0x10
338 },
339 { /* 0x07 */
340 TVP5150_LUMA_PROC_CTL_1,0x60
341 },
342 { /* 0x08 */
343 TVP5150_LUMA_PROC_CTL_2,0x00
344 },
345 { /* 0x09 */
346 TVP5150_BRIGHT_CTL,0x80
347 },
348 { /* 0x0a */
349 TVP5150_SATURATION_CTL,0x80
350 },
351 { /* 0x0b */
352 TVP5150_HUE_CTL,0x00
353 },
354 { /* 0x0c */
355 TVP5150_CONTRAST_CTL,0x80
356 },
357 { /* 0x0d */
358 TVP5150_DATA_RATE_SEL,0x47
359 },
360 { /* 0x0e */
361 TVP5150_LUMA_PROC_CTL_3,0x00
362 },
363 { /* 0x0f */
364 TVP5150_CONF_SHARED_PIN,0x08
365 },
366 { /* 0x11 */
367 TVP5150_ACT_VD_CROP_ST_MSB,0x00
368 },
369 { /* 0x12 */
370 TVP5150_ACT_VD_CROP_ST_LSB,0x00
371 },
372 { /* 0x13 */
373 TVP5150_ACT_VD_CROP_STP_MSB,0x00
374 },
375 { /* 0x14 */
376 TVP5150_ACT_VD_CROP_STP_LSB,0x00
377 },
378 { /* 0x15 */
379 TVP5150_GENLOCK,0x01
380 },
381 { /* 0x16 */
382 TVP5150_HORIZ_SYNC_START,0x80
383 },
384 { /* 0x18 */
385 TVP5150_VERT_BLANKING_START,0x00
386 },
387 { /* 0x19 */
388 TVP5150_VERT_BLANKING_STOP,0x00
389 },
390 { /* 0x1a */
391 TVP5150_CHROMA_PROC_CTL_1,0x0c
392 },
393 { /* 0x1b */
394 TVP5150_CHROMA_PROC_CTL_2,0x14
395 },
396 { /* 0x1c */
397 TVP5150_INT_RESET_REG_B,0x00
398 },
399 { /* 0x1d */
400 TVP5150_INT_ENABLE_REG_B,0x00
401 },
402 { /* 0x1e */
403 TVP5150_INTT_CONFIG_REG_B,0x00
404 },
405 { /* 0x28 */
406 TVP5150_VIDEO_STD,0x00
407 },
408 { /* 0x2e */
409 TVP5150_MACROVISION_ON_CTR,0x0f
410 },
411 { /* 0x2f */
412 TVP5150_MACROVISION_OFF_CTR,0x01
413 },
414 { /* 0xbb */
415 TVP5150_TELETEXT_FIL_ENA,0x00
416 },
417 { /* 0xc0 */
418 TVP5150_INT_STATUS_REG_A,0x00
419 },
420 { /* 0xc1 */
421 TVP5150_INT_ENABLE_REG_A,0x00
422 },
423 { /* 0xc2 */
424 TVP5150_INT_CONF,0x04
425 },
426 { /* 0xc8 */
427 TVP5150_FIFO_INT_THRESHOLD,0x80
428 },
429 { /* 0xc9 */
430 TVP5150_FIFO_RESET,0x00
431 },
432 { /* 0xca */
433 TVP5150_LINE_NUMBER_INT,0x00
434 },
435 { /* 0xcb */
436 TVP5150_PIX_ALIGN_REG_LOW,0x4e
437 },
438 { /* 0xcc */
439 TVP5150_PIX_ALIGN_REG_HIGH,0x00
440 },
441 { /* 0xcd */
442 TVP5150_FIFO_OUT_CTRL,0x01
443 },
444 { /* 0xcf */
3ad96835 445 TVP5150_FULL_FIELD_ENA,0x00
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446 },
447 { /* 0xd0 */
3ad96835 448 TVP5150_LINE_MODE_INI,0x00
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449 },
450 { /* 0xfc */
451 TVP5150_FULL_FIELD_MODE_REG,0x7f
452 },
453 { /* end of data */
454 0xff,0xff
455 }
456};
457
458/* Default values as sugested at TVP5150AM1 datasheet */
459static const struct i2c_reg_value tvp5150_init_enable[] = {
460 {
461 TVP5150_CONF_SHARED_PIN, 2
462 },{ /* Automatic offset and AGC enabled */
463 TVP5150_ANAL_CHL_CTL, 0x15
464 },{ /* Activate YCrCb output 0x9 or 0xd ? */
465 TVP5150_MISC_CTL, 0x6f
466 },{ /* Activates video std autodetection for all standards */
467 TVP5150_AUTOSW_MSK, 0x0
468 },{ /* Default format: 0x47. For 4:2:2: 0x40 */
469 TVP5150_DATA_RATE_SEL, 0x47
470 },{
471 TVP5150_CHROMA_PROC_CTL_1, 0x0c
472 },{
473 TVP5150_CHROMA_PROC_CTL_2, 0x54
474 },{ /* Non documented, but initialized on WinTV USB2 */
475 0x27, 0x20
476 },{
477 0xff,0xff
478 }
479};
480
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481struct tvp5150_vbi_type {
482 unsigned int vbi_type;
483 unsigned int ini_line;
484 unsigned int end_line;
485 unsigned int by_field :1;
486};
487
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488struct i2c_vbi_ram_value {
489 u16 reg;
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490 struct tvp5150_vbi_type type;
491 unsigned char values[16];
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492};
493
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494/* This struct have the values for each supported VBI Standard
495 * by
496 tvp5150_vbi_types should follow the same order as vbi_ram_default
3ad96835
MCC
497 * value 0 means rom position 0x10, value 1 means rom position 0x30
498 * and so on. There are 16 possible locations from 0 to 15.
499 */
3ad96835 500
a9cff90e 501static struct i2c_vbi_ram_value vbi_ram_default[] =
cd4665c5 502{
6ac48b45
MCC
503 {0x010, /* Teletext, SECAM, WST System A */
504 {V4L2_SLICED_TELETEXT_SECAM,6,23,1},
505 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
506 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 507 },
6ac48b45
MCC
508 {0x030, /* Teletext, PAL, WST System B */
509 {V4L2_SLICED_TELETEXT_PAL_B,6,22,1},
510 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
511 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 512 },
6ac48b45
MCC
513 {0x050, /* Teletext, PAL, WST System C */
514 {V4L2_SLICED_TELETEXT_PAL_C,6,22,1},
515 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
516 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 517 },
6ac48b45
MCC
518 {0x070, /* Teletext, NTSC, WST System B */
519 {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1},
520 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
521 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 522 },
6ac48b45
MCC
523 {0x090, /* Tetetext, NTSC NABTS System C */
524 {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1},
525 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
526 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
e1bc80ad 527 },
6ac48b45
MCC
528 {0x0b0, /* Teletext, NTSC-J, NABTS System D */
529 {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1},
530 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
531 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 532 },
6ac48b45
MCC
533 {0x0d0, /* Closed Caption, PAL/SECAM */
534 {V4L2_SLICED_CAPTION_625,22,22,1},
535 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
536 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 537 },
6ac48b45
MCC
538 {0x0f0, /* Closed Caption, NTSC */
539 {V4L2_SLICED_CAPTION_525,21,21,1},
540 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
541 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 542 },
6ac48b45
MCC
543 {0x110, /* Wide Screen Signal, PAL/SECAM */
544 {V4L2_SLICED_WSS_625,20,21,1},
545 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
546 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
e1bc80ad 547 },
6ac48b45
MCC
548 {0x130, /* Wide Screen Signal, NTSC C */
549 {V4L2_SLICED_WSS_525,20,20,1},
550 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
551 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
e1bc80ad 552 },
6ac48b45
MCC
553 {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
554 {V4l2_SLICED_VITC_625,6,22,0},
555 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
556 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 557 },
6ac48b45
MCC
558 {0x170, /* Vertical Interval Timecode (VITC), NTSC */
559 {V4l2_SLICED_VITC_525,10,20,0},
560 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
561 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 562 },
6ac48b45
MCC
563 {0x190, /* Video Program System (VPS), PAL */
564 {V4L2_SLICED_VPS,16,16,0},
565 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
566 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
3ad96835 567 },
6ac48b45
MCC
568 /* 0x1d0 User programmable */
569
570 /* End of struct */
571 { (u16)-1 }
e1bc80ad 572};
4c86f973 573
e1bc80ad 574static int tvp5150_write_inittab(struct i2c_client *c,
6ac48b45 575 const struct i2c_reg_value *regs)
e1bc80ad
MCC
576{
577 while (regs->reg != 0xff) {
578 tvp5150_write(c, regs->reg, regs->value);
579 regs++;
580 }
581 return 0;
582}
84486d53 583
e1bc80ad 584static int tvp5150_vdp_init(struct i2c_client *c,
6ac48b45 585 const struct i2c_vbi_ram_value *regs)
e1bc80ad
MCC
586{
587 unsigned int i;
cd4665c5 588
e1bc80ad 589 /* Disable Full Field */
3ad96835 590 tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0);
cd4665c5 591
e1bc80ad 592 /* Before programming, Line mode should be at 0xff */
3ad96835 593 for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++)
e1bc80ad 594 tvp5150_write(c, i, 0xff);
cd4665c5 595
e1bc80ad
MCC
596 /* Load Ram Table */
597 while (regs->reg != (u16)-1 ) {
598 tvp5150_write(c, TVP5150_CONF_RAM_ADDR_HIGH,regs->reg>>8);
599 tvp5150_write(c, TVP5150_CONF_RAM_ADDR_LOW,regs->reg);
cd4665c5 600
e1bc80ad
MCC
601 for (i=0;i<16;i++)
602 tvp5150_write(c, TVP5150_VDP_CONF_RAM_DATA,regs->values[i]);
84486d53 603
e1bc80ad
MCC
604 regs++;
605 }
606 return 0;
607}
cd4665c5 608
6ac48b45
MCC
609/* Fills VBI capabilities based on i2c_vbi_ram_value struct */
610static void tvp5150_vbi_get_cap(const struct i2c_vbi_ram_value *regs,
611 struct v4l2_sliced_vbi_cap *cap)
612{
613 int line;
614
615 memset(cap, 0, sizeof *cap);
616
617 while (regs->reg != (u16)-1 ) {
618 for (line=regs->type.ini_line;line<=regs->type.end_line;line++) {
619 cap->service_lines[0][line] |= regs->type.vbi_type;
620 }
621 cap->service_set |= regs->type.vbi_type;
622
623 regs++;
624 }
625}
626
3ad96835
MCC
627/* Set vbi processing
628 * type - one of tvp5150_vbi_types
629 * line - line to gather data
630 * fields: bit 0 field1, bit 1, field2
631 * flags (default=0xf0) is a bitmask, were set means:
632 * bit 7: enable filtering null bytes on CC
633 * bit 6: send data also to FIFO
634 * bit 5: don't allow data with errors on FIFO
635 * bit 4: enable ECC when possible
636 * pix_align = pix alignment:
637 * LSB = field1
638 * MSB = field2
639 */
6ac48b45 640static int tvp5150_set_vbi(struct i2c_client *c, unsigned int type,
3ad96835
MCC
641 u8 flags, int line, const int fields)
642{
643 struct tvp5150 *decoder = i2c_get_clientdata(c);
644 v4l2_std_id std=decoder->norm;
645 u8 reg;
646
647 if (std == V4L2_STD_ALL) {
648 tvp5150_err("VBI can't be configured without knowing number of lines\n");
649 return -EINVAL;
650 } else if (std && V4L2_STD_625_50) {
651 /* Don't follow NTSC Line number convension */
652 line += 3;
653 }
654
655 if (line<6||line>27)
656 return -EINVAL;
657
658 type=type | (flags & 0xf0);
659 reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;
660
661 if (fields&1) {
662 tvp5150_write(c, reg, type);
663 }
664
665 if (fields&2) {
666 tvp5150_write(c, reg+1, type);
667 }
668
669 return 0;
670}
671
e1bc80ad
MCC
672static int tvp5150_set_std(struct i2c_client *c, v4l2_std_id std)
673{
674 struct tvp5150 *decoder = i2c_get_clientdata(c);
675 int fmt=0;
676
677 decoder->norm=std;
678
679 /* First tests should be against specific std */
680
681 if (std == V4L2_STD_ALL) {
682 fmt=0; /* Autodetect mode */
683 } else if (std & V4L2_STD_NTSC_443) {
684 fmt=0xa;
685 } else if (std & V4L2_STD_PAL_M) {
686 fmt=0x6;
687 } else if (std & (V4L2_STD_PAL_N| V4L2_STD_PAL_Nc)) {
688 fmt=0x8;
689 } else {
690 /* Then, test against generic ones */
691 if (std & V4L2_STD_NTSC) {
692 fmt=0x2;
693 } else if (std & V4L2_STD_PAL) {
694 fmt=0x4;
695 } else if (std & V4L2_STD_SECAM) {
696 fmt=0xc;
697 }
698 }
84486d53 699
e1bc80ad
MCC
700 tvp5150_dbg(1,"Set video std register to %d.\n",fmt);
701 tvp5150_write(c, TVP5150_VIDEO_STD, fmt);
84486d53 702
e1bc80ad
MCC
703 return 0;
704}
705
706static inline void tvp5150_reset(struct i2c_client *c)
707{
e36eaa71 708 u8 msb_id, lsb_id, msb_rom, lsb_rom;
e1bc80ad
MCC
709 struct tvp5150 *decoder = i2c_get_clientdata(c);
710
e1bc80ad
MCC
711 msb_id=tvp5150_read(c,TVP5150_MSB_DEV_ID);
712 lsb_id=tvp5150_read(c,TVP5150_LSB_DEV_ID);
713 msb_rom=tvp5150_read(c,TVP5150_ROM_MAJOR_VER);
714 lsb_rom=tvp5150_read(c,TVP5150_ROM_MINOR_VER);
715
e36eaa71
MCC
716 if ((msb_rom==4)&&(lsb_rom==0)) { /* Is TVP5150AM1 */
717 tvp5150_info("tvp%02x%02xam1 detected.\n",msb_id, lsb_id);
718
719 /* ITU-T BT.656.4 timing */
720 tvp5150_write(c,TVP5150_REV_SELECT,0);
e1bc80ad 721 } else {
e36eaa71
MCC
722 if ((msb_rom==3)||(lsb_rom==0x21)) { /* Is TVP5150A */
723 tvp5150_info("tvp%02x%02xa detected.\n",msb_id, lsb_id);
724 } else {
725 tvp5150_info("*** unknown tvp%02x%02x chip detected.\n",msb_id,lsb_id);
726 tvp5150_info("*** Rom ver is %d.%d\n",msb_rom,lsb_rom);
727 }
e1bc80ad 728 }
84486d53 729
e1bc80ad
MCC
730 /* Initializes TVP5150 to its default values */
731 tvp5150_write_inittab(c, tvp5150_init_default);
732
733 /* Initializes VDP registers */
734 tvp5150_vdp_init(c, vbi_ram_default);
735
736 /* Selects decoder input */
737 tvp5150_selmux(c, decoder->input);
738
739 /* Initializes TVP5150 to stream enabled values */
740 tvp5150_write_inittab(c, tvp5150_init_enable);
741
742 /* Initialize image preferences */
4c86f973
MCC
743 tvp5150_write(c, TVP5150_BRIGHT_CTL, decoder->bright >> 8);
744 tvp5150_write(c, TVP5150_CONTRAST_CTL, decoder->contrast >> 8);
745 tvp5150_write(c, TVP5150_SATURATION_CTL, decoder->contrast >> 8);
746 tvp5150_write(c, TVP5150_HUE_CTL, (decoder->hue - 32768) >> 8);
e1bc80ad
MCC
747
748 tvp5150_set_std(c, decoder->norm);
cd4665c5
MCC
749};
750
a6c2ba28 751static int tvp5150_get_ctrl(struct i2c_client *c, struct v4l2_control *ctrl)
752{
753/* struct tvp5150 *decoder = i2c_get_clientdata(c); */
754
755 switch (ctrl->id) {
756 case V4L2_CID_BRIGHTNESS:
757 ctrl->value = tvp5150_read(c, TVP5150_BRIGHT_CTL);
758 return 0;
759 case V4L2_CID_CONTRAST:
760 ctrl->value = tvp5150_read(c, TVP5150_CONTRAST_CTL);
761 return 0;
762 case V4L2_CID_SATURATION:
763 ctrl->value = tvp5150_read(c, TVP5150_SATURATION_CTL);
764 return 0;
765 case V4L2_CID_HUE:
766 ctrl->value = tvp5150_read(c, TVP5150_HUE_CTL);
767 return 0;
a6c2ba28 768 }
c0477ad9 769 return -EINVAL;
a6c2ba28 770}
771
772static int tvp5150_set_ctrl(struct i2c_client *c, struct v4l2_control *ctrl)
773{
774/* struct tvp5150 *decoder = i2c_get_clientdata(c); */
775
776 switch (ctrl->id) {
777 case V4L2_CID_BRIGHTNESS:
778 tvp5150_write(c, TVP5150_BRIGHT_CTL, ctrl->value);
779 return 0;
780 case V4L2_CID_CONTRAST:
781 tvp5150_write(c, TVP5150_CONTRAST_CTL, ctrl->value);
782 return 0;
783 case V4L2_CID_SATURATION:
784 tvp5150_write(c, TVP5150_SATURATION_CTL, ctrl->value);
785 return 0;
786 case V4L2_CID_HUE:
787 tvp5150_write(c, TVP5150_HUE_CTL, ctrl->value);
788 return 0;
a6c2ba28 789 }
c0477ad9 790 return -EINVAL;
a6c2ba28 791}
792
84486d53
MCC
793/****************************************************************************
794 I2C Command
795 ****************************************************************************/
e1bc80ad 796static int tvp5150_command(struct i2c_client *c,
84486d53
MCC
797 unsigned int cmd, void *arg)
798{
e1bc80ad 799 struct tvp5150 *decoder = i2c_get_clientdata(c);
84486d53
MCC
800
801 switch (cmd) {
802
803 case 0:
e1bc80ad 804 case VIDIOC_INT_RESET:
84486d53 805 case DECODER_INIT:
e1bc80ad
MCC
806 tvp5150_reset(c);
807 break;
808 case VIDIOC_S_STD:
809 if (decoder->norm == *(v4l2_std_id *)arg)
810 break;
811 return tvp5150_set_std(c, *(v4l2_std_id *)arg);
812 case VIDIOC_G_STD:
813 *(v4l2_std_id *)arg = decoder->norm;
84486d53
MCC
814 break;
815
6ac48b45
MCC
816 case VIDIOC_G_SLICED_VBI_CAP:
817 {
818 struct v4l2_sliced_vbi_cap *cap = arg;
819 tvp5150_dbg(1, "VIDIOC_G_SLICED_VBI_CAP\n");
820
821 tvp5150_vbi_get_cap(vbi_ram_default, cap);
822 break;
823 }
824
21dcd8cc
MCC
825#ifdef CONFIG_VIDEO_ADV_DEBUG
826 case VIDIOC_INT_G_REGISTER:
827 {
828 struct v4l2_register *reg = arg;
829
830 if (reg->i2c_id != I2C_DRIVERID_TVP5150)
831 return -EINVAL;
832 reg->val = tvp5150_read(c, reg->reg & 0xff);
833 break;
834 }
835
836 case VIDIOC_INT_S_REGISTER:
837 {
838 struct v4l2_register *reg = arg;
839
840 if (reg->i2c_id != I2C_DRIVERID_TVP5150)
841 return -EINVAL;
842 if (!capable(CAP_SYS_ADMIN))
843 return -EPERM;
844 tvp5150_write(c, reg->reg & 0xff, reg->val & 0xff);
845 break;
846 }
847#endif
848
84486d53 849 case DECODER_DUMP:
e1bc80ad 850 dump_reg(c);
84486d53
MCC
851 break;
852
853 case DECODER_GET_CAPABILITIES:
a6c2ba28 854 {
855 struct video_decoder_capability *cap = arg;
856
857 cap->flags = VIDEO_DECODER_PAL |
858 VIDEO_DECODER_NTSC |
859 VIDEO_DECODER_SECAM |
860 VIDEO_DECODER_AUTO | VIDEO_DECODER_CCIR;
861 cap->inputs = 3;
862 cap->outputs = 1;
863 break;
864 }
84486d53 865 case DECODER_GET_STATUS:
a6c2ba28 866 {
867 break;
868 }
84486d53
MCC
869
870 case DECODER_SET_GPIO:
871 break;
872
873 case DECODER_SET_VBI_BYPASS:
874 break;
875
876 case DECODER_SET_NORM:
a6c2ba28 877 {
878 int *iarg = arg;
84486d53 879
a6c2ba28 880 switch (*iarg) {
84486d53 881
a6c2ba28 882 case VIDEO_MODE_NTSC:
883 break;
84486d53 884
a6c2ba28 885 case VIDEO_MODE_PAL:
886 break;
84486d53 887
a6c2ba28 888 case VIDEO_MODE_SECAM:
889 break;
84486d53 890
a6c2ba28 891 case VIDEO_MODE_AUTO:
892 break;
84486d53 893
a6c2ba28 894 default:
895 return -EINVAL;
84486d53 896
a6c2ba28 897 }
898 decoder->norm = *iarg;
899 break;
84486d53 900 }
84486d53 901 case DECODER_SET_INPUT:
a6c2ba28 902 {
903 int *iarg = arg;
904 if (*iarg < 0 || *iarg > 3) {
905 return -EINVAL;
906 }
84486d53 907
a6c2ba28 908 decoder->input = *iarg;
e1bc80ad 909 tvp5150_selmux(c, decoder->input);
84486d53 910
a6c2ba28 911 break;
912 }
84486d53 913 case DECODER_SET_OUTPUT:
a6c2ba28 914 {
915 int *iarg = arg;
84486d53 916
a6c2ba28 917 /* not much choice of outputs */
918 if (*iarg != 0) {
919 return -EINVAL;
920 }
921 break;
84486d53 922 }
84486d53 923 case DECODER_ENABLE_OUTPUT:
a6c2ba28 924 {
925 int *iarg = arg;
84486d53 926
a6c2ba28 927 decoder->enable = (*iarg != 0);
4c86f973 928
e1bc80ad 929 tvp5150_selmux(c, decoder->input);
84486d53 930
a6c2ba28 931 break;
4c86f973 932 }
a6c2ba28 933 case VIDIOC_QUERYCTRL:
934 {
935 struct v4l2_queryctrl *qc = arg;
c0477ad9 936 int i;
a6c2ba28 937
e1bc80ad 938 tvp5150_dbg(1, "VIDIOC_QUERYCTRL called\n");
a6c2ba28 939
c0477ad9 940 for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++)
a6c2ba28 941 if (qc->id && qc->id == tvp5150_qctrl[i].id) {
942 memcpy(qc, &(tvp5150_qctrl[i]),
943 sizeof(*qc));
944 return 0;
945 }
946
947 return -EINVAL;
4c86f973 948 }
a6c2ba28 949 case VIDIOC_G_CTRL:
950 {
951 struct v4l2_control *ctrl = arg;
e1bc80ad 952 tvp5150_dbg(1, "VIDIOC_G_CTRL called\n");
a6c2ba28 953
e1bc80ad 954 return tvp5150_get_ctrl(c, ctrl);
4c86f973 955 }
a6c2ba28 956 case VIDIOC_S_CTRL:
957 {
958 struct v4l2_control *ctrl = arg;
959 u8 i, n;
a6c2ba28 960 n = sizeof(tvp5150_qctrl) / sizeof(tvp5150_qctrl[0]);
961 for (i = 0; i < n; i++)
962 if (ctrl->id == tvp5150_qctrl[i].id) {
963 if (ctrl->value <
964 tvp5150_qctrl[i].minimum
965 || ctrl->value >
966 tvp5150_qctrl[i].maximum)
967 return -ERANGE;
e1bc80ad
MCC
968 tvp5150_dbg(1,
969 "VIDIOC_S_CTRL: id=%d, value=%d\n",
a6c2ba28 970 ctrl->id, ctrl->value);
e1bc80ad 971 return tvp5150_set_ctrl(c, ctrl);
a6c2ba28 972 }
973 return -EINVAL;
974 }
975
976 case DECODER_SET_PICTURE:
977 {
978 struct video_picture *pic = arg;
979 if (decoder->bright != pic->brightness) {
980 /* We want 0 to 255 we get 0-65535 */
981 decoder->bright = pic->brightness;
e1bc80ad 982 tvp5150_write(c, TVP5150_BRIGHT_CTL,
a6c2ba28 983 decoder->bright >> 8);
984 }
985 if (decoder->contrast != pic->contrast) {
986 /* We want 0 to 255 we get 0-65535 */
987 decoder->contrast = pic->contrast;
e1bc80ad 988 tvp5150_write(c, TVP5150_CONTRAST_CTL,
a6c2ba28 989 decoder->contrast >> 8);
990 }
991 if (decoder->sat != pic->colour) {
992 /* We want 0 to 255 we get 0-65535 */
993 decoder->sat = pic->colour;
e1bc80ad 994 tvp5150_write(c, TVP5150_SATURATION_CTL,
a6c2ba28 995 decoder->contrast >> 8);
996 }
997 if (decoder->hue != pic->hue) {
998 /* We want -128 to 127 we get 0-65535 */
999 decoder->hue = pic->hue;
e1bc80ad 1000 tvp5150_write(c, TVP5150_HUE_CTL,
a6c2ba28 1001 (decoder->hue - 32768) >> 8);
1002 }
1003 break;
4c86f973 1004 }
84486d53
MCC
1005 default:
1006 return -EINVAL;
1007 }
1008
1009 return 0;
1010}
cd4665c5
MCC
1011
1012/****************************************************************************
1013 I2C Client & Driver
1014 ****************************************************************************/
1015static struct i2c_driver driver;
1016
a6c2ba28 1017static struct i2c_client client_template = {
1018 .name = "(unset)",
a6c2ba28 1019 .driver = &driver,
cd4665c5
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1020};
1021
a6c2ba28 1022static int tvp5150_detect_client(struct i2c_adapter *adapter,
1023 int address, int kind)
cd4665c5 1024{
e1bc80ad 1025 struct i2c_client *c;
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1026 struct tvp5150 *core;
1027 int rv;
1028
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1029 if (debug)
1030 printk( KERN_INFO
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1031 "tvp5150.c: detecting tvp5150 client on address 0x%x\n",
1032 address << 1);
1033
1034 client_template.adapter = adapter;
1035 client_template.addr = address;
1036
1037 /* Check if the adapter supports the needed features */
1038 if (!i2c_check_functionality
1039 (adapter,
1040 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1041 return 0;
1042
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1043 c = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
1044 if (c == 0)
cd4665c5 1045 return -ENOMEM;
e1bc80ad 1046 memcpy(c, &client_template, sizeof(struct i2c_client));
cd4665c5 1047
7408187d 1048 core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL);
cd4665c5 1049 if (core == 0) {
e1bc80ad 1050 kfree(c);
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1051 return -ENOMEM;
1052 }
e1bc80ad 1053 i2c_set_clientdata(c, core);
cd4665c5 1054
e1bc80ad 1055 rv = i2c_attach_client(c);
cd4665c5 1056
3ad96835 1057 core->norm = V4L2_STD_ALL; /* Default is autodetect */
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1058 core->input = 2;
1059 core->enable = 1;
1060 core->bright = 32768;
1061 core->contrast = 32768;
1062 core->hue = 32768;
1063 core->sat = 32768;
1064
cd4665c5 1065 if (rv) {
e1bc80ad 1066 kfree(c);
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1067 kfree(core);
1068 return rv;
1069 }
1070
6ac48b45 1071// if (debug > 1)
e1bc80ad 1072 dump_reg(c);
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1073 return 0;
1074}
1075
a6c2ba28 1076static int tvp5150_attach_adapter(struct i2c_adapter *adapter)
cd4665c5 1077{
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1078 if (debug)
1079 printk( KERN_INFO
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1080 "tvp5150.c: starting probe for adapter %s (0x%x)\n",
1081 adapter->name, adapter->id);
1082 return i2c_probe(adapter, &addr_data, &tvp5150_detect_client);
1083}
1084
e1bc80ad 1085static int tvp5150_detach_client(struct i2c_client *c)
cd4665c5 1086{
e1bc80ad 1087 struct tvp5150 *decoder = i2c_get_clientdata(c);
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1088 int err;
1089
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1090 tvp5150_dbg(1,
1091 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1092 c->addr << 1);
1093
1094 err = i2c_detach_client(c);
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1095 if (err) {
1096 return err;
1097 }
1098
1099 kfree(decoder);
e1bc80ad 1100 kfree(c);
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1101
1102 return 0;
1103}
1104
1105/* ----------------------------------------------------------------------- */
1106
1107static struct i2c_driver driver = {
604f28e2 1108 .driver = {
604f28e2
LR
1109 .name = "tvp5150",
1110 },
cab462f7 1111 .id = I2C_DRIVERID_TVP5150,
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1112
1113 .attach_adapter = tvp5150_attach_adapter,
1114 .detach_client = tvp5150_detach_client,
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1115
1116 .command = tvp5150_command,
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1117};
1118
a6c2ba28 1119static int __init tvp5150_init(void)
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1120{
1121 return i2c_add_driver(&driver);
1122}
1123
a6c2ba28 1124static void __exit tvp5150_exit(void)
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1125{
1126 i2c_del_driver(&driver);
1127}
1128
1129module_init(tvp5150_init);
1130module_exit(tvp5150_exit);
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