V4L/DVB (6540): em28xx: fix failing autodetection after the reboot
[deliverable/linux.git] / drivers / media / video / tvp5150.c
CommitLineData
cd4665c5 1/*
6ac48b45 2 * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver
cd4665c5 3 *
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4 * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org)
5 * This code is placed under the terms of the GNU General Public License v2
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6 */
7
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8#include <linux/i2c.h>
9#include <linux/videodev.h>
10#include <linux/delay.h>
84486d53 11#include <linux/video_decoder.h>
e1bc80ad 12#include <media/v4l2-common.h>
c7c0b34c 13#include <media/tvp5150.h>
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14
15#include "tvp5150_reg.h"
16
6ac48b45 17MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver");
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18MODULE_AUTHOR("Mauro Carvalho Chehab");
19MODULE_LICENSE("GPL");
20
6ac48b45 21/* standard i2c insmod options */
cd4665c5 22static unsigned short normal_i2c[] = {
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23 0xb8 >> 1,
24 0xba >> 1,
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25 I2C_CLIENT_END
26};
27
28I2C_CLIENT_INSMOD;
29
30static int debug = 0;
31module_param(debug, int, 0);
32MODULE_PARM_DESC(debug, "Debug level (0-1)");
33
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34#define tvp5150_err(fmt, arg...) do { \
35 printk(KERN_ERR "%s %d-%04x: " fmt, c->driver->driver.name, \
36 i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0)
e1bc80ad 37#define tvp5150_info(fmt, arg...) do { \
cab462f7 38 printk(KERN_INFO "%s %d-%04x: " fmt, c->driver->driver.name, \
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39 i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0)
40#define tvp5150_dbg(num, fmt, arg...) \
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41 do { \
42 if (debug >= num) \
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43 printk(KERN_DEBUG "%s debug %d-%04x: " fmt,\
44 c->driver->driver.name, \
45 i2c_adapter_id(c->adapter), \
46 c->addr , ## arg); } while (0)
cd4665c5 47
a6c2ba28 48/* supported controls */
49static struct v4l2_queryctrl tvp5150_qctrl[] = {
50 {
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51 .id = V4L2_CID_BRIGHTNESS,
52 .type = V4L2_CTRL_TYPE_INTEGER,
53 .name = "Brightness",
54 .minimum = 0,
55 .maximum = 255,
56 .step = 1,
75bc8019 57 .default_value = 128,
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58 .flags = 0,
59 }, {
60 .id = V4L2_CID_CONTRAST,
61 .type = V4L2_CTRL_TYPE_INTEGER,
62 .name = "Contrast",
63 .minimum = 0,
64 .maximum = 255,
65 .step = 0x1,
75bc8019 66 .default_value = 128,
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67 .flags = 0,
68 }, {
a6c2ba28 69 .id = V4L2_CID_SATURATION,
70 .type = V4L2_CTRL_TYPE_INTEGER,
71 .name = "Saturation",
72 .minimum = 0,
73 .maximum = 255,
74 .step = 0x1,
75bc8019 75 .default_value = 128,
a6c2ba28 76 .flags = 0,
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77 }, {
78 .id = V4L2_CID_HUE,
79 .type = V4L2_CTRL_TYPE_INTEGER,
80 .name = "Hue",
81 .minimum = -128,
82 .maximum = 127,
83 .step = 0x1,
75bc8019 84 .default_value = 0,
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85 .flags = 0,
86 }
a6c2ba28 87};
88
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89struct tvp5150 {
90 struct i2c_client *client;
84486d53 91
3ad96835 92 v4l2_std_id norm; /* Current set standard */
c7c0b34c 93 struct v4l2_routing route;
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94 int enable;
95 int bright;
96 int contrast;
97 int hue;
98 int sat;
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99};
100
858119e1 101static int tvp5150_read(struct i2c_client *c, unsigned char addr)
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102{
103 unsigned char buffer[1];
104 int rc;
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105
106 buffer[0] = addr;
107 if (1 != (rc = i2c_master_send(c, buffer, 1)))
e1bc80ad 108 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc);
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109
110 msleep(10);
111
112 if (1 != (rc = i2c_master_recv(c, buffer, 1)))
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113 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 1)\n", rc);
114
115 tvp5150_dbg(2, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]);
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116
117 return (buffer[0]);
118}
119
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120static inline void tvp5150_write(struct i2c_client *c, unsigned char addr,
121 unsigned char value)
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122{
123 unsigned char buffer[2];
124 int rc;
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125
126 buffer[0] = addr;
84486d53 127 buffer[1] = value;
e1bc80ad 128 tvp5150_dbg(2, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]);
cd4665c5 129 if (2 != (rc = i2c_master_send(c, buffer, 2)))
e1bc80ad 130 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 2)\n", rc);
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131}
132
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133static void dump_reg_range(struct i2c_client *c, char *s, u8 init, const u8 end,int max_line)
134{
135 int i=0;
136
137 while (init!=(u8)(end+1)) {
138 if ((i%max_line) == 0) {
139 if (i>0)
140 printk("\n");
141 printk("tvp5150: %s reg 0x%02x = ",s,init);
142 }
143 printk("%02x ",tvp5150_read(c, init));
144
145 init++;
146 i++;
147 }
148 printk("\n");
149}
150
84486d53 151static void dump_reg(struct i2c_client *c)
cd4665c5 152{
84486d53 153 printk("tvp5150: Video input source selection #1 = 0x%02x\n",
3ad96835 154 tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1));
84486d53 155 printk("tvp5150: Analog channel controls = 0x%02x\n",
3ad96835 156 tvp5150_read(c, TVP5150_ANAL_CHL_CTL));
84486d53 157 printk("tvp5150: Operation mode controls = 0x%02x\n",
3ad96835 158 tvp5150_read(c, TVP5150_OP_MODE_CTL));
84486d53 159 printk("tvp5150: Miscellaneous controls = 0x%02x\n",
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160 tvp5150_read(c, TVP5150_MISC_CTL));
161 printk("tvp5150: Autoswitch mask= 0x%02x\n",
162 tvp5150_read(c, TVP5150_AUTOSW_MSK));
84486d53 163 printk("tvp5150: Color killer threshold control = 0x%02x\n",
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164 tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL));
165 printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
166 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1),
167 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2),
168 tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3));
84486d53 169 printk("tvp5150: Brightness control = 0x%02x\n",
3ad96835 170 tvp5150_read(c, TVP5150_BRIGHT_CTL));
84486d53 171 printk("tvp5150: Color saturation control = 0x%02x\n",
3ad96835 172 tvp5150_read(c, TVP5150_SATURATION_CTL));
84486d53 173 printk("tvp5150: Hue control = 0x%02x\n",
3ad96835 174 tvp5150_read(c, TVP5150_HUE_CTL));
84486d53 175 printk("tvp5150: Contrast control = 0x%02x\n",
3ad96835 176 tvp5150_read(c, TVP5150_CONTRAST_CTL));
84486d53 177 printk("tvp5150: Outputs and data rates select = 0x%02x\n",
3ad96835 178 tvp5150_read(c, TVP5150_DATA_RATE_SEL));
84486d53 179 printk("tvp5150: Configuration shared pins = 0x%02x\n",
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180 tvp5150_read(c, TVP5150_CONF_SHARED_PIN));
181 printk("tvp5150: Active video cropping start = 0x%02x%02x\n",
182 tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB),
183 tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB));
184 printk("tvp5150: Active video cropping stop = 0x%02x%02x\n",
185 tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB),
186 tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB));
84486d53 187 printk("tvp5150: Genlock/RTC = 0x%02x\n",
3ad96835 188 tvp5150_read(c, TVP5150_GENLOCK));
84486d53 189 printk("tvp5150: Horizontal sync start = 0x%02x\n",
3ad96835 190 tvp5150_read(c, TVP5150_HORIZ_SYNC_START));
84486d53 191 printk("tvp5150: Vertical blanking start = 0x%02x\n",
3ad96835 192 tvp5150_read(c, TVP5150_VERT_BLANKING_START));
84486d53 193 printk("tvp5150: Vertical blanking stop = 0x%02x\n",
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194 tvp5150_read(c, TVP5150_VERT_BLANKING_STOP));
195 printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
196 tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1),
197 tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2));
84486d53 198 printk("tvp5150: Interrupt reset register B = 0x%02x\n",
3ad96835 199 tvp5150_read(c, TVP5150_INT_RESET_REG_B));
84486d53 200 printk("tvp5150: Interrupt enable register B = 0x%02x\n",
3ad96835 201 tvp5150_read(c, TVP5150_INT_ENABLE_REG_B));
84486d53 202 printk("tvp5150: Interrupt configuration register B = 0x%02x\n",
3ad96835 203 tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B));
84486d53 204 printk("tvp5150: Video standard = 0x%02x\n",
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205 tvp5150_read(c, TVP5150_VIDEO_STD));
206 printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
207 tvp5150_read(c, TVP5150_CB_GAIN_FACT),
208 tvp5150_read(c, TVP5150_CR_GAIN_FACTOR));
84486d53 209 printk("tvp5150: Macrovision on counter = 0x%02x\n",
3ad96835 210 tvp5150_read(c, TVP5150_MACROVISION_ON_CTR));
84486d53 211 printk("tvp5150: Macrovision off counter = 0x%02x\n",
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212 tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR));
213 printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
214 (tvp5150_read(c, TVP5150_REV_SELECT)&1)?3:4);
215 printk("tvp5150: Device ID = %02x%02x\n",
216 tvp5150_read(c, TVP5150_MSB_DEV_ID),
217 tvp5150_read(c, TVP5150_LSB_DEV_ID));
218 printk("tvp5150: ROM version = (hex) %02x.%02x\n",
219 tvp5150_read(c, TVP5150_ROM_MAJOR_VER),
220 tvp5150_read(c, TVP5150_ROM_MINOR_VER));
221 printk("tvp5150: Vertical line count = 0x%02x%02x\n",
222 tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB),
223 tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB));
84486d53 224 printk("tvp5150: Interrupt status register B = 0x%02x\n",
3ad96835 225 tvp5150_read(c, TVP5150_INT_STATUS_REG_B));
84486d53 226 printk("tvp5150: Interrupt active register B = 0x%02x\n",
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227 tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B));
228 printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
229 tvp5150_read(c, TVP5150_STATUS_REG_1),
230 tvp5150_read(c, TVP5150_STATUS_REG_2),
231 tvp5150_read(c, TVP5150_STATUS_REG_3),
232 tvp5150_read(c, TVP5150_STATUS_REG_4),
233 tvp5150_read(c, TVP5150_STATUS_REG_5));
234
235 dump_reg_range(c,"Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
236 TVP5150_TELETEXT_FIL1_END,8);
237 dump_reg_range(c,"Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
238 TVP5150_TELETEXT_FIL2_END,8);
239
84486d53 240 printk("tvp5150: Teletext filter enable = 0x%02x\n",
3ad96835 241 tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA));
84486d53 242 printk("tvp5150: Interrupt status register A = 0x%02x\n",
3ad96835 243 tvp5150_read(c, TVP5150_INT_STATUS_REG_A));
84486d53 244 printk("tvp5150: Interrupt enable register A = 0x%02x\n",
3ad96835 245 tvp5150_read(c, TVP5150_INT_ENABLE_REG_A));
84486d53 246 printk("tvp5150: Interrupt configuration = 0x%02x\n",
3ad96835 247 tvp5150_read(c, TVP5150_INT_CONF));
84486d53 248 printk("tvp5150: VDP status register = 0x%02x\n",
3ad96835 249 tvp5150_read(c, TVP5150_VDP_STATUS_REG));
84486d53 250 printk("tvp5150: FIFO word count = 0x%02x\n",
3ad96835 251 tvp5150_read(c, TVP5150_FIFO_WORD_COUNT));
84486d53 252 printk("tvp5150: FIFO interrupt threshold = 0x%02x\n",
3ad96835 253 tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD));
84486d53 254 printk("tvp5150: FIFO reset = 0x%02x\n",
3ad96835 255 tvp5150_read(c, TVP5150_FIFO_RESET));
84486d53 256 printk("tvp5150: Line number interrupt = 0x%02x\n",
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257 tvp5150_read(c, TVP5150_LINE_NUMBER_INT));
258 printk("tvp5150: Pixel alignment register = 0x%02x%02x\n",
259 tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH),
260 tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW));
84486d53 261 printk("tvp5150: FIFO output control = 0x%02x\n",
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262 tvp5150_read(c, TVP5150_FIFO_OUT_CTRL));
263 printk("tvp5150: Full field enable = 0x%02x\n",
264 tvp5150_read(c, TVP5150_FULL_FIELD_ENA));
84486d53 265 printk("tvp5150: Full field mode register = 0x%02x\n",
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266 tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG));
267
268 dump_reg_range(c,"CC data", TVP5150_CC_DATA_INI,
269 TVP5150_CC_DATA_END,8);
270
271 dump_reg_range(c,"WSS data", TVP5150_WSS_DATA_INI,
272 TVP5150_WSS_DATA_END,8);
273
274 dump_reg_range(c,"VPS data", TVP5150_VPS_DATA_INI,
275 TVP5150_VPS_DATA_END,8);
276
277 dump_reg_range(c,"VITC data", TVP5150_VITC_DATA_INI,
278 TVP5150_VITC_DATA_END,10);
279
280 dump_reg_range(c,"Line mode", TVP5150_LINE_MODE_INI,
281 TVP5150_LINE_MODE_END,8);
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282}
283
284/****************************************************************************
285 Basic functions
286 ****************************************************************************/
cd4665c5 287
c7c0b34c 288static inline void tvp5150_selmux(struct i2c_client *c)
cd4665c5 289{
c0477ad9 290 int opmode=0;
4c86f973 291 struct tvp5150 *decoder = i2c_get_clientdata(c);
c7c0b34c 292 int input = 0;
84486d53 293
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294 if ((decoder->route.output & TVP5150_BLACK_SCREEN) || !decoder->enable)
295 input = 8;
4c86f973 296
12500f07 297 switch (decoder->route.input) {
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298 case TVP5150_COMPOSITE1:
299 input |= 2;
300 /* fall through */
301 case TVP5150_COMPOSITE0:
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302 opmode=0x30; /* TV Mode */
303 break;
c7c0b34c 304 case TVP5150_SVIDEO:
c0477ad9 305 default:
c7c0b34c 306 input |= 1;
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307 opmode=0; /* Auto Mode */
308 break;
309 }
310
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311 tvp5150_dbg( 1, "Selecting video route: route input=%i, output=%i "
312 "=> tvp5150 input=%i, opmode=%i\n",
313 decoder->route.input,decoder->route.output,
314 input, opmode );
315
c0477ad9 316 tvp5150_write(c, TVP5150_OP_MODE_CTL, opmode);
a6c2ba28 317 tvp5150_write(c, TVP5150_VD_IN_SRC_SEL_1, input);
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318};
319
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320struct i2c_reg_value {
321 unsigned char reg;
322 unsigned char value;
323};
324
325/* Default values as sugested at TVP5150AM1 datasheet */
326static const struct i2c_reg_value tvp5150_init_default[] = {
327 { /* 0x00 */
328 TVP5150_VD_IN_SRC_SEL_1,0x00
329 },
330 { /* 0x01 */
331 TVP5150_ANAL_CHL_CTL,0x15
332 },
333 { /* 0x02 */
334 TVP5150_OP_MODE_CTL,0x00
335 },
336 { /* 0x03 */
337 TVP5150_MISC_CTL,0x01
338 },
339 { /* 0x06 */
340 TVP5150_COLOR_KIL_THSH_CTL,0x10
341 },
342 { /* 0x07 */
343 TVP5150_LUMA_PROC_CTL_1,0x60
344 },
345 { /* 0x08 */
346 TVP5150_LUMA_PROC_CTL_2,0x00
347 },
348 { /* 0x09 */
349 TVP5150_BRIGHT_CTL,0x80
350 },
351 { /* 0x0a */
352 TVP5150_SATURATION_CTL,0x80
353 },
354 { /* 0x0b */
355 TVP5150_HUE_CTL,0x00
356 },
357 { /* 0x0c */
358 TVP5150_CONTRAST_CTL,0x80
359 },
360 { /* 0x0d */
361 TVP5150_DATA_RATE_SEL,0x47
362 },
363 { /* 0x0e */
364 TVP5150_LUMA_PROC_CTL_3,0x00
365 },
366 { /* 0x0f */
367 TVP5150_CONF_SHARED_PIN,0x08
368 },
369 { /* 0x11 */
370 TVP5150_ACT_VD_CROP_ST_MSB,0x00
371 },
372 { /* 0x12 */
373 TVP5150_ACT_VD_CROP_ST_LSB,0x00
374 },
375 { /* 0x13 */
376 TVP5150_ACT_VD_CROP_STP_MSB,0x00
377 },
378 { /* 0x14 */
379 TVP5150_ACT_VD_CROP_STP_LSB,0x00
380 },
381 { /* 0x15 */
382 TVP5150_GENLOCK,0x01
383 },
384 { /* 0x16 */
385 TVP5150_HORIZ_SYNC_START,0x80
386 },
387 { /* 0x18 */
388 TVP5150_VERT_BLANKING_START,0x00
389 },
390 { /* 0x19 */
391 TVP5150_VERT_BLANKING_STOP,0x00
392 },
393 { /* 0x1a */
394 TVP5150_CHROMA_PROC_CTL_1,0x0c
395 },
396 { /* 0x1b */
397 TVP5150_CHROMA_PROC_CTL_2,0x14
398 },
399 { /* 0x1c */
400 TVP5150_INT_RESET_REG_B,0x00
401 },
402 { /* 0x1d */
403 TVP5150_INT_ENABLE_REG_B,0x00
404 },
405 { /* 0x1e */
406 TVP5150_INTT_CONFIG_REG_B,0x00
407 },
408 { /* 0x28 */
409 TVP5150_VIDEO_STD,0x00
410 },
411 { /* 0x2e */
412 TVP5150_MACROVISION_ON_CTR,0x0f
413 },
414 { /* 0x2f */
415 TVP5150_MACROVISION_OFF_CTR,0x01
416 },
417 { /* 0xbb */
418 TVP5150_TELETEXT_FIL_ENA,0x00
419 },
420 { /* 0xc0 */
421 TVP5150_INT_STATUS_REG_A,0x00
422 },
423 { /* 0xc1 */
424 TVP5150_INT_ENABLE_REG_A,0x00
425 },
426 { /* 0xc2 */
427 TVP5150_INT_CONF,0x04
428 },
429 { /* 0xc8 */
430 TVP5150_FIFO_INT_THRESHOLD,0x80
431 },
432 { /* 0xc9 */
433 TVP5150_FIFO_RESET,0x00
434 },
435 { /* 0xca */
436 TVP5150_LINE_NUMBER_INT,0x00
437 },
438 { /* 0xcb */
439 TVP5150_PIX_ALIGN_REG_LOW,0x4e
440 },
441 { /* 0xcc */
442 TVP5150_PIX_ALIGN_REG_HIGH,0x00
443 },
444 { /* 0xcd */
445 TVP5150_FIFO_OUT_CTRL,0x01
446 },
447 { /* 0xcf */
3ad96835 448 TVP5150_FULL_FIELD_ENA,0x00
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449 },
450 { /* 0xd0 */
3ad96835 451 TVP5150_LINE_MODE_INI,0x00
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452 },
453 { /* 0xfc */
454 TVP5150_FULL_FIELD_MODE_REG,0x7f
455 },
456 { /* end of data */
457 0xff,0xff
458 }
459};
460
461/* Default values as sugested at TVP5150AM1 datasheet */
462static const struct i2c_reg_value tvp5150_init_enable[] = {
463 {
464 TVP5150_CONF_SHARED_PIN, 2
465 },{ /* Automatic offset and AGC enabled */
466 TVP5150_ANAL_CHL_CTL, 0x15
467 },{ /* Activate YCrCb output 0x9 or 0xd ? */
468 TVP5150_MISC_CTL, 0x6f
469 },{ /* Activates video std autodetection for all standards */
470 TVP5150_AUTOSW_MSK, 0x0
471 },{ /* Default format: 0x47. For 4:2:2: 0x40 */
472 TVP5150_DATA_RATE_SEL, 0x47
473 },{
474 TVP5150_CHROMA_PROC_CTL_1, 0x0c
475 },{
476 TVP5150_CHROMA_PROC_CTL_2, 0x54
477 },{ /* Non documented, but initialized on WinTV USB2 */
478 0x27, 0x20
479 },{
480 0xff,0xff
481 }
482};
483
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MCC
484struct tvp5150_vbi_type {
485 unsigned int vbi_type;
486 unsigned int ini_line;
487 unsigned int end_line;
488 unsigned int by_field :1;
489};
490
e1bc80ad
MCC
491struct i2c_vbi_ram_value {
492 u16 reg;
6ac48b45
MCC
493 struct tvp5150_vbi_type type;
494 unsigned char values[16];
e1bc80ad
MCC
495};
496
6ac48b45
MCC
497/* This struct have the values for each supported VBI Standard
498 * by
499 tvp5150_vbi_types should follow the same order as vbi_ram_default
3ad96835
MCC
500 * value 0 means rom position 0x10, value 1 means rom position 0x30
501 * and so on. There are 16 possible locations from 0 to 15.
502 */
3ad96835 503
a9cff90e 504static struct i2c_vbi_ram_value vbi_ram_default[] =
cd4665c5 505{
9bc7400a
HV
506 /* FIXME: Current api doesn't handle all VBI types, those not
507 yet supported are placed under #if 0 */
508#if 0
6ac48b45
MCC
509 {0x010, /* Teletext, SECAM, WST System A */
510 {V4L2_SLICED_TELETEXT_SECAM,6,23,1},
511 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
512 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 513 },
9bc7400a 514#endif
6ac48b45 515 {0x030, /* Teletext, PAL, WST System B */
9bc7400a 516 {V4L2_SLICED_TELETEXT_B,6,22,1},
6ac48b45
MCC
517 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
518 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 519 },
9bc7400a 520#if 0
6ac48b45
MCC
521 {0x050, /* Teletext, PAL, WST System C */
522 {V4L2_SLICED_TELETEXT_PAL_C,6,22,1},
523 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
524 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 525 },
6ac48b45
MCC
526 {0x070, /* Teletext, NTSC, WST System B */
527 {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1},
528 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
529 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 530 },
6ac48b45
MCC
531 {0x090, /* Tetetext, NTSC NABTS System C */
532 {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1},
533 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
534 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
e1bc80ad 535 },
6ac48b45
MCC
536 {0x0b0, /* Teletext, NTSC-J, NABTS System D */
537 {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1},
538 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
539 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 540 },
6ac48b45
MCC
541 {0x0d0, /* Closed Caption, PAL/SECAM */
542 {V4L2_SLICED_CAPTION_625,22,22,1},
543 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
544 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 545 },
9bc7400a 546#endif
6ac48b45
MCC
547 {0x0f0, /* Closed Caption, NTSC */
548 {V4L2_SLICED_CAPTION_525,21,21,1},
549 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
550 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 551 },
6ac48b45 552 {0x110, /* Wide Screen Signal, PAL/SECAM */
12db5607 553 {V4L2_SLICED_WSS_625,23,23,1},
6ac48b45
MCC
554 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
555 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
e1bc80ad 556 },
9bc7400a 557#if 0
6ac48b45
MCC
558 {0x130, /* Wide Screen Signal, NTSC C */
559 {V4L2_SLICED_WSS_525,20,20,1},
560 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
561 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
e1bc80ad 562 },
6ac48b45
MCC
563 {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
564 {V4l2_SLICED_VITC_625,6,22,0},
565 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
566 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 567 },
6ac48b45
MCC
568 {0x170, /* Vertical Interval Timecode (VITC), NTSC */
569 {V4l2_SLICED_VITC_525,10,20,0},
570 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
571 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 572 },
9bc7400a 573#endif
6ac48b45
MCC
574 {0x190, /* Video Program System (VPS), PAL */
575 {V4L2_SLICED_VPS,16,16,0},
576 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
577 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
3ad96835 578 },
6ac48b45
MCC
579 /* 0x1d0 User programmable */
580
581 /* End of struct */
582 { (u16)-1 }
e1bc80ad 583};
4c86f973 584
e1bc80ad 585static int tvp5150_write_inittab(struct i2c_client *c,
6ac48b45 586 const struct i2c_reg_value *regs)
e1bc80ad
MCC
587{
588 while (regs->reg != 0xff) {
589 tvp5150_write(c, regs->reg, regs->value);
590 regs++;
591 }
592 return 0;
593}
84486d53 594
e1bc80ad 595static int tvp5150_vdp_init(struct i2c_client *c,
6ac48b45 596 const struct i2c_vbi_ram_value *regs)
e1bc80ad
MCC
597{
598 unsigned int i;
cd4665c5 599
e1bc80ad 600 /* Disable Full Field */
3ad96835 601 tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0);
cd4665c5 602
e1bc80ad 603 /* Before programming, Line mode should be at 0xff */
3ad96835 604 for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++)
e1bc80ad 605 tvp5150_write(c, i, 0xff);
cd4665c5 606
e1bc80ad
MCC
607 /* Load Ram Table */
608 while (regs->reg != (u16)-1 ) {
609 tvp5150_write(c, TVP5150_CONF_RAM_ADDR_HIGH,regs->reg>>8);
610 tvp5150_write(c, TVP5150_CONF_RAM_ADDR_LOW,regs->reg);
cd4665c5 611
e1bc80ad
MCC
612 for (i=0;i<16;i++)
613 tvp5150_write(c, TVP5150_VDP_CONF_RAM_DATA,regs->values[i]);
84486d53 614
e1bc80ad
MCC
615 regs++;
616 }
617 return 0;
618}
cd4665c5 619
6ac48b45
MCC
620/* Fills VBI capabilities based on i2c_vbi_ram_value struct */
621static void tvp5150_vbi_get_cap(const struct i2c_vbi_ram_value *regs,
622 struct v4l2_sliced_vbi_cap *cap)
623{
624 int line;
625
626 memset(cap, 0, sizeof *cap);
627
628 while (regs->reg != (u16)-1 ) {
629 for (line=regs->type.ini_line;line<=regs->type.end_line;line++) {
630 cap->service_lines[0][line] |= regs->type.vbi_type;
631 }
632 cap->service_set |= regs->type.vbi_type;
633
634 regs++;
635 }
636}
637
3ad96835
MCC
638/* Set vbi processing
639 * type - one of tvp5150_vbi_types
640 * line - line to gather data
641 * fields: bit 0 field1, bit 1, field2
642 * flags (default=0xf0) is a bitmask, were set means:
643 * bit 7: enable filtering null bytes on CC
644 * bit 6: send data also to FIFO
645 * bit 5: don't allow data with errors on FIFO
646 * bit 4: enable ECC when possible
647 * pix_align = pix alignment:
648 * LSB = field1
649 * MSB = field2
650 */
2701dacb
MCC
651static int tvp5150_set_vbi(struct i2c_client *c,
652 const struct i2c_vbi_ram_value *regs,
653 unsigned int type,u8 flags, int line,
654 const int fields)
3ad96835
MCC
655{
656 struct tvp5150 *decoder = i2c_get_clientdata(c);
657 v4l2_std_id std=decoder->norm;
658 u8 reg;
2701dacb 659 int pos=0;
3ad96835
MCC
660
661 if (std == V4L2_STD_ALL) {
662 tvp5150_err("VBI can't be configured without knowing number of lines\n");
12db5607 663 return 0;
3ad96835
MCC
664 } else if (std && V4L2_STD_625_50) {
665 /* Don't follow NTSC Line number convension */
666 line += 3;
667 }
668
669 if (line<6||line>27)
2701dacb
MCC
670 return 0;
671
672 while (regs->reg != (u16)-1 ) {
673 if ((type & regs->type.vbi_type) &&
674 (line>=regs->type.ini_line) &&
675 (line<=regs->type.end_line)) {
676 type=regs->type.vbi_type;
677 break;
678 }
679
680 regs++;
681 pos++;
682 }
683 if (regs->reg == (u16)-1)
684 return 0;
3ad96835 685
2701dacb 686 type=pos | (flags & 0xf0);
3ad96835
MCC
687 reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;
688
689 if (fields&1) {
690 tvp5150_write(c, reg, type);
691 }
692
693 if (fields&2) {
694 tvp5150_write(c, reg+1, type);
695 }
696
2701dacb 697 return type;
3ad96835
MCC
698}
699
12db5607
MCC
700static int tvp5150_get_vbi(struct i2c_client *c,
701 const struct i2c_vbi_ram_value *regs, int line)
702{
703 struct tvp5150 *decoder = i2c_get_clientdata(c);
704 v4l2_std_id std=decoder->norm;
705 u8 reg;
706 int pos, type=0;
707
708 if (std == V4L2_STD_ALL) {
709 tvp5150_err("VBI can't be configured without knowing number of lines\n");
710 return 0;
711 } else if (std && V4L2_STD_625_50) {
712 /* Don't follow NTSC Line number convension */
713 line += 3;
714 }
715
716 if (line<6||line>27)
717 return 0;
718
719 reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;
720
721 pos=tvp5150_read(c, reg)&0x0f;
722 if (pos<0x0f)
723 type=regs[pos].type.vbi_type;
724
725 pos=tvp5150_read(c, reg+1)&0x0f;
726 if (pos<0x0f)
727 type|=regs[pos].type.vbi_type;
728
729 return type;
730}
e1bc80ad
MCC
731static int tvp5150_set_std(struct i2c_client *c, v4l2_std_id std)
732{
733 struct tvp5150 *decoder = i2c_get_clientdata(c);
734 int fmt=0;
735
736 decoder->norm=std;
737
738 /* First tests should be against specific std */
739
740 if (std == V4L2_STD_ALL) {
741 fmt=0; /* Autodetect mode */
742 } else if (std & V4L2_STD_NTSC_443) {
743 fmt=0xa;
744 } else if (std & V4L2_STD_PAL_M) {
745 fmt=0x6;
746 } else if (std & (V4L2_STD_PAL_N| V4L2_STD_PAL_Nc)) {
747 fmt=0x8;
748 } else {
749 /* Then, test against generic ones */
750 if (std & V4L2_STD_NTSC) {
751 fmt=0x2;
752 } else if (std & V4L2_STD_PAL) {
753 fmt=0x4;
754 } else if (std & V4L2_STD_SECAM) {
755 fmt=0xc;
756 }
757 }
84486d53 758
e1bc80ad
MCC
759 tvp5150_dbg(1,"Set video std register to %d.\n",fmt);
760 tvp5150_write(c, TVP5150_VIDEO_STD, fmt);
84486d53 761
e1bc80ad
MCC
762 return 0;
763}
764
765static inline void tvp5150_reset(struct i2c_client *c)
766{
e36eaa71 767 u8 msb_id, lsb_id, msb_rom, lsb_rom;
e1bc80ad
MCC
768 struct tvp5150 *decoder = i2c_get_clientdata(c);
769
e1bc80ad
MCC
770 msb_id=tvp5150_read(c,TVP5150_MSB_DEV_ID);
771 lsb_id=tvp5150_read(c,TVP5150_LSB_DEV_ID);
772 msb_rom=tvp5150_read(c,TVP5150_ROM_MAJOR_VER);
773 lsb_rom=tvp5150_read(c,TVP5150_ROM_MINOR_VER);
774
e36eaa71
MCC
775 if ((msb_rom==4)&&(lsb_rom==0)) { /* Is TVP5150AM1 */
776 tvp5150_info("tvp%02x%02xam1 detected.\n",msb_id, lsb_id);
777
778 /* ITU-T BT.656.4 timing */
779 tvp5150_write(c,TVP5150_REV_SELECT,0);
e1bc80ad 780 } else {
e36eaa71
MCC
781 if ((msb_rom==3)||(lsb_rom==0x21)) { /* Is TVP5150A */
782 tvp5150_info("tvp%02x%02xa detected.\n",msb_id, lsb_id);
783 } else {
784 tvp5150_info("*** unknown tvp%02x%02x chip detected.\n",msb_id,lsb_id);
785 tvp5150_info("*** Rom ver is %d.%d\n",msb_rom,lsb_rom);
786 }
e1bc80ad 787 }
84486d53 788
e1bc80ad
MCC
789 /* Initializes TVP5150 to its default values */
790 tvp5150_write_inittab(c, tvp5150_init_default);
791
792 /* Initializes VDP registers */
793 tvp5150_vdp_init(c, vbi_ram_default);
794
795 /* Selects decoder input */
c7c0b34c 796 tvp5150_selmux(c);
e1bc80ad
MCC
797
798 /* Initializes TVP5150 to stream enabled values */
799 tvp5150_write_inittab(c, tvp5150_init_enable);
800
801 /* Initialize image preferences */
032c2028
MCC
802 tvp5150_write(c, TVP5150_BRIGHT_CTL, decoder->bright);
803 tvp5150_write(c, TVP5150_CONTRAST_CTL, decoder->contrast);
804 tvp5150_write(c, TVP5150_SATURATION_CTL, decoder->contrast);
805 tvp5150_write(c, TVP5150_HUE_CTL, decoder->hue);
e1bc80ad
MCC
806
807 tvp5150_set_std(c, decoder->norm);
cd4665c5
MCC
808};
809
a6c2ba28 810static int tvp5150_get_ctrl(struct i2c_client *c, struct v4l2_control *ctrl)
811{
812/* struct tvp5150 *decoder = i2c_get_clientdata(c); */
813
814 switch (ctrl->id) {
815 case V4L2_CID_BRIGHTNESS:
816 ctrl->value = tvp5150_read(c, TVP5150_BRIGHT_CTL);
817 return 0;
818 case V4L2_CID_CONTRAST:
819 ctrl->value = tvp5150_read(c, TVP5150_CONTRAST_CTL);
820 return 0;
821 case V4L2_CID_SATURATION:
822 ctrl->value = tvp5150_read(c, TVP5150_SATURATION_CTL);
823 return 0;
824 case V4L2_CID_HUE:
825 ctrl->value = tvp5150_read(c, TVP5150_HUE_CTL);
826 return 0;
a6c2ba28 827 }
c0477ad9 828 return -EINVAL;
a6c2ba28 829}
830
831static int tvp5150_set_ctrl(struct i2c_client *c, struct v4l2_control *ctrl)
832{
833/* struct tvp5150 *decoder = i2c_get_clientdata(c); */
834
835 switch (ctrl->id) {
836 case V4L2_CID_BRIGHTNESS:
837 tvp5150_write(c, TVP5150_BRIGHT_CTL, ctrl->value);
838 return 0;
839 case V4L2_CID_CONTRAST:
840 tvp5150_write(c, TVP5150_CONTRAST_CTL, ctrl->value);
841 return 0;
842 case V4L2_CID_SATURATION:
843 tvp5150_write(c, TVP5150_SATURATION_CTL, ctrl->value);
844 return 0;
845 case V4L2_CID_HUE:
846 tvp5150_write(c, TVP5150_HUE_CTL, ctrl->value);
847 return 0;
a6c2ba28 848 }
c0477ad9 849 return -EINVAL;
a6c2ba28 850}
851
84486d53
MCC
852/****************************************************************************
853 I2C Command
854 ****************************************************************************/
e1bc80ad 855static int tvp5150_command(struct i2c_client *c,
84486d53
MCC
856 unsigned int cmd, void *arg)
857{
e1bc80ad 858 struct tvp5150 *decoder = i2c_get_clientdata(c);
84486d53
MCC
859
860 switch (cmd) {
861
862 case 0:
e1bc80ad 863 case VIDIOC_INT_RESET:
e1bc80ad
MCC
864 tvp5150_reset(c);
865 break;
c7c0b34c
HV
866 case VIDIOC_INT_G_VIDEO_ROUTING:
867 {
868 struct v4l2_routing *route = arg;
869
870 *route = decoder->route;
871 break;
872 }
873 case VIDIOC_INT_S_VIDEO_ROUTING:
874 {
875 struct v4l2_routing *route = arg;
876
877 decoder->route = *route;
878 tvp5150_selmux(c);
879 break;
880 }
e1bc80ad
MCC
881 case VIDIOC_S_STD:
882 if (decoder->norm == *(v4l2_std_id *)arg)
883 break;
884 return tvp5150_set_std(c, *(v4l2_std_id *)arg);
885 case VIDIOC_G_STD:
886 *(v4l2_std_id *)arg = decoder->norm;
84486d53
MCC
887 break;
888
6ac48b45
MCC
889 case VIDIOC_G_SLICED_VBI_CAP:
890 {
891 struct v4l2_sliced_vbi_cap *cap = arg;
892 tvp5150_dbg(1, "VIDIOC_G_SLICED_VBI_CAP\n");
893
894 tvp5150_vbi_get_cap(vbi_ram_default, cap);
895 break;
896 }
2701dacb
MCC
897 case VIDIOC_S_FMT:
898 {
899 struct v4l2_format *fmt;
900 struct v4l2_sliced_vbi_format *svbi;
901 int i;
6ac48b45 902
2701dacb
MCC
903 fmt = arg;
904 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
905 return -EINVAL;
906 svbi = &fmt->fmt.sliced;
907 if (svbi->service_set != 0) {
908 for (i = 0; i <= 23; i++) {
909 svbi->service_lines[1][i] = 0;
910
911 svbi->service_lines[0][i]=tvp5150_set_vbi(c,
912 vbi_ram_default,
913 svbi->service_lines[0][i],0xf0,i,3);
914 }
12db5607
MCC
915 /* Enables FIFO */
916 tvp5150_write(c, TVP5150_FIFO_OUT_CTRL,1);
917 } else {
918 /* Disables FIFO*/
919 tvp5150_write(c, TVP5150_FIFO_OUT_CTRL,0);
920
921 /* Disable Full Field */
922 tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0);
923
924 /* Disable Line modes */
925 for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++)
926 tvp5150_write(c, i, 0xff);
927 }
928 break;
929 }
930 case VIDIOC_G_FMT:
931 {
932 struct v4l2_format *fmt;
933 struct v4l2_sliced_vbi_format *svbi;
934
935 int i, mask=0;
936
937 fmt = arg;
938 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
939 return -EINVAL;
940 svbi = &fmt->fmt.sliced;
941 memset(svbi, 0, sizeof(*svbi));
942
943 for (i = 0; i <= 23; i++) {
944 svbi->service_lines[0][i]=tvp5150_get_vbi(c,
945 vbi_ram_default,i);
946 mask|=svbi->service_lines[0][i];
2701dacb 947 }
12db5607 948 svbi->service_set=mask;
2701dacb
MCC
949 break;
950 }
12db5607 951
21dcd8cc 952#ifdef CONFIG_VIDEO_ADV_DEBUG
52ebc763 953 case VIDIOC_DBG_G_REGISTER:
52ebc763 954 case VIDIOC_DBG_S_REGISTER:
21dcd8cc
MCC
955 {
956 struct v4l2_register *reg = arg;
957
f3d092b8 958 if (!v4l2_chip_match_i2c_client(c, reg->match_type, reg->match_chip))
21dcd8cc
MCC
959 return -EINVAL;
960 if (!capable(CAP_SYS_ADMIN))
961 return -EPERM;
62d50add
TP
962 if (cmd == VIDIOC_DBG_G_REGISTER)
963 reg->val = tvp5150_read(c, reg->reg & 0xff);
964 else
965 tvp5150_write(c, reg->reg & 0xff, reg->val & 0xff);
21dcd8cc
MCC
966 break;
967 }
968#endif
969
12db5607 970 case VIDIOC_LOG_STATUS:
e1bc80ad 971 dump_reg(c);
84486d53
MCC
972 break;
973
ab4cecf9 974 case VIDIOC_G_TUNER:
a6c2ba28 975 {
ab4cecf9
HV
976 struct v4l2_tuner *vt = arg;
977 int status = tvp5150_read(c, 0x88);
84486d53 978
ab4cecf9 979 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
a6c2ba28 980 break;
4c86f973 981 }
a6c2ba28 982 case VIDIOC_QUERYCTRL:
983 {
984 struct v4l2_queryctrl *qc = arg;
c0477ad9 985 int i;
a6c2ba28 986
e1bc80ad 987 tvp5150_dbg(1, "VIDIOC_QUERYCTRL called\n");
a6c2ba28 988
c0477ad9 989 for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++)
a6c2ba28 990 if (qc->id && qc->id == tvp5150_qctrl[i].id) {
991 memcpy(qc, &(tvp5150_qctrl[i]),
992 sizeof(*qc));
993 return 0;
994 }
995
996 return -EINVAL;
4c86f973 997 }
a6c2ba28 998 case VIDIOC_G_CTRL:
999 {
1000 struct v4l2_control *ctrl = arg;
e1bc80ad 1001 tvp5150_dbg(1, "VIDIOC_G_CTRL called\n");
a6c2ba28 1002
e1bc80ad 1003 return tvp5150_get_ctrl(c, ctrl);
4c86f973 1004 }
a6c2ba28 1005 case VIDIOC_S_CTRL:
1006 {
1007 struct v4l2_control *ctrl = arg;
1008 u8 i, n;
0c71bf1c 1009 n = ARRAY_SIZE(tvp5150_qctrl);
a6c2ba28 1010 for (i = 0; i < n; i++)
1011 if (ctrl->id == tvp5150_qctrl[i].id) {
1012 if (ctrl->value <
1013 tvp5150_qctrl[i].minimum
1014 || ctrl->value >
1015 tvp5150_qctrl[i].maximum)
1016 return -ERANGE;
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1017 tvp5150_dbg(1,
1018 "VIDIOC_S_CTRL: id=%d, value=%d\n",
a6c2ba28 1019 ctrl->id, ctrl->value);
e1bc80ad 1020 return tvp5150_set_ctrl(c, ctrl);
a6c2ba28 1021 }
1022 return -EINVAL;
1023 }
1024
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1025 default:
1026 return -EINVAL;
1027 }
1028
1029 return 0;
1030}
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1031
1032/****************************************************************************
1033 I2C Client & Driver
1034 ****************************************************************************/
1035static struct i2c_driver driver;
1036
a6c2ba28 1037static struct i2c_client client_template = {
1038 .name = "(unset)",
a6c2ba28 1039 .driver = &driver,
cd4665c5
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1040};
1041
a6c2ba28 1042static int tvp5150_detect_client(struct i2c_adapter *adapter,
1043 int address, int kind)
cd4665c5 1044{
e1bc80ad 1045 struct i2c_client *c;
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1046 struct tvp5150 *core;
1047 int rv;
1048
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1049 if (debug)
1050 printk( KERN_INFO
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1051 "tvp5150.c: detecting tvp5150 client on address 0x%x\n",
1052 address << 1);
1053
1054 client_template.adapter = adapter;
1055 client_template.addr = address;
1056
1057 /* Check if the adapter supports the needed features */
1058 if (!i2c_check_functionality
1059 (adapter,
1060 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1061 return 0;
1062
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MCC
1063 c = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
1064 if (c == 0)
cd4665c5 1065 return -ENOMEM;
e1bc80ad 1066 memcpy(c, &client_template, sizeof(struct i2c_client));
cd4665c5 1067
7408187d 1068 core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL);
cd4665c5 1069 if (core == 0) {
e1bc80ad 1070 kfree(c);
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1071 return -ENOMEM;
1072 }
e1bc80ad 1073 i2c_set_clientdata(c, core);
cd4665c5 1074
e1bc80ad 1075 rv = i2c_attach_client(c);
cd4665c5 1076
3ad96835 1077 core->norm = V4L2_STD_ALL; /* Default is autodetect */
c7c0b34c 1078 core->route.input = TVP5150_COMPOSITE1;
4c86f973 1079 core->enable = 1;
032c2028
MCC
1080 core->bright = 128;
1081 core->contrast = 128;
1082 core->hue = 0;
1083 core->sat = 128;
4c86f973 1084
cd4665c5 1085 if (rv) {
e1bc80ad 1086 kfree(c);
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1087 kfree(core);
1088 return rv;
1089 }
1090
f1e5ee45 1091 if (debug > 1)
e1bc80ad 1092 dump_reg(c);
cd4665c5
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1093 return 0;
1094}
1095
a6c2ba28 1096static int tvp5150_attach_adapter(struct i2c_adapter *adapter)
cd4665c5 1097{
e1bc80ad
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1098 if (debug)
1099 printk( KERN_INFO
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1100 "tvp5150.c: starting probe for adapter %s (0x%x)\n",
1101 adapter->name, adapter->id);
1102 return i2c_probe(adapter, &addr_data, &tvp5150_detect_client);
1103}
1104
e1bc80ad 1105static int tvp5150_detach_client(struct i2c_client *c)
cd4665c5 1106{
e1bc80ad 1107 struct tvp5150 *decoder = i2c_get_clientdata(c);
cd4665c5
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1108 int err;
1109
e1bc80ad
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1110 tvp5150_dbg(1,
1111 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1112 c->addr << 1);
1113
1114 err = i2c_detach_client(c);
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1115 if (err) {
1116 return err;
1117 }
1118
1119 kfree(decoder);
e1bc80ad 1120 kfree(c);
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1121
1122 return 0;
1123}
1124
1125/* ----------------------------------------------------------------------- */
1126
1127static struct i2c_driver driver = {
604f28e2 1128 .driver = {
604f28e2
LR
1129 .name = "tvp5150",
1130 },
cab462f7 1131 .id = I2C_DRIVERID_TVP5150,
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1132
1133 .attach_adapter = tvp5150_attach_adapter,
1134 .detach_client = tvp5150_detach_client,
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1135
1136 .command = tvp5150_command,
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1137};
1138
a6c2ba28 1139static int __init tvp5150_init(void)
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1140{
1141 return i2c_add_driver(&driver);
1142}
1143
a6c2ba28 1144static void __exit tvp5150_exit(void)
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1145{
1146 i2c_del_driver(&driver);
1147}
1148
1149module_init(tvp5150_init);
1150module_exit(tvp5150_exit);
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