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V4L/DVB (10738): Get rid of video_decoder.h header were uneeded
[deliverable/linux.git] / drivers / media / video / tvp5150.c
CommitLineData
cd4665c5 1/*
6ac48b45 2 * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver
cd4665c5 3 *
6ac48b45
MCC		 4 * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org)
5 * This code is placed under the terms of the GNU General Public License v2
cd4665c5
MCC		 6 */
7
cd4665c5 8#include <linux/i2c.h>
33b687cf 9#include <linux/videodev2.h>
cd4665c5 10#include <linux/delay.h>
6b8fe025 11#include <media/v4l2-device.h>
c7c0b34c 12#include <media/tvp5150.h>
6b8fe025 13#include <media/v4l2-i2c-drv-legacy.h>
bc974305 14#include <media/v4l2-chip-ident.h>
cd4665c5
MCC		 15
16#include "tvp5150_reg.h"
17
6ac48b45 18MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver");
cd4665c5
MCC		 19MODULE_AUTHOR("Mauro Carvalho Chehab");
20MODULE_LICENSE("GPL");
21
6ac48b45 22/* standard i2c insmod options */
cd4665c5 23static unsigned short normal_i2c[] = {
84486d53
MCC		 24 0xb8 >> 1,
25 0xba >> 1,
cd4665c5
MCC		 26 I2C_CLIENT_END
27};
28
29I2C_CLIENT_INSMOD;
30
ff699e6b 31static int debug;
cd4665c5 32module_param(debug, int, 0);
6b8fe025 33MODULE_PARM_DESC(debug, "Debug level (0-2)");
cd4665c5 34
a6c2ba28 35/* supported controls */
36static struct v4l2_queryctrl tvp5150_qctrl[] = {
37 {
c0477ad9
MCC		 38 .id = V4L2_CID_BRIGHTNESS,
39 .type = V4L2_CTRL_TYPE_INTEGER,
40 .name = "Brightness",
41 .minimum = 0,
42 .maximum = 255,
43 .step = 1,
75bc8019 44 .default_value = 128,
c0477ad9
MCC		 45 .flags = 0,
46 }, {
47 .id = V4L2_CID_CONTRAST,
48 .type = V4L2_CTRL_TYPE_INTEGER,
49 .name = "Contrast",
50 .minimum = 0,
51 .maximum = 255,
52 .step = 0x1,
75bc8019 53 .default_value = 128,
c0477ad9
MCC		 54 .flags = 0,
55 }, {
a6c2ba28 56 .id = V4L2_CID_SATURATION,
57 .type = V4L2_CTRL_TYPE_INTEGER,
58 .name = "Saturation",
59 .minimum = 0,
60 .maximum = 255,
61 .step = 0x1,
75bc8019 62 .default_value = 128,
a6c2ba28 63 .flags = 0,
c0477ad9
MCC		 64 }, {
65 .id = V4L2_CID_HUE,
66 .type = V4L2_CTRL_TYPE_INTEGER,
67 .name = "Hue",
68 .minimum = -128,
69 .maximum = 127,
70 .step = 0x1,
75bc8019 71 .default_value = 0,
c0477ad9
MCC		 72 .flags = 0,
73 }
a6c2ba28 74};
75
cd4665c5 76struct tvp5150 {
6b8fe025 77 struct v4l2_subdev sd;
84486d53 78
3ad96835 79 v4l2_std_id norm; /* Current set standard */
c7c0b34c 80 struct v4l2_routing route;
84486d53
MCC		 81 int enable;
82 int bright;
83 int contrast;
84 int hue;
85 int sat;
cd4665c5
MCC		 86};
87
6b8fe025 88static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd)
cd4665c5 89{
6b8fe025
HV		 90 return container_of(sd, struct tvp5150, sd);
91}
92
93static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr)
94{
95 struct i2c_client *c = v4l2_get_subdevdata(sd);
cd4665c5
MCC		 96 unsigned char buffer[1];
97 int rc;
cd4665c5
MCC		 98
99 buffer[0] = addr;
100 if (1 != (rc = i2c_master_send(c, buffer, 1)))
6b8fe025 101 v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc);
cd4665c5
MCC		 102
103 msleep(10);
104
105 if (1 != (rc = i2c_master_recv(c, buffer, 1)))
6b8fe025 106 v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc);
e1bc80ad 107
6b8fe025 108 v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]);
cd4665c5
MCC		 109
110 return (buffer[0]);
111}
112
6b8fe025 113static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr,
84486d53 114 unsigned char value)
cd4665c5 115{
6b8fe025 116 struct i2c_client *c = v4l2_get_subdevdata(sd);
cd4665c5
MCC		 117 unsigned char buffer[2];
118 int rc;
cd4665c5
MCC		 119
120 buffer[0] = addr;
84486d53 121 buffer[1] = value;
6b8fe025 122 v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]);
cd4665c5 123 if (2 != (rc = i2c_master_send(c, buffer, 2)))
6b8fe025 124 v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 2)\n", rc);
cd4665c5
MCC		 125}
126
6b8fe025
HV		 127static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init,
128 const u8 end, int max_line)
3ad96835 129{
6b8fe025 130 int i = 0;
3ad96835 131
6b8fe025
HV		 132 while (init != (u8)(end + 1)) {
133 if ((i % max_line) == 0) {
134 if (i > 0)
3ad96835 135 printk("\n");
6b8fe025 136 printk("tvp5150: %s reg 0x%02x = ", s, init);
3ad96835 137 }
6b8fe025 138 printk("%02x ", tvp5150_read(sd, init));
3ad96835
MCC		 139
140 init++;
141 i++;
142 }
143 printk("\n");
144}
145
6b8fe025 146static int tvp5150_log_status(struct v4l2_subdev *sd)
cd4665c5 147{
84486d53 148 printk("tvp5150: Video input source selection #1 = 0x%02x\n",
6b8fe025 149 tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1));
84486d53 150 printk("tvp5150: Analog channel controls = 0x%02x\n",
6b8fe025 151 tvp5150_read(sd, TVP5150_ANAL_CHL_CTL));
84486d53 152 printk("tvp5150: Operation mode controls = 0x%02x\n",
6b8fe025 153 tvp5150_read(sd, TVP5150_OP_MODE_CTL));
84486d53 154 printk("tvp5150: Miscellaneous controls = 0x%02x\n",
6b8fe025 155 tvp5150_read(sd, TVP5150_MISC_CTL));
3ad96835 156 printk("tvp5150: Autoswitch mask= 0x%02x\n",
6b8fe025 157 tvp5150_read(sd, TVP5150_AUTOSW_MSK));
84486d53 158 printk("tvp5150: Color killer threshold control = 0x%02x\n",
6b8fe025 159 tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL));
3ad96835 160 printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
6b8fe025
HV		 161 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1),
162 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2),
163 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3));
84486d53 164 printk("tvp5150: Brightness control = 0x%02x\n",
6b8fe025 165 tvp5150_read(sd, TVP5150_BRIGHT_CTL));
84486d53 166 printk("tvp5150: Color saturation control = 0x%02x\n",
6b8fe025 167 tvp5150_read(sd, TVP5150_SATURATION_CTL));
84486d53 168 printk("tvp5150: Hue control = 0x%02x\n",
6b8fe025 169 tvp5150_read(sd, TVP5150_HUE_CTL));
84486d53 170 printk("tvp5150: Contrast control = 0x%02x\n",
6b8fe025 171 tvp5150_read(sd, TVP5150_CONTRAST_CTL));
84486d53 172 printk("tvp5150: Outputs and data rates select = 0x%02x\n",
6b8fe025 173 tvp5150_read(sd, TVP5150_DATA_RATE_SEL));
84486d53 174 printk("tvp5150: Configuration shared pins = 0x%02x\n",
6b8fe025 175 tvp5150_read(sd, TVP5150_CONF_SHARED_PIN));
3ad96835 176 printk("tvp5150: Active video cropping start = 0x%02x%02x\n",
6b8fe025
HV		 177 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB),
178 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB));
3ad96835 179 printk("tvp5150: Active video cropping stop = 0x%02x%02x\n",
6b8fe025
HV		 180 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB),
181 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB));
84486d53 182 printk("tvp5150: Genlock/RTC = 0x%02x\n",
6b8fe025 183 tvp5150_read(sd, TVP5150_GENLOCK));
84486d53 184 printk("tvp5150: Horizontal sync start = 0x%02x\n",
6b8fe025 185 tvp5150_read(sd, TVP5150_HORIZ_SYNC_START));
84486d53 186 printk("tvp5150: Vertical blanking start = 0x%02x\n",
6b8fe025 187 tvp5150_read(sd, TVP5150_VERT_BLANKING_START));
84486d53 188 printk("tvp5150: Vertical blanking stop = 0x%02x\n",
6b8fe025 189 tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP));
3ad96835 190 printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
6b8fe025
HV		 191 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1),
192 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2));
84486d53 193 printk("tvp5150: Interrupt reset register B = 0x%02x\n",
6b8fe025 194 tvp5150_read(sd, TVP5150_INT_RESET_REG_B));
84486d53 195 printk("tvp5150: Interrupt enable register B = 0x%02x\n",
6b8fe025 196 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B));
84486d53 197 printk("tvp5150: Interrupt configuration register B = 0x%02x\n",
6b8fe025 198 tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B));
84486d53 199 printk("tvp5150: Video standard = 0x%02x\n",
6b8fe025 200 tvp5150_read(sd, TVP5150_VIDEO_STD));
3ad96835 201 printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
6b8fe025
HV		 202 tvp5150_read(sd, TVP5150_CB_GAIN_FACT),
203 tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR));
84486d53 204 printk("tvp5150: Macrovision on counter = 0x%02x\n",
6b8fe025 205 tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR));
84486d53 206 printk("tvp5150: Macrovision off counter = 0x%02x\n",
6b8fe025 207 tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR));
3ad96835 208 printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
6b8fe025 209 (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4);
3ad96835 210 printk("tvp5150: Device ID = %02x%02x\n",
6b8fe025
HV		 211 tvp5150_read(sd, TVP5150_MSB_DEV_ID),
212 tvp5150_read(sd, TVP5150_LSB_DEV_ID));
3ad96835 213 printk("tvp5150: ROM version = (hex) %02x.%02x\n",
6b8fe025
HV		 214 tvp5150_read(sd, TVP5150_ROM_MAJOR_VER),
215 tvp5150_read(sd, TVP5150_ROM_MINOR_VER));
3ad96835 216 printk("tvp5150: Vertical line count = 0x%02x%02x\n",
6b8fe025
HV		 217 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB),
218 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB));
84486d53 219 printk("tvp5150: Interrupt status register B = 0x%02x\n",
6b8fe025 220 tvp5150_read(sd, TVP5150_INT_STATUS_REG_B));
84486d53 221 printk("tvp5150: Interrupt active register B = 0x%02x\n",
6b8fe025 222 tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B));
3ad96835 223 printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
6b8fe025
HV		 224 tvp5150_read(sd, TVP5150_STATUS_REG_1),
225 tvp5150_read(sd, TVP5150_STATUS_REG_2),
226 tvp5150_read(sd, TVP5150_STATUS_REG_3),
227 tvp5150_read(sd, TVP5150_STATUS_REG_4),
228 tvp5150_read(sd, TVP5150_STATUS_REG_5));
3ad96835 229
6b8fe025
HV		 230 dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
231 TVP5150_TELETEXT_FIL1_END, 8);
232 dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
233 TVP5150_TELETEXT_FIL2_END, 8);
3ad96835 234
84486d53 235 printk("tvp5150: Teletext filter enable = 0x%02x\n",
6b8fe025 236 tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA));
84486d53 237 printk("tvp5150: Interrupt status register A = 0x%02x\n",
6b8fe025 238 tvp5150_read(sd, TVP5150_INT_STATUS_REG_A));
84486d53 239 printk("tvp5150: Interrupt enable register A = 0x%02x\n",
6b8fe025 240 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A));
84486d53 241 printk("tvp5150: Interrupt configuration = 0x%02x\n",
6b8fe025 242 tvp5150_read(sd, TVP5150_INT_CONF));
84486d53 243 printk("tvp5150: VDP status register = 0x%02x\n",
6b8fe025 244 tvp5150_read(sd, TVP5150_VDP_STATUS_REG));
84486d53 245 printk("tvp5150: FIFO word count = 0x%02x\n",
6b8fe025 246 tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT));
84486d53 247 printk("tvp5150: FIFO interrupt threshold = 0x%02x\n",
6b8fe025 248 tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD));
84486d53 249 printk("tvp5150: FIFO reset = 0x%02x\n",
6b8fe025 250 tvp5150_read(sd, TVP5150_FIFO_RESET));
84486d53 251 printk("tvp5150: Line number interrupt = 0x%02x\n",
6b8fe025 252 tvp5150_read(sd, TVP5150_LINE_NUMBER_INT));
3ad96835 253 printk("tvp5150: Pixel alignment register = 0x%02x%02x\n",
6b8fe025
HV		 254 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH),
255 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW));
84486d53 256 printk("tvp5150: FIFO output control = 0x%02x\n",
6b8fe025 257 tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL));
3ad96835 258 printk("tvp5150: Full field enable = 0x%02x\n",
6b8fe025 259 tvp5150_read(sd, TVP5150_FULL_FIELD_ENA));
84486d53 260 printk("tvp5150: Full field mode register = 0x%02x\n",
6b8fe025 261 tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG));
3ad96835 262
6b8fe025
HV		 263 dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI,
264 TVP5150_CC_DATA_END, 8);
3ad96835 265
6b8fe025
HV		 266 dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI,
267 TVP5150_WSS_DATA_END, 8);
3ad96835 268
6b8fe025
HV		 269 dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI,
270 TVP5150_VPS_DATA_END, 8);
3ad96835 271
6b8fe025
HV		 272 dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI,
273 TVP5150_VITC_DATA_END, 10);
3ad96835 274
6b8fe025
HV		 275 dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI,
276 TVP5150_LINE_MODE_END, 8);
277 return 0;
cd4665c5
MCC		 278}
279
280/****************************************************************************
281 Basic functions
282 ****************************************************************************/
cd4665c5 283
6b8fe025 284static inline void tvp5150_selmux(struct v4l2_subdev *sd)
cd4665c5 285{
c0477ad9 286 int opmode=0;
6b8fe025 287 struct tvp5150 *decoder = to_tvp5150(sd);
c7c0b34c 288 int input = 0;
f4b8b3ae 289 unsigned char val;
84486d53 290
c7c0b34c
HV		 291 if ((decoder->route.output & TVP5150_BLACK_SCREEN) || !decoder->enable)
292 input = 8;
4c86f973 293
12500f07 294 switch (decoder->route.input) {
c7c0b34c
HV		 295 case TVP5150_COMPOSITE1:
296 input |= 2;
297 /* fall through */
298 case TVP5150_COMPOSITE0:
c0477ad9
MCC		 299 opmode=0x30; /* TV Mode */
300 break;
c7c0b34c 301 case TVP5150_SVIDEO:
c0477ad9 302 default:
c7c0b34c 303 input |= 1;
c0477ad9
MCC		 304 opmode=0; /* Auto Mode */
305 break;
306 }
307
6b8fe025 308 v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i "
12500f07
MCC		 309 "=> tvp5150 input=%i, opmode=%i\n",
310 decoder->route.input,decoder->route.output,
311 input, opmode );
312
6b8fe025
HV		 313 tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode);
314 tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input);
f4b8b3ae
MCC		 315
316 /* Svideo should enable YCrCb output and disable GPCL output
317 * For Composite and TV, it should be the reverse
318 */
6b8fe025 319 val = tvp5150_read(sd, TVP5150_MISC_CTL);
f4b8b3ae
MCC		 320 if (decoder->route.input == TVP5150_SVIDEO)
321 val = (val & ~0x40) | 0x10;
322 else
323 val = (val & ~0x10) | 0x40;
6b8fe025 324 tvp5150_write(sd, TVP5150_MISC_CTL, val);
cd4665c5
MCC		 325};
326
e1bc80ad
MCC		 327struct i2c_reg_value {
328 unsigned char reg;
329 unsigned char value;
330};
331
332/* Default values as sugested at TVP5150AM1 datasheet */
333static const struct i2c_reg_value tvp5150_init_default[] = {
334 { /* 0x00 */
335 TVP5150_VD_IN_SRC_SEL_1,0x00
336 },
337 { /* 0x01 */
338 TVP5150_ANAL_CHL_CTL,0x15
339 },
340 { /* 0x02 */
341 TVP5150_OP_MODE_CTL,0x00
342 },
343 { /* 0x03 */
344 TVP5150_MISC_CTL,0x01
345 },
346 { /* 0x06 */
347 TVP5150_COLOR_KIL_THSH_CTL,0x10
348 },
349 { /* 0x07 */
350 TVP5150_LUMA_PROC_CTL_1,0x60
351 },
352 { /* 0x08 */
353 TVP5150_LUMA_PROC_CTL_2,0x00
354 },
355 { /* 0x09 */
356 TVP5150_BRIGHT_CTL,0x80
357 },
358 { /* 0x0a */
359 TVP5150_SATURATION_CTL,0x80
360 },
361 { /* 0x0b */
362 TVP5150_HUE_CTL,0x00
363 },
364 { /* 0x0c */
365 TVP5150_CONTRAST_CTL,0x80
366 },
367 { /* 0x0d */
368 TVP5150_DATA_RATE_SEL,0x47
369 },
370 { /* 0x0e */
371 TVP5150_LUMA_PROC_CTL_3,0x00
372 },
373 { /* 0x0f */
374 TVP5150_CONF_SHARED_PIN,0x08
375 },
376 { /* 0x11 */
377 TVP5150_ACT_VD_CROP_ST_MSB,0x00
378 },
379 { /* 0x12 */
380 TVP5150_ACT_VD_CROP_ST_LSB,0x00
381 },
382 { /* 0x13 */
383 TVP5150_ACT_VD_CROP_STP_MSB,0x00
384 },
385 { /* 0x14 */
386 TVP5150_ACT_VD_CROP_STP_LSB,0x00
387 },
388 { /* 0x15 */
389 TVP5150_GENLOCK,0x01
390 },
391 { /* 0x16 */
392 TVP5150_HORIZ_SYNC_START,0x80
393 },
394 { /* 0x18 */
395 TVP5150_VERT_BLANKING_START,0x00
396 },
397 { /* 0x19 */
398 TVP5150_VERT_BLANKING_STOP,0x00
399 },
400 { /* 0x1a */
401 TVP5150_CHROMA_PROC_CTL_1,0x0c
402 },
403 { /* 0x1b */
404 TVP5150_CHROMA_PROC_CTL_2,0x14
405 },
406 { /* 0x1c */
407 TVP5150_INT_RESET_REG_B,0x00
408 },
409 { /* 0x1d */
410 TVP5150_INT_ENABLE_REG_B,0x00
411 },
412 { /* 0x1e */
413 TVP5150_INTT_CONFIG_REG_B,0x00
414 },
415 { /* 0x28 */
416 TVP5150_VIDEO_STD,0x00
417 },
418 { /* 0x2e */
419 TVP5150_MACROVISION_ON_CTR,0x0f
420 },
421 { /* 0x2f */
422 TVP5150_MACROVISION_OFF_CTR,0x01
423 },
424 { /* 0xbb */
425 TVP5150_TELETEXT_FIL_ENA,0x00
426 },
427 { /* 0xc0 */
428 TVP5150_INT_STATUS_REG_A,0x00
429 },
430 { /* 0xc1 */
431 TVP5150_INT_ENABLE_REG_A,0x00
432 },
433 { /* 0xc2 */
434 TVP5150_INT_CONF,0x04
435 },
436 { /* 0xc8 */
437 TVP5150_FIFO_INT_THRESHOLD,0x80
438 },
439 { /* 0xc9 */
440 TVP5150_FIFO_RESET,0x00
441 },
442 { /* 0xca */
443 TVP5150_LINE_NUMBER_INT,0x00
444 },
445 { /* 0xcb */
446 TVP5150_PIX_ALIGN_REG_LOW,0x4e
447 },
448 { /* 0xcc */
449 TVP5150_PIX_ALIGN_REG_HIGH,0x00
450 },
451 { /* 0xcd */
452 TVP5150_FIFO_OUT_CTRL,0x01
453 },
454 { /* 0xcf */
3ad96835 455 TVP5150_FULL_FIELD_ENA,0x00
e1bc80ad
MCC		 456 },
457 { /* 0xd0 */
3ad96835 458 TVP5150_LINE_MODE_INI,0x00
e1bc80ad
MCC		 459 },
460 { /* 0xfc */
461 TVP5150_FULL_FIELD_MODE_REG,0x7f
462 },
463 { /* end of data */
464 0xff,0xff
465 }
466};
467
468/* Default values as sugested at TVP5150AM1 datasheet */
469static const struct i2c_reg_value tvp5150_init_enable[] = {
470 {
471 TVP5150_CONF_SHARED_PIN, 2
472 },{ /* Automatic offset and AGC enabled */
473 TVP5150_ANAL_CHL_CTL, 0x15
474 },{ /* Activate YCrCb output 0x9 or 0xd ? */
475 TVP5150_MISC_CTL, 0x6f
476 },{ /* Activates video std autodetection for all standards */
477 TVP5150_AUTOSW_MSK, 0x0
478 },{ /* Default format: 0x47. For 4:2:2: 0x40 */
479 TVP5150_DATA_RATE_SEL, 0x47
480 },{
481 TVP5150_CHROMA_PROC_CTL_1, 0x0c
482 },{
483 TVP5150_CHROMA_PROC_CTL_2, 0x54
484 },{ /* Non documented, but initialized on WinTV USB2 */
485 0x27, 0x20
486 },{
487 0xff,0xff
488 }
489};
490
6ac48b45
MCC		 491struct tvp5150_vbi_type {
492 unsigned int vbi_type;
493 unsigned int ini_line;
494 unsigned int end_line;
495 unsigned int by_field :1;
496};
497
e1bc80ad
MCC		 498struct i2c_vbi_ram_value {
499 u16 reg;
6ac48b45
MCC		 500 struct tvp5150_vbi_type type;
501 unsigned char values[16];
e1bc80ad
MCC		 502};
503
6ac48b45
MCC		 504/* This struct have the values for each supported VBI Standard
505 * by
506 tvp5150_vbi_types should follow the same order as vbi_ram_default
3ad96835
MCC		 507 * value 0 means rom position 0x10, value 1 means rom position 0x30
508 * and so on. There are 16 possible locations from 0 to 15.
509 */
3ad96835 510
a9cff90e 511static struct i2c_vbi_ram_value vbi_ram_default[] =
cd4665c5 512{
9bc7400a
HV		 513 /* FIXME: Current api doesn't handle all VBI types, those not
514 yet supported are placed under #if 0 */
515#if 0
6ac48b45
MCC		 516 {0x010, /* Teletext, SECAM, WST System A */
517 {V4L2_SLICED_TELETEXT_SECAM,6,23,1},
518 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
519 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 520 },
9bc7400a 521#endif
6ac48b45 522 {0x030, /* Teletext, PAL, WST System B */
9bc7400a 523 {V4L2_SLICED_TELETEXT_B,6,22,1},
6ac48b45
MCC		 524 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
525 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 526 },
9bc7400a 527#if 0
6ac48b45
MCC		 528 {0x050, /* Teletext, PAL, WST System C */
529 {V4L2_SLICED_TELETEXT_PAL_C,6,22,1},
530 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
531 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 532 },
6ac48b45
MCC		 533 {0x070, /* Teletext, NTSC, WST System B */
534 {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1},
535 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
536 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 537 },
6ac48b45
MCC		 538 {0x090, /* Tetetext, NTSC NABTS System C */
539 {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1},
540 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
541 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
e1bc80ad 542 },
6ac48b45
MCC		 543 {0x0b0, /* Teletext, NTSC-J, NABTS System D */
544 {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1},
545 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
546 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 547 },
6ac48b45
MCC		 548 {0x0d0, /* Closed Caption, PAL/SECAM */
549 {V4L2_SLICED_CAPTION_625,22,22,1},
550 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
551 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 552 },
9bc7400a 553#endif
6ac48b45
MCC		 554 {0x0f0, /* Closed Caption, NTSC */
555 {V4L2_SLICED_CAPTION_525,21,21,1},
556 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
557 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 558 },
6ac48b45 559 {0x110, /* Wide Screen Signal, PAL/SECAM */
12db5607 560 {V4L2_SLICED_WSS_625,23,23,1},
6ac48b45
MCC		 561 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
562 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
e1bc80ad 563 },
9bc7400a 564#if 0
6ac48b45
MCC		 565 {0x130, /* Wide Screen Signal, NTSC C */
566 {V4L2_SLICED_WSS_525,20,20,1},
567 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
568 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
e1bc80ad 569 },
6ac48b45
MCC		 570 {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
571 {V4l2_SLICED_VITC_625,6,22,0},
572 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
573 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 574 },
6ac48b45
MCC		 575 {0x170, /* Vertical Interval Timecode (VITC), NTSC */
576 {V4l2_SLICED_VITC_525,10,20,0},
577 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
578 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 579 },
9bc7400a 580#endif
6ac48b45
MCC		 581 {0x190, /* Video Program System (VPS), PAL */
582 {V4L2_SLICED_VPS,16,16,0},
583 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
584 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
3ad96835 585 },
6ac48b45
MCC		 586 /* 0x1d0 User programmable */
587
588 /* End of struct */
589 { (u16)-1 }
e1bc80ad 590};
4c86f973 591
6b8fe025 592static int tvp5150_write_inittab(struct v4l2_subdev *sd,
6ac48b45 593 const struct i2c_reg_value *regs)
e1bc80ad
MCC		 594{
595 while (regs->reg != 0xff) {
6b8fe025 596 tvp5150_write(sd, regs->reg, regs->value);
e1bc80ad
MCC		 597 regs++;
598 }
599 return 0;
600}
84486d53 601
6b8fe025 602static int tvp5150_vdp_init(struct v4l2_subdev *sd,
6ac48b45 603 const struct i2c_vbi_ram_value *regs)
e1bc80ad
MCC		 604{
605 unsigned int i;
cd4665c5 606
e1bc80ad 607 /* Disable Full Field */
6b8fe025 608 tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0);
cd4665c5 609
e1bc80ad 610 /* Before programming, Line mode should be at 0xff */
6b8fe025
HV		 611 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
612 tvp5150_write(sd, i, 0xff);
cd4665c5 613
e1bc80ad 614 /* Load Ram Table */
6b8fe025
HV		 615 while (regs->reg != (u16)-1) {
616 tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8);
617 tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg);
cd4665c5 618
6b8fe025
HV		 619 for (i = 0; i < 16; i++)
620 tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]);
84486d53 621
e1bc80ad
MCC		 622 regs++;
623 }
624 return 0;
625}
cd4665c5 626
6ac48b45 627/* Fills VBI capabilities based on i2c_vbi_ram_value struct */
6b8fe025 628static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd,
6ac48b45
MCC		 629 struct v4l2_sliced_vbi_cap *cap)
630{
6b8fe025 631 const struct i2c_vbi_ram_value *regs = vbi_ram_default;
6ac48b45
MCC		 632 int line;
633
6b8fe025 634 v4l2_dbg(1, debug, sd, "VIDIOC_G_SLICED_VBI_CAP\n");
6ac48b45
MCC		 635 memset(cap, 0, sizeof *cap);
636
637 while (regs->reg != (u16)-1 ) {
638 for (line=regs->type.ini_line;line<=regs->type.end_line;line++) {
639 cap->service_lines[0][line] |= regs->type.vbi_type;
640 }
641 cap->service_set |= regs->type.vbi_type;
642
643 regs++;
644 }
6b8fe025 645 return 0;
6ac48b45
MCC		 646}
647
3ad96835
MCC		 648/* Set vbi processing
649 * type - one of tvp5150_vbi_types
650 * line - line to gather data
651 * fields: bit 0 field1, bit 1, field2
652 * flags (default=0xf0) is a bitmask, were set means:
653 * bit 7: enable filtering null bytes on CC
654 * bit 6: send data also to FIFO
655 * bit 5: don't allow data with errors on FIFO
656 * bit 4: enable ECC when possible
657 * pix_align = pix alignment:
658 * LSB = field1
659 * MSB = field2
660 */
6b8fe025 661static int tvp5150_set_vbi(struct v4l2_subdev *sd,
2701dacb
MCC		 662 const struct i2c_vbi_ram_value *regs,
663 unsigned int type,u8 flags, int line,
664 const int fields)
3ad96835 665{
6b8fe025
HV		 666 struct tvp5150 *decoder = to_tvp5150(sd);
667 v4l2_std_id std = decoder->norm;
3ad96835 668 u8 reg;
2701dacb 669 int pos=0;
3ad96835
MCC		 670
671 if (std == V4L2_STD_ALL) {
6b8fe025 672 v4l2_err(sd, "VBI can't be configured without knowing number of lines\n");
12db5607 673 return 0;
7d5b7b98 674 } else if (std & V4L2_STD_625_50) {
3ad96835
MCC		 675 /* Don't follow NTSC Line number convension */
676 line += 3;
677 }
678
679 if (line<6||line>27)
2701dacb
MCC		 680 return 0;
681
682 while (regs->reg != (u16)-1 ) {
683 if ((type & regs->type.vbi_type) &&
684 (line>=regs->type.ini_line) &&
685 (line<=regs->type.end_line)) {
686 type=regs->type.vbi_type;
687 break;
688 }
689
690 regs++;
691 pos++;
692 }
693 if (regs->reg == (u16)-1)
694 return 0;
3ad96835 695
2701dacb 696 type=pos | (flags & 0xf0);
3ad96835
MCC		 697 reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;
698
699 if (fields&1) {
6b8fe025 700 tvp5150_write(sd, reg, type);
3ad96835
MCC		 701 }
702
703 if (fields&2) {
6b8fe025 704 tvp5150_write(sd, reg+1, type);
3ad96835
MCC		 705 }
706
2701dacb 707 return type;
3ad96835
MCC		 708}
709
6b8fe025 710static int tvp5150_get_vbi(struct v4l2_subdev *sd,
12db5607
MCC		 711 const struct i2c_vbi_ram_value *regs, int line)
712{
6b8fe025
HV		 713 struct tvp5150 *decoder = to_tvp5150(sd);
714 v4l2_std_id std = decoder->norm;
12db5607 715 u8 reg;
6b8fe025 716 int pos, type = 0;
12db5607
MCC		 717
718 if (std == V4L2_STD_ALL) {
6b8fe025 719 v4l2_err(sd, "VBI can't be configured without knowing number of lines\n");
12db5607 720 return 0;
7d5b7b98 721 } else if (std & V4L2_STD_625_50) {
12db5607
MCC		 722 /* Don't follow NTSC Line number convension */
723 line += 3;
724 }
725
6b8fe025 726 if (line < 6 || line > 27)
12db5607
MCC		 727 return 0;
728
6b8fe025 729 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
12db5607 730
6b8fe025
HV		 731 pos = tvp5150_read(sd, reg) & 0x0f;
732 if (pos < 0x0f)
733 type = regs[pos].type.vbi_type;
12db5607 734
6b8fe025
HV		 735 pos = tvp5150_read(sd, reg + 1) & 0x0f;
736 if (pos < 0x0f)
737 type |= regs[pos].type.vbi_type;
12db5607
MCC		 738
739 return type;
740}
6b8fe025
HV		 741
742static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
e1bc80ad 743{
6b8fe025
HV		 744 struct tvp5150 *decoder = to_tvp5150(sd);
745 int fmt = 0;
e1bc80ad 746
6b8fe025 747 decoder->norm = std;
e1bc80ad
MCC		 748
749 /* First tests should be against specific std */
750
751 if (std == V4L2_STD_ALL) {
6b8fe025 752 fmt = 0; /* Autodetect mode */
e1bc80ad 753 } else if (std & V4L2_STD_NTSC_443) {
6b8fe025 754 fmt = 0xa;
e1bc80ad 755 } else if (std & V4L2_STD_PAL_M) {
6b8fe025
HV		 756 fmt = 0x6;
757 } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) {
758 fmt = 0x8;
e1bc80ad
MCC		 759 } else {
760 /* Then, test against generic ones */
6b8fe025
HV		 761 if (std & V4L2_STD_NTSC)
762 fmt = 0x2;
763 else if (std & V4L2_STD_PAL)
764 fmt = 0x4;
765 else if (std & V4L2_STD_SECAM)
766 fmt = 0xc;
e1bc80ad 767 }
84486d53 768
6b8fe025
HV		 769 v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt);
770 tvp5150_write(sd, TVP5150_VIDEO_STD, fmt);
e1bc80ad
MCC		 771 return 0;
772}
773
6b8fe025
HV		 774static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
775{
776 struct tvp5150 *decoder = to_tvp5150(sd);
777
778 if (decoder->norm == std)
779 return 0;
780
781 return tvp5150_set_std(sd, std);
782}
783
784static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
e1bc80ad 785{
6b8fe025 786 struct tvp5150 *decoder = to_tvp5150(sd);
e36eaa71 787 u8 msb_id, lsb_id, msb_rom, lsb_rom;
e1bc80ad 788
6b8fe025
HV		 789 msb_id = tvp5150_read(sd, TVP5150_MSB_DEV_ID);
790 lsb_id = tvp5150_read(sd, TVP5150_LSB_DEV_ID);
791 msb_rom = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER);
792 lsb_rom = tvp5150_read(sd, TVP5150_ROM_MINOR_VER);
e1bc80ad 793
6b8fe025
HV		 794 if (msb_rom == 4 && lsb_rom == 0) { /* Is TVP5150AM1 */
795 v4l2_info(sd, "tvp%02x%02xam1 detected.\n", msb_id, lsb_id);
e36eaa71
MCC		 796
797 /* ITU-T BT.656.4 timing */
6b8fe025 798 tvp5150_write(sd, TVP5150_REV_SELECT, 0);
e1bc80ad 799 } else {
6b8fe025
HV		 800 if (msb_rom == 3 || lsb_rom == 0x21) { /* Is TVP5150A */
801 v4l2_info(sd, "tvp%02x%02xa detected.\n", msb_id, lsb_id);
e36eaa71 802 } else {
6b8fe025
HV		 803 v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n",
804 msb_id, lsb_id);
805 v4l2_info(sd, "*** Rom ver is %d.%d\n", msb_rom, lsb_rom);
e36eaa71 806 }
e1bc80ad 807 }
84486d53 808
e1bc80ad 809 /* Initializes TVP5150 to its default values */
6b8fe025 810 tvp5150_write_inittab(sd, tvp5150_init_default);
e1bc80ad
MCC		 811
812 /* Initializes VDP registers */
6b8fe025 813 tvp5150_vdp_init(sd, vbi_ram_default);
e1bc80ad
MCC		 814
815 /* Selects decoder input */
6b8fe025 816 tvp5150_selmux(sd);
e1bc80ad
MCC		 817
818 /* Initializes TVP5150 to stream enabled values */
6b8fe025 819 tvp5150_write_inittab(sd, tvp5150_init_enable);
e1bc80ad
MCC		 820
821 /* Initialize image preferences */
6b8fe025
HV		 822 tvp5150_write(sd, TVP5150_BRIGHT_CTL, decoder->bright);
823 tvp5150_write(sd, TVP5150_CONTRAST_CTL, decoder->contrast);
824 tvp5150_write(sd, TVP5150_SATURATION_CTL, decoder->contrast);
825 tvp5150_write(sd, TVP5150_HUE_CTL, decoder->hue);
e1bc80ad 826
6b8fe025
HV		 827 tvp5150_set_std(sd, decoder->norm);
828 return 0;
cd4665c5
MCC		 829};
830
6b8fe025 831static int tvp5150_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
a6c2ba28 832{
6b8fe025 833 v4l2_dbg(1, debug, sd, "VIDIOC_G_CTRL called\n");
a6c2ba28 834
835 switch (ctrl->id) {
836 case V4L2_CID_BRIGHTNESS:
6b8fe025 837 ctrl->value = tvp5150_read(sd, TVP5150_BRIGHT_CTL);
a6c2ba28 838 return 0;
839 case V4L2_CID_CONTRAST:
6b8fe025 840 ctrl->value = tvp5150_read(sd, TVP5150_CONTRAST_CTL);
a6c2ba28 841 return 0;
842 case V4L2_CID_SATURATION:
6b8fe025 843 ctrl->value = tvp5150_read(sd, TVP5150_SATURATION_CTL);
a6c2ba28 844 return 0;
845 case V4L2_CID_HUE:
6b8fe025 846 ctrl->value = tvp5150_read(sd, TVP5150_HUE_CTL);
a6c2ba28 847 return 0;
a6c2ba28 848 }
c0477ad9 849 return -EINVAL;
a6c2ba28 850}
851
6b8fe025 852static int tvp5150_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
a6c2ba28 853{
6b8fe025
HV		 854 u8 i, n;
855 n = ARRAY_SIZE(tvp5150_qctrl);
856
857 for (i = 0; i < n; i++) {
858 if (ctrl->id != tvp5150_qctrl[i].id)
859 continue;
860 if (ctrl->value < tvp5150_qctrl[i].minimum ||
861 ctrl->value > tvp5150_qctrl[i].maximum)
862 return -ERANGE;
863 v4l2_dbg(1, debug, sd, "VIDIOC_S_CTRL: id=%d, value=%d\n",
864 ctrl->id, ctrl->value);
865 break;
866 }
a6c2ba28 867
868 switch (ctrl->id) {
869 case V4L2_CID_BRIGHTNESS:
6b8fe025 870 tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->value);
a6c2ba28 871 return 0;
872 case V4L2_CID_CONTRAST:
6b8fe025 873 tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->value);
a6c2ba28 874 return 0;
875 case V4L2_CID_SATURATION:
6b8fe025 876 tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->value);
a6c2ba28 877 return 0;
878 case V4L2_CID_HUE:
6b8fe025 879 tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->value);
a6c2ba28 880 return 0;
a6c2ba28 881 }
c0477ad9 882 return -EINVAL;
a6c2ba28 883}
884
84486d53
MCC		 885/****************************************************************************
886 I2C Command
887 ****************************************************************************/
c7c0b34c 888
6b8fe025
HV		 889static int tvp5150_s_routing(struct v4l2_subdev *sd, const struct v4l2_routing *route)
890{
891 struct tvp5150 *decoder = to_tvp5150(sd);
84486d53 892
6b8fe025
HV		 893 decoder->route = *route;
894 tvp5150_selmux(sd);
895 return 0;
896}
6ac48b45 897
6b8fe025
HV		 898static int tvp5150_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
899{
900 struct v4l2_sliced_vbi_format *svbi;
901 int i;
902
903 /* raw vbi */
904 if (fmt->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
905 /* this is for capturing 36 raw vbi lines
906 if there's a way to cut off the beginning 2 vbi lines
907 with the tvp5150 then the vbi line count could be lowered
908 to 17 lines/field again, although I couldn't find a register
909 which could do that cropping */
910 if (fmt->fmt.vbi.sample_format == V4L2_PIX_FMT_GREY)
911 tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70);
912 if (fmt->fmt.vbi.count[0] == 18 && fmt->fmt.vbi.count[1] == 18) {
913 tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00);
914 tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01);
915 }
916 return 0;
6ac48b45 917 }
6b8fe025
HV		 918 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
919 return -EINVAL;
920 svbi = &fmt->fmt.sliced;
921 if (svbi->service_set != 0) {
922 for (i = 0; i <= 23; i++) {
923 svbi->service_lines[1][i] = 0;
924 svbi->service_lines[0][i] =
925 tvp5150_set_vbi(sd, vbi_ram_default,
926 svbi->service_lines[0][i], 0xf0, i, 3);
2c5aacc6 927 }
6b8fe025
HV		 928 /* Enables FIFO */
929 tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1);
930 } else {
931 /* Disables FIFO*/
932 tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0);
12db5607 933
6b8fe025
HV		 934 /* Disable Full Field */
935 tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0);
12db5607 936
6b8fe025
HV		 937 /* Disable Line modes */
938 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
939 tvp5150_write(sd, i, 0xff);
12db5607 940 }
6b8fe025
HV		 941 return 0;
942}
12db5607 943
6b8fe025
HV		 944static int tvp5150_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
945{
946 struct v4l2_sliced_vbi_format *svbi;
947 int i, mask = 0;
12db5607 948
6b8fe025
HV		 949 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
950 return -EINVAL;
951 svbi = &fmt->fmt.sliced;
952 memset(svbi, 0, sizeof(*svbi));
12db5607 953
6b8fe025
HV		 954 for (i = 0; i <= 23; i++) {
955 svbi->service_lines[0][i] =
956 tvp5150_get_vbi(sd, vbi_ram_default, i);
957 mask |= svbi->service_lines[0][i];
2701dacb 958 }
6b8fe025
HV		 959 svbi->service_set = mask;
960 return 0;
961}
962
12db5607 963
bc974305 964static int tvp5150_g_chip_ident(struct v4l2_subdev *sd,
aecde8b5 965 struct v4l2_dbg_chip_ident *chip)
bc974305
MCC		 966{
967 int rev;
968 struct i2c_client *client = v4l2_get_subdevdata(sd);
969
970 rev = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER) << 8 |
971 tvp5150_read(sd, TVP5150_ROM_MINOR_VER);
972
973 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP5150,
974 rev);
975}
976
977
21dcd8cc 978#ifdef CONFIG_VIDEO_ADV_DEBUG
aecde8b5 979static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
6b8fe025
HV		 980{
981 struct i2c_client *client = v4l2_get_subdevdata(sd);
21dcd8cc 982
aecde8b5 983 if (!v4l2_chip_match_i2c_client(client, &reg->match))
6b8fe025
HV		 984 return -EINVAL;
985 if (!capable(CAP_SYS_ADMIN))
986 return -EPERM;
987 reg->val = tvp5150_read(sd, reg->reg & 0xff);
aecde8b5 988 reg->size = 1;
6b8fe025
HV		 989 return 0;
990}
84486d53 991
aecde8b5 992static int tvp5150_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
6b8fe025
HV		 993{
994 struct i2c_client *client = v4l2_get_subdevdata(sd);
84486d53 995
aecde8b5 996 if (!v4l2_chip_match_i2c_client(client, &reg->match))
6b8fe025
HV		 997 return -EINVAL;
998 if (!capable(CAP_SYS_ADMIN))
999 return -EPERM;
1000 tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff);
1001 return 0;
1002}
1003#endif
a6c2ba28 1004
6b8fe025
HV		 1005static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1006{
1007 int status = tvp5150_read(sd, 0x88);
a6c2ba28 1008
6b8fe025
HV		 1009 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
1010 return 0;
1011}
a6c2ba28 1012
6b8fe025
HV		 1013static int tvp5150_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1014{
1015 int i;
a6c2ba28 1016
6b8fe025
HV		 1017 v4l2_dbg(1, debug, sd, "VIDIOC_QUERYCTRL called\n");
1018
1019 for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++)
1020 if (qc->id && qc->id == tvp5150_qctrl[i].id) {
1021 memcpy(qc, &(tvp5150_qctrl[i]),
1022 sizeof(*qc));
1023 return 0;
a6c2ba28 1024 }
1025
6b8fe025
HV		 1026 return -EINVAL;
1027}
84486d53 1028
6b8fe025
HV		 1029static int tvp5150_command(struct i2c_client *client, unsigned cmd, void *arg)
1030{
1031 return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg);
84486d53 1032}
cd4665c5 1033
6b8fe025
HV		 1034/* ----------------------------------------------------------------------- */
1035
1036static const struct v4l2_subdev_core_ops tvp5150_core_ops = {
1037 .log_status = tvp5150_log_status,
1038 .g_ctrl = tvp5150_g_ctrl,
1039 .s_ctrl = tvp5150_s_ctrl,
1040 .queryctrl = tvp5150_queryctrl,
1041 .reset = tvp5150_reset,
bc974305 1042 .g_chip_ident = tvp5150_g_chip_ident,
6b8fe025
HV		 1043#ifdef CONFIG_VIDEO_ADV_DEBUG
1044 .g_register = tvp5150_g_register,
1045 .s_register = tvp5150_s_register,
1046#endif
1047};
1048
1049static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = {
1050 .s_std = tvp5150_s_std,
1051 .g_tuner = tvp5150_g_tuner,
1052};
1053
1054static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
1055 .s_routing = tvp5150_s_routing,
1056 .g_fmt = tvp5150_g_fmt,
1057 .s_fmt = tvp5150_s_fmt,
1058 .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap,
1059};
1060
1061static const struct v4l2_subdev_ops tvp5150_ops = {
1062 .core = &tvp5150_core_ops,
1063 .tuner = &tvp5150_tuner_ops,
1064 .video = &tvp5150_video_ops,
1065};
1066
1067
cd4665c5
MCC		 1068/****************************************************************************
1069 I2C Client & Driver
1070 ****************************************************************************/
cd4665c5 1071
6b8fe025
HV		 1072static int tvp5150_probe(struct i2c_client *c,
1073 const struct i2c_device_id *id)
cd4665c5 1074{
cd4665c5 1075 struct tvp5150 *core;
6b8fe025 1076 struct v4l2_subdev *sd;
cd4665c5
MCC		 1077
1078 /* Check if the adapter supports the needed features */
6b8fe025 1079 if (!i2c_check_functionality(c->adapter,
cd4665c5 1080 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
6b8fe025 1081 return -EIO;
cd4665c5 1082
7408187d 1083 core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL);
5fa1247a 1084 if (!core) {
cd4665c5
MCC		 1085 return -ENOMEM;
1086 }
6b8fe025
HV		 1087 sd = &core->sd;
1088 v4l2_i2c_subdev_init(sd, c, &tvp5150_ops);
1089 v4l_info(c, "chip found @ 0x%02x (%s)\n",
1090 c->addr << 1, c->adapter->name);
cd4665c5 1091
3ad96835 1092 core->norm = V4L2_STD_ALL; /* Default is autodetect */
c7c0b34c 1093 core->route.input = TVP5150_COMPOSITE1;
4c86f973 1094 core->enable = 1;
032c2028
MCC		 1095 core->bright = 128;
1096 core->contrast = 128;
1097 core->hue = 0;
1098 core->sat = 128;
4c86f973 1099
f1e5ee45 1100 if (debug > 1)
6b8fe025 1101 tvp5150_log_status(sd);
cd4665c5
MCC		 1102 return 0;
1103}
1104
6b8fe025 1105static int tvp5150_remove(struct i2c_client *c)
cd4665c5 1106{
6b8fe025 1107 struct v4l2_subdev *sd = i2c_get_clientdata(c);
cd4665c5 1108
6b8fe025 1109 v4l2_dbg(1, debug, sd,
e1bc80ad
MCC		 1110 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1111 c->addr << 1);
1112
6b8fe025
HV		 1113 v4l2_device_unregister_subdev(sd);
1114 kfree(to_tvp5150(sd));
cd4665c5
MCC		 1115 return 0;
1116}
1117
1118/* ----------------------------------------------------------------------- */
1119
6b8fe025
HV		 1120static const struct i2c_device_id tvp5150_id[] = {
1121 { "tvp5150", 0 },
1122 { }
1123};
1124MODULE_DEVICE_TABLE(i2c, tvp5150_id);
84486d53 1125
6b8fe025
HV		 1126static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1127 .name = "tvp5150",
84486d53 1128 .command = tvp5150_command,
6b8fe025
HV		 1129 .probe = tvp5150_probe,
1130 .remove = tvp5150_remove,
1131 .legacy_class = I2C_CLASS_TV_ANALOG | I2C_CLASS_TV_DIGITAL,
1132 .id_table = tvp5150_id,
cd4665c5 1133};
Linux kernel - Deliverables
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