Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
33b687cf | 10 | #include <linux/videodev2.h> |
cd4665c5 | 11 | #include <linux/delay.h> |
6b8fe025 | 12 | #include <media/v4l2-device.h> |
c7c0b34c | 13 | #include <media/tvp5150.h> |
762decd3 | 14 | #include <media/v4l2-i2c-drv.h> |
bc974305 | 15 | #include <media/v4l2-chip-ident.h> |
cd4665c5 MCC |
16 | |
17 | #include "tvp5150_reg.h" | |
18 | ||
6ac48b45 | 19 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
20 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
21 | MODULE_LICENSE("GPL"); | |
22 | ||
cd4665c5 | 23 | |
ff699e6b | 24 | static int debug; |
cd4665c5 | 25 | module_param(debug, int, 0); |
6b8fe025 | 26 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 | 27 | |
a6c2ba28 | 28 | /* supported controls */ |
29 | static struct v4l2_queryctrl tvp5150_qctrl[] = { | |
30 | { | |
c0477ad9 MCC |
31 | .id = V4L2_CID_BRIGHTNESS, |
32 | .type = V4L2_CTRL_TYPE_INTEGER, | |
33 | .name = "Brightness", | |
34 | .minimum = 0, | |
35 | .maximum = 255, | |
36 | .step = 1, | |
75bc8019 | 37 | .default_value = 128, |
c0477ad9 MCC |
38 | .flags = 0, |
39 | }, { | |
40 | .id = V4L2_CID_CONTRAST, | |
41 | .type = V4L2_CTRL_TYPE_INTEGER, | |
42 | .name = "Contrast", | |
43 | .minimum = 0, | |
44 | .maximum = 255, | |
45 | .step = 0x1, | |
75bc8019 | 46 | .default_value = 128, |
c0477ad9 MCC |
47 | .flags = 0, |
48 | }, { | |
a6c2ba28 | 49 | .id = V4L2_CID_SATURATION, |
50 | .type = V4L2_CTRL_TYPE_INTEGER, | |
51 | .name = "Saturation", | |
52 | .minimum = 0, | |
53 | .maximum = 255, | |
54 | .step = 0x1, | |
75bc8019 | 55 | .default_value = 128, |
a6c2ba28 | 56 | .flags = 0, |
c0477ad9 MCC |
57 | }, { |
58 | .id = V4L2_CID_HUE, | |
59 | .type = V4L2_CTRL_TYPE_INTEGER, | |
60 | .name = "Hue", | |
61 | .minimum = -128, | |
62 | .maximum = 127, | |
63 | .step = 0x1, | |
75bc8019 | 64 | .default_value = 0, |
c0477ad9 MCC |
65 | .flags = 0, |
66 | } | |
a6c2ba28 | 67 | }; |
68 | ||
cd4665c5 | 69 | struct tvp5150 { |
6b8fe025 | 70 | struct v4l2_subdev sd; |
84486d53 | 71 | |
3ad96835 | 72 | v4l2_std_id norm; /* Current set standard */ |
5325b427 HV |
73 | u32 input; |
74 | u32 output; | |
84486d53 MCC |
75 | int enable; |
76 | int bright; | |
77 | int contrast; | |
78 | int hue; | |
79 | int sat; | |
cd4665c5 MCC |
80 | }; |
81 | ||
6b8fe025 | 82 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 83 | { |
6b8fe025 HV |
84 | return container_of(sd, struct tvp5150, sd); |
85 | } | |
86 | ||
87 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) | |
88 | { | |
89 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 MCC |
90 | unsigned char buffer[1]; |
91 | int rc; | |
cd4665c5 MCC |
92 | |
93 | buffer[0] = addr; | |
94 | if (1 != (rc = i2c_master_send(c, buffer, 1))) | |
6b8fe025 | 95 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc); |
cd4665c5 MCC |
96 | |
97 | msleep(10); | |
98 | ||
99 | if (1 != (rc = i2c_master_recv(c, buffer, 1))) | |
6b8fe025 | 100 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc); |
e1bc80ad | 101 | |
6b8fe025 | 102 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]); |
cd4665c5 MCC |
103 | |
104 | return (buffer[0]); | |
105 | } | |
106 | ||
6b8fe025 | 107 | static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 108 | unsigned char value) |
cd4665c5 | 109 | { |
6b8fe025 | 110 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 MCC |
111 | unsigned char buffer[2]; |
112 | int rc; | |
cd4665c5 MCC |
113 | |
114 | buffer[0] = addr; | |
84486d53 | 115 | buffer[1] = value; |
6b8fe025 | 116 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]); |
cd4665c5 | 117 | if (2 != (rc = i2c_master_send(c, buffer, 2))) |
6b8fe025 | 118 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 2)\n", rc); |
cd4665c5 MCC |
119 | } |
120 | ||
6b8fe025 HV |
121 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
122 | const u8 end, int max_line) | |
3ad96835 | 123 | { |
6b8fe025 | 124 | int i = 0; |
3ad96835 | 125 | |
6b8fe025 HV |
126 | while (init != (u8)(end + 1)) { |
127 | if ((i % max_line) == 0) { | |
128 | if (i > 0) | |
3ad96835 | 129 | printk("\n"); |
6b8fe025 | 130 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 131 | } |
6b8fe025 | 132 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
133 | |
134 | init++; | |
135 | i++; | |
136 | } | |
137 | printk("\n"); | |
138 | } | |
139 | ||
6b8fe025 | 140 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 141 | { |
84486d53 | 142 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 143 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 144 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 145 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 146 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 147 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 148 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 149 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 150 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 151 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 152 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 153 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 154 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
155 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
156 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
157 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 158 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 159 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 160 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 161 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 162 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 163 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 164 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 165 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 166 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 167 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 168 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 169 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 170 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
171 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
172 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 173 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
174 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
175 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 176 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 177 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 178 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 179 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 180 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 181 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 182 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 183 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 184 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
185 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
186 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 187 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 188 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 189 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 190 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 191 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 192 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 193 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 194 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 195 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
196 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
197 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 198 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 199 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 200 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 201 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 202 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 203 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 204 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
205 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
206 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 207 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
208 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
209 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 210 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
211 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
212 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 213 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 214 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 215 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 216 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 217 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
218 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
219 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
220 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
221 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
222 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 223 | |
6b8fe025 HV |
224 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
225 | TVP5150_TELETEXT_FIL1_END, 8); | |
226 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
227 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 228 | |
84486d53 | 229 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 230 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 231 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 232 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 233 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 234 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 235 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 236 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 237 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 238 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 239 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 240 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 241 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 242 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 243 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 244 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 245 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 246 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 247 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
248 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
249 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 250 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 251 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 252 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 253 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 254 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 255 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 256 | |
6b8fe025 HV |
257 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
258 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 259 | |
6b8fe025 HV |
260 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
261 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 262 | |
6b8fe025 HV |
263 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
264 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 265 | |
6b8fe025 HV |
266 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
267 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 268 | |
6b8fe025 HV |
269 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
270 | TVP5150_LINE_MODE_END, 8); | |
271 | return 0; | |
cd4665c5 MCC |
272 | } |
273 | ||
274 | /**************************************************************************** | |
275 | Basic functions | |
276 | ****************************************************************************/ | |
cd4665c5 | 277 | |
6b8fe025 | 278 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 279 | { |
c0477ad9 | 280 | int opmode=0; |
6b8fe025 | 281 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 282 | int input = 0; |
f4b8b3ae | 283 | unsigned char val; |
84486d53 | 284 | |
5325b427 | 285 | if ((decoder->output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
c7c0b34c | 286 | input = 8; |
4c86f973 | 287 | |
5325b427 | 288 | switch (decoder->input) { |
c7c0b34c HV |
289 | case TVP5150_COMPOSITE1: |
290 | input |= 2; | |
291 | /* fall through */ | |
292 | case TVP5150_COMPOSITE0: | |
c0477ad9 MCC |
293 | opmode=0x30; /* TV Mode */ |
294 | break; | |
c7c0b34c | 295 | case TVP5150_SVIDEO: |
c0477ad9 | 296 | default: |
c7c0b34c | 297 | input |= 1; |
c0477ad9 MCC |
298 | opmode=0; /* Auto Mode */ |
299 | break; | |
300 | } | |
301 | ||
6b8fe025 | 302 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 | 303 | "=> tvp5150 input=%i, opmode=%i\n", |
5325b427 HV |
304 | decoder->input, decoder->output, |
305 | input, opmode); | |
12500f07 | 306 | |
6b8fe025 HV |
307 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
308 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
309 | |
310 | /* Svideo should enable YCrCb output and disable GPCL output | |
311 | * For Composite and TV, it should be the reverse | |
312 | */ | |
6b8fe025 | 313 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
5325b427 | 314 | if (decoder->input == TVP5150_SVIDEO) |
f4b8b3ae MCC |
315 | val = (val & ~0x40) | 0x10; |
316 | else | |
317 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 318 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
319 | }; |
320 | ||
e1bc80ad MCC |
321 | struct i2c_reg_value { |
322 | unsigned char reg; | |
323 | unsigned char value; | |
324 | }; | |
325 | ||
326 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
327 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
328 | { /* 0x00 */ | |
329 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
330 | }, | |
331 | { /* 0x01 */ | |
332 | TVP5150_ANAL_CHL_CTL,0x15 | |
333 | }, | |
334 | { /* 0x02 */ | |
335 | TVP5150_OP_MODE_CTL,0x00 | |
336 | }, | |
337 | { /* 0x03 */ | |
338 | TVP5150_MISC_CTL,0x01 | |
339 | }, | |
340 | { /* 0x06 */ | |
341 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
342 | }, | |
343 | { /* 0x07 */ | |
344 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
345 | }, | |
346 | { /* 0x08 */ | |
347 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
348 | }, | |
349 | { /* 0x09 */ | |
350 | TVP5150_BRIGHT_CTL,0x80 | |
351 | }, | |
352 | { /* 0x0a */ | |
353 | TVP5150_SATURATION_CTL,0x80 | |
354 | }, | |
355 | { /* 0x0b */ | |
356 | TVP5150_HUE_CTL,0x00 | |
357 | }, | |
358 | { /* 0x0c */ | |
359 | TVP5150_CONTRAST_CTL,0x80 | |
360 | }, | |
361 | { /* 0x0d */ | |
362 | TVP5150_DATA_RATE_SEL,0x47 | |
363 | }, | |
364 | { /* 0x0e */ | |
365 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
366 | }, | |
367 | { /* 0x0f */ | |
368 | TVP5150_CONF_SHARED_PIN,0x08 | |
369 | }, | |
370 | { /* 0x11 */ | |
371 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
372 | }, | |
373 | { /* 0x12 */ | |
374 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
375 | }, | |
376 | { /* 0x13 */ | |
377 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
378 | }, | |
379 | { /* 0x14 */ | |
380 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
381 | }, | |
382 | { /* 0x15 */ | |
383 | TVP5150_GENLOCK,0x01 | |
384 | }, | |
385 | { /* 0x16 */ | |
386 | TVP5150_HORIZ_SYNC_START,0x80 | |
387 | }, | |
388 | { /* 0x18 */ | |
389 | TVP5150_VERT_BLANKING_START,0x00 | |
390 | }, | |
391 | { /* 0x19 */ | |
392 | TVP5150_VERT_BLANKING_STOP,0x00 | |
393 | }, | |
394 | { /* 0x1a */ | |
395 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
396 | }, | |
397 | { /* 0x1b */ | |
398 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
399 | }, | |
400 | { /* 0x1c */ | |
401 | TVP5150_INT_RESET_REG_B,0x00 | |
402 | }, | |
403 | { /* 0x1d */ | |
404 | TVP5150_INT_ENABLE_REG_B,0x00 | |
405 | }, | |
406 | { /* 0x1e */ | |
407 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
408 | }, | |
409 | { /* 0x28 */ | |
410 | TVP5150_VIDEO_STD,0x00 | |
411 | }, | |
412 | { /* 0x2e */ | |
413 | TVP5150_MACROVISION_ON_CTR,0x0f | |
414 | }, | |
415 | { /* 0x2f */ | |
416 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
417 | }, | |
418 | { /* 0xbb */ | |
419 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
420 | }, | |
421 | { /* 0xc0 */ | |
422 | TVP5150_INT_STATUS_REG_A,0x00 | |
423 | }, | |
424 | { /* 0xc1 */ | |
425 | TVP5150_INT_ENABLE_REG_A,0x00 | |
426 | }, | |
427 | { /* 0xc2 */ | |
428 | TVP5150_INT_CONF,0x04 | |
429 | }, | |
430 | { /* 0xc8 */ | |
431 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
432 | }, | |
433 | { /* 0xc9 */ | |
434 | TVP5150_FIFO_RESET,0x00 | |
435 | }, | |
436 | { /* 0xca */ | |
437 | TVP5150_LINE_NUMBER_INT,0x00 | |
438 | }, | |
439 | { /* 0xcb */ | |
440 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
441 | }, | |
442 | { /* 0xcc */ | |
443 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
444 | }, | |
445 | { /* 0xcd */ | |
446 | TVP5150_FIFO_OUT_CTRL,0x01 | |
447 | }, | |
448 | { /* 0xcf */ | |
3ad96835 | 449 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
450 | }, |
451 | { /* 0xd0 */ | |
3ad96835 | 452 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
453 | }, |
454 | { /* 0xfc */ | |
455 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
456 | }, | |
457 | { /* end of data */ | |
458 | 0xff,0xff | |
459 | } | |
460 | }; | |
461 | ||
462 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
463 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
464 | { | |
465 | TVP5150_CONF_SHARED_PIN, 2 | |
466 | },{ /* Automatic offset and AGC enabled */ | |
467 | TVP5150_ANAL_CHL_CTL, 0x15 | |
468 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
469 | TVP5150_MISC_CTL, 0x6f | |
470 | },{ /* Activates video std autodetection for all standards */ | |
471 | TVP5150_AUTOSW_MSK, 0x0 | |
472 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
473 | TVP5150_DATA_RATE_SEL, 0x47 | |
474 | },{ | |
475 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
476 | },{ | |
477 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
478 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
479 | 0x27, 0x20 | |
480 | },{ | |
481 | 0xff,0xff | |
482 | } | |
483 | }; | |
484 | ||
6ac48b45 MCC |
485 | struct tvp5150_vbi_type { |
486 | unsigned int vbi_type; | |
487 | unsigned int ini_line; | |
488 | unsigned int end_line; | |
489 | unsigned int by_field :1; | |
490 | }; | |
491 | ||
e1bc80ad MCC |
492 | struct i2c_vbi_ram_value { |
493 | u16 reg; | |
6ac48b45 MCC |
494 | struct tvp5150_vbi_type type; |
495 | unsigned char values[16]; | |
e1bc80ad MCC |
496 | }; |
497 | ||
6ac48b45 MCC |
498 | /* This struct have the values for each supported VBI Standard |
499 | * by | |
500 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
501 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
502 | * and so on. There are 16 possible locations from 0 to 15. | |
503 | */ | |
3ad96835 | 504 | |
a9cff90e | 505 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 506 | { |
9bc7400a HV |
507 | /* FIXME: Current api doesn't handle all VBI types, those not |
508 | yet supported are placed under #if 0 */ | |
509 | #if 0 | |
6ac48b45 MCC |
510 | {0x010, /* Teletext, SECAM, WST System A */ |
511 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
512 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
513 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 514 | }, |
9bc7400a | 515 | #endif |
6ac48b45 | 516 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 517 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
518 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
519 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 520 | }, |
9bc7400a | 521 | #if 0 |
6ac48b45 MCC |
522 | {0x050, /* Teletext, PAL, WST System C */ |
523 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
524 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
525 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 526 | }, |
6ac48b45 MCC |
527 | {0x070, /* Teletext, NTSC, WST System B */ |
528 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
529 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
530 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 531 | }, |
6ac48b45 MCC |
532 | {0x090, /* Tetetext, NTSC NABTS System C */ |
533 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
534 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
535 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 536 | }, |
6ac48b45 MCC |
537 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
538 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
539 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
540 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 541 | }, |
6ac48b45 MCC |
542 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
543 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
544 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
545 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 546 | }, |
9bc7400a | 547 | #endif |
6ac48b45 MCC |
548 | {0x0f0, /* Closed Caption, NTSC */ |
549 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
550 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
551 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 552 | }, |
6ac48b45 | 553 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 554 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
555 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
556 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 557 | }, |
9bc7400a | 558 | #if 0 |
6ac48b45 MCC |
559 | {0x130, /* Wide Screen Signal, NTSC C */ |
560 | {V4L2_SLICED_WSS_525,20,20,1}, | |
561 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
562 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 563 | }, |
6ac48b45 MCC |
564 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
565 | {V4l2_SLICED_VITC_625,6,22,0}, | |
566 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
567 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 568 | }, |
6ac48b45 MCC |
569 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
570 | {V4l2_SLICED_VITC_525,10,20,0}, | |
571 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
572 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 573 | }, |
9bc7400a | 574 | #endif |
6ac48b45 MCC |
575 | {0x190, /* Video Program System (VPS), PAL */ |
576 | {V4L2_SLICED_VPS,16,16,0}, | |
577 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
578 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 579 | }, |
6ac48b45 MCC |
580 | /* 0x1d0 User programmable */ |
581 | ||
582 | /* End of struct */ | |
583 | { (u16)-1 } | |
e1bc80ad | 584 | }; |
4c86f973 | 585 | |
6b8fe025 | 586 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 587 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
588 | { |
589 | while (regs->reg != 0xff) { | |
6b8fe025 | 590 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
591 | regs++; |
592 | } | |
593 | return 0; | |
594 | } | |
84486d53 | 595 | |
6b8fe025 | 596 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 597 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
598 | { |
599 | unsigned int i; | |
cd4665c5 | 600 | |
e1bc80ad | 601 | /* Disable Full Field */ |
6b8fe025 | 602 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 603 | |
e1bc80ad | 604 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
605 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
606 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 607 | |
e1bc80ad | 608 | /* Load Ram Table */ |
6b8fe025 HV |
609 | while (regs->reg != (u16)-1) { |
610 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
611 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 612 | |
6b8fe025 HV |
613 | for (i = 0; i < 16; i++) |
614 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 615 | |
e1bc80ad MCC |
616 | regs++; |
617 | } | |
618 | return 0; | |
619 | } | |
cd4665c5 | 620 | |
6ac48b45 | 621 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 622 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
623 | struct v4l2_sliced_vbi_cap *cap) |
624 | { | |
6b8fe025 | 625 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
626 | int line; |
627 | ||
bccfa449 | 628 | v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n"); |
6ac48b45 MCC |
629 | memset(cap, 0, sizeof *cap); |
630 | ||
631 | while (regs->reg != (u16)-1 ) { | |
632 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
633 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
634 | } | |
635 | cap->service_set |= regs->type.vbi_type; | |
636 | ||
637 | regs++; | |
638 | } | |
6b8fe025 | 639 | return 0; |
6ac48b45 MCC |
640 | } |
641 | ||
3ad96835 MCC |
642 | /* Set vbi processing |
643 | * type - one of tvp5150_vbi_types | |
644 | * line - line to gather data | |
645 | * fields: bit 0 field1, bit 1, field2 | |
646 | * flags (default=0xf0) is a bitmask, were set means: | |
647 | * bit 7: enable filtering null bytes on CC | |
648 | * bit 6: send data also to FIFO | |
649 | * bit 5: don't allow data with errors on FIFO | |
650 | * bit 4: enable ECC when possible | |
651 | * pix_align = pix alignment: | |
652 | * LSB = field1 | |
653 | * MSB = field2 | |
654 | */ | |
6b8fe025 | 655 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
656 | const struct i2c_vbi_ram_value *regs, |
657 | unsigned int type,u8 flags, int line, | |
658 | const int fields) | |
3ad96835 | 659 | { |
6b8fe025 HV |
660 | struct tvp5150 *decoder = to_tvp5150(sd); |
661 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 662 | u8 reg; |
2701dacb | 663 | int pos=0; |
3ad96835 MCC |
664 | |
665 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 666 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 667 | return 0; |
7d5b7b98 | 668 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
669 | /* Don't follow NTSC Line number convension */ |
670 | line += 3; | |
671 | } | |
672 | ||
673 | if (line<6||line>27) | |
2701dacb MCC |
674 | return 0; |
675 | ||
676 | while (regs->reg != (u16)-1 ) { | |
677 | if ((type & regs->type.vbi_type) && | |
678 | (line>=regs->type.ini_line) && | |
679 | (line<=regs->type.end_line)) { | |
680 | type=regs->type.vbi_type; | |
681 | break; | |
682 | } | |
683 | ||
684 | regs++; | |
685 | pos++; | |
686 | } | |
687 | if (regs->reg == (u16)-1) | |
688 | return 0; | |
3ad96835 | 689 | |
2701dacb | 690 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
691 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
692 | ||
693 | if (fields&1) { | |
6b8fe025 | 694 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
695 | } |
696 | ||
697 | if (fields&2) { | |
6b8fe025 | 698 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
699 | } |
700 | ||
2701dacb | 701 | return type; |
3ad96835 MCC |
702 | } |
703 | ||
6b8fe025 | 704 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
705 | const struct i2c_vbi_ram_value *regs, int line) |
706 | { | |
6b8fe025 HV |
707 | struct tvp5150 *decoder = to_tvp5150(sd); |
708 | v4l2_std_id std = decoder->norm; | |
12db5607 | 709 | u8 reg; |
6b8fe025 | 710 | int pos, type = 0; |
12db5607 MCC |
711 | |
712 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 713 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 714 | return 0; |
7d5b7b98 | 715 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
716 | /* Don't follow NTSC Line number convension */ |
717 | line += 3; | |
718 | } | |
719 | ||
6b8fe025 | 720 | if (line < 6 || line > 27) |
12db5607 MCC |
721 | return 0; |
722 | ||
6b8fe025 | 723 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 724 | |
6b8fe025 HV |
725 | pos = tvp5150_read(sd, reg) & 0x0f; |
726 | if (pos < 0x0f) | |
727 | type = regs[pos].type.vbi_type; | |
12db5607 | 728 | |
6b8fe025 HV |
729 | pos = tvp5150_read(sd, reg + 1) & 0x0f; |
730 | if (pos < 0x0f) | |
731 | type |= regs[pos].type.vbi_type; | |
12db5607 MCC |
732 | |
733 | return type; | |
734 | } | |
6b8fe025 HV |
735 | |
736 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 737 | { |
6b8fe025 HV |
738 | struct tvp5150 *decoder = to_tvp5150(sd); |
739 | int fmt = 0; | |
e1bc80ad | 740 | |
6b8fe025 | 741 | decoder->norm = std; |
e1bc80ad MCC |
742 | |
743 | /* First tests should be against specific std */ | |
744 | ||
745 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 746 | fmt = 0; /* Autodetect mode */ |
e1bc80ad | 747 | } else if (std & V4L2_STD_NTSC_443) { |
6b8fe025 | 748 | fmt = 0xa; |
e1bc80ad | 749 | } else if (std & V4L2_STD_PAL_M) { |
6b8fe025 HV |
750 | fmt = 0x6; |
751 | } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) { | |
752 | fmt = 0x8; | |
e1bc80ad MCC |
753 | } else { |
754 | /* Then, test against generic ones */ | |
6b8fe025 HV |
755 | if (std & V4L2_STD_NTSC) |
756 | fmt = 0x2; | |
757 | else if (std & V4L2_STD_PAL) | |
758 | fmt = 0x4; | |
759 | else if (std & V4L2_STD_SECAM) | |
760 | fmt = 0xc; | |
e1bc80ad | 761 | } |
84486d53 | 762 | |
6b8fe025 HV |
763 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
764 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
765 | return 0; |
766 | } | |
767 | ||
6b8fe025 HV |
768 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
769 | { | |
770 | struct tvp5150 *decoder = to_tvp5150(sd); | |
771 | ||
772 | if (decoder->norm == std) | |
773 | return 0; | |
774 | ||
775 | return tvp5150_set_std(sd, std); | |
776 | } | |
777 | ||
778 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 779 | { |
6b8fe025 | 780 | struct tvp5150 *decoder = to_tvp5150(sd); |
e36eaa71 | 781 | u8 msb_id, lsb_id, msb_rom, lsb_rom; |
e1bc80ad | 782 | |
6b8fe025 HV |
783 | msb_id = tvp5150_read(sd, TVP5150_MSB_DEV_ID); |
784 | lsb_id = tvp5150_read(sd, TVP5150_LSB_DEV_ID); | |
785 | msb_rom = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER); | |
786 | lsb_rom = tvp5150_read(sd, TVP5150_ROM_MINOR_VER); | |
e1bc80ad | 787 | |
6b8fe025 HV |
788 | if (msb_rom == 4 && lsb_rom == 0) { /* Is TVP5150AM1 */ |
789 | v4l2_info(sd, "tvp%02x%02xam1 detected.\n", msb_id, lsb_id); | |
e36eaa71 MCC |
790 | |
791 | /* ITU-T BT.656.4 timing */ | |
6b8fe025 | 792 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); |
e1bc80ad | 793 | } else { |
6b8fe025 HV |
794 | if (msb_rom == 3 || lsb_rom == 0x21) { /* Is TVP5150A */ |
795 | v4l2_info(sd, "tvp%02x%02xa detected.\n", msb_id, lsb_id); | |
e36eaa71 | 796 | } else { |
6b8fe025 HV |
797 | v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n", |
798 | msb_id, lsb_id); | |
799 | v4l2_info(sd, "*** Rom ver is %d.%d\n", msb_rom, lsb_rom); | |
e36eaa71 | 800 | } |
e1bc80ad | 801 | } |
84486d53 | 802 | |
e1bc80ad | 803 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 804 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
805 | |
806 | /* Initializes VDP registers */ | |
6b8fe025 | 807 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
808 | |
809 | /* Selects decoder input */ | |
6b8fe025 | 810 | tvp5150_selmux(sd); |
e1bc80ad MCC |
811 | |
812 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 813 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
814 | |
815 | /* Initialize image preferences */ | |
6b8fe025 HV |
816 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, decoder->bright); |
817 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, decoder->contrast); | |
818 | tvp5150_write(sd, TVP5150_SATURATION_CTL, decoder->contrast); | |
819 | tvp5150_write(sd, TVP5150_HUE_CTL, decoder->hue); | |
e1bc80ad | 820 | |
6b8fe025 HV |
821 | tvp5150_set_std(sd, decoder->norm); |
822 | return 0; | |
cd4665c5 MCC |
823 | }; |
824 | ||
6b8fe025 | 825 | static int tvp5150_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
a6c2ba28 | 826 | { |
bccfa449 | 827 | v4l2_dbg(1, debug, sd, "g_ctrl called\n"); |
a6c2ba28 | 828 | |
829 | switch (ctrl->id) { | |
830 | case V4L2_CID_BRIGHTNESS: | |
6b8fe025 | 831 | ctrl->value = tvp5150_read(sd, TVP5150_BRIGHT_CTL); |
a6c2ba28 | 832 | return 0; |
833 | case V4L2_CID_CONTRAST: | |
6b8fe025 | 834 | ctrl->value = tvp5150_read(sd, TVP5150_CONTRAST_CTL); |
a6c2ba28 | 835 | return 0; |
836 | case V4L2_CID_SATURATION: | |
6b8fe025 | 837 | ctrl->value = tvp5150_read(sd, TVP5150_SATURATION_CTL); |
a6c2ba28 | 838 | return 0; |
839 | case V4L2_CID_HUE: | |
6b8fe025 | 840 | ctrl->value = tvp5150_read(sd, TVP5150_HUE_CTL); |
a6c2ba28 | 841 | return 0; |
a6c2ba28 | 842 | } |
c0477ad9 | 843 | return -EINVAL; |
a6c2ba28 | 844 | } |
845 | ||
6b8fe025 | 846 | static int tvp5150_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
a6c2ba28 | 847 | { |
6b8fe025 HV |
848 | u8 i, n; |
849 | n = ARRAY_SIZE(tvp5150_qctrl); | |
850 | ||
851 | for (i = 0; i < n; i++) { | |
852 | if (ctrl->id != tvp5150_qctrl[i].id) | |
853 | continue; | |
854 | if (ctrl->value < tvp5150_qctrl[i].minimum || | |
855 | ctrl->value > tvp5150_qctrl[i].maximum) | |
856 | return -ERANGE; | |
bccfa449 | 857 | v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n", |
6b8fe025 HV |
858 | ctrl->id, ctrl->value); |
859 | break; | |
860 | } | |
a6c2ba28 | 861 | |
862 | switch (ctrl->id) { | |
863 | case V4L2_CID_BRIGHTNESS: | |
6b8fe025 | 864 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->value); |
a6c2ba28 | 865 | return 0; |
866 | case V4L2_CID_CONTRAST: | |
6b8fe025 | 867 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->value); |
a6c2ba28 | 868 | return 0; |
869 | case V4L2_CID_SATURATION: | |
6b8fe025 | 870 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->value); |
a6c2ba28 | 871 | return 0; |
872 | case V4L2_CID_HUE: | |
6b8fe025 | 873 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->value); |
a6c2ba28 | 874 | return 0; |
a6c2ba28 | 875 | } |
c0477ad9 | 876 | return -EINVAL; |
a6c2ba28 | 877 | } |
878 | ||
84486d53 MCC |
879 | /**************************************************************************** |
880 | I2C Command | |
881 | ****************************************************************************/ | |
c7c0b34c | 882 | |
5325b427 HV |
883 | static int tvp5150_s_routing(struct v4l2_subdev *sd, |
884 | u32 input, u32 output, u32 config) | |
6b8fe025 HV |
885 | { |
886 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 887 | |
5325b427 HV |
888 | decoder->input = input; |
889 | decoder->output = output; | |
6b8fe025 HV |
890 | tvp5150_selmux(sd); |
891 | return 0; | |
892 | } | |
6ac48b45 | 893 | |
6b8fe025 HV |
894 | static int tvp5150_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) |
895 | { | |
896 | struct v4l2_sliced_vbi_format *svbi; | |
897 | int i; | |
898 | ||
899 | /* raw vbi */ | |
900 | if (fmt->type == V4L2_BUF_TYPE_VBI_CAPTURE) { | |
901 | /* this is for capturing 36 raw vbi lines | |
902 | if there's a way to cut off the beginning 2 vbi lines | |
903 | with the tvp5150 then the vbi line count could be lowered | |
904 | to 17 lines/field again, although I couldn't find a register | |
905 | which could do that cropping */ | |
906 | if (fmt->fmt.vbi.sample_format == V4L2_PIX_FMT_GREY) | |
907 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
908 | if (fmt->fmt.vbi.count[0] == 18 && fmt->fmt.vbi.count[1] == 18) { | |
909 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
910 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
911 | } | |
912 | return 0; | |
6ac48b45 | 913 | } |
6b8fe025 HV |
914 | if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) |
915 | return -EINVAL; | |
916 | svbi = &fmt->fmt.sliced; | |
917 | if (svbi->service_set != 0) { | |
918 | for (i = 0; i <= 23; i++) { | |
919 | svbi->service_lines[1][i] = 0; | |
920 | svbi->service_lines[0][i] = | |
921 | tvp5150_set_vbi(sd, vbi_ram_default, | |
922 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 923 | } |
6b8fe025 HV |
924 | /* Enables FIFO */ |
925 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
926 | } else { | |
927 | /* Disables FIFO*/ | |
928 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 929 | |
6b8fe025 HV |
930 | /* Disable Full Field */ |
931 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 932 | |
6b8fe025 HV |
933 | /* Disable Line modes */ |
934 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
935 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 936 | } |
6b8fe025 HV |
937 | return 0; |
938 | } | |
12db5607 | 939 | |
6b8fe025 HV |
940 | static int tvp5150_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) |
941 | { | |
942 | struct v4l2_sliced_vbi_format *svbi; | |
943 | int i, mask = 0; | |
12db5607 | 944 | |
6b8fe025 HV |
945 | if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) |
946 | return -EINVAL; | |
947 | svbi = &fmt->fmt.sliced; | |
948 | memset(svbi, 0, sizeof(*svbi)); | |
12db5607 | 949 | |
6b8fe025 HV |
950 | for (i = 0; i <= 23; i++) { |
951 | svbi->service_lines[0][i] = | |
952 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
953 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 954 | } |
6b8fe025 HV |
955 | svbi->service_set = mask; |
956 | return 0; | |
957 | } | |
958 | ||
12db5607 | 959 | |
bc974305 | 960 | static int tvp5150_g_chip_ident(struct v4l2_subdev *sd, |
aecde8b5 | 961 | struct v4l2_dbg_chip_ident *chip) |
bc974305 MCC |
962 | { |
963 | int rev; | |
964 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
965 | ||
966 | rev = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER) << 8 | | |
967 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER); | |
968 | ||
969 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP5150, | |
970 | rev); | |
971 | } | |
972 | ||
973 | ||
21dcd8cc | 974 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 975 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 HV |
976 | { |
977 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
21dcd8cc | 978 | |
aecde8b5 | 979 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
980 | return -EINVAL; |
981 | if (!capable(CAP_SYS_ADMIN)) | |
982 | return -EPERM; | |
983 | reg->val = tvp5150_read(sd, reg->reg & 0xff); | |
aecde8b5 | 984 | reg->size = 1; |
6b8fe025 HV |
985 | return 0; |
986 | } | |
84486d53 | 987 | |
aecde8b5 | 988 | static int tvp5150_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 HV |
989 | { |
990 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
84486d53 | 991 | |
aecde8b5 | 992 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
993 | return -EINVAL; |
994 | if (!capable(CAP_SYS_ADMIN)) | |
995 | return -EPERM; | |
996 | tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); | |
997 | return 0; | |
998 | } | |
999 | #endif | |
a6c2ba28 | 1000 | |
6b8fe025 HV |
1001 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1002 | { | |
1003 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 1004 | |
6b8fe025 HV |
1005 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
1006 | return 0; | |
1007 | } | |
a6c2ba28 | 1008 | |
6b8fe025 HV |
1009 | static int tvp5150_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc) |
1010 | { | |
1011 | int i; | |
a6c2ba28 | 1012 | |
bccfa449 | 1013 | v4l2_dbg(1, debug, sd, "queryctrl called\n"); |
6b8fe025 HV |
1014 | |
1015 | for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++) | |
1016 | if (qc->id && qc->id == tvp5150_qctrl[i].id) { | |
1017 | memcpy(qc, &(tvp5150_qctrl[i]), | |
1018 | sizeof(*qc)); | |
1019 | return 0; | |
a6c2ba28 | 1020 | } |
1021 | ||
6b8fe025 HV |
1022 | return -EINVAL; |
1023 | } | |
84486d53 | 1024 | |
6b8fe025 HV |
1025 | /* ----------------------------------------------------------------------- */ |
1026 | ||
1027 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { | |
1028 | .log_status = tvp5150_log_status, | |
1029 | .g_ctrl = tvp5150_g_ctrl, | |
1030 | .s_ctrl = tvp5150_s_ctrl, | |
1031 | .queryctrl = tvp5150_queryctrl, | |
f41737ec | 1032 | .s_std = tvp5150_s_std, |
6b8fe025 | 1033 | .reset = tvp5150_reset, |
bc974305 | 1034 | .g_chip_ident = tvp5150_g_chip_ident, |
6b8fe025 HV |
1035 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1036 | .g_register = tvp5150_g_register, | |
1037 | .s_register = tvp5150_s_register, | |
1038 | #endif | |
1039 | }; | |
1040 | ||
1041 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
6b8fe025 HV |
1042 | .g_tuner = tvp5150_g_tuner, |
1043 | }; | |
1044 | ||
1045 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
1046 | .s_routing = tvp5150_s_routing, | |
1047 | .g_fmt = tvp5150_g_fmt, | |
1048 | .s_fmt = tvp5150_s_fmt, | |
1049 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, | |
1050 | }; | |
1051 | ||
1052 | static const struct v4l2_subdev_ops tvp5150_ops = { | |
1053 | .core = &tvp5150_core_ops, | |
1054 | .tuner = &tvp5150_tuner_ops, | |
1055 | .video = &tvp5150_video_ops, | |
1056 | }; | |
1057 | ||
1058 | ||
cd4665c5 MCC |
1059 | /**************************************************************************** |
1060 | I2C Client & Driver | |
1061 | ****************************************************************************/ | |
cd4665c5 | 1062 | |
6b8fe025 HV |
1063 | static int tvp5150_probe(struct i2c_client *c, |
1064 | const struct i2c_device_id *id) | |
cd4665c5 | 1065 | { |
cd4665c5 | 1066 | struct tvp5150 *core; |
6b8fe025 | 1067 | struct v4l2_subdev *sd; |
cd4665c5 MCC |
1068 | |
1069 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1070 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1071 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1072 | return -EIO; |
cd4665c5 | 1073 | |
7408187d | 1074 | core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL); |
5fa1247a | 1075 | if (!core) { |
cd4665c5 MCC |
1076 | return -ENOMEM; |
1077 | } | |
6b8fe025 HV |
1078 | sd = &core->sd; |
1079 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); | |
1080 | v4l_info(c, "chip found @ 0x%02x (%s)\n", | |
1081 | c->addr << 1, c->adapter->name); | |
cd4665c5 | 1082 | |
3ad96835 | 1083 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
5325b427 | 1084 | core->input = TVP5150_COMPOSITE1; |
4c86f973 | 1085 | core->enable = 1; |
032c2028 MCC |
1086 | core->bright = 128; |
1087 | core->contrast = 128; | |
1088 | core->hue = 0; | |
1089 | core->sat = 128; | |
4c86f973 | 1090 | |
f1e5ee45 | 1091 | if (debug > 1) |
6b8fe025 | 1092 | tvp5150_log_status(sd); |
cd4665c5 MCC |
1093 | return 0; |
1094 | } | |
1095 | ||
6b8fe025 | 1096 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1097 | { |
6b8fe025 | 1098 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
cd4665c5 | 1099 | |
6b8fe025 | 1100 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1101 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1102 | c->addr << 1); | |
1103 | ||
6b8fe025 HV |
1104 | v4l2_device_unregister_subdev(sd); |
1105 | kfree(to_tvp5150(sd)); | |
cd4665c5 MCC |
1106 | return 0; |
1107 | } | |
1108 | ||
1109 | /* ----------------------------------------------------------------------- */ | |
1110 | ||
6b8fe025 HV |
1111 | static const struct i2c_device_id tvp5150_id[] = { |
1112 | { "tvp5150", 0 }, | |
1113 | { } | |
1114 | }; | |
1115 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1116 | |
6b8fe025 HV |
1117 | static struct v4l2_i2c_driver_data v4l2_i2c_data = { |
1118 | .name = "tvp5150", | |
6b8fe025 HV |
1119 | .probe = tvp5150_probe, |
1120 | .remove = tvp5150_remove, | |
6b8fe025 | 1121 | .id_table = tvp5150_id, |
cd4665c5 | 1122 | }; |