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V4L/DVB (13650): soc-camera: switch drivers and platforms to use .priv in struct...
[deliverable/linux.git] / drivers / media / video / tw9910.c
CommitLineData
ed922a89
KM		 1/*
2 * tw9910 Video Driver
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on ov772x driver,
8 *
9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
11 * Copyright (C) 2008 Magnus Damm
12 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/init.h>
20#include <linux/module.h>
21#include <linux/i2c.h>
22#include <linux/slab.h>
23#include <linux/kernel.h>
24#include <linux/delay.h>
25#include <linux/videodev2.h>
26#include <media/v4l2-chip-ident.h>
979ea1dd 27#include <media/v4l2-subdev.h>
ed922a89
KM		 28#include <media/soc_camera.h>
29#include <media/tw9910.h>
30
31#define GET_ID(val) ((val & 0xF8) >> 3)
32#define GET_ReV(val) (val & 0x07)
33
34/*
35 * register offset
36 */
37#define ID 0x00 /* Product ID Code Register */
38#define STATUS1 0x01 /* Chip Status Register I */
39#define INFORM 0x02 /* Input Format */
40#define OPFORM 0x03 /* Output Format Control Register */
41#define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */
42#define OUTCTR1 0x05 /* Output Control I */
43#define ACNTL1 0x06 /* Analog Control Register 1 */
44#define CROP_HI 0x07 /* Cropping Register, High */
45#define VDELAY_LO 0x08 /* Vertical Delay Register, Low */
46#define VACTIVE_LO 0x09 /* Vertical Active Register, Low */
47#define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */
48#define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */
49#define CNTRL1 0x0C /* Control Register I */
50#define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */
51#define SCALE_HI 0x0E /* Scaling Register, High */
52#define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */
53#define BRIGHT 0x10 /* BRIGHTNESS Control Register */
54#define CONTRAST 0x11 /* CONTRAST Control Register */
55#define SHARPNESS 0x12 /* SHARPNESS Control Register I */
56#define SAT_U 0x13 /* Chroma (U) Gain Register */
57#define SAT_V 0x14 /* Chroma (V) Gain Register */
58#define HUE 0x15 /* Hue Control Register */
59#define CORING1 0x17
60#define CORING2 0x18 /* Coring and IF compensation */
61#define VBICNTL 0x19 /* VBI Control Register */
62#define ACNTL2 0x1A /* Analog Control 2 */
63#define OUTCTR2 0x1B /* Output Control 2 */
64#define SDT 0x1C /* Standard Selection */
65#define SDTR 0x1D /* Standard Recognition */
66#define TEST 0x1F /* Test Control Register */
67#define CLMPG 0x20 /* Clamping Gain */
68#define IAGC 0x21 /* Individual AGC Gain */
69#define AGCGAIN 0x22 /* AGC Gain */
70#define PEAKWT 0x23 /* White Peak Threshold */
71#define CLMPL 0x24 /* Clamp level */
72#define SYNCT 0x25 /* Sync Amplitude */
73#define MISSCNT 0x26 /* Sync Miss Count Register */
74#define PCLAMP 0x27 /* Clamp Position Register */
75#define VCNTL1 0x28 /* Vertical Control I */
76#define VCNTL2 0x29 /* Vertical Control II */
77#define CKILL 0x2A /* Color Killer Level Control */
78#define COMB 0x2B /* Comb Filter Control */
79#define LDLY 0x2C /* Luma Delay and H Filter Control */
80#define MISC1 0x2D /* Miscellaneous Control I */
81#define LOOP 0x2E /* LOOP Control Register */
82#define MISC2 0x2F /* Miscellaneous Control II */
83#define MVSN 0x30 /* Macrovision Detection */
84#define STATUS2 0x31 /* Chip STATUS II */
85#define HFREF 0x32 /* H monitor */
86#define CLMD 0x33 /* CLAMP MODE */
87#define IDCNTL 0x34 /* ID Detection Control */
88#define CLCNTL1 0x35 /* Clamp Control I */
89#define ANAPLLCTL 0x4C
90#define VBIMIN 0x4D
91#define HSLOWCTL 0x4E
92#define WSS3 0x4F
93#define FILLDATA 0x50
94#define SDID 0x51
95#define DID 0x52
96#define WSS1 0x53
97#define WSS2 0x54
98#define VVBI 0x55
99#define LCTL6 0x56
100#define LCTL7 0x57
101#define LCTL8 0x58
102#define LCTL9 0x59
103#define LCTL10 0x5A
104#define LCTL11 0x5B
105#define LCTL12 0x5C
106#define LCTL13 0x5D
107#define LCTL14 0x5E
108#define LCTL15 0x5F
109#define LCTL16 0x60
110#define LCTL17 0x61
111#define LCTL18 0x62
112#define LCTL19 0x63
113#define LCTL20 0x64
114#define LCTL21 0x65
115#define LCTL22 0x66
116#define LCTL23 0x67
117#define LCTL24 0x68
118#define LCTL25 0x69
119#define LCTL26 0x6A
120#define HSGEGIN 0x6B
121#define HSEND 0x6C
122#define OVSDLY 0x6D
123#define OVSEND 0x6E
124#define VBIDELAY 0x6F
125
126/*
127 * register detail
128 */
129
130/* INFORM */
131#define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */
132#define FC27_FF 0x00 /* 0 : Square pixel mode. */
133 /* Must use 24.54MHz for 60Hz field rate */
134 /* source or 29.5MHz for 50Hz field rate */
135#define IFSEL_S 0x10 /* 01 : S-video decoding */
136#define IFSEL_C 0x00 /* 00 : Composite video decoding */
137 /* Y input video selection */
138#define YSEL_M0 0x00 /* 00 : Mux0 selected */
139#define YSEL_M1 0x04 /* 01 : Mux1 selected */
140#define YSEL_M2 0x08 /* 10 : Mux2 selected */
141#define YSEL_M3 0x10 /* 11 : Mux3 selected */
142
143/* OPFORM */
144#define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */
145 /* 1 : ITU-R-656 compatible data sequence format */
146#define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
147 /* 1 : 16-bit YCrCb 4:2:2 output format.*/
148#define LLCMODE 0x20 /* 1 : LLC output mode. */
149 /* 0 : free-run output mode */
150#define AINC 0x10 /* Serial interface auto-indexing control */
151 /* 0 : auto-increment */
152 /* 1 : non-auto */
153#define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */
154 /* 0 : Vertical out ctrl by HACTIVE and DVALID */
155#define OEN 0x04 /* Output Enable together with TRI_SEL. */
156
157/* OUTCTR1 */
158#define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */
159#define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */
160 /* VS pin output control */
161#define VSSL_VSYNC 0x00 /* 0 : VSYNC */
162#define VSSL_VACT 0x10 /* 1 : VACT */
163#define VSSL_FIELD 0x20 /* 2 : FIELD */
164#define VSSL_VVALID 0x30 /* 3 : VVALID */
165#define VSSL_ZERO 0x70 /* 7 : 0 */
166#define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */
167#define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/
168 /* HS pin output control */
169#define HSSL_HACT 0x00 /* 0 : HACT */
170#define HSSL_HSYNC 0x01 /* 1 : HSYNC */
171#define HSSL_DVALID 0x02 /* 2 : DVALID */
172#define HSSL_HLOCK 0x03 /* 3 : HLOCK */
173#define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */
174#define HSSL_ZERO 0x07 /* 7 : 0 */
175
176/* ACNTL1 */
177#define SRESET 0x80 /* resets the device to its default state
178 * but all register content remain unchanged.
179 * This bit is self-resetting.
180 */
181
182/* VBICNTL */
5d28d525
GL		 183
184/* RTSEL : control the real time signal output from the MPOUT pin */
ed922a89
KM		 185#define RTSEL_MASK 0x07
186#define RTSEL_VLOSS 0x00 /* 0000 = Video loss */
187#define RTSEL_HLOCK 0x01 /* 0001 = H-lock */
188#define RTSEL_SLOCK 0x02 /* 0010 = S-lock */
189#define RTSEL_VLOCK 0x03 /* 0011 = V-lock */
190#define RTSEL_MONO 0x04 /* 0100 = MONO */
191#define RTSEL_DET50 0x05 /* 0101 = DET50 */
192#define RTSEL_FIELD 0x06 /* 0110 = FIELD */
193#define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */
194
195/*
196 * structure
197 */
198
199struct regval_list {
200 unsigned char reg_num;
201 unsigned char value;
202};
203
204struct tw9910_scale_ctrl {
205 char *name;
206 unsigned short width;
207 unsigned short height;
208 u16 hscale;
209 u16 vscale;
210};
211
212struct tw9910_cropping_ctrl {
213 u16 vdelay;
214 u16 vactive;
215 u16 hdelay;
216 u16 hactive;
217};
218
219struct tw9910_hsync_ctrl {
220 u16 start;
221 u16 end;
222};
223
224struct tw9910_priv {
979ea1dd 225 struct v4l2_subdev subdev;
ed922a89 226 struct tw9910_video_info *info;
ed922a89
KM		 227 const struct tw9910_scale_ctrl *scale;
228};
229
230/*
231 * register settings
232 */
233
234#define ENDMARKER { 0xff, 0xff }
235
236static const struct regval_list tw9910_default_regs[] =
237{
238 { OPFORM, 0x00 },
239 { OUTCTR1, VSP_LO | VSSL_VVALID | HSP_HI | HSSL_HSYNC },
240 ENDMARKER,
241};
242
243static const struct soc_camera_data_format tw9910_color_fmt[] = {
244 {
245 .name = "VYUY",
246 .fourcc = V4L2_PIX_FMT_VYUY,
247 .depth = 16,
248 .colorspace = V4L2_COLORSPACE_SMPTE170M,
249 }
250};
251
252static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
253 {
254 .name = "NTSC SQ",
255 .width = 640,
256 .height = 480,
257 .hscale = 0x0100,
258 .vscale = 0x0100,
259 },
260 {
261 .name = "NTSC CCIR601",
262 .width = 720,
263 .height = 480,
264 .hscale = 0x0100,
265 .vscale = 0x0100,
266 },
267 {
268 .name = "NTSC SQ (CIF)",
269 .width = 320,
270 .height = 240,
271 .hscale = 0x0200,
272 .vscale = 0x0200,
273 },
274 {
275 .name = "NTSC CCIR601 (CIF)",
276 .width = 360,
277 .height = 240,
278 .hscale = 0x0200,
279 .vscale = 0x0200,
280 },
281 {
282 .name = "NTSC SQ (QCIF)",
283 .width = 160,
284 .height = 120,
285 .hscale = 0x0400,
286 .vscale = 0x0400,
287 },
288 {
289 .name = "NTSC CCIR601 (QCIF)",
290 .width = 180,
291 .height = 120,
292 .hscale = 0x0400,
293 .vscale = 0x0400,
294 },
295};
296
297static const struct tw9910_scale_ctrl tw9910_pal_scales[] = {
298 {
299 .name = "PAL SQ",
300 .width = 768,
301 .height = 576,
302 .hscale = 0x0100,
303 .vscale = 0x0100,
304 },
305 {
306 .name = "PAL CCIR601",
307 .width = 720,
308 .height = 576,
309 .hscale = 0x0100,
310 .vscale = 0x0100,
311 },
312 {
313 .name = "PAL SQ (CIF)",
314 .width = 384,
315 .height = 288,
316 .hscale = 0x0200,
317 .vscale = 0x0200,
318 },
319 {
320 .name = "PAL CCIR601 (CIF)",
321 .width = 360,
322 .height = 288,
323 .hscale = 0x0200,
324 .vscale = 0x0200,
325 },
326 {
327 .name = "PAL SQ (QCIF)",
328 .width = 192,
329 .height = 144,
330 .hscale = 0x0400,
331 .vscale = 0x0400,
332 },
333 {
334 .name = "PAL CCIR601 (QCIF)",
335 .width = 180,
336 .height = 144,
337 .hscale = 0x0400,
338 .vscale = 0x0400,
339 },
340};
341
342static const struct tw9910_cropping_ctrl tw9910_cropping_ctrl = {
343 .vdelay = 0x0012,
344 .vactive = 0x00F0,
345 .hdelay = 0x0010,
346 .hactive = 0x02D0,
347};
348
349static const struct tw9910_hsync_ctrl tw9910_hsync_ctrl = {
350 .start = 0x0260,
351 .end = 0x0300,
352};
353
354/*
355 * general function
356 */
979ea1dd
GL		 357static struct tw9910_priv *to_tw9910(const struct i2c_client *client)
358{
96c75399
GL		 359 return container_of(i2c_get_clientdata(client), struct tw9910_priv,
360 subdev);
979ea1dd
GL		 361}
362
ed922a89
KM		 363static int tw9910_set_scale(struct i2c_client *client,
364 const struct tw9910_scale_ctrl *scale)
365{
366 int ret;
367
368 ret = i2c_smbus_write_byte_data(client, SCALE_HI,
369 (scale->vscale & 0x0F00) >> 4 |
370 (scale->hscale & 0x0F00) >> 8);
371 if (ret < 0)
372 return ret;
373
374 ret = i2c_smbus_write_byte_data(client, HSCALE_LO,
375 scale->hscale & 0x00FF);
376 if (ret < 0)
377 return ret;
378
379 ret = i2c_smbus_write_byte_data(client, VSCALE_LO,
380 scale->vscale & 0x00FF);
381
382 return ret;
383}
384
385static int tw9910_set_cropping(struct i2c_client *client,
386 const struct tw9910_cropping_ctrl *cropping)
387{
388 int ret;
389
390 ret = i2c_smbus_write_byte_data(client, CROP_HI,
391 (cropping->vdelay & 0x0300) >> 2 |
392 (cropping->vactive & 0x0300) >> 4 |
393 (cropping->hdelay & 0x0300) >> 6 |
394 (cropping->hactive & 0x0300) >> 8);
395 if (ret < 0)
396 return ret;
397
398 ret = i2c_smbus_write_byte_data(client, VDELAY_LO,
399 cropping->vdelay & 0x00FF);
400 if (ret < 0)
401 return ret;
402
403 ret = i2c_smbus_write_byte_data(client, VACTIVE_LO,
404 cropping->vactive & 0x00FF);
405 if (ret < 0)
406 return ret;
407
408 ret = i2c_smbus_write_byte_data(client, HDELAY_LO,
409 cropping->hdelay & 0x00FF);
410 if (ret < 0)
411 return ret;
412
413 ret = i2c_smbus_write_byte_data(client, HACTIVE_LO,
414 cropping->hactive & 0x00FF);
415
416 return ret;
417}
418
419static int tw9910_set_hsync(struct i2c_client *client,
420 const struct tw9910_hsync_ctrl *hsync)
421{
422 int ret;
423
424 /* bit 10 - 3 */
425 ret = i2c_smbus_write_byte_data(client, HSGEGIN,
426 (hsync->start & 0x07F8) >> 3);
427 if (ret < 0)
428 return ret;
429
430 /* bit 10 - 3 */
431 ret = i2c_smbus_write_byte_data(client, HSEND,
432 (hsync->end & 0x07F8) >> 3);
433 if (ret < 0)
434 return ret;
435
436 /* bit 2 - 0 */
437 ret = i2c_smbus_read_byte_data(client, HSLOWCTL);
438 if (ret < 0)
439 return ret;
440
441 ret = i2c_smbus_write_byte_data(client, HSLOWCTL,
442 (ret & 0x88) |
443 (hsync->start & 0x0007) << 4 |
444 (hsync->end & 0x0007));
445
446 return ret;
447}
448
449static int tw9910_write_array(struct i2c_client *client,
450 const struct regval_list *vals)
451{
452 while (vals->reg_num != 0xff) {
453 int ret = i2c_smbus_write_byte_data(client,
454 vals->reg_num,
455 vals->value);
456 if (ret < 0)
457 return ret;
458 vals++;
459 }
460 return 0;
461}
462
463static int tw9910_mask_set(struct i2c_client *client, u8 command,
464 u8 mask, u8 set)
465{
466 s32 val = i2c_smbus_read_byte_data(client, command);
1af1b7a2
KM		 467 if (val < 0)
468 return val;
ed922a89
KM		 469
470 val &= ~mask;
1af1b7a2 471 val |= set & mask;
ed922a89
KM		 472
473 return i2c_smbus_write_byte_data(client, command, val);
474}
475
476static void tw9910_reset(struct i2c_client *client)
477{
478 i2c_smbus_write_byte_data(client, ACNTL1, SRESET);
479 msleep(1);
480}
481
482static const struct tw9910_scale_ctrl*
483tw9910_select_norm(struct soc_camera_device *icd, u32 width, u32 height)
484{
485 const struct tw9910_scale_ctrl *scale;
486 const struct tw9910_scale_ctrl *ret = NULL;
487 v4l2_std_id norm = icd->vdev->current_norm;
488 __u32 diff = 0xffffffff, tmp;
489 int size, i;
490
491 if (norm & V4L2_STD_NTSC) {
492 scale = tw9910_ntsc_scales;
493 size = ARRAY_SIZE(tw9910_ntsc_scales);
494 } else if (norm & V4L2_STD_PAL) {
495 scale = tw9910_pal_scales;
496 size = ARRAY_SIZE(tw9910_pal_scales);
497 } else {
498 return NULL;
499 }
500
501 for (i = 0; i < size; i++) {
502 tmp = abs(width - scale[i].width) +
503 abs(height - scale[i].height);
504 if (tmp < diff) {
505 diff = tmp;
506 ret = scale + i;
507 }
508 }
509
510 return ret;
511}
512
513/*
514 * soc_camera_ops function
515 */
979ea1dd 516static int tw9910_s_stream(struct v4l2_subdev *sd, int enable)
ed922a89 517{
979ea1dd
GL		 518 struct i2c_client *client = sd->priv;
519 struct tw9910_priv *priv = to_tw9910(client);
ed922a89 520
979ea1dd
GL		 521 if (!enable)
522 return 0;
ed922a89
KM		 523
524 if (!priv->scale) {
979ea1dd 525 dev_err(&client->dev, "norm select error\n");
ed922a89
KM		 526 return -EPERM;
527 }
528
979ea1dd 529 dev_dbg(&client->dev, "%s %dx%d\n",
ed922a89
KM		 530 priv->scale->name,
531 priv->scale->width,
532 priv->scale->height);
533
534 return 0;
535}
536
ed922a89
KM		 537static int tw9910_set_bus_param(struct soc_camera_device *icd,
538 unsigned long flags)
539{
540 return 0;
541}
542
543static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd)
544{
40e2e092 545 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
979ea1dd 546 struct tw9910_priv *priv = to_tw9910(client);
40e2e092 547 struct soc_camera_link *icl = to_soc_camera_link(icd);
ed922a89
KM		 548 unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
549 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
550 SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth;
551
552 return soc_camera_apply_sensor_flags(icl, flags);
553}
554
979ea1dd 555static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
ed922a89
KM		 556{
557 int ret = -EINVAL;
558
979ea1dd 559 if (norm & (V4L2_STD_NTSC | V4L2_STD_PAL))
ed922a89
KM		 560 ret = 0;
561
562 return ret;
563}
564
565static int tw9910_enum_input(struct soc_camera_device *icd,
566 struct v4l2_input *inp)
567{
568 inp->type = V4L2_INPUT_TYPE_TUNER;
569 inp->std = V4L2_STD_UNKNOWN;
570 strcpy(inp->name, "Video");
571
572 return 0;
573}
574
979ea1dd
GL		 575static int tw9910_g_chip_ident(struct v4l2_subdev *sd,
576 struct v4l2_dbg_chip_ident *id)
577{
578 id->ident = V4L2_IDENT_TW9910;
579 id->revision = 0;
580
581 return 0;
582}
583
ed922a89 584#ifdef CONFIG_VIDEO_ADV_DEBUG
979ea1dd
GL		 585static int tw9910_g_register(struct v4l2_subdev *sd,
586 struct v4l2_dbg_register *reg)
ed922a89 587{
979ea1dd 588 struct i2c_client *client = sd->priv;
ed922a89
KM		 589 int ret;
590
591 if (reg->reg > 0xff)
592 return -EINVAL;
593
40e2e092 594 ret = i2c_smbus_read_byte_data(client, reg->reg);
ed922a89
KM		 595 if (ret < 0)
596 return ret;
597
5d28d525
GL		 598 /*
599 * ret = int
ed922a89
KM		 600 * reg->val = __u64
601 */
602 reg->val = (__u64)ret;
603
604 return 0;
605}
606
979ea1dd
GL		 607static int tw9910_s_register(struct v4l2_subdev *sd,
608 struct v4l2_dbg_register *reg)
ed922a89 609{
979ea1dd 610 struct i2c_client *client = sd->priv;
ed922a89
KM		 611
612 if (reg->reg > 0xff ||
613 reg->val > 0xff)
614 return -EINVAL;
615
40e2e092 616 return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
ed922a89
KM		 617}
618#endif
619
08590b96 620static int tw9910_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
ed922a89 621{
08590b96
GL		 622 struct v4l2_rect *rect = &a->c;
623 struct i2c_client *client = sd->priv;
979ea1dd 624 struct tw9910_priv *priv = to_tw9910(client);
08590b96 625 struct soc_camera_device *icd = client->dev.platform_data;
ed922a89
KM		 626 int ret = -EINVAL;
627 u8 val;
628
629 /*
630 * select suitable norm
631 */
632 priv->scale = tw9910_select_norm(icd, rect->width, rect->height);
633 if (!priv->scale)
6d756112 634 goto tw9910_set_fmt_error;
ed922a89
KM		 635
636 /*
637 * reset hardware
638 */
40e2e092
GL		 639 tw9910_reset(client);
640 ret = tw9910_write_array(client, tw9910_default_regs);
ed922a89 641 if (ret < 0)
6d756112
KM		 642 goto tw9910_set_fmt_error;
643
ed922a89
KM		 644 /*
645 * set bus width
646 */
647 val = 0x00;
648 if (SOCAM_DATAWIDTH_16 == priv->info->buswidth)
649 val = LEN;
650
40e2e092 651 ret = tw9910_mask_set(client, OPFORM, LEN, val);
ed922a89 652 if (ret < 0)
6d756112 653 goto tw9910_set_fmt_error;
ed922a89
KM		 654
655 /*
656 * select MPOUT behavior
657 */
658 switch (priv->info->mpout) {
659 case TW9910_MPO_VLOSS:
660 val = RTSEL_VLOSS; break;
661 case TW9910_MPO_HLOCK:
662 val = RTSEL_HLOCK; break;
663 case TW9910_MPO_SLOCK:
664 val = RTSEL_SLOCK; break;
665 case TW9910_MPO_VLOCK:
666 val = RTSEL_VLOCK; break;
667 case TW9910_MPO_MONO:
668 val = RTSEL_MONO; break;
669 case TW9910_MPO_DET50:
670 val = RTSEL_DET50; break;
671 case TW9910_MPO_FIELD:
672 val = RTSEL_FIELD; break;
673 case TW9910_MPO_RTCO:
674 val = RTSEL_RTCO; break;
675 default:
676 val = 0;
677 }
678
40e2e092 679 ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val);
ed922a89 680 if (ret < 0)
6d756112 681 goto tw9910_set_fmt_error;
ed922a89
KM		 682
683 /*
684 * set scale
685 */
40e2e092 686 ret = tw9910_set_scale(client, priv->scale);
ed922a89 687 if (ret < 0)
6d756112 688 goto tw9910_set_fmt_error;
ed922a89
KM		 689
690 /*
691 * set cropping
692 */
40e2e092 693 ret = tw9910_set_cropping(client, &tw9910_cropping_ctrl);
ed922a89 694 if (ret < 0)
6d756112 695 goto tw9910_set_fmt_error;
ed922a89
KM		 696
697 /*
698 * set hsync
699 */
40e2e092 700 ret = tw9910_set_hsync(client, &tw9910_hsync_ctrl);
6d756112
KM		 701 if (ret < 0)
702 goto tw9910_set_fmt_error;
703
123ab622
GL		 704 rect->width = priv->scale->width;
705 rect->height = priv->scale->height;
706 rect->left = 0;
707 rect->top = 0;
708
6d756112
KM		 709 return ret;
710
711tw9910_set_fmt_error:
712
40e2e092 713 tw9910_reset(client);
6d756112 714 priv->scale = NULL;
ed922a89
KM		 715
716 return ret;
717}
718
6a6c8786
GL		 719static int tw9910_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
720{
721 struct i2c_client *client = sd->priv;
722 struct tw9910_priv *priv = to_tw9910(client);
723
724 if (!priv->scale) {
725 int ret;
726 struct v4l2_crop crop = {
727 .c = {
728 .left = 0,
729 .top = 0,
730 .width = 640,
731 .height = 480,
732 },
733 };
734 ret = tw9910_s_crop(sd, &crop);
735 if (ret < 0)
736 return ret;
737 }
738
739 a->c.left = 0;
740 a->c.top = 0;
741 a->c.width = priv->scale->width;
742 a->c.height = priv->scale->height;
743 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
744
745 return 0;
746}
747
748static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
749{
750 a->bounds.left = 0;
751 a->bounds.top = 0;
752 a->bounds.width = 768;
753 a->bounds.height = 576;
754 a->defrect.left = 0;
755 a->defrect.top = 0;
756 a->defrect.width = 640;
757 a->defrect.height = 480;
758 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
759 a->pixelaspect.numerator = 1;
760 a->pixelaspect.denominator = 1;
761
762 return 0;
763}
764
765static int tw9910_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
766{
767 struct i2c_client *client = sd->priv;
768 struct tw9910_priv *priv = to_tw9910(client);
769 struct v4l2_pix_format *pix = &f->fmt.pix;
770
771 if (!priv->scale) {
772 int ret;
773 struct v4l2_crop crop = {
774 .c = {
775 .left = 0,
776 .top = 0,
777 .width = 640,
778 .height = 480,
779 },
780 };
781 ret = tw9910_s_crop(sd, &crop);
782 if (ret < 0)
783 return ret;
784 }
785
786 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
787
788 pix->width = priv->scale->width;
789 pix->height = priv->scale->height;
790 pix->pixelformat = V4L2_PIX_FMT_VYUY;
791 pix->colorspace = V4L2_COLORSPACE_SMPTE170M;
792 pix->field = V4L2_FIELD_INTERLACED;
793
794 return 0;
795}
796
979ea1dd 797static int tw9910_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
09e231b3 798{
6a6c8786
GL		 799 struct i2c_client *client = sd->priv;
800 struct tw9910_priv *priv = to_tw9910(client);
09e231b3 801 struct v4l2_pix_format *pix = &f->fmt.pix;
08590b96
GL		 802 /* See tw9910_s_crop() - no proper cropping support */
803 struct v4l2_crop a = {
804 .c = {
805 .left = 0,
806 .top = 0,
807 .width = pix->width,
808 .height = pix->height,
809 },
09e231b3 810 };
123ab622 811 int i, ret;
09e231b3
GL		 812
813 /*
814 * check color format
815 */
816 for (i = 0; i < ARRAY_SIZE(tw9910_color_fmt); i++)
817 if (pix->pixelformat == tw9910_color_fmt[i].fourcc)
818 break;
819
820 if (i == ARRAY_SIZE(tw9910_color_fmt))
821 return -EINVAL;
822
08590b96 823 ret = tw9910_s_crop(sd, &a);
123ab622 824 if (!ret) {
6a6c8786
GL		 825 pix->width = priv->scale->width;
826 pix->height = priv->scale->height;
123ab622
GL		 827 }
828 return ret;
09e231b3
GL		 829}
830
979ea1dd 831static int tw9910_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
ed922a89 832{
979ea1dd
GL		 833 struct i2c_client *client = sd->priv;
834 struct soc_camera_device *icd = client->dev.platform_data;
ed922a89
KM		 835 struct v4l2_pix_format *pix = &f->fmt.pix;
836 const struct tw9910_scale_ctrl *scale;
837
838 if (V4L2_FIELD_ANY == pix->field) {
839 pix->field = V4L2_FIELD_INTERLACED;
840 } else if (V4L2_FIELD_INTERLACED != pix->field) {
979ea1dd 841 dev_err(&client->dev, "Field type invalid.\n");
ed922a89
KM		 842 return -EINVAL;
843 }
844
845 /*
846 * select suitable norm
847 */
848 scale = tw9910_select_norm(icd, pix->width, pix->height);
849 if (!scale)
850 return -EINVAL;
851
852 pix->width = scale->width;
853 pix->height = scale->height;
854
855 return 0;
856}
857
40e2e092
GL		 858static int tw9910_video_probe(struct soc_camera_device *icd,
859 struct i2c_client *client)
ed922a89 860{
979ea1dd 861 struct tw9910_priv *priv = to_tw9910(client);
ed922a89 862 s32 val;
ed922a89
KM		 863
864 /*
865 * We must have a parent by now. And it cannot be a wrong one.
866 * So this entire test is completely redundant.
867 */
868 if (!icd->dev.parent ||
869 to_soc_camera_host(icd->dev.parent)->nr != icd->iface)
870 return -ENODEV;
871
872 /*
873 * tw9910 only use 8 or 16 bit bus width
874 */
875 if (SOCAM_DATAWIDTH_16 != priv->info->buswidth &&
876 SOCAM_DATAWIDTH_8 != priv->info->buswidth) {
85f8be68 877 dev_err(&client->dev, "bus width error\n");
ed922a89
KM		 878 return -ENODEV;
879 }
880
881 icd->formats = tw9910_color_fmt;
882 icd->num_formats = ARRAY_SIZE(tw9910_color_fmt);
883
884 /*
885 * check and show Product ID
4a4bc5e4 886 * So far only revisions 0 and 1 have been seen
ed922a89 887 */
40e2e092
GL		 888 val = i2c_smbus_read_byte_data(client, ID);
889
ed922a89 890 if (0x0B != GET_ID(val) ||
4a4bc5e4 891 0x01 < GET_ReV(val)) {
85f8be68 892 dev_err(&client->dev,
ed922a89
KM		 893 "Product ID error %x:%x\n", GET_ID(val), GET_ReV(val));
894 return -ENODEV;
895 }
896
85f8be68 897 dev_info(&client->dev,
ed922a89
KM		 898 "tw9910 Product ID %0x:%0x\n", GET_ID(val), GET_ReV(val));
899
ed922a89
KM		 900 icd->vdev->tvnorms = V4L2_STD_NTSC | V4L2_STD_PAL;
901 icd->vdev->current_norm = V4L2_STD_NTSC;
902
979ea1dd 903 return 0;
ed922a89
KM		 904}
905
ed922a89 906static struct soc_camera_ops tw9910_ops = {
ed922a89
KM		 907 .set_bus_param = tw9910_set_bus_param,
908 .query_bus_param = tw9910_query_bus_param,
ed922a89 909 .enum_input = tw9910_enum_input,
979ea1dd
GL		 910};
911
912static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = {
913 .g_chip_ident = tw9910_g_chip_ident,
914 .s_std = tw9910_s_std,
ed922a89 915#ifdef CONFIG_VIDEO_ADV_DEBUG
979ea1dd
GL		 916 .g_register = tw9910_g_register,
917 .s_register = tw9910_s_register,
ed922a89
KM		 918#endif
919};
920
979ea1dd
GL		 921static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = {
922 .s_stream = tw9910_s_stream,
6a6c8786 923 .g_fmt = tw9910_g_fmt,
979ea1dd
GL		 924 .s_fmt = tw9910_s_fmt,
925 .try_fmt = tw9910_try_fmt,
6a6c8786
GL		 926 .cropcap = tw9910_cropcap,
927 .g_crop = tw9910_g_crop,
08590b96 928 .s_crop = tw9910_s_crop,
979ea1dd
GL		 929};
930
931static struct v4l2_subdev_ops tw9910_subdev_ops = {
932 .core = &tw9910_subdev_core_ops,
933 .video = &tw9910_subdev_video_ops,
934};
935
ed922a89
KM		 936/*
937 * i2c_driver function
938 */
939
940static int tw9910_probe(struct i2c_client *client,
941 const struct i2c_device_id *did)
942
943{
944 struct tw9910_priv *priv;
945 struct tw9910_video_info *info;
40e2e092
GL		 946 struct soc_camera_device *icd = client->dev.platform_data;
947 struct i2c_adapter *adapter =
948 to_i2c_adapter(client->dev.parent);
949 struct soc_camera_link *icl;
6a6c8786 950 int ret;
ed922a89 951
40e2e092
GL		 952 if (!icd) {
953 dev_err(&client->dev, "TW9910: missing soc-camera data!\n");
ed922a89 954 return -EINVAL;
40e2e092 955 }
ed922a89 956
40e2e092 957 icl = to_soc_camera_link(icd);
0f448294 958 if (!icl || !icl->priv)
40e2e092 959 return -EINVAL;
0a861e9e 960
0f448294 961 info = icl->priv;
40e2e092
GL		 962
963 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
ed922a89
KM		 964 dev_err(&client->dev,
965 "I2C-Adapter doesn't support "
966 "I2C_FUNC_SMBUS_BYTE_DATA\n");
967 return -EIO;
968 }
969
970 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
971 if (!priv)
972 return -ENOMEM;
973
974 priv->info = info;
979ea1dd
GL		 975
976 v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops);
ed922a89 977
ed922a89 978 icd->ops = &tw9910_ops;
0f448294 979 icd->iface = icl->bus_id;
ed922a89 980
40e2e092 981 ret = tw9910_video_probe(icd, client);
ed922a89 982 if (ret) {
40e2e092 983 icd->ops = NULL;
ed922a89
KM		 984 i2c_set_clientdata(client, NULL);
985 kfree(priv);
986 }
987
988 return ret;
989}
990
991static int tw9910_remove(struct i2c_client *client)
992{
979ea1dd 993 struct tw9910_priv *priv = to_tw9910(client);
40e2e092 994 struct soc_camera_device *icd = client->dev.platform_data;
ed922a89 995
40e2e092 996 icd->ops = NULL;
ed922a89
KM		 997 i2c_set_clientdata(client, NULL);
998 kfree(priv);
999 return 0;
1000}
1001
1002static const struct i2c_device_id tw9910_id[] = {
1003 { "tw9910", 0 },
1004 { }
1005};
1006MODULE_DEVICE_TABLE(i2c, tw9910_id);
1007
1008static struct i2c_driver tw9910_i2c_driver = {
1009 .driver = {
1010 .name = "tw9910",
1011 },
1012 .probe = tw9910_probe,
1013 .remove = tw9910_remove,
1014 .id_table = tw9910_id,
1015};
1016
1017/*
1018 * module function
1019 */
1020static int __init tw9910_module_init(void)
1021{
1022 return i2c_add_driver(&tw9910_i2c_driver);
1023}
1024
1025static void __exit tw9910_module_exit(void)
1026{
1027 i2c_del_driver(&tw9910_i2c_driver);
1028}
1029
1030module_init(tw9910_module_init);
1031module_exit(tw9910_module_exit);
1032
1033MODULE_DESCRIPTION("SoC Camera driver for tw9910");
1034MODULE_AUTHOR("Kuninori Morimoto");
1035MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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