[deliverable/linux.git] / drivers / memory / Kconfig

#
# Memory devices
#

menuconfig MEMORY
	bool "Memory Controller drivers"

if MEMORY

config ATMEL_SDRAMC
	bool "Atmel (Multi-port DDR-)SDRAM Controller"
	default y
	depends on ARCH_AT91 && OF
	help
	  This driver is for Atmel SDRAM Controller or Atmel Multi-port
	  DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
	  Starting with the at91sam9g45, this controller supports SDR, DDR and
	  LP-DDR memories.

config TI_AEMIF
	tristate "Texas Instruments AEMIF driver"
	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
	help
	  This driver is for the AEMIF module available in Texas Instruments
	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
	  is intended to provide a glue-less interface to a variety of
	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	  of 256M bytes of any of these memories can be accessed at a given
	  time via four chip selects with 64M byte access per chip select.

config TI_EMIF
	tristate "Texas Instruments EMIF driver"
	depends on ARCH_OMAP2PLUS
	select DDR
	help
	  This driver is for the EMIF module available in Texas Instruments
	  SoCs. EMIF is an SDRAM controller that, based on its revision,
	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	  This driver takes care of only LPDDR2 memories presently. The
	  functions of the driver includes re-configuring AC timing
	  parameters and other settings during frequency, voltage and
	  temperature changes

config OMAP_GPMC
	bool
	help
	  This driver is for the General Purpose Memory Controller (GPMC)
	  present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
	  interfacing to a variety of asynchronous as well as synchronous
	  memory drives like NOR, NAND, OneNAND, SRAM.

config OMAP_GPMC_DEBUG
	bool
	depends on OMAP_GPMC
	help
	  Enables verbose debugging mostly to decode the bootloader provided
	  timings. Enable this during development to configure devices
	  connected to the GPMC bus.

config MVEBU_DEVBUS
	bool "Marvell EBU Device Bus Controller"
	default y
	depends on PLAT_ORION && OF
	help
	  This driver is for the Device Bus controller available in some
	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	  Armada 370 and Armada XP. This controller allows to handle flash
	  devices such as NOR, NAND, SRAM, and FPGA.

config TEGRA20_MC
	bool "Tegra20 Memory Controller(MC) driver"
	default y
	depends on ARCH_TEGRA_2x_SOC
	help
	  This driver is for the Memory Controller(MC) module available
	  in Tegra20 SoCs, mainly for a address translation fault
	  analysis, especially for IOMMU/GART(Graphics Address
	  Relocation Table) module.

config FSL_CORENET_CF
	tristate "Freescale CoreNet Error Reporting"
	depends on FSL_SOC_BOOKE
	help
	  Say Y for reporting of errors from the Freescale CoreNet
	  Coherency Fabric.  Errors reported include accesses to
	  physical addresses that mapped by no local access window
	  (LAW) or an invalid LAW, as well as bad cache state that
	  represents a coherency violation.

config FSL_IFC
	bool
	depends on FSL_SOC

config JZ4780_NEMC
	bool "Ingenic JZ4780 SoC NEMC driver"
	default y
	depends on MACH_JZ4780
	help
	  This driver is for the NAND/External Memory Controller (NEMC) in
	  the Ingenic JZ4780. This controller is used to handle external
	  memory devices such as NAND and SRAM.

source "drivers/memory/tegra/Kconfig"

endif
Commit	Line	Data
7ec94453 A	1	#
	2	# Memory devices
	3	#
	4
	5	menuconfig MEMORY
	6	bool "Memory Controller drivers"
	7
	8	if MEMORY
	9
e81b6abe AB	10	config ATMEL_SDRAMC
	11	bool "Atmel (Multi-port DDR-)SDRAM Controller"
	12	default y
	13	depends on ARCH_AT91 && OF
	14	help
	15	This driver is for Atmel SDRAM Controller or Atmel Multi-port
	16	DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
	17	Starting with the at91sam9g45, this controller supports SDR, DDR and
	18	LP-DDR memories.
	19
5a7c8154 IK	20	config TI_AEMIF
	21	tristate "Texas Instruments AEMIF driver"
	22	depends on (ARCH_DAVINCI \|\| ARCH_KEYSTONE) && OF
	23	help
	24	This driver is for the AEMIF module available in Texas Instruments
	25	SoCs. AEMIF stands for Asynchronous External Memory Interface and
	26	is intended to provide a glue-less interface to a variety of
	27	asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	28	of 256M bytes of any of these memories can be accessed at a given
	29	time via four chip selects with 64M byte access per chip select.
	30
7ec94453 A	31	config TI_EMIF
7ec94453 A	32	tristate "Texas Instruments EMIF driver"
18e9a971	33	depends on ARCH_OMAP2PLUS
7ec94453 A	34	select DDR
	35	help
	36	This driver is for the EMIF module available in Texas Instruments
	37	SoCs. EMIF is an SDRAM controller that, based on its revision,
	38	supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	39	This driver takes care of only LPDDR2 memories presently. The
	40	functions of the driver includes re-configuring AC timing
	41	parameters and other settings during frequency, voltage and
	42	temperature changes
	43
18640193 TL	44	config OMAP_GPMC
	45	bool
	46	help
	47	This driver is for the General Purpose Memory Controller (GPMC)
	48	present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
	49	interfacing to a variety of asynchronous as well as synchronous
	50	memory drives like NOR, NAND, OneNAND, SRAM.
	51
63aa945b TL	52	config OMAP_GPMC_DEBUG
	53	bool
	54	depends on OMAP_GPMC
	55	help
	56	Enables verbose debugging mostly to decode the bootloader provided
	57	timings. Enable this during development to configure devices
	58	connected to the GPMC bus.
	59
3edad321 EG	60	config MVEBU_DEVBUS
	61	bool "Marvell EBU Device Bus Controller"
	62	default y
	63	depends on PLAT_ORION && OF
	64	help
	65	This driver is for the Device Bus controller available in some
	66	Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	67	Armada 370 and Armada XP. This controller allows to handle flash
	68	devices such as NOR, NAND, SRAM, and FPGA.
	69
c542fb79	70	config TEGRA20_MC
f0e33f98 HD	71	bool "Tegra20 Memory Controller(MC) driver"
f0e33f98 HD	72	default y
c542fb79	73	depends on ARCH_TEGRA_2x_SOC
f0e33f98 HD	74	help
	75	This driver is for the Memory Controller(MC) module available
	76	in Tegra20 SoCs, mainly for a address translation fault
	77	analysis, especially for IOMMU/GART(Graphics Address
	78	Relocation Table) module.
c542fb79	79
54afbec0 SW	80	config FSL_CORENET_CF
	81	tristate "Freescale CoreNet Error Reporting"
	82	depends on FSL_SOC_BOOKE
	83	help
	84	Say Y for reporting of errors from the Freescale CoreNet
	85	Coherency Fabric. Errors reported include accesses to
	86	physical addresses that mapped by no local access window
	87	(LAW) or an invalid LAW, as well as bad cache state that
	88	represents a coherency violation.
	89
42d87b18 PG	90	config FSL_IFC
	91	bool
	92	depends on FSL_SOC
	93
911a8882 AS	94	config JZ4780_NEMC
	95	bool "Ingenic JZ4780 SoC NEMC driver"
	96	default y
	97	depends on MACH_JZ4780
	98	help
	99	This driver is for the NAND/External Memory Controller (NEMC) in
	100	the Ingenic JZ4780. This controller is used to handle external
	101	memory devices such as NAND and SRAM.
	102
89184651 TR	103	source "drivers/memory/tegra/Kconfig"
89184651 TR	104
7ec94453	105	endif