Commit | Line | Data |
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62579266 RV |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License v2 | |
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | |
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> | |
adceed62 | 7 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
62579266 RV |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/irq.h> | |
06e589ef | 14 | #include <linux/irqdomain.h> |
62579266 RV |
15 | #include <linux/delay.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/mfd/core.h> | |
47c16975 | 20 | #include <linux/mfd/abx500.h> |
ee66e653 | 21 | #include <linux/mfd/abx500/ab8500.h> |
00441b5e | 22 | #include <linux/mfd/abx500/ab8500-bm.h> |
d28f1db8 | 23 | #include <linux/mfd/dbx500-prcmu.h> |
549931f9 | 24 | #include <linux/regulator/ab8500.h> |
6bc4a568 LJ |
25 | #include <linux/of.h> |
26 | #include <linux/of_device.h> | |
62579266 RV |
27 | |
28 | /* | |
29 | * Interrupt register offsets | |
30 | * Bank : 0x0E | |
31 | */ | |
47c16975 MW |
32 | #define AB8500_IT_SOURCE1_REG 0x00 |
33 | #define AB8500_IT_SOURCE2_REG 0x01 | |
34 | #define AB8500_IT_SOURCE3_REG 0x02 | |
35 | #define AB8500_IT_SOURCE4_REG 0x03 | |
36 | #define AB8500_IT_SOURCE5_REG 0x04 | |
37 | #define AB8500_IT_SOURCE6_REG 0x05 | |
38 | #define AB8500_IT_SOURCE7_REG 0x06 | |
39 | #define AB8500_IT_SOURCE8_REG 0x07 | |
d6255529 | 40 | #define AB9540_IT_SOURCE13_REG 0x0C |
47c16975 MW |
41 | #define AB8500_IT_SOURCE19_REG 0x12 |
42 | #define AB8500_IT_SOURCE20_REG 0x13 | |
43 | #define AB8500_IT_SOURCE21_REG 0x14 | |
44 | #define AB8500_IT_SOURCE22_REG 0x15 | |
45 | #define AB8500_IT_SOURCE23_REG 0x16 | |
46 | #define AB8500_IT_SOURCE24_REG 0x17 | |
62579266 RV |
47 | |
48 | /* | |
49 | * latch registers | |
50 | */ | |
47c16975 MW |
51 | #define AB8500_IT_LATCH1_REG 0x20 |
52 | #define AB8500_IT_LATCH2_REG 0x21 | |
53 | #define AB8500_IT_LATCH3_REG 0x22 | |
54 | #define AB8500_IT_LATCH4_REG 0x23 | |
55 | #define AB8500_IT_LATCH5_REG 0x24 | |
56 | #define AB8500_IT_LATCH6_REG 0x25 | |
57 | #define AB8500_IT_LATCH7_REG 0x26 | |
58 | #define AB8500_IT_LATCH8_REG 0x27 | |
59 | #define AB8500_IT_LATCH9_REG 0x28 | |
60 | #define AB8500_IT_LATCH10_REG 0x29 | |
92d50a41 | 61 | #define AB8500_IT_LATCH12_REG 0x2B |
d6255529 | 62 | #define AB9540_IT_LATCH13_REG 0x2C |
47c16975 MW |
63 | #define AB8500_IT_LATCH19_REG 0x32 |
64 | #define AB8500_IT_LATCH20_REG 0x33 | |
65 | #define AB8500_IT_LATCH21_REG 0x34 | |
66 | #define AB8500_IT_LATCH22_REG 0x35 | |
67 | #define AB8500_IT_LATCH23_REG 0x36 | |
68 | #define AB8500_IT_LATCH24_REG 0x37 | |
62579266 RV |
69 | |
70 | /* | |
71 | * mask registers | |
72 | */ | |
73 | ||
47c16975 MW |
74 | #define AB8500_IT_MASK1_REG 0x40 |
75 | #define AB8500_IT_MASK2_REG 0x41 | |
76 | #define AB8500_IT_MASK3_REG 0x42 | |
77 | #define AB8500_IT_MASK4_REG 0x43 | |
78 | #define AB8500_IT_MASK5_REG 0x44 | |
79 | #define AB8500_IT_MASK6_REG 0x45 | |
80 | #define AB8500_IT_MASK7_REG 0x46 | |
81 | #define AB8500_IT_MASK8_REG 0x47 | |
82 | #define AB8500_IT_MASK9_REG 0x48 | |
83 | #define AB8500_IT_MASK10_REG 0x49 | |
84 | #define AB8500_IT_MASK11_REG 0x4A | |
85 | #define AB8500_IT_MASK12_REG 0x4B | |
86 | #define AB8500_IT_MASK13_REG 0x4C | |
87 | #define AB8500_IT_MASK14_REG 0x4D | |
88 | #define AB8500_IT_MASK15_REG 0x4E | |
89 | #define AB8500_IT_MASK16_REG 0x4F | |
90 | #define AB8500_IT_MASK17_REG 0x50 | |
91 | #define AB8500_IT_MASK18_REG 0x51 | |
92 | #define AB8500_IT_MASK19_REG 0x52 | |
93 | #define AB8500_IT_MASK20_REG 0x53 | |
94 | #define AB8500_IT_MASK21_REG 0x54 | |
95 | #define AB8500_IT_MASK22_REG 0x55 | |
96 | #define AB8500_IT_MASK23_REG 0x56 | |
97 | #define AB8500_IT_MASK24_REG 0x57 | |
a29264b6 | 98 | #define AB8500_IT_MASK25_REG 0x58 |
47c16975 | 99 | |
7ccfe9b1 MJ |
100 | /* |
101 | * latch hierarchy registers | |
102 | */ | |
103 | #define AB8500_IT_LATCHHIER1_REG 0x60 | |
104 | #define AB8500_IT_LATCHHIER2_REG 0x61 | |
105 | #define AB8500_IT_LATCHHIER3_REG 0x62 | |
3e1a498f | 106 | #define AB8540_IT_LATCHHIER4_REG 0x63 |
7ccfe9b1 MJ |
107 | |
108 | #define AB8500_IT_LATCHHIER_NUM 3 | |
3e1a498f | 109 | #define AB8540_IT_LATCHHIER_NUM 4 |
7ccfe9b1 | 110 | |
47c16975 | 111 | #define AB8500_REV_REG 0x80 |
0f620837 | 112 | #define AB8500_IC_NAME_REG 0x82 |
e5c238c3 | 113 | #define AB8500_SWITCH_OFF_STATUS 0x00 |
62579266 | 114 | |
b4a31037 | 115 | #define AB8500_TURN_ON_STATUS 0x00 |
500e69a1 | 116 | #define AB8505_TURN_ON_STATUS_2 0x04 |
b4a31037 | 117 | |
f04a9d8a RK |
118 | #define AB8500_CH_USBCH_STAT1_REG 0x02 |
119 | #define VBUS_DET_DBNC100 0x02 | |
120 | #define VBUS_DET_DBNC1 0x01 | |
121 | ||
122 | static DEFINE_SPINLOCK(on_stat_lock); | |
123 | static u8 turn_on_stat_mask = 0xFF; | |
124 | static u8 turn_on_stat_set; | |
6ef9418c RA |
125 | static bool no_bm; /* No battery management */ |
126 | module_param(no_bm, bool, S_IRUGO); | |
127 | ||
d6255529 LW |
128 | #define AB9540_MODEM_CTRL2_REG 0x23 |
129 | #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) | |
130 | ||
62579266 RV |
131 | /* |
132 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt | |
2ced445e LW |
133 | * numbers are indexed into this array with (num / 8). The interupts are |
134 | * defined in linux/mfd/ab8500.h | |
62579266 RV |
135 | * |
136 | * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at | |
137 | * offset 0. | |
138 | */ | |
2ced445e | 139 | /* AB8500 support */ |
62579266 | 140 | static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { |
92d50a41 | 141 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, |
62579266 RV |
142 | }; |
143 | ||
a29264b6 | 144 | /* AB9540 / AB8505 support */ |
d6255529 | 145 | static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { |
a29264b6 | 146 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23 |
d6255529 LW |
147 | }; |
148 | ||
3e1a498f LJ |
149 | /* AB8540 support */ |
150 | static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = { | |
7ccf40b1 LJ |
151 | 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, |
152 | 23, 25, 26, 27, 28, 29, 30, 31, | |
3e1a498f LJ |
153 | }; |
154 | ||
0f620837 LW |
155 | static const char ab8500_version_str[][7] = { |
156 | [AB8500_VERSION_AB8500] = "AB8500", | |
157 | [AB8500_VERSION_AB8505] = "AB8505", | |
158 | [AB8500_VERSION_AB9540] = "AB9540", | |
159 | [AB8500_VERSION_AB8540] = "AB8540", | |
160 | }; | |
161 | ||
822672a7 | 162 | static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) |
d28f1db8 LJ |
163 | { |
164 | int ret; | |
165 | ||
166 | ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); | |
167 | if (ret < 0) | |
168 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
169 | return ret; | |
170 | } | |
171 | ||
822672a7 | 172 | static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, |
d28f1db8 LJ |
173 | u8 data) |
174 | { | |
175 | int ret; | |
176 | ||
177 | ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, | |
178 | &mask, 1); | |
179 | if (ret < 0) | |
180 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
181 | return ret; | |
182 | } | |
183 | ||
822672a7 | 184 | static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) |
d28f1db8 LJ |
185 | { |
186 | int ret; | |
187 | u8 data; | |
188 | ||
189 | ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); | |
190 | if (ret < 0) { | |
191 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
192 | return ret; | |
193 | } | |
194 | return (int)data; | |
195 | } | |
196 | ||
47c16975 MW |
197 | static int ab8500_get_chip_id(struct device *dev) |
198 | { | |
6bce7bf1 MW |
199 | struct ab8500 *ab8500; |
200 | ||
201 | if (!dev) | |
202 | return -EINVAL; | |
203 | ab8500 = dev_get_drvdata(dev->parent); | |
204 | return ab8500 ? (int)ab8500->chip_id : -EINVAL; | |
47c16975 MW |
205 | } |
206 | ||
207 | static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
208 | u8 reg, u8 data) | |
62579266 RV |
209 | { |
210 | int ret; | |
47c16975 MW |
211 | /* |
212 | * Put the u8 bank and u8 register together into a an u16. | |
213 | * The bank on higher 8 bits and register in lower 8 bits. | |
500e69a1 | 214 | */ |
47c16975 | 215 | u16 addr = ((u16)bank) << 8 | reg; |
62579266 RV |
216 | |
217 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); | |
218 | ||
392cbd1e | 219 | mutex_lock(&ab8500->lock); |
47c16975 | 220 | |
62579266 RV |
221 | ret = ab8500->write(ab8500, addr, data); |
222 | if (ret < 0) | |
223 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
224 | addr, ret); | |
47c16975 | 225 | mutex_unlock(&ab8500->lock); |
62579266 RV |
226 | |
227 | return ret; | |
228 | } | |
229 | ||
47c16975 MW |
230 | static int ab8500_set_register(struct device *dev, u8 bank, |
231 | u8 reg, u8 value) | |
62579266 | 232 | { |
112a80d2 | 233 | int ret; |
47c16975 | 234 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 235 | |
112a80d2 JA |
236 | atomic_inc(&ab8500->transfer_ongoing); |
237 | ret = set_register_interruptible(ab8500, bank, reg, value); | |
238 | atomic_dec(&ab8500->transfer_ongoing); | |
239 | return ret; | |
62579266 | 240 | } |
62579266 | 241 | |
47c16975 MW |
242 | static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, |
243 | u8 reg, u8 *value) | |
62579266 RV |
244 | { |
245 | int ret; | |
47c16975 MW |
246 | u16 addr = ((u16)bank) << 8 | reg; |
247 | ||
392cbd1e | 248 | mutex_lock(&ab8500->lock); |
62579266 RV |
249 | |
250 | ret = ab8500->read(ab8500, addr); | |
251 | if (ret < 0) | |
252 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
253 | addr, ret); | |
47c16975 MW |
254 | else |
255 | *value = ret; | |
62579266 | 256 | |
47c16975 | 257 | mutex_unlock(&ab8500->lock); |
62579266 RV |
258 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); |
259 | ||
260 | return ret; | |
261 | } | |
262 | ||
47c16975 MW |
263 | static int ab8500_get_register(struct device *dev, u8 bank, |
264 | u8 reg, u8 *value) | |
62579266 | 265 | { |
112a80d2 | 266 | int ret; |
47c16975 | 267 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 268 | |
112a80d2 JA |
269 | atomic_inc(&ab8500->transfer_ongoing); |
270 | ret = get_register_interruptible(ab8500, bank, reg, value); | |
271 | atomic_dec(&ab8500->transfer_ongoing); | |
272 | return ret; | |
62579266 | 273 | } |
47c16975 MW |
274 | |
275 | static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
276 | u8 reg, u8 bitmask, u8 bitvalues) | |
62579266 RV |
277 | { |
278 | int ret; | |
47c16975 | 279 | u16 addr = ((u16)bank) << 8 | reg; |
62579266 | 280 | |
392cbd1e | 281 | mutex_lock(&ab8500->lock); |
62579266 | 282 | |
bc628fd1 MN |
283 | if (ab8500->write_masked == NULL) { |
284 | u8 data; | |
62579266 | 285 | |
bc628fd1 MN |
286 | ret = ab8500->read(ab8500, addr); |
287 | if (ret < 0) { | |
288 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
289 | addr, ret); | |
290 | goto out; | |
291 | } | |
62579266 | 292 | |
bc628fd1 MN |
293 | data = (u8)ret; |
294 | data = (~bitmask & data) | (bitmask & bitvalues); | |
295 | ||
296 | ret = ab8500->write(ab8500, addr, data); | |
297 | if (ret < 0) | |
298 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
299 | addr, ret); | |
62579266 | 300 | |
bc628fd1 MN |
301 | dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, |
302 | data); | |
303 | goto out; | |
304 | } | |
305 | ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); | |
306 | if (ret < 0) | |
307 | dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, | |
308 | ret); | |
62579266 RV |
309 | out: |
310 | mutex_unlock(&ab8500->lock); | |
311 | return ret; | |
312 | } | |
47c16975 MW |
313 | |
314 | static int ab8500_mask_and_set_register(struct device *dev, | |
315 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) | |
316 | { | |
112a80d2 | 317 | int ret; |
47c16975 MW |
318 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
319 | ||
112a80d2 | 320 | atomic_inc(&ab8500->transfer_ongoing); |
7ccf40b1 | 321 | ret = mask_and_set_register_interruptible(ab8500, bank, reg, |
112a80d2 JA |
322 | bitmask, bitvalues); |
323 | atomic_dec(&ab8500->transfer_ongoing); | |
324 | return ret; | |
47c16975 MW |
325 | } |
326 | ||
327 | static struct abx500_ops ab8500_ops = { | |
328 | .get_chip_id = ab8500_get_chip_id, | |
329 | .get_register = ab8500_get_register, | |
330 | .set_register = ab8500_set_register, | |
331 | .get_register_page = NULL, | |
332 | .set_register_page = NULL, | |
333 | .mask_and_set_register = ab8500_mask_and_set_register, | |
334 | .event_registers_startup_state_get = NULL, | |
335 | .startup_irq_enabled = NULL, | |
1d843a6c | 336 | .dump_all_banks = ab8500_dump_all_banks, |
47c16975 | 337 | }; |
62579266 | 338 | |
9505a0a0 | 339 | static void ab8500_irq_lock(struct irq_data *data) |
62579266 | 340 | { |
9505a0a0 | 341 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
342 | |
343 | mutex_lock(&ab8500->irq_lock); | |
112a80d2 | 344 | atomic_inc(&ab8500->transfer_ongoing); |
62579266 RV |
345 | } |
346 | ||
9505a0a0 | 347 | static void ab8500_irq_sync_unlock(struct irq_data *data) |
62579266 | 348 | { |
9505a0a0 | 349 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
350 | int i; |
351 | ||
2ced445e | 352 | for (i = 0; i < ab8500->mask_size; i++) { |
62579266 RV |
353 | u8 old = ab8500->oldmask[i]; |
354 | u8 new = ab8500->mask[i]; | |
355 | int reg; | |
356 | ||
357 | if (new == old) | |
358 | continue; | |
359 | ||
0f620837 LW |
360 | /* |
361 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
362 | * 2.0 | |
363 | */ | |
364 | if (ab8500->irq_reg_offset[i] == 11 && | |
365 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 MW |
366 | continue; |
367 | ||
3e1a498f LJ |
368 | if (ab8500->irq_reg_offset[i] < 0) |
369 | continue; | |
370 | ||
62579266 RV |
371 | ab8500->oldmask[i] = new; |
372 | ||
2ced445e | 373 | reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; |
47c16975 | 374 | set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); |
62579266 | 375 | } |
112a80d2 | 376 | atomic_dec(&ab8500->transfer_ongoing); |
62579266 RV |
377 | mutex_unlock(&ab8500->irq_lock); |
378 | } | |
379 | ||
9505a0a0 | 380 | static void ab8500_irq_mask(struct irq_data *data) |
62579266 | 381 | { |
9505a0a0 | 382 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
06e589ef | 383 | int offset = data->hwirq; |
62579266 RV |
384 | int index = offset / 8; |
385 | int mask = 1 << (offset % 8); | |
386 | ||
387 | ab8500->mask[index] |= mask; | |
9c677b9b LJ |
388 | |
389 | /* The AB8500 GPIOs have two interrupts each (rising & falling). */ | |
390 | if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) | |
391 | ab8500->mask[index + 2] |= mask; | |
392 | if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) | |
393 | ab8500->mask[index + 1] |= mask; | |
394 | if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) | |
e2ddf46a LW |
395 | /* Here the falling IRQ is one bit lower */ |
396 | ab8500->mask[index] |= (mask << 1); | |
62579266 RV |
397 | } |
398 | ||
9505a0a0 | 399 | static void ab8500_irq_unmask(struct irq_data *data) |
62579266 | 400 | { |
9505a0a0 | 401 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
9c677b9b | 402 | unsigned int type = irqd_get_trigger_type(data); |
06e589ef | 403 | int offset = data->hwirq; |
62579266 RV |
404 | int index = offset / 8; |
405 | int mask = 1 << (offset % 8); | |
406 | ||
9c677b9b LJ |
407 | if (type & IRQ_TYPE_EDGE_RISING) |
408 | ab8500->mask[index] &= ~mask; | |
409 | ||
410 | /* The AB8500 GPIOs have two interrupts each (rising & falling). */ | |
411 | if (type & IRQ_TYPE_EDGE_FALLING) { | |
412 | if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) | |
413 | ab8500->mask[index + 2] &= ~mask; | |
7ccf40b1 LJ |
414 | else if (offset >= AB9540_INT_GPIO50R && |
415 | offset <= AB9540_INT_GPIO54R) | |
9c677b9b | 416 | ab8500->mask[index + 1] &= ~mask; |
7ccf40b1 LJ |
417 | else if (offset == AB8540_INT_GPIO43R || |
418 | offset == AB8540_INT_GPIO44R) | |
e2ddf46a LW |
419 | /* Here the falling IRQ is one bit lower */ |
420 | ab8500->mask[index] &= ~(mask << 1); | |
9c677b9b LJ |
421 | else |
422 | ab8500->mask[index] &= ~mask; | |
e2ddf46a | 423 | } else { |
9c677b9b LJ |
424 | /* Satisfies the case where type is not set. */ |
425 | ab8500->mask[index] &= ~mask; | |
e2ddf46a | 426 | } |
62579266 RV |
427 | } |
428 | ||
40f6e5a2 LJ |
429 | static int ab8500_irq_set_type(struct irq_data *data, unsigned int type) |
430 | { | |
431 | return 0; | |
62579266 RV |
432 | } |
433 | ||
434 | static struct irq_chip ab8500_irq_chip = { | |
435 | .name = "ab8500", | |
9505a0a0 MB |
436 | .irq_bus_lock = ab8500_irq_lock, |
437 | .irq_bus_sync_unlock = ab8500_irq_sync_unlock, | |
438 | .irq_mask = ab8500_irq_mask, | |
e6f9306e | 439 | .irq_disable = ab8500_irq_mask, |
9505a0a0 | 440 | .irq_unmask = ab8500_irq_unmask, |
40f6e5a2 | 441 | .irq_set_type = ab8500_irq_set_type, |
62579266 RV |
442 | }; |
443 | ||
3e1a498f LJ |
444 | static void update_latch_offset(u8 *offset, int i) |
445 | { | |
446 | /* Fix inconsistent ITFromLatch25 bit mapping... */ | |
447 | if (unlikely(*offset == 17)) | |
500e69a1 | 448 | *offset = 24; |
3e1a498f LJ |
449 | /* Fix inconsistent ab8540 bit mapping... */ |
450 | if (unlikely(*offset == 16)) | |
500e69a1 | 451 | *offset = 25; |
7ccf40b1 | 452 | if ((i == 3) && (*offset >= 24)) |
500e69a1 | 453 | *offset += 2; |
3e1a498f LJ |
454 | } |
455 | ||
7ccfe9b1 MJ |
456 | static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, |
457 | int latch_offset, u8 latch_val) | |
458 | { | |
7a93fb37 | 459 | int int_bit, line, i; |
7ccfe9b1 | 460 | |
7a93fb37 FB |
461 | for (i = 0; i < ab8500->mask_size; i++) |
462 | if (ab8500->irq_reg_offset[i] == latch_offset) | |
463 | break; | |
7ccfe9b1 | 464 | |
7a93fb37 FB |
465 | if (i >= ab8500->mask_size) { |
466 | dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", | |
467 | latch_offset); | |
468 | return -ENXIO; | |
469 | } | |
7ccfe9b1 | 470 | |
7a93fb37 FB |
471 | /* ignore masked out interrupts */ |
472 | latch_val &= ~ab8500->mask[i]; | |
7ccfe9b1 | 473 | |
7a93fb37 FB |
474 | while (latch_val) { |
475 | int_bit = __ffs(latch_val); | |
7ccfe9b1 MJ |
476 | line = (i << 3) + int_bit; |
477 | latch_val &= ~(1 << int_bit); | |
478 | ||
e2ddf46a LW |
479 | /* |
480 | * This handles the falling edge hwirqs from the GPIO | |
481 | * lines. Route them back to the line registered for the | |
482 | * rising IRQ, as this is merely a flag for the same IRQ | |
483 | * in linux terms. | |
484 | */ | |
485 | if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F) | |
486 | line -= 16; | |
487 | if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F) | |
488 | line -= 8; | |
489 | if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F) | |
490 | line += 1; | |
491 | ||
ed83d301 | 492 | handle_nested_irq(irq_create_mapping(ab8500->domain, line)); |
7a93fb37 | 493 | } |
7ccfe9b1 MJ |
494 | |
495 | return 0; | |
496 | } | |
497 | ||
498 | static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, | |
499 | int hier_offset, u8 hier_val) | |
500 | { | |
501 | int latch_bit, status; | |
502 | u8 latch_offset, latch_val; | |
503 | ||
504 | do { | |
505 | latch_bit = __ffs(hier_val); | |
506 | latch_offset = (hier_offset << 3) + latch_bit; | |
507 | ||
3e1a498f | 508 | update_latch_offset(&latch_offset, hier_offset); |
7ccfe9b1 MJ |
509 | |
510 | status = get_register_interruptible(ab8500, | |
511 | AB8500_INTERRUPT, | |
512 | AB8500_IT_LATCH1_REG + latch_offset, | |
513 | &latch_val); | |
514 | if (status < 0 || latch_val == 0) | |
515 | goto discard; | |
516 | ||
517 | status = ab8500_handle_hierarchical_line(ab8500, | |
518 | latch_offset, latch_val); | |
519 | if (status < 0) | |
520 | return status; | |
521 | discard: | |
522 | hier_val &= ~(1 << latch_bit); | |
523 | } while (hier_val); | |
524 | ||
525 | return 0; | |
526 | } | |
527 | ||
528 | static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) | |
529 | { | |
530 | struct ab8500 *ab8500 = dev; | |
531 | u8 i; | |
532 | ||
533 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
534 | ||
535 | /* Hierarchical interrupt version */ | |
3e1a498f | 536 | for (i = 0; i < (ab8500->it_latchhier_num); i++) { |
7ccfe9b1 MJ |
537 | int status; |
538 | u8 hier_val; | |
539 | ||
540 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, | |
541 | AB8500_IT_LATCHHIER1_REG + i, &hier_val); | |
542 | if (status < 0 || hier_val == 0) | |
543 | continue; | |
544 | ||
545 | status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); | |
546 | if (status < 0) | |
547 | break; | |
548 | } | |
549 | return IRQ_HANDLED; | |
550 | } | |
551 | ||
06e589ef LJ |
552 | static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, |
553 | irq_hw_number_t hwirq) | |
554 | { | |
555 | struct ab8500 *ab8500 = d->host_data; | |
556 | ||
557 | if (!ab8500) | |
558 | return -EINVAL; | |
559 | ||
560 | irq_set_chip_data(virq, ab8500); | |
561 | irq_set_chip_and_handler(virq, &ab8500_irq_chip, | |
562 | handle_simple_irq); | |
563 | irq_set_nested_thread(virq, 1); | |
06e589ef | 564 | irq_set_noprobe(virq); |
62579266 RV |
565 | |
566 | return 0; | |
567 | } | |
568 | ||
7ce7b26f | 569 | static const struct irq_domain_ops ab8500_irq_ops = { |
7ccf40b1 LJ |
570 | .map = ab8500_irq_map, |
571 | .xlate = irq_domain_xlate_twocell, | |
06e589ef LJ |
572 | }; |
573 | ||
574 | static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) | |
62579266 | 575 | { |
2ced445e LW |
576 | int num_irqs; |
577 | ||
3e1a498f LJ |
578 | if (is_ab8540(ab8500)) |
579 | num_irqs = AB8540_NR_IRQS; | |
580 | else if (is_ab9540(ab8500)) | |
d6255529 | 581 | num_irqs = AB9540_NR_IRQS; |
a982362c BJ |
582 | else if (is_ab8505(ab8500)) |
583 | num_irqs = AB8505_NR_IRQS; | |
d6255529 LW |
584 | else |
585 | num_irqs = AB8500_NR_IRQS; | |
62579266 | 586 | |
f1d11f39 | 587 | /* If ->irq_base is zero this will give a linear mapping */ |
7602e05d | 588 | ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node, |
500e69a1 LJ |
589 | num_irqs, 0, |
590 | &ab8500_irq_ops, ab8500); | |
06e589ef LJ |
591 | |
592 | if (!ab8500->domain) { | |
593 | dev_err(ab8500->dev, "Failed to create irqdomain\n"); | |
500e69a1 | 594 | return -ENODEV; |
06e589ef LJ |
595 | } |
596 | ||
597 | return 0; | |
62579266 RV |
598 | } |
599 | ||
112a80d2 JA |
600 | int ab8500_suspend(struct ab8500 *ab8500) |
601 | { | |
602 | if (atomic_read(&ab8500->transfer_ongoing)) | |
603 | return -EINVAL; | |
f3556302 LJ |
604 | |
605 | return 0; | |
112a80d2 JA |
606 | } |
607 | ||
5ac98553 | 608 | static const struct mfd_cell ab8500_bm_devs[] = { |
4b106fb9 LJ |
609 | { |
610 | .name = "ab8500-charger", | |
611 | .of_compatible = "stericsson,ab8500-charger", | |
4b106fb9 LJ |
612 | .platform_data = &ab8500_bm_data, |
613 | .pdata_size = sizeof(ab8500_bm_data), | |
614 | }, | |
615 | { | |
616 | .name = "ab8500-btemp", | |
617 | .of_compatible = "stericsson,ab8500-btemp", | |
4b106fb9 LJ |
618 | .platform_data = &ab8500_bm_data, |
619 | .pdata_size = sizeof(ab8500_bm_data), | |
620 | }, | |
621 | { | |
622 | .name = "ab8500-fg", | |
623 | .of_compatible = "stericsson,ab8500-fg", | |
4b106fb9 LJ |
624 | .platform_data = &ab8500_bm_data, |
625 | .pdata_size = sizeof(ab8500_bm_data), | |
626 | }, | |
627 | { | |
628 | .name = "ab8500-chargalg", | |
629 | .of_compatible = "stericsson,ab8500-chargalg", | |
4b106fb9 LJ |
630 | .platform_data = &ab8500_bm_data, |
631 | .pdata_size = sizeof(ab8500_bm_data), | |
632 | }, | |
633 | }; | |
634 | ||
5ac98553 | 635 | static const struct mfd_cell ab8500_devs[] = { |
5814fc35 MW |
636 | #ifdef CONFIG_DEBUG_FS |
637 | { | |
638 | .name = "ab8500-debug", | |
bad76991 | 639 | .of_compatible = "stericsson,ab8500-debug", |
5814fc35 MW |
640 | }, |
641 | #endif | |
e098aded MW |
642 | { |
643 | .name = "ab8500-sysctrl", | |
bad76991 | 644 | .of_compatible = "stericsson,ab8500-sysctrl", |
e098aded | 645 | }, |
53f325be LJ |
646 | { |
647 | .name = "ab8500-ext-regulator", | |
648 | .of_compatible = "stericsson,ab8500-ext-regulator", | |
649 | }, | |
e098aded MW |
650 | { |
651 | .name = "ab8500-regulator", | |
bad76991 | 652 | .of_compatible = "stericsson,ab8500-regulator", |
e098aded | 653 | }, |
916a871c UH |
654 | { |
655 | .name = "abx500-clk", | |
656 | .of_compatible = "stericsson,abx500-clk", | |
657 | }, | |
4b106fb9 LJ |
658 | { |
659 | .name = "ab8500-gpadc", | |
955de2ea | 660 | .of_compatible = "stericsson,ab8500-gpadc", |
4b106fb9 | 661 | }, |
62579266 RV |
662 | { |
663 | .name = "ab8500-rtc", | |
bad76991 | 664 | .of_compatible = "stericsson,ab8500-rtc", |
62579266 | 665 | }, |
6af75ecd LW |
666 | { |
667 | .name = "ab8500-acc-det", | |
bad76991 | 668 | .of_compatible = "stericsson,ab8500-acc-det", |
6af75ecd | 669 | }, |
e098aded | 670 | { |
4b106fb9 | 671 | |
e098aded | 672 | .name = "ab8500-poweron-key", |
bad76991 | 673 | .of_compatible = "stericsson,ab8500-poweron-key", |
e098aded | 674 | }, |
f0f05b1c AM |
675 | { |
676 | .name = "ab8500-pwm", | |
bad76991 | 677 | .of_compatible = "stericsson,ab8500-pwm", |
f0f05b1c AM |
678 | .id = 1, |
679 | }, | |
680 | { | |
681 | .name = "ab8500-pwm", | |
bad76991 | 682 | .of_compatible = "stericsson,ab8500-pwm", |
f0f05b1c AM |
683 | .id = 2, |
684 | }, | |
685 | { | |
686 | .name = "ab8500-pwm", | |
bad76991 | 687 | .of_compatible = "stericsson,ab8500-pwm", |
f0f05b1c AM |
688 | .id = 3, |
689 | }, | |
77686517 | 690 | { |
e098aded | 691 | .name = "ab8500-denc", |
bad76991 | 692 | .of_compatible = "stericsson,ab8500-denc", |
e098aded | 693 | }, |
4b106fb9 | 694 | { |
eb696c31 | 695 | .name = "pinctrl-ab8500", |
4b106fb9 LJ |
696 | .of_compatible = "stericsson,ab8500-gpio", |
697 | }, | |
e098aded | 698 | { |
151621a7 HZ |
699 | .name = "abx500-temp", |
700 | .of_compatible = "stericsson,abx500-temp", | |
77686517 | 701 | }, |
6ef9418c | 702 | { |
4b106fb9 | 703 | .name = "ab8500-usb", |
f201f730 | 704 | .of_compatible = "stericsson,ab8500-usb", |
6ef9418c RA |
705 | }, |
706 | { | |
4b106fb9 | 707 | .name = "ab8500-codec", |
fccf14ad | 708 | .of_compatible = "stericsson,ab8500-codec", |
6ef9418c RA |
709 | }, |
710 | }; | |
711 | ||
5ac98553 | 712 | static const struct mfd_cell ab9540_devs[] = { |
4b106fb9 | 713 | #ifdef CONFIG_DEBUG_FS |
d6255529 | 714 | { |
4b106fb9 | 715 | .name = "ab8500-debug", |
d6255529 | 716 | }, |
4b106fb9 | 717 | #endif |
d6255529 | 718 | { |
4b106fb9 | 719 | .name = "ab8500-sysctrl", |
d6255529 | 720 | }, |
53f325be LJ |
721 | { |
722 | .name = "ab8500-ext-regulator", | |
723 | }, | |
44f72e53 | 724 | { |
4b106fb9 | 725 | .name = "ab8500-regulator", |
44f72e53 | 726 | }, |
9ee17676 UH |
727 | { |
728 | .name = "abx500-clk", | |
729 | .of_compatible = "stericsson,abx500-clk", | |
730 | }, | |
c0eda9ae LJ |
731 | { |
732 | .name = "ab8500-gpadc", | |
733 | .of_compatible = "stericsson,ab8500-gpadc", | |
c0eda9ae | 734 | }, |
4b106fb9 LJ |
735 | { |
736 | .name = "ab8500-rtc", | |
4b106fb9 LJ |
737 | }, |
738 | { | |
739 | .name = "ab8500-acc-det", | |
4b106fb9 LJ |
740 | }, |
741 | { | |
742 | .name = "ab8500-poweron-key", | |
4b106fb9 LJ |
743 | }, |
744 | { | |
745 | .name = "ab8500-pwm", | |
746 | .id = 1, | |
747 | }, | |
4b106fb9 LJ |
748 | { |
749 | .name = "abx500-temp", | |
4b106fb9 | 750 | }, |
d6255529 | 751 | { |
e64d905e LJ |
752 | .name = "pinctrl-ab9540", |
753 | .of_compatible = "stericsson,ab9540-gpio", | |
d6255529 LW |
754 | }, |
755 | { | |
756 | .name = "ab9540-usb", | |
d6255529 | 757 | }, |
44f72e53 VS |
758 | { |
759 | .name = "ab9540-codec", | |
760 | }, | |
c0eda9ae LJ |
761 | { |
762 | .name = "ab-iddet", | |
c0eda9ae | 763 | }, |
44f72e53 VS |
764 | }; |
765 | ||
c0eda9ae | 766 | /* Device list for ab8505 */ |
5ac98553 | 767 | static const struct mfd_cell ab8505_devs[] = { |
4b106fb9 LJ |
768 | #ifdef CONFIG_DEBUG_FS |
769 | { | |
770 | .name = "ab8500-debug", | |
4b106fb9 LJ |
771 | }, |
772 | #endif | |
773 | { | |
774 | .name = "ab8500-sysctrl", | |
775 | }, | |
776 | { | |
777 | .name = "ab8500-regulator", | |
778 | }, | |
9ee17676 UH |
779 | { |
780 | .name = "abx500-clk", | |
781 | .of_compatible = "stericsson,abx500-clk", | |
782 | }, | |
4b106fb9 LJ |
783 | { |
784 | .name = "ab8500-gpadc", | |
955de2ea | 785 | .of_compatible = "stericsson,ab8500-gpadc", |
4b106fb9 LJ |
786 | }, |
787 | { | |
788 | .name = "ab8500-rtc", | |
4b106fb9 LJ |
789 | }, |
790 | { | |
791 | .name = "ab8500-acc-det", | |
4b106fb9 LJ |
792 | }, |
793 | { | |
794 | .name = "ab8500-poweron-key", | |
4b106fb9 LJ |
795 | }, |
796 | { | |
797 | .name = "ab8500-pwm", | |
798 | .id = 1, | |
799 | }, | |
4b106fb9 | 800 | { |
eb696c31 | 801 | .name = "pinctrl-ab8505", |
4b106fb9 LJ |
802 | }, |
803 | { | |
804 | .name = "ab8500-usb", | |
4b106fb9 LJ |
805 | }, |
806 | { | |
807 | .name = "ab8500-codec", | |
808 | }, | |
c0eda9ae LJ |
809 | { |
810 | .name = "ab-iddet", | |
c0eda9ae LJ |
811 | }, |
812 | }; | |
813 | ||
5ac98553 | 814 | static const struct mfd_cell ab8540_devs[] = { |
4b106fb9 LJ |
815 | #ifdef CONFIG_DEBUG_FS |
816 | { | |
817 | .name = "ab8500-debug", | |
4b106fb9 LJ |
818 | }, |
819 | #endif | |
820 | { | |
821 | .name = "ab8500-sysctrl", | |
822 | }, | |
53f325be LJ |
823 | { |
824 | .name = "ab8500-ext-regulator", | |
825 | }, | |
4b106fb9 LJ |
826 | { |
827 | .name = "ab8500-regulator", | |
828 | }, | |
9ee17676 UH |
829 | { |
830 | .name = "abx500-clk", | |
831 | .of_compatible = "stericsson,abx500-clk", | |
832 | }, | |
4b106fb9 LJ |
833 | { |
834 | .name = "ab8500-gpadc", | |
955de2ea | 835 | .of_compatible = "stericsson,ab8500-gpadc", |
4b106fb9 | 836 | }, |
4b106fb9 LJ |
837 | { |
838 | .name = "ab8500-acc-det", | |
4b106fb9 LJ |
839 | }, |
840 | { | |
841 | .name = "ab8500-poweron-key", | |
4b106fb9 LJ |
842 | }, |
843 | { | |
844 | .name = "ab8500-pwm", | |
845 | .id = 1, | |
846 | }, | |
4b106fb9 LJ |
847 | { |
848 | .name = "abx500-temp", | |
4b106fb9 | 849 | }, |
c0eda9ae | 850 | { |
eb696c31 | 851 | .name = "pinctrl-ab8540", |
c0eda9ae LJ |
852 | }, |
853 | { | |
854 | .name = "ab8540-usb", | |
c0eda9ae LJ |
855 | }, |
856 | { | |
857 | .name = "ab8540-codec", | |
858 | }, | |
44f72e53 VS |
859 | { |
860 | .name = "ab-iddet", | |
44f72e53 | 861 | }, |
d6255529 LW |
862 | }; |
863 | ||
5ac98553 | 864 | static const struct mfd_cell ab8540_cut1_devs[] = { |
9c717cf3 AT |
865 | { |
866 | .name = "ab8500-rtc", | |
867 | .of_compatible = "stericsson,ab8500-rtc", | |
9c717cf3 AT |
868 | }, |
869 | }; | |
870 | ||
5ac98553 | 871 | static const struct mfd_cell ab8540_cut2_devs[] = { |
9c717cf3 AT |
872 | { |
873 | .name = "ab8540-rtc", | |
874 | .of_compatible = "stericsson,ab8540-rtc", | |
9c717cf3 AT |
875 | }, |
876 | }; | |
877 | ||
cca69b67 MW |
878 | static ssize_t show_chip_id(struct device *dev, |
879 | struct device_attribute *attr, char *buf) | |
880 | { | |
881 | struct ab8500 *ab8500; | |
882 | ||
883 | ab8500 = dev_get_drvdata(dev); | |
e436ddff | 884 | |
cca69b67 MW |
885 | return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); |
886 | } | |
887 | ||
e5c238c3 MW |
888 | /* |
889 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
890 | * 0x01 Swoff bit programming | |
891 | * 0x02 Thermal protection activation | |
892 | * 0x04 Vbat lower then BattOk falling threshold | |
893 | * 0x08 Watchdog expired | |
894 | * 0x10 Non presence of 32kHz clock | |
895 | * 0x20 Battery level lower than power on reset threshold | |
896 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
897 | * 0x80 DB8500 thermal shutdown | |
898 | */ | |
899 | static ssize_t show_switch_off_status(struct device *dev, | |
900 | struct device_attribute *attr, char *buf) | |
901 | { | |
902 | int ret; | |
903 | u8 value; | |
904 | struct ab8500 *ab8500; | |
905 | ||
906 | ab8500 = dev_get_drvdata(dev); | |
907 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
908 | AB8500_SWITCH_OFF_STATUS, &value); | |
909 | if (ret < 0) | |
910 | return ret; | |
911 | return sprintf(buf, "%#x\n", value); | |
912 | } | |
913 | ||
f04a9d8a RK |
914 | /* use mask and set to override the register turn_on_stat value */ |
915 | void ab8500_override_turn_on_stat(u8 mask, u8 set) | |
916 | { | |
917 | spin_lock(&on_stat_lock); | |
918 | turn_on_stat_mask = mask; | |
919 | turn_on_stat_set = set; | |
920 | spin_unlock(&on_stat_lock); | |
921 | } | |
922 | ||
b4a31037 AL |
923 | /* |
924 | * ab8500 has turned on due to (TURN_ON_STATUS): | |
925 | * 0x01 PORnVbat | |
926 | * 0x02 PonKey1dbF | |
927 | * 0x04 PonKey2dbF | |
928 | * 0x08 RTCAlarm | |
929 | * 0x10 MainChDet | |
930 | * 0x20 VbusDet | |
931 | * 0x40 UsbIDDetect | |
932 | * 0x80 Reserved | |
933 | */ | |
934 | static ssize_t show_turn_on_status(struct device *dev, | |
935 | struct device_attribute *attr, char *buf) | |
936 | { | |
937 | int ret; | |
938 | u8 value; | |
939 | struct ab8500 *ab8500; | |
940 | ||
941 | ab8500 = dev_get_drvdata(dev); | |
942 | ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, | |
943 | AB8500_TURN_ON_STATUS, &value); | |
944 | if (ret < 0) | |
945 | return ret; | |
f04a9d8a RK |
946 | |
947 | /* | |
948 | * In L9540, turn_on_status register is not updated correctly if | |
949 | * the device is rebooted with AC/USB charger connected. Due to | |
950 | * this, the device boots android instead of entering into charge | |
951 | * only mode. Read the AC/USB status register to detect the charger | |
952 | * presence and update the turn on status manually. | |
953 | */ | |
954 | if (is_ab9540(ab8500)) { | |
955 | spin_lock(&on_stat_lock); | |
956 | value = (value & turn_on_stat_mask) | turn_on_stat_set; | |
957 | spin_unlock(&on_stat_lock); | |
958 | } | |
959 | ||
b4a31037 AL |
960 | return sprintf(buf, "%#x\n", value); |
961 | } | |
962 | ||
93ff722e LJ |
963 | static ssize_t show_turn_on_status_2(struct device *dev, |
964 | struct device_attribute *attr, char *buf) | |
965 | { | |
966 | int ret; | |
967 | u8 value; | |
968 | struct ab8500 *ab8500; | |
969 | ||
970 | ab8500 = dev_get_drvdata(dev); | |
971 | ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, | |
972 | AB8505_TURN_ON_STATUS_2, &value); | |
973 | if (ret < 0) | |
974 | return ret; | |
975 | return sprintf(buf, "%#x\n", (value & 0x1)); | |
976 | } | |
977 | ||
d6255529 LW |
978 | static ssize_t show_ab9540_dbbrstn(struct device *dev, |
979 | struct device_attribute *attr, char *buf) | |
980 | { | |
981 | struct ab8500 *ab8500; | |
982 | int ret; | |
983 | u8 value; | |
984 | ||
985 | ab8500 = dev_get_drvdata(dev); | |
986 | ||
987 | ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, | |
988 | AB9540_MODEM_CTRL2_REG, &value); | |
989 | if (ret < 0) | |
990 | return ret; | |
991 | ||
992 | return sprintf(buf, "%d\n", | |
993 | (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); | |
994 | } | |
995 | ||
996 | static ssize_t store_ab9540_dbbrstn(struct device *dev, | |
997 | struct device_attribute *attr, const char *buf, size_t count) | |
998 | { | |
999 | struct ab8500 *ab8500; | |
1000 | int ret = count; | |
1001 | int err; | |
1002 | u8 bitvalues; | |
1003 | ||
1004 | ab8500 = dev_get_drvdata(dev); | |
1005 | ||
1006 | if (count > 0) { | |
1007 | switch (buf[0]) { | |
1008 | case '0': | |
1009 | bitvalues = 0; | |
1010 | break; | |
1011 | case '1': | |
1012 | bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; | |
1013 | break; | |
1014 | default: | |
1015 | goto exit; | |
1016 | } | |
1017 | ||
1018 | err = mask_and_set_register_interruptible(ab8500, | |
1019 | AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, | |
1020 | AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); | |
1021 | if (err) | |
1022 | dev_info(ab8500->dev, | |
1023 | "Failed to set DBBRSTN %c, err %#x\n", | |
1024 | buf[0], err); | |
1025 | } | |
1026 | ||
1027 | exit: | |
1028 | return ret; | |
1029 | } | |
1030 | ||
cca69b67 | 1031 | static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); |
e5c238c3 | 1032 | static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); |
b4a31037 | 1033 | static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); |
93ff722e | 1034 | static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL); |
d6255529 LW |
1035 | static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, |
1036 | show_ab9540_dbbrstn, store_ab9540_dbbrstn); | |
cca69b67 MW |
1037 | |
1038 | static struct attribute *ab8500_sysfs_entries[] = { | |
1039 | &dev_attr_chip_id.attr, | |
e5c238c3 | 1040 | &dev_attr_switch_off_status.attr, |
b4a31037 | 1041 | &dev_attr_turn_on_status.attr, |
cca69b67 MW |
1042 | NULL, |
1043 | }; | |
1044 | ||
93ff722e LJ |
1045 | static struct attribute *ab8505_sysfs_entries[] = { |
1046 | &dev_attr_turn_on_status_2.attr, | |
1047 | NULL, | |
1048 | }; | |
1049 | ||
d6255529 LW |
1050 | static struct attribute *ab9540_sysfs_entries[] = { |
1051 | &dev_attr_chip_id.attr, | |
1052 | &dev_attr_switch_off_status.attr, | |
1053 | &dev_attr_turn_on_status.attr, | |
1054 | &dev_attr_dbbrstn.attr, | |
1055 | NULL, | |
1056 | }; | |
1057 | ||
cca69b67 MW |
1058 | static struct attribute_group ab8500_attr_group = { |
1059 | .attrs = ab8500_sysfs_entries, | |
1060 | }; | |
1061 | ||
93ff722e LJ |
1062 | static struct attribute_group ab8505_attr_group = { |
1063 | .attrs = ab8505_sysfs_entries, | |
1064 | }; | |
1065 | ||
d6255529 LW |
1066 | static struct attribute_group ab9540_attr_group = { |
1067 | .attrs = ab9540_sysfs_entries, | |
1068 | }; | |
1069 | ||
f791be49 | 1070 | static int ab8500_probe(struct platform_device *pdev) |
62579266 | 1071 | { |
500e69a1 | 1072 | static const char * const switch_off_status[] = { |
b04c530c JA |
1073 | "Swoff bit programming", |
1074 | "Thermal protection activation", | |
1075 | "Vbat lower then BattOk falling threshold", | |
1076 | "Watchdog expired", | |
1077 | "Non presence of 32kHz clock", | |
1078 | "Battery level lower than power on reset threshold", | |
1079 | "Power on key 1 pressed longer than 10 seconds", | |
1080 | "DB8500 thermal shutdown"}; | |
500e69a1 | 1081 | static const char * const turn_on_status[] = { |
abee26cd MW |
1082 | "Battery rising (Vbat)", |
1083 | "Power On Key 1 dbF", | |
1084 | "Power On Key 2 dbF", | |
1085 | "RTC Alarm", | |
1086 | "Main Charger Detect", | |
1087 | "Vbus Detect (USB)", | |
1088 | "USB ID Detect", | |
1089 | "UART Factory Mode Detect"}; | |
d28f1db8 LJ |
1090 | struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); |
1091 | const struct platform_device_id *platid = platform_get_device_id(pdev); | |
6bc4a568 LJ |
1092 | enum ab8500_version version = AB8500_VERSION_UNDEFINED; |
1093 | struct device_node *np = pdev->dev.of_node; | |
d28f1db8 LJ |
1094 | struct ab8500 *ab8500; |
1095 | struct resource *resource; | |
62579266 RV |
1096 | int ret; |
1097 | int i; | |
47c16975 | 1098 | u8 value; |
62579266 | 1099 | |
7ccf40b1 | 1100 | ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL); |
d28f1db8 LJ |
1101 | if (!ab8500) |
1102 | return -ENOMEM; | |
1103 | ||
d28f1db8 LJ |
1104 | ab8500->dev = &pdev->dev; |
1105 | ||
1106 | resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
f864c46a LW |
1107 | if (!resource) { |
1108 | dev_err(&pdev->dev, "no IRQ resource\n"); | |
8c4203cb | 1109 | return -ENODEV; |
f864c46a | 1110 | } |
d28f1db8 LJ |
1111 | |
1112 | ab8500->irq = resource->start; | |
1113 | ||
822672a7 LJ |
1114 | ab8500->read = ab8500_prcmu_read; |
1115 | ab8500->write = ab8500_prcmu_write; | |
1116 | ab8500->write_masked = ab8500_prcmu_write_masked; | |
d28f1db8 | 1117 | |
62579266 RV |
1118 | mutex_init(&ab8500->lock); |
1119 | mutex_init(&ab8500->irq_lock); | |
112a80d2 | 1120 | atomic_set(&ab8500->transfer_ongoing, 0); |
62579266 | 1121 | |
d28f1db8 LJ |
1122 | platform_set_drvdata(pdev, ab8500); |
1123 | ||
6bc4a568 LJ |
1124 | if (platid) |
1125 | version = platid->driver_data; | |
6bc4a568 | 1126 | |
0f620837 LW |
1127 | if (version != AB8500_VERSION_UNDEFINED) |
1128 | ab8500->version = version; | |
1129 | else { | |
1130 | ret = get_register_interruptible(ab8500, AB8500_MISC, | |
1131 | AB8500_IC_NAME_REG, &value); | |
f864c46a LW |
1132 | if (ret < 0) { |
1133 | dev_err(&pdev->dev, "could not probe HW\n"); | |
8c4203cb | 1134 | return ret; |
f864c46a | 1135 | } |
0f620837 LW |
1136 | |
1137 | ab8500->version = value; | |
1138 | } | |
1139 | ||
47c16975 MW |
1140 | ret = get_register_interruptible(ab8500, AB8500_MISC, |
1141 | AB8500_REV_REG, &value); | |
62579266 | 1142 | if (ret < 0) |
8c4203cb | 1143 | return ret; |
62579266 | 1144 | |
47c16975 | 1145 | ab8500->chip_id = value; |
62579266 | 1146 | |
0f620837 LW |
1147 | dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", |
1148 | ab8500_version_str[ab8500->version], | |
1149 | ab8500->chip_id >> 4, | |
1150 | ab8500->chip_id & 0x0F); | |
1151 | ||
3e1a498f LJ |
1152 | /* Configure AB8540 */ |
1153 | if (is_ab8540(ab8500)) { | |
1154 | ab8500->mask_size = AB8540_NUM_IRQ_REGS; | |
1155 | ab8500->irq_reg_offset = ab8540_irq_regoffset; | |
1156 | ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM; | |
7ccf40b1 | 1157 | } /* Configure AB8500 or AB9540 IRQ */ |
3e1a498f | 1158 | else if (is_ab9540(ab8500) || is_ab8505(ab8500)) { |
d6255529 LW |
1159 | ab8500->mask_size = AB9540_NUM_IRQ_REGS; |
1160 | ab8500->irq_reg_offset = ab9540_irq_regoffset; | |
3e1a498f | 1161 | ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; |
d6255529 LW |
1162 | } else { |
1163 | ab8500->mask_size = AB8500_NUM_IRQ_REGS; | |
1164 | ab8500->irq_reg_offset = ab8500_irq_regoffset; | |
3e1a498f | 1165 | ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; |
d6255529 | 1166 | } |
7ccf40b1 LJ |
1167 | ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, |
1168 | GFP_KERNEL); | |
2ced445e LW |
1169 | if (!ab8500->mask) |
1170 | return -ENOMEM; | |
7ccf40b1 LJ |
1171 | ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, |
1172 | GFP_KERNEL); | |
8c4203cb LJ |
1173 | if (!ab8500->oldmask) |
1174 | return -ENOMEM; | |
1175 | ||
e5c238c3 MW |
1176 | /* |
1177 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
1178 | * 0x01 Swoff bit programming | |
1179 | * 0x02 Thermal protection activation | |
1180 | * 0x04 Vbat lower then BattOk falling threshold | |
1181 | * 0x08 Watchdog expired | |
1182 | * 0x10 Non presence of 32kHz clock | |
1183 | * 0x20 Battery level lower than power on reset threshold | |
1184 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
1185 | * 0x80 DB8500 thermal shutdown | |
1186 | */ | |
1187 | ||
1188 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
1189 | AB8500_SWITCH_OFF_STATUS, &value); | |
1190 | if (ret < 0) | |
1191 | return ret; | |
b04c530c JA |
1192 | dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); |
1193 | ||
1194 | if (value) { | |
1195 | for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { | |
1196 | if (value & 1) | |
7ccf40b1 | 1197 | pr_cont(" \"%s\"", switch_off_status[i]); |
b04c530c JA |
1198 | value = value >> 1; |
1199 | ||
1200 | } | |
7ccf40b1 | 1201 | pr_cont("\n"); |
b04c530c | 1202 | } else { |
7ccf40b1 | 1203 | pr_cont(" None\n"); |
b04c530c | 1204 | } |
abee26cd MW |
1205 | ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, |
1206 | AB8500_TURN_ON_STATUS, &value); | |
1207 | if (ret < 0) | |
1208 | return ret; | |
1209 | dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value); | |
1210 | ||
1211 | if (value) { | |
1212 | for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) { | |
1213 | if (value & 1) | |
7ccf40b1 | 1214 | pr_cont("\"%s\" ", turn_on_status[i]); |
abee26cd MW |
1215 | value = value >> 1; |
1216 | } | |
7ccf40b1 | 1217 | pr_cont("\n"); |
abee26cd | 1218 | } else { |
7ccf40b1 | 1219 | pr_cont("None\n"); |
abee26cd | 1220 | } |
e5c238c3 | 1221 | |
62579266 RV |
1222 | if (plat && plat->init) |
1223 | plat->init(ab8500); | |
abee26cd | 1224 | |
f04a9d8a RK |
1225 | if (is_ab9540(ab8500)) { |
1226 | ret = get_register_interruptible(ab8500, AB8500_CHARGER, | |
1227 | AB8500_CH_USBCH_STAT1_REG, &value); | |
1228 | if (ret < 0) | |
1229 | return ret; | |
1230 | if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100)) | |
1231 | ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON, | |
1232 | AB8500_VBUS_DET); | |
1233 | } | |
62579266 RV |
1234 | |
1235 | /* Clear and mask all interrupts */ | |
2ced445e | 1236 | for (i = 0; i < ab8500->mask_size; i++) { |
0f620837 LW |
1237 | /* |
1238 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
1239 | * 2.0 | |
1240 | */ | |
1241 | if (ab8500->irq_reg_offset[i] == 11 && | |
1242 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 | 1243 | continue; |
62579266 | 1244 | |
3e1a498f LJ |
1245 | if (ab8500->irq_reg_offset[i] < 0) |
1246 | continue; | |
1247 | ||
47c16975 | 1248 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1249 | AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], |
92d50a41 | 1250 | &value); |
47c16975 | 1251 | set_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1252 | AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); |
62579266 RV |
1253 | } |
1254 | ||
47c16975 MW |
1255 | ret = abx500_register_ops(ab8500->dev, &ab8500_ops); |
1256 | if (ret) | |
8c4203cb | 1257 | return ret; |
47c16975 | 1258 | |
2ced445e | 1259 | for (i = 0; i < ab8500->mask_size; i++) |
62579266 RV |
1260 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; |
1261 | ||
06e589ef LJ |
1262 | ret = ab8500_irq_init(ab8500, np); |
1263 | if (ret) | |
8c4203cb | 1264 | return ret; |
62579266 | 1265 | |
f348fefd DS |
1266 | ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, |
1267 | ab8500_hierarchical_irq, | |
1268 | IRQF_ONESHOT | IRQF_NO_SUSPEND, | |
1269 | "ab8500", ab8500); | |
1270 | if (ret) | |
1271 | return ret; | |
62579266 | 1272 | |
bad76991 LJ |
1273 | if (is_ab9540(ab8500)) |
1274 | ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, | |
1275 | ARRAY_SIZE(ab9540_devs), NULL, | |
f864c46a | 1276 | 0, ab8500->domain); |
9c717cf3 | 1277 | else if (is_ab8540(ab8500)) { |
c0eda9ae LJ |
1278 | ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs, |
1279 | ARRAY_SIZE(ab8540_devs), NULL, | |
f864c46a | 1280 | 0, ab8500->domain); |
9c717cf3 AT |
1281 | if (ret) |
1282 | return ret; | |
1283 | ||
1284 | if (is_ab8540_1p2_or_earlier(ab8500)) | |
1285 | ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs, | |
1286 | ARRAY_SIZE(ab8540_cut1_devs), NULL, | |
f864c46a | 1287 | 0, ab8500->domain); |
9c717cf3 AT |
1288 | else /* ab8540 >= cut2 */ |
1289 | ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs, | |
1290 | ARRAY_SIZE(ab8540_cut2_devs), NULL, | |
f864c46a | 1291 | 0, ab8500->domain); |
9c717cf3 | 1292 | } else if (is_ab8505(ab8500)) |
c0eda9ae LJ |
1293 | ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs, |
1294 | ARRAY_SIZE(ab8505_devs), NULL, | |
f864c46a | 1295 | 0, ab8500->domain); |
bad76991 LJ |
1296 | else |
1297 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, | |
1298 | ARRAY_SIZE(ab8500_devs), NULL, | |
f864c46a | 1299 | 0, ab8500->domain); |
bad76991 | 1300 | if (ret) |
8c4203cb | 1301 | return ret; |
44f72e53 | 1302 | |
6ef9418c RA |
1303 | if (!no_bm) { |
1304 | /* Add battery management devices */ | |
1305 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, | |
1306 | ARRAY_SIZE(ab8500_bm_devs), NULL, | |
f864c46a | 1307 | 0, ab8500->domain); |
6ef9418c RA |
1308 | if (ret) |
1309 | dev_err(ab8500->dev, "error adding bm devices\n"); | |
1310 | } | |
1311 | ||
e436ddff LJ |
1312 | if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && |
1313 | ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) | |
d6255529 LW |
1314 | ret = sysfs_create_group(&ab8500->dev->kobj, |
1315 | &ab9540_attr_group); | |
1316 | else | |
1317 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1318 | &ab8500_attr_group); | |
93ff722e LJ |
1319 | |
1320 | if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && | |
1321 | ab8500->chip_id >= AB8500_CUT2P0) | |
1322 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1323 | &ab8505_attr_group); | |
1324 | ||
cca69b67 MW |
1325 | if (ret) |
1326 | dev_err(ab8500->dev, "error creating sysfs entries\n"); | |
06e589ef LJ |
1327 | |
1328 | return ret; | |
62579266 RV |
1329 | } |
1330 | ||
4740f73f | 1331 | static int ab8500_remove(struct platform_device *pdev) |
62579266 | 1332 | { |
d28f1db8 LJ |
1333 | struct ab8500 *ab8500 = platform_get_drvdata(pdev); |
1334 | ||
e436ddff LJ |
1335 | if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && |
1336 | ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) | |
d6255529 LW |
1337 | sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); |
1338 | else | |
1339 | sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); | |
06e589ef | 1340 | |
93ff722e LJ |
1341 | if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && |
1342 | ab8500->chip_id >= AB8500_CUT2P0) | |
1343 | sysfs_remove_group(&ab8500->dev->kobj, &ab8505_attr_group); | |
1344 | ||
62579266 | 1345 | mfd_remove_devices(ab8500->dev); |
62579266 RV |
1346 | |
1347 | return 0; | |
1348 | } | |
1349 | ||
d28f1db8 LJ |
1350 | static const struct platform_device_id ab8500_id[] = { |
1351 | { "ab8500-core", AB8500_VERSION_AB8500 }, | |
1352 | { "ab8505-i2c", AB8500_VERSION_AB8505 }, | |
1353 | { "ab9540-i2c", AB8500_VERSION_AB9540 }, | |
1354 | { "ab8540-i2c", AB8500_VERSION_AB8540 }, | |
1355 | { } | |
1356 | }; | |
1357 | ||
1358 | static struct platform_driver ab8500_core_driver = { | |
1359 | .driver = { | |
1360 | .name = "ab8500-core", | |
d28f1db8 LJ |
1361 | }, |
1362 | .probe = ab8500_probe, | |
84449216 | 1363 | .remove = ab8500_remove, |
d28f1db8 LJ |
1364 | .id_table = ab8500_id, |
1365 | }; | |
1366 | ||
1367 | static int __init ab8500_core_init(void) | |
1368 | { | |
1369 | return platform_driver_register(&ab8500_core_driver); | |
1370 | } | |
1371 | ||
1372 | static void __exit ab8500_core_exit(void) | |
1373 | { | |
1374 | platform_driver_unregister(&ab8500_core_driver); | |
1375 | } | |
ba7cbc3e | 1376 | core_initcall(ab8500_core_init); |
d28f1db8 LJ |
1377 | module_exit(ab8500_core_exit); |
1378 | ||
adceed62 | 1379 | MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); |
62579266 RV |
1380 | MODULE_DESCRIPTION("AB8500 MFD core"); |
1381 | MODULE_LICENSE("GPL v2"); |