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ab8500-bm: Remove individual [charger|btemp|fg|chargalg] pdata structures
[deliverable/linux.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
d28f1db8 22#include <linux/mfd/dbx500-prcmu.h>
549931f9 23#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 24#include <linux/of.h>
25#include <linux/of_device.h>
62579266
RV		 26
27/*
28 * Interrupt register offsets
29 * Bank : 0x0E
30 */
47c16975
MW		 31#define AB8500_IT_SOURCE1_REG 0x00
32#define AB8500_IT_SOURCE2_REG 0x01
33#define AB8500_IT_SOURCE3_REG 0x02
34#define AB8500_IT_SOURCE4_REG 0x03
35#define AB8500_IT_SOURCE5_REG 0x04
36#define AB8500_IT_SOURCE6_REG 0x05
37#define AB8500_IT_SOURCE7_REG 0x06
38#define AB8500_IT_SOURCE8_REG 0x07
d6255529 39#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 40#define AB8500_IT_SOURCE19_REG 0x12
41#define AB8500_IT_SOURCE20_REG 0x13
42#define AB8500_IT_SOURCE21_REG 0x14
43#define AB8500_IT_SOURCE22_REG 0x15
44#define AB8500_IT_SOURCE23_REG 0x16
45#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 46
47/*
48 * latch registers
49 */
47c16975
MW		 50#define AB8500_IT_LATCH1_REG 0x20
51#define AB8500_IT_LATCH2_REG 0x21
52#define AB8500_IT_LATCH3_REG 0x22
53#define AB8500_IT_LATCH4_REG 0x23
54#define AB8500_IT_LATCH5_REG 0x24
55#define AB8500_IT_LATCH6_REG 0x25
56#define AB8500_IT_LATCH7_REG 0x26
57#define AB8500_IT_LATCH8_REG 0x27
58#define AB8500_IT_LATCH9_REG 0x28
59#define AB8500_IT_LATCH10_REG 0x29
92d50a41 60#define AB8500_IT_LATCH12_REG 0x2B
d6255529 61#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 62#define AB8500_IT_LATCH19_REG 0x32
63#define AB8500_IT_LATCH20_REG 0x33
64#define AB8500_IT_LATCH21_REG 0x34
65#define AB8500_IT_LATCH22_REG 0x35
66#define AB8500_IT_LATCH23_REG 0x36
67#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 68
69/*
70 * mask registers
71 */
72
47c16975
MW		 73#define AB8500_IT_MASK1_REG 0x40
74#define AB8500_IT_MASK2_REG 0x41
75#define AB8500_IT_MASK3_REG 0x42
76#define AB8500_IT_MASK4_REG 0x43
77#define AB8500_IT_MASK5_REG 0x44
78#define AB8500_IT_MASK6_REG 0x45
79#define AB8500_IT_MASK7_REG 0x46
80#define AB8500_IT_MASK8_REG 0x47
81#define AB8500_IT_MASK9_REG 0x48
82#define AB8500_IT_MASK10_REG 0x49
83#define AB8500_IT_MASK11_REG 0x4A
84#define AB8500_IT_MASK12_REG 0x4B
85#define AB8500_IT_MASK13_REG 0x4C
86#define AB8500_IT_MASK14_REG 0x4D
87#define AB8500_IT_MASK15_REG 0x4E
88#define AB8500_IT_MASK16_REG 0x4F
89#define AB8500_IT_MASK17_REG 0x50
90#define AB8500_IT_MASK18_REG 0x51
91#define AB8500_IT_MASK19_REG 0x52
92#define AB8500_IT_MASK20_REG 0x53
93#define AB8500_IT_MASK21_REG 0x54
94#define AB8500_IT_MASK22_REG 0x55
95#define AB8500_IT_MASK23_REG 0x56
96#define AB8500_IT_MASK24_REG 0x57
97
7ccfe9b1
MJ		 98/*
99 * latch hierarchy registers
100 */
101#define AB8500_IT_LATCHHIER1_REG 0x60
102#define AB8500_IT_LATCHHIER2_REG 0x61
103#define AB8500_IT_LATCHHIER3_REG 0x62
104
105#define AB8500_IT_LATCHHIER_NUM 3
106
47c16975 107#define AB8500_REV_REG 0x80
0f620837 108#define AB8500_IC_NAME_REG 0x82
e5c238c3 109#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 110
b4a31037
AL		 111#define AB8500_TURN_ON_STATUS 0x00
112
6ef9418c
RA		 113static bool no_bm; /* No battery management */
114module_param(no_bm, bool, S_IRUGO);
115
d6255529
LW		 116#define AB9540_MODEM_CTRL2_REG 0x23
117#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
118
62579266
RV		 119/*
120 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 121 * numbers are indexed into this array with (num / 8). The interupts are
122 * defined in linux/mfd/ab8500.h
62579266
RV		 123 *
124 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
125 * offset 0.
126 */
2ced445e 127/* AB8500 support */
62579266 128static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 129 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 130};
131
d6255529
LW		 132/* AB9540 support */
133static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
134 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24,
135};
136
0f620837
LW		 137static const char ab8500_version_str[][7] = {
138 [AB8500_VERSION_AB8500] = "AB8500",
139 [AB8500_VERSION_AB8505] = "AB8505",
140 [AB8500_VERSION_AB9540] = "AB9540",
141 [AB8500_VERSION_AB8540] = "AB8540",
142};
143
822672a7 144static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 145{
146 int ret;
147
148 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
149 if (ret < 0)
150 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
151 return ret;
152}
153
822672a7 154static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 155 u8 data)
156{
157 int ret;
158
159 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
160 &mask, 1);
161 if (ret < 0)
162 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
163 return ret;
164}
165
822672a7 166static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 167{
168 int ret;
169 u8 data;
170
171 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
172 if (ret < 0) {
173 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
174 return ret;
175 }
176 return (int)data;
177}
178
47c16975
MW		 179static int ab8500_get_chip_id(struct device *dev)
180{
6bce7bf1
MW		 181 struct ab8500 *ab8500;
182
183 if (!dev)
184 return -EINVAL;
185 ab8500 = dev_get_drvdata(dev->parent);
186 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 187}
188
189static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
190 u8 reg, u8 data)
62579266
RV		 191{
192 int ret;
47c16975
MW		 193 /*
194 * Put the u8 bank and u8 register together into a an u16.
195 * The bank on higher 8 bits and register in lower 8 bits.
196 * */
197 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 198
199 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
200
392cbd1e 201 mutex_lock(&ab8500->lock);
47c16975 202
62579266
RV		 203 ret = ab8500->write(ab8500, addr, data);
204 if (ret < 0)
205 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
206 addr, ret);
47c16975 207 mutex_unlock(&ab8500->lock);
62579266
RV		 208
209 return ret;
210}
211
47c16975
MW		 212static int ab8500_set_register(struct device *dev, u8 bank,
213 u8 reg, u8 value)
62579266 214{
112a80d2 215 int ret;
47c16975 216 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 217
112a80d2
JA		 218 atomic_inc(&ab8500->transfer_ongoing);
219 ret = set_register_interruptible(ab8500, bank, reg, value);
220 atomic_dec(&ab8500->transfer_ongoing);
221 return ret;
62579266 222}
62579266 223
47c16975
MW		 224static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
225 u8 reg, u8 *value)
62579266
RV		 226{
227 int ret;
47c16975
MW		 228 /* put the u8 bank and u8 reg together into a an u16.
229 * bank on higher 8 bits and reg in lower */
230 u16 addr = ((u16)bank) << 8 | reg;
231
392cbd1e 232 mutex_lock(&ab8500->lock);
62579266
RV		 233
234 ret = ab8500->read(ab8500, addr);
235 if (ret < 0)
236 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
237 addr, ret);
47c16975
MW		 238 else
239 *value = ret;
62579266 240
47c16975 241 mutex_unlock(&ab8500->lock);
62579266
RV		 242 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
243
244 return ret;
245}
246
47c16975
MW		 247static int ab8500_get_register(struct device *dev, u8 bank,
248 u8 reg, u8 *value)
62579266 249{
112a80d2 250 int ret;
47c16975 251 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 252
112a80d2
JA		 253 atomic_inc(&ab8500->transfer_ongoing);
254 ret = get_register_interruptible(ab8500, bank, reg, value);
255 atomic_dec(&ab8500->transfer_ongoing);
256 return ret;
62579266 257}
47c16975
MW		 258
259static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
260 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 261{
262 int ret;
47c16975
MW		 263 /* put the u8 bank and u8 reg together into a an u16.
264 * bank on higher 8 bits and reg in lower */
265 u16 addr = ((u16)bank) << 8 | reg;
62579266 266
392cbd1e 267 mutex_lock(&ab8500->lock);
62579266 268
bc628fd1
MN		 269 if (ab8500->write_masked == NULL) {
270 u8 data;
62579266 271
bc628fd1
MN		 272 ret = ab8500->read(ab8500, addr);
273 if (ret < 0) {
274 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
275 addr, ret);
276 goto out;
277 }
62579266 278
bc628fd1
MN		 279 data = (u8)ret;
280 data = (~bitmask & data) | (bitmask & bitvalues);
281
282 ret = ab8500->write(ab8500, addr, data);
283 if (ret < 0)
284 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
285 addr, ret);
62579266 286
bc628fd1
MN		 287 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
288 data);
289 goto out;
290 }
291 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
292 if (ret < 0)
293 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
294 ret);
62579266
RV		 295out:
296 mutex_unlock(&ab8500->lock);
297 return ret;
298}
47c16975
MW		 299
300static int ab8500_mask_and_set_register(struct device *dev,
301 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
302{
112a80d2 303 int ret;
47c16975
MW		 304 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
305
112a80d2
JA		 306 atomic_inc(&ab8500->transfer_ongoing);
307 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
308 bitmask, bitvalues);
309 atomic_dec(&ab8500->transfer_ongoing);
310 return ret;
47c16975
MW		 311}
312
313static struct abx500_ops ab8500_ops = {
314 .get_chip_id = ab8500_get_chip_id,
315 .get_register = ab8500_get_register,
316 .set_register = ab8500_set_register,
317 .get_register_page = NULL,
318 .set_register_page = NULL,
319 .mask_and_set_register = ab8500_mask_and_set_register,
320 .event_registers_startup_state_get = NULL,
321 .startup_irq_enabled = NULL,
322};
62579266 323
9505a0a0 324static void ab8500_irq_lock(struct irq_data *data)
62579266 325{
9505a0a0 326 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 327
328 mutex_lock(&ab8500->irq_lock);
112a80d2 329 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 330}
331
9505a0a0 332static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 333{
9505a0a0 334 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 335 int i;
336
2ced445e 337 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 338 u8 old = ab8500->oldmask[i];
339 u8 new = ab8500->mask[i];
340 int reg;
341
342 if (new == old)
343 continue;
344
0f620837
LW		 345 /*
346 * Interrupt register 12 doesn't exist prior to AB8500 version
347 * 2.0
348 */
349 if (ab8500->irq_reg_offset[i] == 11 &&
350 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 351 continue;
352
62579266
RV		 353 ab8500->oldmask[i] = new;
354
2ced445e 355 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 356 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 357 }
112a80d2 358 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 359 mutex_unlock(&ab8500->irq_lock);
360}
361
9505a0a0 362static void ab8500_irq_mask(struct irq_data *data)
62579266 363{
9505a0a0 364 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 365 int offset = data->hwirq;
62579266
RV		 366 int index = offset / 8;
367 int mask = 1 << (offset % 8);
368
369 ab8500->mask[index] |= mask;
370}
371
9505a0a0 372static void ab8500_irq_unmask(struct irq_data *data)
62579266 373{
9505a0a0 374 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 375 int offset = data->hwirq;
62579266
RV		 376 int index = offset / 8;
377 int mask = 1 << (offset % 8);
378
379 ab8500->mask[index] &= ~mask;
380}
381
382static struct irq_chip ab8500_irq_chip = {
383 .name = "ab8500",
9505a0a0
MB		 384 .irq_bus_lock = ab8500_irq_lock,
385 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
386 .irq_mask = ab8500_irq_mask,
e6f9306e 387 .irq_disable = ab8500_irq_mask,
9505a0a0 388 .irq_unmask = ab8500_irq_unmask,
62579266
RV		 389};
390
7ccfe9b1
MJ		 391static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
392 int latch_offset, u8 latch_val)
393{
394 int int_bit = __ffs(latch_val);
395 int line, i;
396
397 do {
398 int_bit = __ffs(latch_val);
399
400 for (i = 0; i < ab8500->mask_size; i++)
401 if (ab8500->irq_reg_offset[i] == latch_offset)
402 break;
403
404 if (i >= ab8500->mask_size) {
405 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
406 latch_offset);
407 return -ENXIO;
408 }
409
410 line = (i << 3) + int_bit;
411 latch_val &= ~(1 << int_bit);
412
413 handle_nested_irq(ab8500->irq_base + line);
414 } while (latch_val);
415
416 return 0;
417}
418
419static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
420 int hier_offset, u8 hier_val)
421{
422 int latch_bit, status;
423 u8 latch_offset, latch_val;
424
425 do {
426 latch_bit = __ffs(hier_val);
427 latch_offset = (hier_offset << 3) + latch_bit;
428
429 /* Fix inconsistent ITFromLatch25 bit mapping... */
430 if (unlikely(latch_offset == 17))
431 latch_offset = 24;
432
433 status = get_register_interruptible(ab8500,
434 AB8500_INTERRUPT,
435 AB8500_IT_LATCH1_REG + latch_offset,
436 &latch_val);
437 if (status < 0 || latch_val == 0)
438 goto discard;
439
440 status = ab8500_handle_hierarchical_line(ab8500,
441 latch_offset, latch_val);
442 if (status < 0)
443 return status;
444discard:
445 hier_val &= ~(1 << latch_bit);
446 } while (hier_val);
447
448 return 0;
449}
450
451static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
452{
453 struct ab8500 *ab8500 = dev;
454 u8 i;
455
456 dev_vdbg(ab8500->dev, "interrupt\n");
457
458 /* Hierarchical interrupt version */
459 for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) {
460 int status;
461 u8 hier_val;
462
463 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
464 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
465 if (status < 0 || hier_val == 0)
466 continue;
467
468 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
469 if (status < 0)
470 break;
471 }
472 return IRQ_HANDLED;
473}
474
80633f05
LJ		 475/**
476 * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
477 *
478 * @ab8500: ab8500_irq controller to operate on.
479 * @irq: index of the interrupt requested in the chip IRQs
480 *
481 * Useful for drivers to request their own IRQs.
482 */
483static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq)
484{
485 if (!ab8500)
486 return -EINVAL;
487
488 return irq_create_mapping(ab8500->domain, irq);
489}
490
62579266
RV		 491static irqreturn_t ab8500_irq(int irq, void *dev)
492{
493 struct ab8500 *ab8500 = dev;
494 int i;
495
496 dev_vdbg(ab8500->dev, "interrupt\n");
497
112a80d2
JA		 498 atomic_inc(&ab8500->transfer_ongoing);
499
2ced445e
LW		 500 for (i = 0; i < ab8500->mask_size; i++) {
501 int regoffset = ab8500->irq_reg_offset[i];
62579266 502 int status;
47c16975 503 u8 value;
62579266 504
0f620837
LW		 505 /*
506 * Interrupt register 12 doesn't exist prior to AB8500 version
507 * 2.0
508 */
509 if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 510 continue;
511
47c16975
MW		 512 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
513 AB8500_IT_LATCH1_REG + regoffset, &value);
514 if (status < 0 || value == 0)
62579266
RV		 515 continue;
516
517 do {
88aec4f7 518 int bit = __ffs(value);
62579266 519 int line = i * 8 + bit;
0a37fc56 520 int virq = ab8500_irq_get_virq(ab8500, line);
62579266 521
0a37fc56 522 handle_nested_irq(virq);
47c16975 523 value &= ~(1 << bit);
112a80d2 524
47c16975 525 } while (value);
62579266 526 }
112a80d2 527 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 528 return IRQ_HANDLED;
529}
530
06e589ef
LJ		 531static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
532 irq_hw_number_t hwirq)
533{
534 struct ab8500 *ab8500 = d->host_data;
535
536 if (!ab8500)
537 return -EINVAL;
538
539 irq_set_chip_data(virq, ab8500);
540 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
541 handle_simple_irq);
542 irq_set_nested_thread(virq, 1);
62579266 543#ifdef CONFIG_ARM
06e589ef 544 set_irq_flags(virq, IRQF_VALID);
62579266 545#else
06e589ef 546 irq_set_noprobe(virq);
62579266 547#endif
62579266
RV		 548
549 return 0;
550}
551
06e589ef
LJ		 552static struct irq_domain_ops ab8500_irq_ops = {
553 .map = ab8500_irq_map,
554 .xlate = irq_domain_xlate_twocell,
555};
556
557static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 558{
2ced445e
LW		 559 int num_irqs;
560
d6255529
LW		 561 if (is_ab9540(ab8500))
562 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 563 else if (is_ab8505(ab8500))
564 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 565 else
566 num_irqs = AB8500_NR_IRQS;
62579266 567
f1d11f39
LW		 568 /* If ->irq_base is zero this will give a linear mapping */
569 ab8500->domain = irq_domain_add_simple(NULL,
570 num_irqs, ab8500->irq_base,
571 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 572
573 if (!ab8500->domain) {
574 dev_err(ab8500->dev, "Failed to create irqdomain\n");
575 return -ENOSYS;
576 }
577
578 return 0;
62579266
RV		 579}
580
112a80d2
JA		 581int ab8500_suspend(struct ab8500 *ab8500)
582{
583 if (atomic_read(&ab8500->transfer_ongoing))
584 return -EINVAL;
585 else
586 return 0;
587}
588
a9e9ce4c 589static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 590 {
591 .name = "HW_CONV_END",
592 .start = AB8500_INT_GP_HW_ADC_CONV_END,
593 .end = AB8500_INT_GP_HW_ADC_CONV_END,
594 .flags = IORESOURCE_IRQ,
595 },
596 {
597 .name = "SW_CONV_END",
598 .start = AB8500_INT_GP_SW_ADC_CONV_END,
599 .end = AB8500_INT_GP_SW_ADC_CONV_END,
600 .flags = IORESOURCE_IRQ,
601 },
602};
603
a9e9ce4c 604static struct resource ab8500_rtc_resources[] = {
62579266
RV		 605 {
606 .name = "60S",
607 .start = AB8500_INT_RTC_60S,
608 .end = AB8500_INT_RTC_60S,
609 .flags = IORESOURCE_IRQ,
610 },
611 {
612 .name = "ALARM",
613 .start = AB8500_INT_RTC_ALARM,
614 .end = AB8500_INT_RTC_ALARM,
615 .flags = IORESOURCE_IRQ,
616 },
617};
618
a9e9ce4c 619static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 620 {
621 .name = "ONKEY_DBF",
622 .start = AB8500_INT_PON_KEY1DB_F,
623 .end = AB8500_INT_PON_KEY1DB_F,
624 .flags = IORESOURCE_IRQ,
625 },
626 {
627 .name = "ONKEY_DBR",
628 .start = AB8500_INT_PON_KEY1DB_R,
629 .end = AB8500_INT_PON_KEY1DB_R,
630 .flags = IORESOURCE_IRQ,
631 },
632};
633
a9e9ce4c 634static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 635 {
6af75ecd
LW		 636 .name = "ACC_DETECT_1DB_F",
637 .start = AB8500_INT_ACC_DETECT_1DB_F,
638 .end = AB8500_INT_ACC_DETECT_1DB_F,
639 .flags = IORESOURCE_IRQ,
e098aded
MW		 640 },
641 {
6af75ecd
LW		 642 .name = "ACC_DETECT_1DB_R",
643 .start = AB8500_INT_ACC_DETECT_1DB_R,
644 .end = AB8500_INT_ACC_DETECT_1DB_R,
645 .flags = IORESOURCE_IRQ,
646 },
647 {
648 .name = "ACC_DETECT_21DB_F",
649 .start = AB8500_INT_ACC_DETECT_21DB_F,
650 .end = AB8500_INT_ACC_DETECT_21DB_F,
651 .flags = IORESOURCE_IRQ,
652 },
653 {
654 .name = "ACC_DETECT_21DB_R",
655 .start = AB8500_INT_ACC_DETECT_21DB_R,
656 .end = AB8500_INT_ACC_DETECT_21DB_R,
657 .flags = IORESOURCE_IRQ,
658 },
659 {
660 .name = "ACC_DETECT_22DB_F",
661 .start = AB8500_INT_ACC_DETECT_22DB_F,
662 .end = AB8500_INT_ACC_DETECT_22DB_F,
663 .flags = IORESOURCE_IRQ,
e098aded 664 },
6af75ecd
LW		 665 {
666 .name = "ACC_DETECT_22DB_R",
667 .start = AB8500_INT_ACC_DETECT_22DB_R,
668 .end = AB8500_INT_ACC_DETECT_22DB_R,
669 .flags = IORESOURCE_IRQ,
670 },
671};
672
a9e9ce4c 673static struct resource ab8500_charger_resources[] = {
e098aded
MW		 674 {
675 .name = "MAIN_CH_UNPLUG_DET",
676 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
677 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
678 .flags = IORESOURCE_IRQ,
679 },
680 {
681 .name = "MAIN_CHARGE_PLUG_DET",
682 .start = AB8500_INT_MAIN_CH_PLUG_DET,
683 .end = AB8500_INT_MAIN_CH_PLUG_DET,
684 .flags = IORESOURCE_IRQ,
685 },
e098aded
MW		 686 {
687 .name = "VBUS_DET_R",
688 .start = AB8500_INT_VBUS_DET_R,
689 .end = AB8500_INT_VBUS_DET_R,
690 .flags = IORESOURCE_IRQ,
691 },
692 {
6af75ecd
LW		 693 .name = "VBUS_DET_F",
694 .start = AB8500_INT_VBUS_DET_F,
695 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 696 .flags = IORESOURCE_IRQ,
697 },
698 {
6af75ecd
LW		 699 .name = "USB_LINK_STATUS",
700 .start = AB8500_INT_USB_LINK_STATUS,
701 .end = AB8500_INT_USB_LINK_STATUS,
702 .flags = IORESOURCE_IRQ,
703 },
e098aded
MW		 704 {
705 .name = "VBUS_OVV",
706 .start = AB8500_INT_VBUS_OVV,
707 .end = AB8500_INT_VBUS_OVV,
708 .flags = IORESOURCE_IRQ,
709 },
710 {
6af75ecd
LW		 711 .name = "USB_CH_TH_PROT_R",
712 .start = AB8500_INT_USB_CH_TH_PROT_R,
713 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 714 .flags = IORESOURCE_IRQ,
715 },
716 {
6af75ecd
LW		 717 .name = "USB_CH_TH_PROT_F",
718 .start = AB8500_INT_USB_CH_TH_PROT_F,
719 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 720 .flags = IORESOURCE_IRQ,
721 },
722 {
6af75ecd
LW		 723 .name = "MAIN_EXT_CH_NOT_OK",
724 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
725 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
726 .flags = IORESOURCE_IRQ,
727 },
728 {
729 .name = "MAIN_CH_TH_PROT_R",
730 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
731 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
732 .flags = IORESOURCE_IRQ,
733 },
734 {
735 .name = "MAIN_CH_TH_PROT_F",
736 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
737 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
738 .flags = IORESOURCE_IRQ,
739 },
740 {
741 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 742 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
743 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 744 .flags = IORESOURCE_IRQ,
745 },
746 {
747 .name = "CH_WD_EXP",
748 .start = AB8500_INT_CH_WD_EXP,
749 .end = AB8500_INT_CH_WD_EXP,
750 .flags = IORESOURCE_IRQ,
751 },
752};
753
a9e9ce4c 754static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 755 {
756 .name = "BAT_CTRL_INDB",
757 .start = AB8500_INT_BAT_CTRL_INDB,
758 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 759 .flags = IORESOURCE_IRQ,
760 },
761 {
762 .name = "BTEMP_LOW",
763 .start = AB8500_INT_BTEMP_LOW,
764 .end = AB8500_INT_BTEMP_LOW,
765 .flags = IORESOURCE_IRQ,
766 },
767 {
768 .name = "BTEMP_HIGH",
769 .start = AB8500_INT_BTEMP_HIGH,
770 .end = AB8500_INT_BTEMP_HIGH,
771 .flags = IORESOURCE_IRQ,
772 },
773 {
6af75ecd
LW		 774 .name = "BTEMP_LOW_MEDIUM",
775 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
776 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 777 .flags = IORESOURCE_IRQ,
778 },
779 {
6af75ecd
LW		 780 .name = "BTEMP_MEDIUM_HIGH",
781 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
782 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 783 .flags = IORESOURCE_IRQ,
784 },
6af75ecd
LW		 785};
786
a9e9ce4c 787static struct resource ab8500_fg_resources[] = {
e098aded 788 {
6af75ecd
LW		 789 .name = "NCONV_ACCU",
790 .start = AB8500_INT_CCN_CONV_ACC,
791 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 792 .flags = IORESOURCE_IRQ,
793 },
794 {
6af75ecd
LW		 795 .name = "BATT_OVV",
796 .start = AB8500_INT_BATT_OVV,
797 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 798 .flags = IORESOURCE_IRQ,
799 },
800 {
6af75ecd
LW		 801 .name = "LOW_BAT_F",
802 .start = AB8500_INT_LOW_BAT_F,
803 .end = AB8500_INT_LOW_BAT_F,
804 .flags = IORESOURCE_IRQ,
805 },
806 {
807 .name = "LOW_BAT_R",
808 .start = AB8500_INT_LOW_BAT_R,
809 .end = AB8500_INT_LOW_BAT_R,
810 .flags = IORESOURCE_IRQ,
811 },
812 {
813 .name = "CC_INT_CALIB",
814 .start = AB8500_INT_CC_INT_CALIB,
815 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 816 .flags = IORESOURCE_IRQ,
817 },
a982362c
BJ		 818 {
819 .name = "CCEOC",
820 .start = AB8500_INT_CCEOC,
821 .end = AB8500_INT_CCEOC,
822 .flags = IORESOURCE_IRQ,
823 },
e098aded
MW		 824};
825
a9e9ce4c 826static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 827
df720647 828#ifdef CONFIG_DEBUG_FS
a9e9ce4c 829static struct resource ab8500_debug_resources[] = {
e098aded
MW		 830 {
831 .name = "IRQ_FIRST",
832 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
833 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
834 .flags = IORESOURCE_IRQ,
835 },
836 {
837 .name = "IRQ_LAST",
a982362c
BJ		 838 .start = AB8500_INT_XTAL32K_KO,
839 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 840 .flags = IORESOURCE_IRQ,
841 },
842};
df720647 843#endif
e098aded 844
a9e9ce4c 845static struct resource ab8500_usb_resources[] = {
e098aded
MW		 846 {
847 .name = "ID_WAKEUP_R",
848 .start = AB8500_INT_ID_WAKEUP_R,
849 .end = AB8500_INT_ID_WAKEUP_R,
850 .flags = IORESOURCE_IRQ,
851 },
852 {
853 .name = "ID_WAKEUP_F",
854 .start = AB8500_INT_ID_WAKEUP_F,
855 .end = AB8500_INT_ID_WAKEUP_F,
856 .flags = IORESOURCE_IRQ,
857 },
858 {
859 .name = "VBUS_DET_F",
860 .start = AB8500_INT_VBUS_DET_F,
861 .end = AB8500_INT_VBUS_DET_F,
862 .flags = IORESOURCE_IRQ,
863 },
864 {
865 .name = "VBUS_DET_R",
866 .start = AB8500_INT_VBUS_DET_R,
867 .end = AB8500_INT_VBUS_DET_R,
868 .flags = IORESOURCE_IRQ,
869 },
92d50a41
MW		 870 {
871 .name = "USB_LINK_STATUS",
872 .start = AB8500_INT_USB_LINK_STATUS,
873 .end = AB8500_INT_USB_LINK_STATUS,
874 .flags = IORESOURCE_IRQ,
875 },
6af75ecd
LW		 876 {
877 .name = "USB_ADP_PROBE_PLUG",
878 .start = AB8500_INT_ADP_PROBE_PLUG,
879 .end = AB8500_INT_ADP_PROBE_PLUG,
880 .flags = IORESOURCE_IRQ,
881 },
882 {
883 .name = "USB_ADP_PROBE_UNPLUG",
884 .start = AB8500_INT_ADP_PROBE_UNPLUG,
885 .end = AB8500_INT_ADP_PROBE_UNPLUG,
886 .flags = IORESOURCE_IRQ,
887 },
e098aded
MW		 888};
889
a9e9ce4c 890static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 891 {
892 .name = "KeyDeglitch",
893 .start = AB8505_INT_KEYDEGLITCH,
894 .end = AB8505_INT_KEYDEGLITCH,
895 .flags = IORESOURCE_IRQ,
896 },
897 {
898 .name = "KP",
899 .start = AB8505_INT_KP,
900 .end = AB8505_INT_KP,
901 .flags = IORESOURCE_IRQ,
902 },
903 {
904 .name = "IKP",
905 .start = AB8505_INT_IKP,
906 .end = AB8505_INT_IKP,
907 .flags = IORESOURCE_IRQ,
908 },
909 {
910 .name = "IKR",
911 .start = AB8505_INT_IKR,
912 .end = AB8505_INT_IKR,
913 .flags = IORESOURCE_IRQ,
914 },
915 {
916 .name = "KeyStuck",
917 .start = AB8505_INT_KEYSTUCK,
918 .end = AB8505_INT_KEYSTUCK,
919 .flags = IORESOURCE_IRQ,
920 },
921};
922
a9e9ce4c 923static struct resource ab8500_temp_resources[] = {
e098aded
MW		 924 {
925 .name = "AB8500_TEMP_WARM",
926 .start = AB8500_INT_TEMP_WARM,
927 .end = AB8500_INT_TEMP_WARM,
928 .flags = IORESOURCE_IRQ,
929 },
930};
931
a9e9ce4c 932static struct mfd_cell abx500_common_devs[] = {
5814fc35
MW		 933#ifdef CONFIG_DEBUG_FS
934 {
935 .name = "ab8500-debug",
bad76991 936 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 937 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
938 .resources = ab8500_debug_resources,
5814fc35
MW		 939 },
940#endif
e098aded
MW		 941 {
942 .name = "ab8500-sysctrl",
bad76991 943 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 944 },
945 {
946 .name = "ab8500-regulator",
bad76991 947 .of_compatible = "stericsson,ab8500-regulator",
e098aded 948 },
916a871c
UH		 949 {
950 .name = "abx500-clk",
951 .of_compatible = "stericsson,abx500-clk",
952 },
62579266
RV		 953 {
954 .name = "ab8500-gpadc",
bad76991 955 .of_compatible = "stericsson,ab8500-gpadc",
62579266
RV		 956 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
957 .resources = ab8500_gpadc_resources,
958 },
959 {
960 .name = "ab8500-rtc",
bad76991 961 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 962 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
963 .resources = ab8500_rtc_resources,
964 },
6af75ecd
LW		 965 {
966 .name = "ab8500-acc-det",
bad76991 967 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 968 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
969 .resources = ab8500_av_acc_detect_resources,
970 },
e098aded
MW		 971 {
972 .name = "ab8500-poweron-key",
bad76991 973 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 974 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
975 .resources = ab8500_poweronkey_db_resources,
976 },
f0f05b1c
AM		 977 {
978 .name = "ab8500-pwm",
bad76991 979 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 980 .id = 1,
981 },
982 {
983 .name = "ab8500-pwm",
bad76991 984 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 985 .id = 2,
986 },
987 {
988 .name = "ab8500-pwm",
bad76991 989 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 990 .id = 3,
991 },
bad76991
LJ		 992 {
993 .name = "ab8500-leds",
994 .of_compatible = "stericsson,ab8500-leds",
995 },
77686517 996 {
e098aded 997 .name = "ab8500-denc",
bad76991 998 .of_compatible = "stericsson,ab8500-denc",
e098aded
MW		 999 },
1000 {
1001 .name = "ab8500-temp",
bad76991 1002 .of_compatible = "stericsson,ab8500-temp",
e098aded
MW		 1003 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1004 .resources = ab8500_temp_resources,
77686517 1005 },
62579266
RV		 1006};
1007
a9e9ce4c 1008static struct mfd_cell ab8500_bm_devs[] = {
6ef9418c
RA		 1009 {
1010 .name = "ab8500-charger",
4aef72db 1011 .of_compatible = "stericsson,ab8500-charger",
6ef9418c
RA		 1012 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1013 .resources = ab8500_charger_resources,
4aef72db
R		 1014 .platform_data = &ab8500_bm_data,
1015 .pdata_size = sizeof(ab8500_bm_data),
6ef9418c
RA		 1016 },
1017 {
1018 .name = "ab8500-btemp",
bd9e8ab2 1019 .of_compatible = "stericsson,ab8500-btemp",
6ef9418c
RA		 1020 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1021 .resources = ab8500_btemp_resources,
bd9e8ab2
R		 1022 .platform_data = &ab8500_bm_data,
1023 .pdata_size = sizeof(ab8500_bm_data),
6ef9418c
RA		 1024 },
1025 {
1026 .name = "ab8500-fg",
e0f1abeb 1027 .of_compatible = "stericsson,ab8500-fg",
6ef9418c
RA		 1028 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1029 .resources = ab8500_fg_resources,
e0f1abeb
R		 1030 .platform_data = &ab8500_bm_data,
1031 .pdata_size = sizeof(ab8500_bm_data),
6ef9418c
RA		 1032 },
1033 {
1034 .name = "ab8500-chargalg",
a12810ab 1035 .of_compatible = "stericsson,ab8500-chargalg",
6ef9418c
RA		 1036 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1037 .resources = ab8500_chargalg_resources,
a12810ab
R		 1038 .platform_data = &ab8500_bm_data,
1039 .pdata_size = sizeof(ab8500_bm_data),
6ef9418c
RA		 1040 },
1041};
1042
a9e9ce4c 1043static struct mfd_cell ab8500_devs[] = {
d6255529
LW		 1044 {
1045 .name = "ab8500-gpio",
bad76991 1046 .of_compatible = "stericsson,ab8500-gpio",
d6255529
LW		 1047 },
1048 {
1049 .name = "ab8500-usb",
bad76991 1050 .of_compatible = "stericsson,ab8500-usb",
d6255529
LW		 1051 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1052 .resources = ab8500_usb_resources,
1053 },
44f72e53
VS		 1054 {
1055 .name = "ab8500-codec",
81a21cdd 1056 .of_compatible = "stericsson,ab8500-codec",
44f72e53 1057 },
d6255529
LW		 1058};
1059
a9e9ce4c 1060static struct mfd_cell ab9540_devs[] = {
d6255529
LW		 1061 {
1062 .name = "ab8500-gpio",
d6255529
LW		 1063 },
1064 {
1065 .name = "ab9540-usb",
1066 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1067 .resources = ab8500_usb_resources,
1068 },
44f72e53
VS		 1069 {
1070 .name = "ab9540-codec",
1071 },
1072};
1073
1074/* Device list common to ab9540 and ab8505 */
a9e9ce4c 1075static struct mfd_cell ab9540_ab8505_devs[] = {
44f72e53
VS		 1076 {
1077 .name = "ab-iddet",
1078 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1079 .resources = ab8505_iddet_resources,
1080 },
d6255529
LW		 1081};
1082
cca69b67
MW		 1083static ssize_t show_chip_id(struct device *dev,
1084 struct device_attribute *attr, char *buf)
1085{
1086 struct ab8500 *ab8500;
1087
1088 ab8500 = dev_get_drvdata(dev);
1089 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1090}
1091
e5c238c3
MW		 1092/*
1093 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1094 * 0x01 Swoff bit programming
1095 * 0x02 Thermal protection activation
1096 * 0x04 Vbat lower then BattOk falling threshold
1097 * 0x08 Watchdog expired
1098 * 0x10 Non presence of 32kHz clock
1099 * 0x20 Battery level lower than power on reset threshold
1100 * 0x40 Power on key 1 pressed longer than 10 seconds
1101 * 0x80 DB8500 thermal shutdown
1102 */
1103static ssize_t show_switch_off_status(struct device *dev,
1104 struct device_attribute *attr, char *buf)
1105{
1106 int ret;
1107 u8 value;
1108 struct ab8500 *ab8500;
1109
1110 ab8500 = dev_get_drvdata(dev);
1111 ret = get_register_interruptible(ab8500, AB8500_RTC,
1112 AB8500_SWITCH_OFF_STATUS, &value);
1113 if (ret < 0)
1114 return ret;
1115 return sprintf(buf, "%#x\n", value);
1116}
1117
b4a31037
AL		 1118/*
1119 * ab8500 has turned on due to (TURN_ON_STATUS):
1120 * 0x01 PORnVbat
1121 * 0x02 PonKey1dbF
1122 * 0x04 PonKey2dbF
1123 * 0x08 RTCAlarm
1124 * 0x10 MainChDet
1125 * 0x20 VbusDet
1126 * 0x40 UsbIDDetect
1127 * 0x80 Reserved
1128 */
1129static ssize_t show_turn_on_status(struct device *dev,
1130 struct device_attribute *attr, char *buf)
1131{
1132 int ret;
1133 u8 value;
1134 struct ab8500 *ab8500;
1135
1136 ab8500 = dev_get_drvdata(dev);
1137 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1138 AB8500_TURN_ON_STATUS, &value);
1139 if (ret < 0)
1140 return ret;
1141 return sprintf(buf, "%#x\n", value);
1142}
1143
d6255529
LW		 1144static ssize_t show_ab9540_dbbrstn(struct device *dev,
1145 struct device_attribute *attr, char *buf)
1146{
1147 struct ab8500 *ab8500;
1148 int ret;
1149 u8 value;
1150
1151 ab8500 = dev_get_drvdata(dev);
1152
1153 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1154 AB9540_MODEM_CTRL2_REG, &value);
1155 if (ret < 0)
1156 return ret;
1157
1158 return sprintf(buf, "%d\n",
1159 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1160}
1161
1162static ssize_t store_ab9540_dbbrstn(struct device *dev,
1163 struct device_attribute *attr, const char *buf, size_t count)
1164{
1165 struct ab8500 *ab8500;
1166 int ret = count;
1167 int err;
1168 u8 bitvalues;
1169
1170 ab8500 = dev_get_drvdata(dev);
1171
1172 if (count > 0) {
1173 switch (buf[0]) {
1174 case '0':
1175 bitvalues = 0;
1176 break;
1177 case '1':
1178 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1179 break;
1180 default:
1181 goto exit;
1182 }
1183
1184 err = mask_and_set_register_interruptible(ab8500,
1185 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1186 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1187 if (err)
1188 dev_info(ab8500->dev,
1189 "Failed to set DBBRSTN %c, err %#x\n",
1190 buf[0], err);
1191 }
1192
1193exit:
1194 return ret;
1195}
1196
cca69b67 1197static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1198static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1199static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
d6255529
LW		 1200static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1201 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1202
1203static struct attribute *ab8500_sysfs_entries[] = {
1204 &dev_attr_chip_id.attr,
e5c238c3 1205 &dev_attr_switch_off_status.attr,
b4a31037 1206 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1207 NULL,
1208};
1209
d6255529
LW		 1210static struct attribute *ab9540_sysfs_entries[] = {
1211 &dev_attr_chip_id.attr,
1212 &dev_attr_switch_off_status.attr,
1213 &dev_attr_turn_on_status.attr,
1214 &dev_attr_dbbrstn.attr,
1215 NULL,
1216};
1217
cca69b67
MW		 1218static struct attribute_group ab8500_attr_group = {
1219 .attrs = ab8500_sysfs_entries,
1220};
1221
d6255529
LW		 1222static struct attribute_group ab9540_attr_group = {
1223 .attrs = ab9540_sysfs_entries,
1224};
1225
f791be49 1226static int ab8500_probe(struct platform_device *pdev)
62579266 1227{
b04c530c
JA		 1228 static char *switch_off_status[] = {
1229 "Swoff bit programming",
1230 "Thermal protection activation",
1231 "Vbat lower then BattOk falling threshold",
1232 "Watchdog expired",
1233 "Non presence of 32kHz clock",
1234 "Battery level lower than power on reset threshold",
1235 "Power on key 1 pressed longer than 10 seconds",
1236 "DB8500 thermal shutdown"};
d28f1db8
LJ		 1237 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1238 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1239 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1240 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1241 struct ab8500 *ab8500;
1242 struct resource *resource;
62579266
RV		 1243 int ret;
1244 int i;
47c16975 1245 u8 value;
62579266 1246
8c4203cb 1247 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1248 if (!ab8500)
1249 return -ENOMEM;
1250
62579266
RV		 1251 if (plat)
1252 ab8500->irq_base = plat->irq_base;
1253
d28f1db8
LJ		 1254 ab8500->dev = &pdev->dev;
1255
1256 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1257 if (!resource)
1258 return -ENODEV;
d28f1db8
LJ		 1259
1260 ab8500->irq = resource->start;
1261
822672a7
LJ		 1262 ab8500->read = ab8500_prcmu_read;
1263 ab8500->write = ab8500_prcmu_write;
1264 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1265
62579266
RV		 1266 mutex_init(&ab8500->lock);
1267 mutex_init(&ab8500->irq_lock);
112a80d2 1268 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1269
d28f1db8
LJ		 1270 platform_set_drvdata(pdev, ab8500);
1271
6bc4a568
LJ		 1272 if (platid)
1273 version = platid->driver_data;
6bc4a568 1274
0f620837
LW		 1275 if (version != AB8500_VERSION_UNDEFINED)
1276 ab8500->version = version;
1277 else {
1278 ret = get_register_interruptible(ab8500, AB8500_MISC,
1279 AB8500_IC_NAME_REG, &value);
1280 if (ret < 0)
8c4203cb 1281 return ret;
0f620837
LW		 1282
1283 ab8500->version = value;
1284 }
1285
47c16975
MW		 1286 ret = get_register_interruptible(ab8500, AB8500_MISC,
1287 AB8500_REV_REG, &value);
62579266 1288 if (ret < 0)
8c4203cb 1289 return ret;
62579266 1290
47c16975 1291 ab8500->chip_id = value;
62579266 1292
0f620837
LW		 1293 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1294 ab8500_version_str[ab8500->version],
1295 ab8500->chip_id >> 4,
1296 ab8500->chip_id & 0x0F);
1297
d6255529 1298 /* Configure AB8500 or AB9540 IRQ */
a982362c 1299 if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1300 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1301 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1302 } else {
1303 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1304 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1305 }
8c4203cb 1306 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1307 if (!ab8500->mask)
1308 return -ENOMEM;
8c4203cb
LJ		 1309 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1310 if (!ab8500->oldmask)
1311 return -ENOMEM;
1312
e5c238c3
MW		 1313 /*
1314 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1315 * 0x01 Swoff bit programming
1316 * 0x02 Thermal protection activation
1317 * 0x04 Vbat lower then BattOk falling threshold
1318 * 0x08 Watchdog expired
1319 * 0x10 Non presence of 32kHz clock
1320 * 0x20 Battery level lower than power on reset threshold
1321 * 0x40 Power on key 1 pressed longer than 10 seconds
1322 * 0x80 DB8500 thermal shutdown
1323 */
1324
1325 ret = get_register_interruptible(ab8500, AB8500_RTC,
1326 AB8500_SWITCH_OFF_STATUS, &value);
1327 if (ret < 0)
1328 return ret;
b04c530c
JA		 1329 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1330
1331 if (value) {
1332 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1333 if (value & 1)
1334 printk(KERN_CONT " \"%s\"",
1335 switch_off_status[i]);
1336 value = value >> 1;
1337
1338 }
1339 printk(KERN_CONT "\n");
1340 } else {
1341 printk(KERN_CONT " None\n");
1342 }
e5c238c3 1343
62579266
RV		 1344 if (plat && plat->init)
1345 plat->init(ab8500);
1346
1347 /* Clear and mask all interrupts */
2ced445e 1348 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1349 /*
1350 * Interrupt register 12 doesn't exist prior to AB8500 version
1351 * 2.0
1352 */
1353 if (ab8500->irq_reg_offset[i] == 11 &&
1354 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1355 continue;
62579266 1356
47c16975 1357 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1358 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1359 &value);
47c16975 1360 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1361 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1362 }
1363
47c16975
MW		 1364 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1365 if (ret)
8c4203cb 1366 return ret;
47c16975 1367
2ced445e 1368 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1369 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1370
06e589ef
LJ		 1371 ret = ab8500_irq_init(ab8500, np);
1372 if (ret)
8c4203cb 1373 return ret;
62579266 1374
06e589ef
LJ		 1375 /* Activate this feature only in ab9540 */
1376 /* till tests are done on ab8500 1p2 or later*/
1377 if (is_ab9540(ab8500)) {
8c4203cb
LJ		 1378 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1379 ab8500_hierarchical_irq,
1380 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1381 "ab8500", ab8500);
06e589ef
LJ		 1382 }
1383 else {
8c4203cb
LJ		 1384 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1385 ab8500_irq,
1386 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1387 "ab8500", ab8500);
62579266 1388 if (ret)
8c4203cb 1389 return ret;
62579266
RV		 1390 }
1391
bad76991
LJ		 1392 ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
1393 ARRAY_SIZE(abx500_common_devs), NULL,
55692af5 1394 ab8500->irq_base, ab8500->domain);
bad76991 1395 if (ret)
8c4203cb 1396 return ret;
d6255529 1397
bad76991
LJ		 1398 if (is_ab9540(ab8500))
1399 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1400 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1401 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1402 else
1403 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1404 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1405 ab8500->irq_base, ab8500->domain);
bad76991 1406 if (ret)
8c4203cb 1407 return ret;
44f72e53 1408
bad76991
LJ		 1409 if (is_ab9540(ab8500) || is_ab8505(ab8500))
1410 ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
1411 ARRAY_SIZE(ab9540_ab8505_devs), NULL,
55692af5 1412 ab8500->irq_base, ab8500->domain);
bad76991 1413 if (ret)
8c4203cb 1414 return ret;
62579266 1415
6ef9418c
RA		 1416 if (!no_bm) {
1417 /* Add battery management devices */
1418 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1419 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1420 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1421 if (ret)
1422 dev_err(ab8500->dev, "error adding bm devices\n");
1423 }
1424
d6255529
LW		 1425 if (is_ab9540(ab8500))
1426 ret = sysfs_create_group(&ab8500->dev->kobj,
1427 &ab9540_attr_group);
1428 else
1429 ret = sysfs_create_group(&ab8500->dev->kobj,
1430 &ab8500_attr_group);
cca69b67
MW		 1431 if (ret)
1432 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1433
1434 return ret;
62579266
RV		 1435}
1436
4740f73f 1437static int ab8500_remove(struct platform_device *pdev)
62579266 1438{
d28f1db8
LJ		 1439 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1440
d6255529
LW		 1441 if (is_ab9540(ab8500))
1442 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1443 else
1444 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1445
62579266 1446 mfd_remove_devices(ab8500->dev);
62579266
RV		 1447
1448 return 0;
1449}
1450
d28f1db8
LJ		 1451static const struct platform_device_id ab8500_id[] = {
1452 { "ab8500-core", AB8500_VERSION_AB8500 },
1453 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1454 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1455 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1456 { }
1457};
1458
1459static struct platform_driver ab8500_core_driver = {
1460 .driver = {
1461 .name = "ab8500-core",
1462 .owner = THIS_MODULE,
1463 },
1464 .probe = ab8500_probe,
84449216 1465 .remove = ab8500_remove,
d28f1db8
LJ		 1466 .id_table = ab8500_id,
1467};
1468
1469static int __init ab8500_core_init(void)
1470{
1471 return platform_driver_register(&ab8500_core_driver);
1472}
1473
1474static void __exit ab8500_core_exit(void)
1475{
1476 platform_driver_unregister(&ab8500_core_driver);
1477}
ba7cbc3e 1478core_initcall(ab8500_core_init);
d28f1db8
LJ		 1479module_exit(ab8500_core_exit);
1480
adceed62 1481MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1482MODULE_DESCRIPTION("AB8500 MFD core");
1483MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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