mfd: ab8500-gpadc: Implemented suspend/resume
[deliverable/linux.git] / drivers / mfd / ab8500-gpadc.c
CommitLineData
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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
6321992c 6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
586f3318 7 * Author: Johan Palsson <johan.palsson@stericsson.com>
dae2db30
AM
8 */
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/device.h>
12#include <linux/interrupt.h>
13#include <linux/spinlock.h>
14#include <linux/delay.h>
5f8aaef4 15#include <linux/pm_runtime.h>
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AM
16#include <linux/platform_device.h>
17#include <linux/completion.h>
18#include <linux/regulator/consumer.h>
19#include <linux/err.h>
20#include <linux/slab.h>
6321992c 21#include <linux/list.h>
dae2db30 22#include <linux/mfd/abx500.h>
ee66e653
LW
23#include <linux/mfd/abx500/ab8500.h>
24#include <linux/mfd/abx500/ab8500-gpadc.h>
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25
26/*
27 * GPADC register offsets
28 * Bank : 0x0A
29 */
30#define AB8500_GPADC_CTRL1_REG 0x00
31#define AB8500_GPADC_CTRL2_REG 0x01
32#define AB8500_GPADC_CTRL3_REG 0x02
33#define AB8500_GPADC_AUTO_TIMER_REG 0x03
34#define AB8500_GPADC_STAT_REG 0x04
35#define AB8500_GPADC_MANDATAL_REG 0x05
36#define AB8500_GPADC_MANDATAH_REG 0x06
37#define AB8500_GPADC_AUTODATAL_REG 0x07
38#define AB8500_GPADC_AUTODATAH_REG 0x08
39#define AB8500_GPADC_MUX_CTRL_REG 0x09
40
586f3318
JP
41/*
42 * OTP register offsets
43 * Bank : 0x15
44 */
45#define AB8500_GPADC_CAL_1 0x0F
46#define AB8500_GPADC_CAL_2 0x10
47#define AB8500_GPADC_CAL_3 0x11
48#define AB8500_GPADC_CAL_4 0x12
49#define AB8500_GPADC_CAL_5 0x13
50#define AB8500_GPADC_CAL_6 0x14
51#define AB8500_GPADC_CAL_7 0x15
52
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53/* gpadc constants */
54#define EN_VINTCORE12 0x04
55#define EN_VTVOUT 0x02
56#define EN_GPADC 0x01
57#define DIS_GPADC 0x00
58#define SW_AVG_16 0x60
59#define ADC_SW_CONV 0x04
4aad5a91 60#define EN_ICHAR 0x80
ed139416 61#define BTEMP_PULL_UP 0x08
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62#define EN_BUF 0x40
63#define DIS_ZERO 0x00
64#define GPADC_BUSY 0x01
65
586f3318
JP
66/* GPADC constants from AB8500 spec, UM0836 */
67#define ADC_RESOLUTION 1024
68#define ADC_CH_BTEMP_MIN 0
69#define ADC_CH_BTEMP_MAX 1350
70#define ADC_CH_DIETEMP_MIN 0
71#define ADC_CH_DIETEMP_MAX 1350
72#define ADC_CH_CHG_V_MIN 0
73#define ADC_CH_CHG_V_MAX 20030
74#define ADC_CH_ACCDET2_MIN 0
75#define ADC_CH_ACCDET2_MAX 2500
76#define ADC_CH_VBAT_MIN 2300
77#define ADC_CH_VBAT_MAX 4800
78#define ADC_CH_CHG_I_MIN 0
79#define ADC_CH_CHG_I_MAX 1500
80#define ADC_CH_BKBAT_MIN 0
81#define ADC_CH_BKBAT_MAX 3200
82
83/* This is used to not lose precision when dividing to get gain and offset */
84#define CALIB_SCALE 1000
85
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LJ
86/* Time in ms before disabling regulator */
87#define GPADC_AUDOSUSPEND_DELAY 1
88
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89#define CONVERSION_TIME 500 /* ms */
90
586f3318
JP
91enum cal_channels {
92 ADC_INPUT_VMAIN = 0,
93 ADC_INPUT_BTEMP,
94 ADC_INPUT_VBAT,
95 NBR_CAL_INPUTS,
96};
97
98/**
99 * struct adc_cal_data - Table for storing gain and offset for the calibrated
100 * ADC channels
101 * @gain: Gain of the ADC channel
102 * @offset: Offset of the ADC channel
103 */
104struct adc_cal_data {
105 u64 gain;
106 u64 offset;
107};
108
dae2db30 109/**
586f3318 110 * struct ab8500_gpadc - AB8500 GPADC device information
dae2db30 111 * @dev: pointer to the struct device
6321992c
DW
112 * @node: a list of AB8500 GPADCs, hence prepared for
113 reentrance
20bf4283 114 * @parent: pointer to the struct ab8500
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115 * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
116 * the completion of gpadc conversion
117 * @ab8500_gpadc_lock: structure of type mutex
118 * @regu: pointer to the struct regulator
119 * @irq: interrupt number that is used by gpadc
586f3318 120 * @cal_data array of ADC calibration data structs
dae2db30 121 */
6321992c 122struct ab8500_gpadc {
dae2db30 123 struct device *dev;
6321992c 124 struct list_head node;
20bf4283 125 struct ab8500 *parent;
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126 struct completion ab8500_gpadc_complete;
127 struct mutex ab8500_gpadc_lock;
128 struct regulator *regu;
129 int irq;
586f3318 130 struct adc_cal_data cal_data[NBR_CAL_INPUTS];
6321992c
DW
131};
132
133static LIST_HEAD(ab8500_gpadc_list);
134
135/**
136 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
137 * (i.e. the first GPADC in the instance list)
138 */
139struct ab8500_gpadc *ab8500_gpadc_get(char *name)
140{
141 struct ab8500_gpadc *gpadc;
142
143 list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
144 if (!strcmp(name, dev_name(gpadc->dev)))
145 return gpadc;
146 }
147
148 return ERR_PTR(-ENOENT);
149}
150EXPORT_SYMBOL(ab8500_gpadc_get);
dae2db30 151
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152/**
153 * ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
154 */
155int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
586f3318
JP
156 int ad_value)
157{
158 int res;
159
bd4a40b5 160 switch (channel) {
586f3318
JP
161 case MAIN_CHARGER_V:
162 /* For some reason we don't have calibrated data */
163 if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
164 res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
165 ADC_CH_CHG_V_MIN) * ad_value /
166 ADC_RESOLUTION;
167 break;
168 }
169 /* Here we can use the calibrated data */
170 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
171 gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
172 break;
173
174 case BAT_CTRL:
175 case BTEMP_BALL:
176 case ACC_DETECT1:
177 case ADC_AUX1:
178 case ADC_AUX2:
179 /* For some reason we don't have calibrated data */
180 if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
181 res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
182 ADC_CH_BTEMP_MIN) * ad_value /
183 ADC_RESOLUTION;
184 break;
185 }
186 /* Here we can use the calibrated data */
187 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
188 gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
189 break;
190
191 case MAIN_BAT_V:
192 /* For some reason we don't have calibrated data */
193 if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
194 res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
195 ADC_CH_VBAT_MIN) * ad_value /
196 ADC_RESOLUTION;
197 break;
198 }
199 /* Here we can use the calibrated data */
200 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
201 gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
202 break;
203
204 case DIE_TEMP:
205 res = ADC_CH_DIETEMP_MIN +
206 (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
207 ADC_RESOLUTION;
208 break;
209
210 case ACC_DETECT2:
211 res = ADC_CH_ACCDET2_MIN +
212 (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
213 ADC_RESOLUTION;
214 break;
215
216 case VBUS_V:
217 res = ADC_CH_CHG_V_MIN +
218 (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
219 ADC_RESOLUTION;
220 break;
221
222 case MAIN_CHARGER_C:
223 case USB_CHARGER_C:
224 res = ADC_CH_CHG_I_MIN +
225 (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
226 ADC_RESOLUTION;
227 break;
228
229 case BK_BAT_V:
230 res = ADC_CH_BKBAT_MIN +
231 (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
232 ADC_RESOLUTION;
233 break;
234
235 default:
236 dev_err(gpadc->dev,
237 "unknown channel, not possible to convert\n");
238 res = -EINVAL;
239 break;
240
241 }
242 return res;
243}
bd4a40b5 244EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
586f3318 245
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246/**
247 * ab8500_gpadc_convert() - gpadc conversion
bd4a40b5 248 * @channel: analog channel to be converted to digital data
dae2db30
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249 *
250 * This function converts the selected analog i/p to digital
586f3318 251 * data.
dae2db30 252 */
bd4a40b5
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253int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel)
254{
255 int ad_value;
256 int voltage;
257
258 ad_value = ab8500_gpadc_read_raw(gpadc, channel);
259 if (ad_value < 0) {
260 dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n", channel);
261 return ad_value;
262 }
263
264 voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
265
266 if (voltage < 0)
267 dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
268 " %d AD: 0x%x\n", channel, ad_value);
269
270 return voltage;
271}
272EXPORT_SYMBOL(ab8500_gpadc_convert);
273
274/**
275 * ab8500_gpadc_read_raw() - gpadc read
276 * @channel: analog channel to be read
277 *
278 * This function obtains the raw ADC value, this then needs
279 * to be converted by calling ab8500_gpadc_ad_to_voltage()
280 */
281int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel)
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282{
283 int ret;
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284 int looplimit = 0;
285 u8 val, low_data, high_data;
286
6321992c 287 if (!gpadc)
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288 return -ENODEV;
289
6321992c 290 mutex_lock(&gpadc->ab8500_gpadc_lock);
5f8aaef4 291
dae2db30 292 /* Enable VTVout LDO this is required for GPADC */
5f8aaef4 293 pm_runtime_get_sync(gpadc->dev);
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AM
294
295 /* Check if ADC is not busy, lock and proceed */
296 do {
6321992c
DW
297 ret = abx500_get_register_interruptible(gpadc->dev,
298 AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
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299 if (ret < 0)
300 goto out;
301 if (!(val & GPADC_BUSY))
302 break;
303 msleep(10);
304 } while (++looplimit < 10);
305 if (looplimit >= 10 && (val & GPADC_BUSY)) {
6321992c 306 dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
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307 ret = -EINVAL;
308 goto out;
309 }
310
311 /* Enable GPADC */
6321992c
DW
312 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
313 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
dae2db30 314 if (ret < 0) {
6321992c 315 dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
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AM
316 goto out;
317 }
c9c9513f 318
bd4a40b5 319 /* Select the channel source and set average samples to 16 */
6321992c 320 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
bd4a40b5 321 AB8500_GPADC_CTRL2_REG, (channel | SW_AVG_16));
dae2db30 322 if (ret < 0) {
6321992c 323 dev_err(gpadc->dev,
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AM
324 "gpadc_conversion: set avg samples failed\n");
325 goto out;
326 }
c9c9513f 327
4aad5a91
KK
328 /*
329 * Enable ADC, buffering, select rising edge and enable ADC path
c9c9513f
KK
330 * charging current sense if it needed, ABB 3.0 needs some special
331 * treatment too.
4aad5a91 332 */
bd4a40b5 333 switch (channel) {
4aad5a91
KK
334 case MAIN_CHARGER_C:
335 case USB_CHARGER_C:
336 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
337 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
338 EN_BUF | EN_ICHAR,
339 EN_BUF | EN_ICHAR);
340 break;
c9c9513f 341 case BTEMP_BALL:
20bf4283 342 if (!is_ab8500_2p0_or_earlier(gpadc->parent)) {
c9c9513f
KK
343 /* Turn on btemp pull-up on ABB 3.0 */
344 ret = abx500_mask_and_set_register_interruptible(
345 gpadc->dev,
346 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
ed139416
JP
347 EN_BUF | BTEMP_PULL_UP,
348 EN_BUF | BTEMP_PULL_UP);
c9c9513f
KK
349
350 /*
351 * Delay might be needed for ABB8500 cut 3.0, if not, remove
5a4432b9 352 * when hardware will be available
c9c9513f 353 */
d0b32fa1 354 usleep_range(1000, 1000);
c9c9513f
KK
355 break;
356 }
357 /* Intentional fallthrough */
4aad5a91
KK
358 default:
359 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
360 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
361 break;
362 }
dae2db30 363 if (ret < 0) {
6321992c 364 dev_err(gpadc->dev,
dae2db30
AM
365 "gpadc_conversion: select falling edge failed\n");
366 goto out;
367 }
c9c9513f 368
6321992c
DW
369 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
370 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
dae2db30 371 if (ret < 0) {
6321992c 372 dev_err(gpadc->dev,
dae2db30
AM
373 "gpadc_conversion: start s/w conversion failed\n");
374 goto out;
375 }
376 /* wait for completion of conversion */
f825ebe5
LJ
377 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete,
378 msecs_to_jiffies(CONVERSION_TIME))) {
6321992c 379 dev_err(gpadc->dev,
25985edc 380 "timeout: didn't receive GPADC conversion interrupt\n");
dae2db30
AM
381 ret = -EINVAL;
382 goto out;
383 }
384
385 /* Read the converted RAW data */
6321992c 386 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30
AM
387 AB8500_GPADC_MANDATAL_REG, &low_data);
388 if (ret < 0) {
6321992c 389 dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
dae2db30
AM
390 goto out;
391 }
392
6321992c 393 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30
AM
394 AB8500_GPADC_MANDATAH_REG, &high_data);
395 if (ret < 0) {
6321992c
DW
396 dev_err(gpadc->dev,
397 "gpadc_conversion: read high data failed\n");
dae2db30
AM
398 goto out;
399 }
400
dae2db30 401 /* Disable GPADC */
6321992c 402 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30
AM
403 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
404 if (ret < 0) {
6321992c 405 dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
dae2db30
AM
406 goto out;
407 }
5f8aaef4
LJ
408
409 pm_runtime_mark_last_busy(gpadc->dev);
410 pm_runtime_put_autosuspend(gpadc->dev);
411
6321992c 412 mutex_unlock(&gpadc->ab8500_gpadc_lock);
bd4a40b5
KK
413
414 return (high_data << 8) | low_data;
dae2db30
AM
415
416out:
417 /*
418 * It has shown to be needed to turn off the GPADC if an error occurs,
419 * otherwise we might have problem when waiting for the busy bit in the
420 * GPADC status register to go low. In V1.1 there wait_for_completion
421 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
422 */
6321992c 423 (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30 424 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
5f8aaef4
LJ
425
426 pm_runtime_put(gpadc->dev);
427
6321992c
DW
428 mutex_unlock(&gpadc->ab8500_gpadc_lock);
429 dev_err(gpadc->dev,
bd4a40b5 430 "gpadc_conversion: Failed to AD convert channel %d\n", channel);
dae2db30
AM
431 return ret;
432}
bd4a40b5 433EXPORT_SYMBOL(ab8500_gpadc_read_raw);
dae2db30
AM
434
435/**
436 * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
437 * @irq: irq number
438 * @data: pointer to the data passed during request irq
439 *
440 * This is a interrupt service routine for s/w gpadc conversion completion.
441 * Notifies the gpadc completion is completed and the converted raw value
442 * can be read from the registers.
443 * Returns IRQ status(IRQ_HANDLED)
444 */
6321992c 445static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
dae2db30 446{
6321992c 447 struct ab8500_gpadc *gpadc = _gpadc;
dae2db30
AM
448
449 complete(&gpadc->ab8500_gpadc_complete);
450
451 return IRQ_HANDLED;
452}
453
586f3318
JP
454static int otp_cal_regs[] = {
455 AB8500_GPADC_CAL_1,
456 AB8500_GPADC_CAL_2,
457 AB8500_GPADC_CAL_3,
458 AB8500_GPADC_CAL_4,
459 AB8500_GPADC_CAL_5,
460 AB8500_GPADC_CAL_6,
461 AB8500_GPADC_CAL_7,
462};
463
464static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
465{
466 int i;
467 int ret[ARRAY_SIZE(otp_cal_regs)];
468 u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
469
470 int vmain_high, vmain_low;
471 int btemp_high, btemp_low;
472 int vbat_high, vbat_low;
473
474 /* First we read all OTP registers and store the error code */
475 for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
476 ret[i] = abx500_get_register_interruptible(gpadc->dev,
477 AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
478 if (ret[i] < 0)
479 dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
480 __func__, otp_cal_regs[i]);
481 }
482
483 /*
484 * The ADC calibration data is stored in OTP registers.
485 * The layout of the calibration data is outlined below and a more
486 * detailed description can be found in UM0836
487 *
488 * vm_h/l = vmain_high/low
489 * bt_h/l = btemp_high/low
490 * vb_h/l = vbat_high/low
491 *
492 * Data bits:
493 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
494 * |.......|.......|.......|.......|.......|.......|.......|.......
495 * | | vm_h9 | vm_h8
496 * |.......|.......|.......|.......|.......|.......|.......|.......
497 * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
498 * |.......|.......|.......|.......|.......|.......|.......|.......
499 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
500 * |.......|.......|.......|.......|.......|.......|.......|.......
501 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
502 * |.......|.......|.......|.......|.......|.......|.......|.......
503 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
504 * |.......|.......|.......|.......|.......|.......|.......|.......
505 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
506 * |.......|.......|.......|.......|.......|.......|.......|.......
507 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
508 * |.......|.......|.......|.......|.......|.......|.......|.......
509 *
510 *
511 * Ideal output ADC codes corresponding to injected input voltages
512 * during manufacturing is:
513 *
514 * vmain_high: Vin = 19500mV / ADC ideal code = 997
515 * vmain_low: Vin = 315mV / ADC ideal code = 16
516 * btemp_high: Vin = 1300mV / ADC ideal code = 985
517 * btemp_low: Vin = 21mV / ADC ideal code = 16
518 * vbat_high: Vin = 4700mV / ADC ideal code = 982
519 * vbat_low: Vin = 2380mV / ADC ideal code = 33
520 */
521
522 /* Calculate gain and offset for VMAIN if all reads succeeded */
523 if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
524 vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
525 ((gpadc_cal[1] & 0x3F) << 2) |
526 ((gpadc_cal[2] & 0xC0) >> 6));
527
528 vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
529
530 gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
531 (19500 - 315) / (vmain_high - vmain_low);
532
533 gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
534 (CALIB_SCALE * (19500 - 315) /
535 (vmain_high - vmain_low)) * vmain_high;
536 } else {
537 gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
538 }
539
540 /* Calculate gain and offset for BTEMP if all reads succeeded */
541 if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
542 btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
543 (gpadc_cal[3] << 1) |
544 ((gpadc_cal[4] & 0x80) >> 7));
545
546 btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
547
548 gpadc->cal_data[ADC_INPUT_BTEMP].gain =
549 CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
550
551 gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
552 (CALIB_SCALE * (1300 - 21) /
553 (btemp_high - btemp_low)) * btemp_high;
554 } else {
555 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
556 }
557
558 /* Calculate gain and offset for VBAT if all reads succeeded */
559 if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
560 vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
561 vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
562
563 gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
564 (4700 - 2380) / (vbat_high - vbat_low);
565
566 gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
567 (CALIB_SCALE * (4700 - 2380) /
568 (vbat_high - vbat_low)) * vbat_high;
569 } else {
570 gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
571 }
572
573 dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
574 gpadc->cal_data[ADC_INPUT_VMAIN].gain,
575 gpadc->cal_data[ADC_INPUT_VMAIN].offset);
576
577 dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
578 gpadc->cal_data[ADC_INPUT_BTEMP].gain,
579 gpadc->cal_data[ADC_INPUT_BTEMP].offset);
580
581 dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
582 gpadc->cal_data[ADC_INPUT_VBAT].gain,
583 gpadc->cal_data[ADC_INPUT_VBAT].offset);
584}
585
5f8aaef4
LJ
586static int ab8500_gpadc_runtime_suspend(struct device *dev)
587{
588 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
589
590 regulator_disable(gpadc->regu);
591 return 0;
592}
593
594static int ab8500_gpadc_runtime_resume(struct device *dev)
595{
596 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
597
598 regulator_enable(gpadc->regu);
599 return 0;
600}
601
602static int ab8500_gpadc_runtime_idle(struct device *dev)
603{
5f8aaef4
LJ
604 pm_runtime_suspend(dev);
605 return 0;
606}
607
774c50ab
DW
608static int ab8500_gpadc_suspend(struct device *dev)
609{
610 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
611
612 mutex_lock(&gpadc->ab8500_gpadc_lock);
613
614 pm_runtime_get_sync(dev);
615
616 regulator_disable(gpadc->regu);
617 return 0;
618}
619
620static int ab8500_gpadc_resume(struct device *dev)
621{
622 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
623
624 regulator_enable(gpadc->regu);
625
626 pm_runtime_mark_last_busy(gpadc->dev);
627 pm_runtime_put_autosuspend(gpadc->dev);
628
629 mutex_unlock(&gpadc->ab8500_gpadc_lock);
630 return 0;
631}
632
f791be49 633static int ab8500_gpadc_probe(struct platform_device *pdev)
dae2db30
AM
634{
635 int ret = 0;
636 struct ab8500_gpadc *gpadc;
637
638 gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
639 if (!gpadc) {
640 dev_err(&pdev->dev, "Error: No memory\n");
641 return -ENOMEM;
642 }
643
dae2db30
AM
644 gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
645 if (gpadc->irq < 0) {
6dff11e5 646 dev_err(&pdev->dev, "failed to get platform irq-%d\n",
6321992c 647 gpadc->irq);
dae2db30
AM
648 ret = gpadc->irq;
649 goto fail;
650 }
651
652 gpadc->dev = &pdev->dev;
20bf4283 653 gpadc->parent = dev_get_drvdata(pdev->dev.parent);
6321992c 654 mutex_init(&gpadc->ab8500_gpadc_lock);
dae2db30
AM
655
656 /* Initialize completion used to notify completion of conversion */
657 init_completion(&gpadc->ab8500_gpadc_complete);
658
659 /* Register interrupt - SwAdcComplete */
660 ret = request_threaded_irq(gpadc->irq, NULL,
661 ab8500_bm_gpswadcconvend_handler,
6e19e837
LJ
662 IRQF_ONESHOT | IRQF_NO_SUSPEND | IRQF_SHARED,
663 "ab8500-gpadc", gpadc);
dae2db30
AM
664 if (ret < 0) {
665 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
666 gpadc->irq);
667 goto fail;
668 }
669
670 /* VTVout LDO used to power up ab8500-GPADC */
671 gpadc->regu = regulator_get(&pdev->dev, "vddadc");
672 if (IS_ERR(gpadc->regu)) {
673 ret = PTR_ERR(gpadc->regu);
674 dev_err(gpadc->dev, "failed to get vtvout LDO\n");
633e0fa5 675 goto fail_irq;
dae2db30 676 }
5f8aaef4
LJ
677
678 platform_set_drvdata(pdev, gpadc);
679
680 regulator_enable(gpadc->regu);
681
682 pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY);
683 pm_runtime_use_autosuspend(gpadc->dev);
684 pm_runtime_set_active(gpadc->dev);
685 pm_runtime_enable(gpadc->dev);
686
586f3318 687 ab8500_gpadc_read_calibration_data(gpadc);
6321992c 688 list_add_tail(&gpadc->node, &ab8500_gpadc_list);
dae2db30
AM
689 dev_dbg(gpadc->dev, "probe success\n");
690 return 0;
633e0fa5
DW
691fail_irq:
692 free_irq(gpadc->irq, gpadc);
dae2db30
AM
693fail:
694 kfree(gpadc);
695 gpadc = NULL;
696 return ret;
697}
698
4740f73f 699static int ab8500_gpadc_remove(struct platform_device *pdev)
dae2db30
AM
700{
701 struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
702
6321992c
DW
703 /* remove this gpadc entry from the list */
704 list_del(&gpadc->node);
dae2db30 705 /* remove interrupt - completion of Sw ADC conversion */
6321992c 706 free_irq(gpadc->irq, gpadc);
5f8aaef4
LJ
707
708 pm_runtime_get_sync(gpadc->dev);
709 pm_runtime_disable(gpadc->dev);
710
711 regulator_disable(gpadc->regu);
712
713 pm_runtime_set_suspended(gpadc->dev);
714
715 pm_runtime_put_noidle(gpadc->dev);
716
dae2db30
AM
717 kfree(gpadc);
718 gpadc = NULL;
719 return 0;
720}
721
5f8aaef4
LJ
722static const struct dev_pm_ops ab8500_gpadc_pm_ops = {
723 SET_RUNTIME_PM_OPS(ab8500_gpadc_runtime_suspend,
724 ab8500_gpadc_runtime_resume,
725 ab8500_gpadc_runtime_idle)
774c50ab
DW
726 SET_SYSTEM_SLEEP_PM_OPS(ab8500_gpadc_suspend,
727 ab8500_gpadc_resume)
728
5f8aaef4
LJ
729};
730
dae2db30
AM
731static struct platform_driver ab8500_gpadc_driver = {
732 .probe = ab8500_gpadc_probe,
84449216 733 .remove = ab8500_gpadc_remove,
dae2db30
AM
734 .driver = {
735 .name = "ab8500-gpadc",
736 .owner = THIS_MODULE,
5f8aaef4 737 .pm = &ab8500_gpadc_pm_ops,
dae2db30
AM
738 },
739};
740
741static int __init ab8500_gpadc_init(void)
742{
743 return platform_driver_register(&ab8500_gpadc_driver);
744}
745
746static void __exit ab8500_gpadc_exit(void)
747{
748 platform_driver_unregister(&ab8500_gpadc_driver);
749}
750
751subsys_initcall_sync(ab8500_gpadc_init);
752module_exit(ab8500_gpadc_exit);
753
754MODULE_LICENSE("GPL v2");
586f3318 755MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
dae2db30
AM
756MODULE_ALIAS("platform:ab8500_gpadc");
757MODULE_DESCRIPTION("AB8500 GPADC driver");
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