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mfd: arizona: Map MICVDD from extcon device to the Arizona core
[deliverable/linux.git] / drivers / mfd / arizona-core.c
CommitLineData
3cc72986
MB		 1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
3cc72986
MB		 15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
d781009c
MB		 19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
3cc72986
MB		 22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
5927467d 25#include <linux/regulator/machine.h>
3cc72986
MB		 26#include <linux/slab.h>
27
28#include <linux/mfd/arizona/core.h>
29#include <linux/mfd/arizona/registers.h>
30
31#include "arizona.h"
32
33static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
3cc72986
MB		 36};
37
38int arizona_clk32k_enable(struct arizona *arizona)
39{
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
247fa192
MB		 46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
3cc72986
MB		 55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
247fa192 58 }
3cc72986 59
247fa192 60out:
3cc72986
MB		 61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67}
68EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70int arizona_clk32k_disable(struct arizona *arizona)
71{
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
247fa192 80 if (arizona->clk32k_ref == 0) {
3cc72986
MB		 81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
247fa192
MB		 84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
3cc72986
MB		 91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94}
95EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97static irqreturn_t arizona_clkgen_err(int irq, void *data)
98{
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104}
105
106static irqreturn_t arizona_underclocked(int irq, void *data)
107{
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
3cc72986
MB		 120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
3ebef34d
CK		 123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986
MB		 125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC2 underclocked\n");
128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC1 underclocked\n");
130 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "FX underclocked\n");
132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ASRC underclocked\n");
134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "DAC underclocked\n");
136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ADC underclocked\n");
138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 139 dev_err(arizona->dev, "Mixer dropped sample\n");
3cc72986
MB		 140
141 return IRQ_HANDLED;
142}
143
144static irqreturn_t arizona_overclocked(int irq, void *data)
145{
146 struct arizona *arizona = data;
147 unsigned int val[2];
148 int ret;
149
150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 &val[0], 2);
152 if (ret != 0) {
153 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 ret);
155 return IRQ_NONE;
156 }
157
158 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
159 dev_err(arizona->dev, "PWM overclocked\n");
160 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "FX core overclocked\n");
162 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "DAC SYS overclocked\n");
164 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC WARP overclocked\n");
166 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "ADC overclocked\n");
168 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "Mixer overclocked\n");
170 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "AIF3 overclocked\n");
172 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF2 overclocked\n");
174 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF1 overclocked\n");
176 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "Pad control overclocked\n");
178
179 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
180 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
181 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus async overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus sync overclocked\n");
185 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "ASRC async system overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
189 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC sync system overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
193 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "DSP1 overclocked\n");
195 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "ISRC2 overclocked\n");
197 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC1 overclocked\n");
199
200 return IRQ_HANDLED;
201}
202
9d53dfdc
CK		 203static int arizona_poll_reg(struct arizona *arizona,
204 int timeout, unsigned int reg,
205 unsigned int mask, unsigned int target)
3cc72986 206{
9d53dfdc 207 unsigned int val = 0;
3cc72986
MB		 208 int ret, i;
209
9d53dfdc
CK		 210 for (i = 0; i < timeout; i++) {
211 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 212 if (ret != 0) {
9d53dfdc
CK		 213 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
214 reg, ret);
cfe775ce 215 continue;
3cc72986
MB		 216 }
217
9d53dfdc
CK		 218 if ((val & mask) == target)
219 return 0;
220
221 msleep(1);
3cc72986
MB		 222 }
223
9d53dfdc
CK		 224 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
225 return -ETIMEDOUT;
226}
227
228static int arizona_wait_for_boot(struct arizona *arizona)
229{
230 int ret;
231
232 /*
233 * We can't use an interrupt as we need to runtime resume to do so,
234 * we won't race with the interrupt handler as it'll be blocked on
235 * runtime resume.
236 */
237 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
238 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
239
240 if (!ret)
3cc72986
MB		 241 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
242 ARIZONA_BOOT_DONE_STS);
3cc72986
MB		 243
244 pm_runtime_mark_last_busy(arizona->dev);
245
9d53dfdc 246 return ret;
3cc72986
MB		 247}
248
e80436bb
CK		 249static int arizona_apply_hardware_patch(struct arizona* arizona)
250{
251 unsigned int fll, sysclk;
252 int ret, err;
253
e80436bb
CK		 254 /* Cache existing FLL and SYSCLK settings */
255 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
256 if (ret != 0) {
257 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
258 ret);
259 return ret;
260 }
261 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
262 if (ret != 0) {
263 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
264 ret);
265 return ret;
266 }
267
268 /* Start up SYSCLK using the FLL in free running mode */
269 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
270 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
271 if (ret != 0) {
272 dev_err(arizona->dev,
273 "Failed to start FLL in freerunning mode: %d\n",
274 ret);
275 return ret;
276 }
277 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
278 ARIZONA_FLL1_CLOCK_OK_STS,
279 ARIZONA_FLL1_CLOCK_OK_STS);
280 if (ret != 0) {
281 ret = -ETIMEDOUT;
282 goto err_fll;
283 }
284
285 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
286 if (ret != 0) {
287 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
288 goto err_fll;
289 }
290
291 /* Start the write sequencer and wait for it to finish */
292 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
293 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
294 if (ret != 0) {
295 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
296 ret);
297 goto err_sysclk;
298 }
299 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
300 ARIZONA_WSEQ_BUSY, 0);
301 if (ret != 0) {
302 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
303 ARIZONA_WSEQ_ABORT);
304 ret = -ETIMEDOUT;
305 }
306
307err_sysclk:
308 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
309 if (err != 0) {
310 dev_err(arizona->dev,
311 "Failed to re-apply old SYSCLK settings: %d\n",
312 err);
313 }
314
315err_fll:
316 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
317 if (err != 0) {
318 dev_err(arizona->dev,
319 "Failed to re-apply old FLL settings: %d\n",
320 err);
321 }
322
e80436bb
CK		 323 if (ret != 0)
324 return ret;
325 else
326 return err;
327}
328
3cc72986
MB		 329#ifdef CONFIG_PM_RUNTIME
330static int arizona_runtime_resume(struct device *dev)
331{
332 struct arizona *arizona = dev_get_drvdata(dev);
333 int ret;
334
508c8299
MB		 335 dev_dbg(arizona->dev, "Leaving AoD mode\n");
336
59db9691
MB		 337 ret = regulator_enable(arizona->dcvdd);
338 if (ret != 0) {
339 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
340 return ret;
341 }
3cc72986
MB		 342
343 regcache_cache_only(arizona->regmap, false);
344
4c9bb8bc
CK		 345 switch (arizona->type) {
346 case WM5102:
5927467d
MB		 347 if (arizona->external_dcvdd) {
348 ret = regmap_update_bits(arizona->regmap,
349 ARIZONA_ISOLATION_CONTROL,
350 ARIZONA_ISOLATE_DCVDD1, 0);
351 if (ret != 0) {
352 dev_err(arizona->dev,
353 "Failed to connect DCVDD: %d\n", ret);
354 goto err;
355 }
356 }
357
4c9bb8bc
CK		 358 ret = wm5102_patch(arizona);
359 if (ret != 0) {
360 dev_err(arizona->dev, "Failed to apply patch: %d\n",
361 ret);
362 goto err;
363 }
e80436bb
CK		 364
365 ret = arizona_apply_hardware_patch(arizona);
366 if (ret != 0) {
367 dev_err(arizona->dev,
368 "Failed to apply hardware patch: %d\n",
369 ret);
370 goto err;
371 }
372 break;
373 default:
12bb68ed
CK		 374 ret = arizona_wait_for_boot(arizona);
375 if (ret != 0) {
376 goto err;
377 }
378
5927467d
MB		 379 if (arizona->external_dcvdd) {
380 ret = regmap_update_bits(arizona->regmap,
381 ARIZONA_ISOLATION_CONTROL,
382 ARIZONA_ISOLATE_DCVDD1, 0);
383 if (ret != 0) {
384 dev_err(arizona->dev,
385 "Failed to connect DCVDD: %d\n", ret);
386 goto err;
387 }
388 }
e80436bb 389 break;
4c9bb8bc
CK		 390 }
391
d9d03496
CK		 392 switch (arizona->type) {
393 case WM5102:
394 ret = wm5102_patch(arizona);
395 if (ret != 0) {
396 dev_err(arizona->dev, "Failed to apply patch: %d\n",
397 ret);
398 goto err;
399 }
400 default:
401 break;
402 }
403
9270bdf5
MB		 404 ret = regcache_sync(arizona->regmap);
405 if (ret != 0) {
406 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 407 goto err;
9270bdf5 408 }
3cc72986
MB		 409
410 return 0;
4816bd1c
MB		 411
412err:
413 regcache_cache_only(arizona->regmap, true);
414 regulator_disable(arizona->dcvdd);
415 return ret;
3cc72986
MB		 416}
417
418static int arizona_runtime_suspend(struct device *dev)
419{
420 struct arizona *arizona = dev_get_drvdata(dev);
5927467d 421 int ret;
3cc72986 422
508c8299
MB		 423 dev_dbg(arizona->dev, "Entering AoD mode\n");
424
5927467d
MB		 425 if (arizona->external_dcvdd) {
426 ret = regmap_update_bits(arizona->regmap,
427 ARIZONA_ISOLATION_CONTROL,
428 ARIZONA_ISOLATE_DCVDD1,
429 ARIZONA_ISOLATE_DCVDD1);
430 if (ret != 0) {
431 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
432 ret);
433 return ret;
434 }
435 }
436
59db9691
MB		 437 regcache_cache_only(arizona->regmap, true);
438 regcache_mark_dirty(arizona->regmap);
e293e847 439 regulator_disable(arizona->dcvdd);
3cc72986
MB		 440
441 return 0;
442}
443#endif
444
dc781d0e 445#ifdef CONFIG_PM_SLEEP
67c99296
MB		 446static int arizona_suspend(struct device *dev)
447{
448 struct arizona *arizona = dev_get_drvdata(dev);
449
450 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
451 disable_irq(arizona->irq);
452
453 return 0;
454}
455
456static int arizona_suspend_late(struct device *dev)
457{
458 struct arizona *arizona = dev_get_drvdata(dev);
459
460 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
461 enable_irq(arizona->irq);
462
463 return 0;
464}
465
dc781d0e
MB		 466static int arizona_resume_noirq(struct device *dev)
467{
468 struct arizona *arizona = dev_get_drvdata(dev);
469
470 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
471 disable_irq(arizona->irq);
472
473 return 0;
474}
475
476static int arizona_resume(struct device *dev)
477{
478 struct arizona *arizona = dev_get_drvdata(dev);
479
480 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
481 enable_irq(arizona->irq);
482
483 return 0;
484}
485#endif
486
3cc72986
MB		 487const struct dev_pm_ops arizona_pm_ops = {
488 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
489 arizona_runtime_resume,
490 NULL)
67c99296 491 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 492#ifdef CONFIG_PM_SLEEP
67c99296 493 .suspend_late = arizona_suspend_late,
dc781d0e
MB		 494 .resume_noirq = arizona_resume_noirq,
495#endif
3cc72986
MB		 496};
497EXPORT_SYMBOL_GPL(arizona_pm_ops);
498
d781009c 499#ifdef CONFIG_OF
942786e6 500unsigned long arizona_of_get_type(struct device *dev)
d781009c
MB		 501{
502 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
503
504 if (id)
942786e6 505 return (unsigned long)id->data;
d781009c
MB		 506 else
507 return 0;
508}
509EXPORT_SYMBOL_GPL(arizona_of_get_type);
510
e4fcb1d6
CK		 511int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
512 bool mandatory)
513{
514 int gpio;
515
516 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
517 if (gpio < 0) {
518 if (mandatory)
519 dev_err(arizona->dev,
520 "Mandatory DT gpio %s missing/malformed: %d\n",
521 prop, gpio);
522
523 gpio = 0;
524 }
525
526 return gpio;
527}
528EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
529
d781009c
MB		 530static int arizona_of_get_core_pdata(struct arizona *arizona)
531{
e4fcb1d6 532 struct arizona_pdata *pdata = &arizona->pdata;
d781009c
MB		 533 int ret, i;
534
e4fcb1d6 535 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
d781009c
MB		 536
537 ret = of_property_read_u32_array(arizona->dev->of_node,
538 "wlf,gpio-defaults",
539 arizona->pdata.gpio_defaults,
540 ARRAY_SIZE(arizona->pdata.gpio_defaults));
541 if (ret >= 0) {
542 /*
543 * All values are literal except out of range values
544 * which are chip default, translate into platform
545 * data which uses 0 as chip default and out of range
546 * as zero.
547 */
548 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
549 if (arizona->pdata.gpio_defaults[i] > 0xffff)
550 arizona->pdata.gpio_defaults[i] = 0;
91c73935 551 else if (arizona->pdata.gpio_defaults[i] == 0)
d781009c
MB		 552 arizona->pdata.gpio_defaults[i] = 0x10000;
553 }
554 } else {
555 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
556 ret);
557 }
558
559 return 0;
560}
561
562const struct of_device_id arizona_of_match[] = {
563 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
564 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
dc7d4863 565 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
d781009c
MB		 566 {},
567};
568EXPORT_SYMBOL_GPL(arizona_of_match);
569#else
570static inline int arizona_of_get_core_pdata(struct arizona *arizona)
571{
572 return 0;
573}
574#endif
575
5ac98553 576static const struct mfd_cell early_devs[] = {
3cc72986
MB		 577 { .name = "arizona-ldo1" },
578};
579
32dadef2 580static const char *wm5102_supplies[] = {
5fc6c396 581 "MICVDD",
32dadef2
CK		 582 "DBVDD2",
583 "DBVDD3",
584 "CPVDD",
585 "SPKVDDL",
586 "SPKVDDR",
587};
588
5ac98553 589static const struct mfd_cell wm5102_devs[] = {
d7768111 590 { .name = "arizona-micsupp" },
5fc6c396
CK		 591 {
592 .name = "arizona-extcon",
593 .parent_supplies = wm5102_supplies,
594 .num_parent_supplies = 1, /* We only need MICVDD */
595 },
3cc72986 596 { .name = "arizona-gpio" },
503b1cac 597 { .name = "arizona-haptics" },
3cc72986 598 { .name = "arizona-pwm" },
32dadef2
CK		 599 {
600 .name = "wm5102-codec",
601 .parent_supplies = wm5102_supplies,
602 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
603 },
3cc72986
MB		 604};
605
5ac98553 606static const struct mfd_cell wm5110_devs[] = {
d7768111 607 { .name = "arizona-micsupp" },
5fc6c396
CK		 608 {
609 .name = "arizona-extcon",
610 .parent_supplies = wm5102_supplies,
611 .num_parent_supplies = 1, /* We only need MICVDD */
612 },
e102befe 613 { .name = "arizona-gpio" },
503b1cac 614 { .name = "arizona-haptics" },
e102befe 615 { .name = "arizona-pwm" },
32dadef2
CK		 616 {
617 .name = "wm5110-codec",
618 .parent_supplies = wm5102_supplies,
619 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
620 },
621};
622
623static const char *wm8997_supplies[] = {
996c2d4f 624 "MICVDD",
32dadef2
CK		 625 "DBVDD2",
626 "CPVDD",
627 "SPKVDD",
e102befe
MB		 628};
629
5ac98553 630static const struct mfd_cell wm8997_devs[] = {
dc7d4863 631 { .name = "arizona-micsupp" },
5fc6c396
CK		 632 {
633 .name = "arizona-extcon",
634 .parent_supplies = wm8997_supplies,
635 .num_parent_supplies = 1, /* We only need MICVDD */
636 },
dc7d4863
CK		 637 { .name = "arizona-gpio" },
638 { .name = "arizona-haptics" },
639 { .name = "arizona-pwm" },
32dadef2
CK		 640 {
641 .name = "wm8997-codec",
642 .parent_supplies = wm8997_supplies,
643 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
644 },
dc7d4863
CK		 645};
646
f791be49 647int arizona_dev_init(struct arizona *arizona)
3cc72986
MB		 648{
649 struct device *dev = arizona->dev;
650 const char *type_name;
651 unsigned int reg, val;
62d62b59 652 int (*apply_patch)(struct arizona *) = NULL;
3cc72986
MB		 653 int ret, i;
654
655 dev_set_drvdata(arizona->dev, arizona);
656 mutex_init(&arizona->clk_lock);
657
658 if (dev_get_platdata(arizona->dev))
659 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
660 sizeof(arizona->pdata));
22d7dc8a
LJ		 661 else
662 arizona_of_get_core_pdata(arizona);
3cc72986
MB		 663
664 regcache_cache_only(arizona->regmap, true);
665
666 switch (arizona->type) {
667 case WM5102:
e102befe 668 case WM5110:
dc7d4863 669 case WM8997:
3cc72986
MB		 670 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
671 arizona->core_supplies[i].supply
672 = wm5102_core_supplies[i];
673 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
674 break;
675 default:
676 dev_err(arizona->dev, "Unknown device type %d\n",
677 arizona->type);
678 return -EINVAL;
679 }
680
4a8c475f
CK		 681 /* Mark DCVDD as external, LDO1 driver will clear if internal */
682 arizona->external_dcvdd = true;
683
3cc72986 684 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 685 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB		 686 if (ret != 0) {
687 dev_err(dev, "Failed to add early children: %d\n", ret);
688 return ret;
689 }
690
691 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
692 arizona->core_supplies);
693 if (ret != 0) {
694 dev_err(dev, "Failed to request core supplies: %d\n",
695 ret);
696 goto err_early;
697 }
698
0c2d0ffb
CK		 699 /**
700 * Don't use devres here because the only device we have to get
701 * against is the MFD device and DCVDD will likely be supplied by
702 * one of its children. Meaning that the regulator will be
703 * destroyed by the time devres calls regulator put.
704 */
e6021511 705 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB		 706 if (IS_ERR(arizona->dcvdd)) {
707 ret = PTR_ERR(arizona->dcvdd);
708 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
709 goto err_early;
710 }
711
87d3af4a
MB		 712 if (arizona->pdata.reset) {
713 /* Start out with /RESET low to put the chip into reset */
714 ret = gpio_request_one(arizona->pdata.reset,
715 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
716 "arizona /RESET");
717 if (ret != 0) {
718 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 719 goto err_dcvdd;
87d3af4a
MB		 720 }
721 }
722
3cc72986
MB		 723 ret = regulator_bulk_enable(arizona->num_core_supplies,
724 arizona->core_supplies);
725 if (ret != 0) {
726 dev_err(dev, "Failed to enable core supplies: %d\n",
727 ret);
e6021511 728 goto err_dcvdd;
3cc72986
MB		 729 }
730
59db9691
MB		 731 ret = regulator_enable(arizona->dcvdd);
732 if (ret != 0) {
733 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
734 goto err_enable;
735 }
736
c25feaa5 737 if (arizona->pdata.reset) {
3cc72986 738 gpio_set_value_cansleep(arizona->pdata.reset, 1);
c25feaa5
CK		 739 msleep(1);
740 }
3cc72986 741
3cc72986
MB		 742 regcache_cache_only(arizona->regmap, false);
743
ca76ceb8 744 /* Verify that this is a chip we know about */
3cc72986
MB		 745 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
746 if (ret != 0) {
747 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 748 goto err_reset;
3cc72986
MB		 749 }
750
3cc72986
MB		 751 switch (reg) {
752 case 0x5102:
e102befe 753 case 0x5110:
dc7d4863 754 case 0x8997:
e102befe 755 break;
3cc72986 756 default:
ca76ceb8 757 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 758 goto err_reset;
3cc72986
MB		 759 }
760
3cc72986
MB		 761 /* If we have a /RESET GPIO we'll already be reset */
762 if (!arizona->pdata.reset) {
46b9d13a
CK		 763 regcache_mark_dirty(arizona->regmap);
764
3cc72986
MB		 765 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
766 if (ret != 0) {
767 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 768 goto err_reset;
3cc72986 769 }
46b9d13a 770
c25feaa5
CK		 771 msleep(1);
772
46b9d13a
CK		 773 ret = regcache_sync(arizona->regmap);
774 if (ret != 0) {
775 dev_err(dev, "Failed to sync device: %d\n", ret);
776 goto err_reset;
777 }
3cc72986
MB		 778 }
779
ca76ceb8 780 /* Ensure device startup is complete */
d955cba8
CK		 781 switch (arizona->type) {
782 case WM5102:
783 ret = regmap_read(arizona->regmap, 0x19, &val);
784 if (ret != 0)
785 dev_err(dev,
786 "Failed to check write sequencer state: %d\n",
787 ret);
788 else if (val & 0x01)
789 break;
790 /* Fall through */
791 default:
792 ret = arizona_wait_for_boot(arizona);
793 if (ret != 0) {
794 dev_err(arizona->dev,
795 "Device failed initial boot: %d\n", ret);
796 goto err_reset;
797 }
798 break;
af65a361 799 }
3cc72986 800
ca76ceb8
MB		 801 /* Read the device ID information & do device specific stuff */
802 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
803 if (ret != 0) {
804 dev_err(dev, "Failed to read ID register: %d\n", ret);
805 goto err_reset;
806 }
807
808 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
809 &arizona->rev);
810 if (ret != 0) {
811 dev_err(dev, "Failed to read revision register: %d\n", ret);
812 goto err_reset;
813 }
814 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
815
816 switch (reg) {
817#ifdef CONFIG_MFD_WM5102
818 case 0x5102:
819 type_name = "WM5102";
820 if (arizona->type != WM5102) {
821 dev_err(arizona->dev, "WM5102 registered as %d\n",
822 arizona->type);
823 arizona->type = WM5102;
824 }
825 apply_patch = wm5102_patch;
826 arizona->rev &= 0x7;
827 break;
828#endif
829#ifdef CONFIG_MFD_WM5110
830 case 0x5110:
831 type_name = "WM5110";
832 if (arizona->type != WM5110) {
833 dev_err(arizona->dev, "WM5110 registered as %d\n",
834 arizona->type);
835 arizona->type = WM5110;
836 }
837 apply_patch = wm5110_patch;
838 break;
dc7d4863
CK		 839#endif
840#ifdef CONFIG_MFD_WM8997
841 case 0x8997:
842 type_name = "WM8997";
843 if (arizona->type != WM8997) {
844 dev_err(arizona->dev, "WM8997 registered as %d\n",
845 arizona->type);
846 arizona->type = WM8997;
847 }
848 apply_patch = wm8997_patch;
849 break;
ca76ceb8
MB		 850#endif
851 default:
852 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
853 goto err_reset;
854 }
855
856 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
857
62d62b59
MB		 858 if (apply_patch) {
859 ret = apply_patch(arizona);
860 if (ret != 0) {
861 dev_err(arizona->dev, "Failed to apply patch: %d\n",
862 ret);
863 goto err_reset;
864 }
e80436bb
CK		 865
866 switch (arizona->type) {
867 case WM5102:
868 ret = arizona_apply_hardware_patch(arizona);
869 if (ret != 0) {
870 dev_err(arizona->dev,
871 "Failed to apply hardware patch: %d\n",
872 ret);
873 goto err_reset;
874 }
875 break;
876 default:
877 break;
878 }
62d62b59
MB		 879 }
880
3cc72986
MB		 881 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
882 if (!arizona->pdata.gpio_defaults[i])
883 continue;
884
885 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
886 arizona->pdata.gpio_defaults[i]);
887 }
888
889 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
890 pm_runtime_use_autosuspend(arizona->dev);
891 pm_runtime_enable(arizona->dev);
892
893 /* Chip default */
894 if (!arizona->pdata.clk32k_src)
895 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
896
897 switch (arizona->pdata.clk32k_src) {
898 case ARIZONA_32KZ_MCLK1:
899 case ARIZONA_32KZ_MCLK2:
900 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
901 ARIZONA_CLK_32K_SRC_MASK,
902 arizona->pdata.clk32k_src - 1);
767c6dc0 903 arizona_clk32k_enable(arizona);
3cc72986
MB		 904 break;
905 case ARIZONA_32KZ_NONE:
906 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
907 ARIZONA_CLK_32K_SRC_MASK, 2);
908 break;
909 default:
910 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
911 arizona->pdata.clk32k_src);
912 ret = -EINVAL;
59db9691 913 goto err_reset;
3cc72986
MB		 914 }
915
3d91f828 916 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB		 917 if (!arizona->pdata.micbias[i].mV &&
918 !arizona->pdata.micbias[i].bypass)
3d91f828
MB		 919 continue;
920
544c7aad
MB		 921 /* Apply default for bypass mode */
922 if (!arizona->pdata.micbias[i].mV)
923 arizona->pdata.micbias[i].mV = 2800;
924
3d91f828 925 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 926
3d91f828
MB		 927 val <<= ARIZONA_MICB1_LVL_SHIFT;
928
929 if (arizona->pdata.micbias[i].ext_cap)
930 val |= ARIZONA_MICB1_EXT_CAP;
931
932 if (arizona->pdata.micbias[i].discharge)
933 val |= ARIZONA_MICB1_DISCH;
934
f773fc6d 935 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB		 936 val |= ARIZONA_MICB1_RATE;
937
544c7aad
MB		 938 if (arizona->pdata.micbias[i].bypass)
939 val |= ARIZONA_MICB1_BYPASS;
940
3d91f828
MB		 941 regmap_update_bits(arizona->regmap,
942 ARIZONA_MIC_BIAS_CTRL_1 + i,
943 ARIZONA_MICB1_LVL_MASK |
944 ARIZONA_MICB1_DISCH |
544c7aad 945 ARIZONA_MICB1_BYPASS |
3d91f828
MB		 946 ARIZONA_MICB1_RATE, val);
947 }
948
3cc72986
MB		 949 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
950 /* Default for both is 0 so noop with defaults */
951 val = arizona->pdata.dmic_ref[i]
952 << ARIZONA_IN1_DMIC_SUP_SHIFT;
953 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
954
955 regmap_update_bits(arizona->regmap,
956 ARIZONA_IN1L_CONTROL + (i * 8),
957 ARIZONA_IN1_DMIC_SUP_MASK |
958 ARIZONA_IN1_MODE_MASK, val);
959 }
960
961 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
962 /* Default is 0 so noop with defaults */
963 if (arizona->pdata.out_mono[i])
964 val = ARIZONA_OUT1_MONO;
965 else
966 val = 0;
967
968 regmap_update_bits(arizona->regmap,
969 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
970 ARIZONA_OUT1_MONO, val);
971 }
972
3cc72986
MB		 973 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
974 if (arizona->pdata.spk_mute[i])
975 regmap_update_bits(arizona->regmap,
2a51da04 976 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB		 977 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
978 ARIZONA_SPK1_MUTE_SEQ1_MASK,
979 arizona->pdata.spk_mute[i]);
980
981 if (arizona->pdata.spk_fmt[i])
982 regmap_update_bits(arizona->regmap,
2a51da04 983 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB		 984 ARIZONA_SPK1_FMT_MASK,
985 arizona->pdata.spk_fmt[i]);
986 }
987
988 /* Set up for interrupts */
989 ret = arizona_irq_init(arizona);
990 if (ret != 0)
59db9691 991 goto err_reset;
3cc72986
MB		 992
993 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
994 arizona_clkgen_err, arizona);
995 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
996 arizona_overclocked, arizona);
997 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
998 arizona_underclocked, arizona);
999
1000 switch (arizona->type) {
1001 case WM5102:
1002 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
0848c94f 1003 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
e102befe
MB		 1004 break;
1005 case WM5110:
1006 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
78566afd 1007 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
3cc72986 1008 break;
dc7d4863
CK		 1009 case WM8997:
1010 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1011 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1012 break;
3cc72986
MB		 1013 }
1014
1015 if (ret != 0) {
1016 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1017 goto err_irq;
1018 }
1019
59db9691
MB		 1020#ifdef CONFIG_PM_RUNTIME
1021 regulator_disable(arizona->dcvdd);
1022#endif
1023
3cc72986
MB		 1024 return 0;
1025
1026err_irq:
1027 arizona_irq_exit(arizona);
3cc72986
MB		 1028err_reset:
1029 if (arizona->pdata.reset) {
87d3af4a 1030 gpio_set_value_cansleep(arizona->pdata.reset, 0);
3cc72986
MB		 1031 gpio_free(arizona->pdata.reset);
1032 }
59db9691 1033 regulator_disable(arizona->dcvdd);
3cc72986 1034err_enable:
3a36a0db 1035 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1036 arizona->core_supplies);
e6021511
CK		 1037err_dcvdd:
1038 regulator_put(arizona->dcvdd);
3cc72986
MB		 1039err_early:
1040 mfd_remove_devices(dev);
1041 return ret;
1042}
1043EXPORT_SYMBOL_GPL(arizona_dev_init);
1044
4740f73f 1045int arizona_dev_exit(struct arizona *arizona)
3cc72986 1046{
b804020a
CK		 1047 pm_runtime_disable(arizona->dev);
1048
df6b3352 1049 regulator_disable(arizona->dcvdd);
e6021511 1050 regulator_put(arizona->dcvdd);
df6b3352 1051
3cc72986
MB		 1052 mfd_remove_devices(arizona->dev);
1053 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1054 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1055 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1056 arizona_irq_exit(arizona);
1d017b6b
MB		 1057 if (arizona->pdata.reset)
1058 gpio_set_value_cansleep(arizona->pdata.reset, 0);
df6b3352 1059
4420286e 1060 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1061 arizona->core_supplies);
3cc72986
MB		 1062 return 0;
1063}
1064EXPORT_SYMBOL_GPL(arizona_dev_exit);
Linux kernel - Deliverables
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