mfd: wm5110: Set DCVDD voltage to 1.175V before entering sleep mode
[deliverable/linux.git] / drivers / mfd / arizona-core.c
CommitLineData
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1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
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15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
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19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
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22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
5927467d 25#include <linux/regulator/machine.h>
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26#include <linux/slab.h>
27
28#include <linux/mfd/arizona/core.h>
29#include <linux/mfd/arizona/registers.h>
30
31#include "arizona.h"
32
33static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
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36};
37
38int arizona_clk32k_enable(struct arizona *arizona)
39{
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
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46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
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55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
247fa192 58 }
3cc72986 59
247fa192 60out:
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61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67}
68EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70int arizona_clk32k_disable(struct arizona *arizona)
71{
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
247fa192 80 if (arizona->clk32k_ref == 0) {
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81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
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84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
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91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94}
95EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97static irqreturn_t arizona_clkgen_err(int irq, void *data)
98{
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104}
105
106static irqreturn_t arizona_underclocked(int irq, void *data)
107{
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
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120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
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123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986 125 dev_err(arizona->dev, "AIF1 underclocked\n");
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126 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC3 underclocked\n");
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128 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC2 underclocked\n");
130 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "ISRC1 underclocked\n");
132 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "FX underclocked\n");
134 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "ASRC underclocked\n");
136 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "DAC underclocked\n");
138 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ADC underclocked\n");
140 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 141 dev_err(arizona->dev, "Mixer dropped sample\n");
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142
143 return IRQ_HANDLED;
144}
145
146static irqreturn_t arizona_overclocked(int irq, void *data)
147{
148 struct arizona *arizona = data;
149 unsigned int val[2];
150 int ret;
151
152 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 &val[0], 2);
154 if (ret != 0) {
155 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
156 ret);
157 return IRQ_NONE;
158 }
159
160 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "PWM overclocked\n");
162 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "FX core overclocked\n");
164 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC SYS overclocked\n");
166 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "DAC WARP overclocked\n");
168 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "ADC overclocked\n");
170 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "Mixer overclocked\n");
172 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF3 overclocked\n");
174 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF2 overclocked\n");
176 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "AIF1 overclocked\n");
178 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "Pad control overclocked\n");
180
181 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus async overclocked\n");
185 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "Slimbus sync overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async system overclocked\n");
189 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync system overclocked\n");
193 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
195 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "DSP1 overclocked\n");
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197 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC3 overclocked\n");
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199 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ISRC2 overclocked\n");
201 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ISRC1 overclocked\n");
203
204 return IRQ_HANDLED;
205}
206
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207static int arizona_poll_reg(struct arizona *arizona,
208 int timeout, unsigned int reg,
209 unsigned int mask, unsigned int target)
3cc72986 210{
9d53dfdc 211 unsigned int val = 0;
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212 int ret, i;
213
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214 for (i = 0; i < timeout; i++) {
215 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 216 if (ret != 0) {
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217 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
218 reg, ret);
cfe775ce 219 continue;
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220 }
221
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222 if ((val & mask) == target)
223 return 0;
224
225 msleep(1);
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226 }
227
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228 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
229 return -ETIMEDOUT;
230}
231
232static int arizona_wait_for_boot(struct arizona *arizona)
233{
234 int ret;
235
236 /*
237 * We can't use an interrupt as we need to runtime resume to do so,
238 * we won't race with the interrupt handler as it'll be blocked on
239 * runtime resume.
240 */
241 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
242 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
243
244 if (!ret)
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245 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
246 ARIZONA_BOOT_DONE_STS);
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247
248 pm_runtime_mark_last_busy(arizona->dev);
249
9d53dfdc 250 return ret;
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251}
252
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253static inline void arizona_enable_reset(struct arizona *arizona)
254{
255 if (arizona->pdata.reset)
256 gpio_set_value_cansleep(arizona->pdata.reset, 0);
257}
258
259static void arizona_disable_reset(struct arizona *arizona)
260{
261 if (arizona->pdata.reset) {
262 gpio_set_value_cansleep(arizona->pdata.reset, 1);
263 msleep(1);
264 }
265}
266
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267struct arizona_sysclk_state {
268 unsigned int fll;
269 unsigned int sysclk;
270};
271
272static int arizona_enable_freerun_sysclk(struct arizona *arizona,
273 struct arizona_sysclk_state *state)
e80436bb 274{
e80436bb
CK
275 int ret, err;
276
e80436bb 277 /* Cache existing FLL and SYSCLK settings */
3850e3ee 278 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
0be068a0 279 if (ret) {
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280 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
281 ret);
282 return ret;
283 }
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284 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
285 &state->sysclk);
0be068a0 286 if (ret) {
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287 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
288 ret);
289 return ret;
290 }
291
292 /* Start up SYSCLK using the FLL in free running mode */
293 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
294 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
0be068a0 295 if (ret) {
e80436bb
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296 dev_err(arizona->dev,
297 "Failed to start FLL in freerunning mode: %d\n",
298 ret);
299 return ret;
300 }
301 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
302 ARIZONA_FLL1_CLOCK_OK_STS,
303 ARIZONA_FLL1_CLOCK_OK_STS);
0be068a0 304 if (ret) {
e80436bb
CK
305 ret = -ETIMEDOUT;
306 goto err_fll;
307 }
308
309 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
0be068a0 310 if (ret) {
e80436bb
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311 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
312 goto err_fll;
313 }
314
3850e3ee
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315 return 0;
316
317err_fll:
318 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
319 if (err)
320 dev_err(arizona->dev,
321 "Failed to re-apply old FLL settings: %d\n", err);
322
323 return ret;
324}
325
326static int arizona_disable_freerun_sysclk(struct arizona *arizona,
327 struct arizona_sysclk_state *state)
328{
329 int ret;
330
331 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
332 state->sysclk);
333 if (ret) {
334 dev_err(arizona->dev,
335 "Failed to re-apply old SYSCLK settings: %d\n", ret);
336 return ret;
337 }
338
339 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
340 if (ret) {
341 dev_err(arizona->dev,
342 "Failed to re-apply old FLL settings: %d\n", ret);
343 return ret;
344 }
345
346 return 0;
347}
348
349static int wm5102_apply_hardware_patch(struct arizona *arizona)
350{
351 struct arizona_sysclk_state state;
352 int err, ret;
353
354 ret = arizona_enable_freerun_sysclk(arizona, &state);
355 if (ret)
356 return ret;
357
e80436bb
CK
358 /* Start the write sequencer and wait for it to finish */
359 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0
CK
360 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
361 if (ret) {
e80436bb
CK
362 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
363 ret);
3850e3ee 364 goto err;
e80436bb 365 }
3850e3ee 366
e80436bb
CK
367 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
368 ARIZONA_WSEQ_BUSY, 0);
0be068a0 369 if (ret) {
e80436bb 370 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0 371 ARIZONA_WSEQ_ABORT);
e80436bb
CK
372 ret = -ETIMEDOUT;
373 }
374
3850e3ee
CK
375err:
376 err = arizona_disable_freerun_sysclk(arizona, &state);
e80436bb 377
0be068a0 378 return ret ?: err;
e80436bb
CK
379}
380
882bc468
CK
381/*
382 * Register patch to some of the CODECs internal write sequences
383 * to ensure a clean exit from the low power sleep state.
384 */
385static const struct reg_default wm5110_sleep_patch[] = {
386 { 0x337A, 0xC100 },
387 { 0x337B, 0x0041 },
388 { 0x3300, 0xA210 },
389 { 0x3301, 0x050C },
390};
391
392static int wm5110_apply_sleep_patch(struct arizona *arizona)
393{
394 struct arizona_sysclk_state state;
395 int err, ret;
396
397 ret = arizona_enable_freerun_sysclk(arizona, &state);
398 if (ret)
399 return ret;
400
401 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
402 wm5110_sleep_patch,
403 ARRAY_SIZE(wm5110_sleep_patch));
404
405 err = arizona_disable_freerun_sysclk(arizona, &state);
406
407 return ret ?: err;
408}
409
1c1c6bba
CK
410static int wm5102_clear_write_sequencer(struct arizona *arizona)
411{
412 int ret;
413
414 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
415 0x0);
416 if (ret) {
417 dev_err(arizona->dev,
418 "Failed to clear write sequencer state: %d\n", ret);
419 return ret;
420 }
421
422 arizona_enable_reset(arizona);
423 regulator_disable(arizona->dcvdd);
424
425 msleep(20);
426
427 ret = regulator_enable(arizona->dcvdd);
428 if (ret) {
429 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
430 return ret;
431 }
432 arizona_disable_reset(arizona);
433
434 return 0;
435}
436
48bb9fe4 437#ifdef CONFIG_PM
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438static int arizona_runtime_resume(struct device *dev)
439{
440 struct arizona *arizona = dev_get_drvdata(dev);
441 int ret;
442
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443 dev_dbg(arizona->dev, "Leaving AoD mode\n");
444
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445 ret = regulator_enable(arizona->dcvdd);
446 if (ret != 0) {
447 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
448 return ret;
449 }
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450
451 regcache_cache_only(arizona->regmap, false);
452
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CK
453 switch (arizona->type) {
454 case WM5102:
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455 if (arizona->external_dcvdd) {
456 ret = regmap_update_bits(arizona->regmap,
457 ARIZONA_ISOLATION_CONTROL,
458 ARIZONA_ISOLATE_DCVDD1, 0);
459 if (ret != 0) {
460 dev_err(arizona->dev,
461 "Failed to connect DCVDD: %d\n", ret);
462 goto err;
463 }
464 }
465
4c9bb8bc
CK
466 ret = wm5102_patch(arizona);
467 if (ret != 0) {
468 dev_err(arizona->dev, "Failed to apply patch: %d\n",
469 ret);
470 goto err;
471 }
e80436bb 472
0be068a0
CK
473 ret = wm5102_apply_hardware_patch(arizona);
474 if (ret) {
e80436bb
CK
475 dev_err(arizona->dev,
476 "Failed to apply hardware patch: %d\n",
477 ret);
478 goto err;
479 }
480 break;
96129a0e
CK
481 case WM5110:
482 case WM8280:
483 ret = arizona_wait_for_boot(arizona);
484 if (ret)
485 goto err;
486
487 if (arizona->external_dcvdd) {
488 ret = regmap_update_bits(arizona->regmap,
489 ARIZONA_ISOLATION_CONTROL,
490 ARIZONA_ISOLATE_DCVDD1, 0);
491 if (ret) {
492 dev_err(arizona->dev,
493 "Failed to connect DCVDD: %d\n", ret);
494 goto err;
495 }
496 } else {
497 /*
498 * As this is only called for the internal regulator
499 * (where we know voltage ranges available) it is ok
500 * to request an exact range.
501 */
502 ret = regulator_set_voltage(arizona->dcvdd,
503 1200000, 1200000);
504 if (ret < 0) {
505 dev_err(arizona->dev,
506 "Failed to set resume voltage: %d\n",
507 ret);
508 goto err;
509 }
510 }
511 break;
e80436bb 512 default:
12bb68ed
CK
513 ret = arizona_wait_for_boot(arizona);
514 if (ret != 0) {
515 goto err;
516 }
517
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518 if (arizona->external_dcvdd) {
519 ret = regmap_update_bits(arizona->regmap,
520 ARIZONA_ISOLATION_CONTROL,
521 ARIZONA_ISOLATE_DCVDD1, 0);
522 if (ret != 0) {
523 dev_err(arizona->dev,
524 "Failed to connect DCVDD: %d\n", ret);
525 goto err;
526 }
527 }
e80436bb 528 break;
4c9bb8bc
CK
529 }
530
9270bdf5
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531 ret = regcache_sync(arizona->regmap);
532 if (ret != 0) {
533 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 534 goto err;
9270bdf5 535 }
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536
537 return 0;
4816bd1c
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538
539err:
540 regcache_cache_only(arizona->regmap, true);
541 regulator_disable(arizona->dcvdd);
542 return ret;
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543}
544
545static int arizona_runtime_suspend(struct device *dev)
546{
547 struct arizona *arizona = dev_get_drvdata(dev);
5927467d 548 int ret;
3cc72986 549
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550 dev_dbg(arizona->dev, "Entering AoD mode\n");
551
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552 if (arizona->external_dcvdd) {
553 ret = regmap_update_bits(arizona->regmap,
554 ARIZONA_ISOLATION_CONTROL,
555 ARIZONA_ISOLATE_DCVDD1,
556 ARIZONA_ISOLATE_DCVDD1);
557 if (ret != 0) {
558 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
559 ret);
560 return ret;
561 }
96129a0e
CK
562 } else {
563 switch (arizona->type) {
564 case WM5110:
565 case WM8280:
566 /*
567 * As this is only called for the internal regulator
568 * (where we know voltage ranges available) it is ok
569 * to request an exact range.
570 */
571 ret = regulator_set_voltage(arizona->dcvdd,
572 1175000, 1175000);
573 if (ret < 0) {
574 dev_err(arizona->dev,
575 "Failed to set suspend voltage: %d\n",
576 ret);
577 return ret;
578 }
579 break;
580 default:
581 break;
582 }
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583 }
584
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585 regcache_cache_only(arizona->regmap, true);
586 regcache_mark_dirty(arizona->regmap);
e293e847 587 regulator_disable(arizona->dcvdd);
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588
589 return 0;
590}
591#endif
592
dc781d0e 593#ifdef CONFIG_PM_SLEEP
67c99296
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594static int arizona_suspend(struct device *dev)
595{
596 struct arizona *arizona = dev_get_drvdata(dev);
597
598 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
599 disable_irq(arizona->irq);
600
601 return 0;
602}
603
604static int arizona_suspend_late(struct device *dev)
605{
606 struct arizona *arizona = dev_get_drvdata(dev);
607
608 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
609 enable_irq(arizona->irq);
610
611 return 0;
612}
613
dc781d0e
MB
614static int arizona_resume_noirq(struct device *dev)
615{
616 struct arizona *arizona = dev_get_drvdata(dev);
617
618 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
619 disable_irq(arizona->irq);
620
621 return 0;
622}
623
624static int arizona_resume(struct device *dev)
625{
626 struct arizona *arizona = dev_get_drvdata(dev);
627
628 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
629 enable_irq(arizona->irq);
630
631 return 0;
632}
633#endif
634
3cc72986
MB
635const struct dev_pm_ops arizona_pm_ops = {
636 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
637 arizona_runtime_resume,
638 NULL)
67c99296 639 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 640#ifdef CONFIG_PM_SLEEP
67c99296 641 .suspend_late = arizona_suspend_late,
dc781d0e
MB
642 .resume_noirq = arizona_resume_noirq,
643#endif
3cc72986
MB
644};
645EXPORT_SYMBOL_GPL(arizona_pm_ops);
646
d781009c 647#ifdef CONFIG_OF
942786e6 648unsigned long arizona_of_get_type(struct device *dev)
d781009c
MB
649{
650 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
651
652 if (id)
942786e6 653 return (unsigned long)id->data;
d781009c
MB
654 else
655 return 0;
656}
657EXPORT_SYMBOL_GPL(arizona_of_get_type);
658
e4fcb1d6
CK
659int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
660 bool mandatory)
661{
662 int gpio;
663
664 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
665 if (gpio < 0) {
666 if (mandatory)
667 dev_err(arizona->dev,
668 "Mandatory DT gpio %s missing/malformed: %d\n",
669 prop, gpio);
670
671 gpio = 0;
672 }
673
674 return gpio;
675}
676EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
677
d781009c
MB
678static int arizona_of_get_core_pdata(struct arizona *arizona)
679{
e4fcb1d6 680 struct arizona_pdata *pdata = &arizona->pdata;
cc47aed9
IS
681 struct property *prop;
682 const __be32 *cur;
683 u32 val;
d781009c 684 int ret, i;
cc47aed9 685 int count = 0;
d781009c 686
e4fcb1d6 687 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
d781009c
MB
688
689 ret = of_property_read_u32_array(arizona->dev->of_node,
690 "wlf,gpio-defaults",
691 arizona->pdata.gpio_defaults,
692 ARRAY_SIZE(arizona->pdata.gpio_defaults));
693 if (ret >= 0) {
694 /*
695 * All values are literal except out of range values
696 * which are chip default, translate into platform
697 * data which uses 0 as chip default and out of range
698 * as zero.
699 */
700 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
701 if (arizona->pdata.gpio_defaults[i] > 0xffff)
702 arizona->pdata.gpio_defaults[i] = 0;
91c73935 703 else if (arizona->pdata.gpio_defaults[i] == 0)
d781009c
MB
704 arizona->pdata.gpio_defaults[i] = 0x10000;
705 }
706 } else {
707 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
708 ret);
709 }
710
cc47aed9
IS
711 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
712 cur, val) {
713 if (count == ARRAY_SIZE(arizona->pdata.inmode))
714 break;
715
716 arizona->pdata.inmode[count] = val;
717 count++;
718 }
719
e7ad27ca
CK
720 count = 0;
721 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
722 cur, val) {
723 if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
724 break;
725
726 arizona->pdata.dmic_ref[count] = val;
727 count++;
728 }
729
d781009c
MB
730 return 0;
731}
732
733const struct of_device_id arizona_of_match[] = {
734 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
735 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
e5d4ef0d 736 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
dc7d4863 737 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
d781009c
MB
738 {},
739};
740EXPORT_SYMBOL_GPL(arizona_of_match);
741#else
742static inline int arizona_of_get_core_pdata(struct arizona *arizona)
743{
744 return 0;
745}
746#endif
747
5ac98553 748static const struct mfd_cell early_devs[] = {
3cc72986
MB
749 { .name = "arizona-ldo1" },
750};
751
32dadef2 752static const char *wm5102_supplies[] = {
5fc6c396 753 "MICVDD",
32dadef2
CK
754 "DBVDD2",
755 "DBVDD3",
756 "CPVDD",
757 "SPKVDDL",
758 "SPKVDDR",
759};
760
5ac98553 761static const struct mfd_cell wm5102_devs[] = {
d7768111 762 { .name = "arizona-micsupp" },
5fc6c396
CK
763 {
764 .name = "arizona-extcon",
765 .parent_supplies = wm5102_supplies,
766 .num_parent_supplies = 1, /* We only need MICVDD */
767 },
3cc72986 768 { .name = "arizona-gpio" },
503b1cac 769 { .name = "arizona-haptics" },
3cc72986 770 { .name = "arizona-pwm" },
32dadef2
CK
771 {
772 .name = "wm5102-codec",
773 .parent_supplies = wm5102_supplies,
774 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
775 },
3cc72986
MB
776};
777
5ac98553 778static const struct mfd_cell wm5110_devs[] = {
d7768111 779 { .name = "arizona-micsupp" },
5fc6c396
CK
780 {
781 .name = "arizona-extcon",
782 .parent_supplies = wm5102_supplies,
783 .num_parent_supplies = 1, /* We only need MICVDD */
784 },
e102befe 785 { .name = "arizona-gpio" },
503b1cac 786 { .name = "arizona-haptics" },
e102befe 787 { .name = "arizona-pwm" },
32dadef2
CK
788 {
789 .name = "wm5110-codec",
790 .parent_supplies = wm5102_supplies,
791 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
792 },
793};
794
795static const char *wm8997_supplies[] = {
996c2d4f 796 "MICVDD",
32dadef2
CK
797 "DBVDD2",
798 "CPVDD",
799 "SPKVDD",
e102befe
MB
800};
801
5ac98553 802static const struct mfd_cell wm8997_devs[] = {
dc7d4863 803 { .name = "arizona-micsupp" },
5fc6c396
CK
804 {
805 .name = "arizona-extcon",
806 .parent_supplies = wm8997_supplies,
807 .num_parent_supplies = 1, /* We only need MICVDD */
808 },
dc7d4863
CK
809 { .name = "arizona-gpio" },
810 { .name = "arizona-haptics" },
811 { .name = "arizona-pwm" },
32dadef2
CK
812 {
813 .name = "wm8997-codec",
814 .parent_supplies = wm8997_supplies,
815 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
816 },
dc7d4863
CK
817};
818
f791be49 819int arizona_dev_init(struct arizona *arizona)
3cc72986
MB
820{
821 struct device *dev = arizona->dev;
822 const char *type_name;
823 unsigned int reg, val;
62d62b59 824 int (*apply_patch)(struct arizona *) = NULL;
3cc72986
MB
825 int ret, i;
826
827 dev_set_drvdata(arizona->dev, arizona);
828 mutex_init(&arizona->clk_lock);
829
830 if (dev_get_platdata(arizona->dev))
831 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
832 sizeof(arizona->pdata));
22d7dc8a
LJ
833 else
834 arizona_of_get_core_pdata(arizona);
3cc72986
MB
835
836 regcache_cache_only(arizona->regmap, true);
837
838 switch (arizona->type) {
839 case WM5102:
e102befe 840 case WM5110:
e5d4ef0d 841 case WM8280:
dc7d4863 842 case WM8997:
3cc72986
MB
843 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
844 arizona->core_supplies[i].supply
845 = wm5102_core_supplies[i];
846 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
847 break;
848 default:
849 dev_err(arizona->dev, "Unknown device type %d\n",
850 arizona->type);
851 return -EINVAL;
852 }
853
4a8c475f
CK
854 /* Mark DCVDD as external, LDO1 driver will clear if internal */
855 arizona->external_dcvdd = true;
856
3cc72986 857 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 858 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB
859 if (ret != 0) {
860 dev_err(dev, "Failed to add early children: %d\n", ret);
861 return ret;
862 }
863
864 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
865 arizona->core_supplies);
866 if (ret != 0) {
867 dev_err(dev, "Failed to request core supplies: %d\n",
868 ret);
869 goto err_early;
870 }
871
0c2d0ffb
CK
872 /**
873 * Don't use devres here because the only device we have to get
874 * against is the MFD device and DCVDD will likely be supplied by
875 * one of its children. Meaning that the regulator will be
876 * destroyed by the time devres calls regulator put.
877 */
e6021511 878 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB
879 if (IS_ERR(arizona->dcvdd)) {
880 ret = PTR_ERR(arizona->dcvdd);
881 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
882 goto err_early;
883 }
884
87d3af4a
MB
885 if (arizona->pdata.reset) {
886 /* Start out with /RESET low to put the chip into reset */
5f056bf0
CK
887 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
888 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
889 "arizona /RESET");
87d3af4a
MB
890 if (ret != 0) {
891 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 892 goto err_dcvdd;
87d3af4a
MB
893 }
894 }
895
3cc72986
MB
896 ret = regulator_bulk_enable(arizona->num_core_supplies,
897 arizona->core_supplies);
898 if (ret != 0) {
899 dev_err(dev, "Failed to enable core supplies: %d\n",
900 ret);
e6021511 901 goto err_dcvdd;
3cc72986
MB
902 }
903
59db9691
MB
904 ret = regulator_enable(arizona->dcvdd);
905 if (ret != 0) {
906 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
907 goto err_enable;
908 }
909
2229875d 910 arizona_disable_reset(arizona);
3cc72986 911
3cc72986
MB
912 regcache_cache_only(arizona->regmap, false);
913
ca76ceb8 914 /* Verify that this is a chip we know about */
3cc72986
MB
915 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
916 if (ret != 0) {
917 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 918 goto err_reset;
3cc72986
MB
919 }
920
3cc72986
MB
921 switch (reg) {
922 case 0x5102:
e102befe 923 case 0x5110:
dc7d4863 924 case 0x8997:
e102befe 925 break;
3cc72986 926 default:
ca76ceb8 927 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 928 goto err_reset;
3cc72986
MB
929 }
930
3cc72986
MB
931 /* If we have a /RESET GPIO we'll already be reset */
932 if (!arizona->pdata.reset) {
933 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
934 if (ret != 0) {
935 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 936 goto err_reset;
3cc72986 937 }
46b9d13a 938
c25feaa5 939 msleep(1);
3cc72986
MB
940 }
941
ca76ceb8 942 /* Ensure device startup is complete */
d955cba8
CK
943 switch (arizona->type) {
944 case WM5102:
48018943
MB
945 ret = regmap_read(arizona->regmap,
946 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1c1c6bba 947 if (ret) {
d955cba8
CK
948 dev_err(dev,
949 "Failed to check write sequencer state: %d\n",
950 ret);
1c1c6bba
CK
951 } else if (val & 0x01) {
952 ret = wm5102_clear_write_sequencer(arizona);
953 if (ret)
954 return ret;
d955cba8
CK
955 }
956 break;
1c1c6bba
CK
957 default:
958 break;
959 }
960
961 ret = arizona_wait_for_boot(arizona);
962 if (ret) {
963 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
964 goto err_reset;
af65a361 965 }
3cc72986 966
ca76ceb8
MB
967 /* Read the device ID information & do device specific stuff */
968 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
969 if (ret != 0) {
970 dev_err(dev, "Failed to read ID register: %d\n", ret);
971 goto err_reset;
972 }
973
974 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
975 &arizona->rev);
976 if (ret != 0) {
977 dev_err(dev, "Failed to read revision register: %d\n", ret);
978 goto err_reset;
979 }
980 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
981
982 switch (reg) {
983#ifdef CONFIG_MFD_WM5102
984 case 0x5102:
985 type_name = "WM5102";
986 if (arizona->type != WM5102) {
987 dev_err(arizona->dev, "WM5102 registered as %d\n",
988 arizona->type);
989 arizona->type = WM5102;
990 }
991 apply_patch = wm5102_patch;
992 arizona->rev &= 0x7;
993 break;
994#endif
995#ifdef CONFIG_MFD_WM5110
996 case 0x5110:
e5d4ef0d
RF
997 switch (arizona->type) {
998 case WM5110:
999 type_name = "WM5110";
1000 break;
1001 case WM8280:
1002 type_name = "WM8280";
1003 break;
1004 default:
1005 type_name = "WM5110";
ca76ceb8
MB
1006 dev_err(arizona->dev, "WM5110 registered as %d\n",
1007 arizona->type);
1008 arizona->type = WM5110;
e5d4ef0d 1009 break;
ca76ceb8
MB
1010 }
1011 apply_patch = wm5110_patch;
1012 break;
dc7d4863
CK
1013#endif
1014#ifdef CONFIG_MFD_WM8997
1015 case 0x8997:
1016 type_name = "WM8997";
1017 if (arizona->type != WM8997) {
1018 dev_err(arizona->dev, "WM8997 registered as %d\n",
1019 arizona->type);
1020 arizona->type = WM8997;
1021 }
1022 apply_patch = wm8997_patch;
1023 break;
ca76ceb8
MB
1024#endif
1025 default:
1026 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1027 goto err_reset;
1028 }
1029
1030 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1031
62d62b59
MB
1032 if (apply_patch) {
1033 ret = apply_patch(arizona);
1034 if (ret != 0) {
1035 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1036 ret);
1037 goto err_reset;
1038 }
e80436bb
CK
1039
1040 switch (arizona->type) {
1041 case WM5102:
0be068a0
CK
1042 ret = wm5102_apply_hardware_patch(arizona);
1043 if (ret) {
e80436bb
CK
1044 dev_err(arizona->dev,
1045 "Failed to apply hardware patch: %d\n",
1046 ret);
1047 goto err_reset;
1048 }
1049 break;
882bc468
CK
1050 case WM5110:
1051 case WM8280:
1052 ret = wm5110_apply_sleep_patch(arizona);
1053 if (ret) {
1054 dev_err(arizona->dev,
1055 "Failed to apply sleep patch: %d\n",
1056 ret);
1057 goto err_reset;
1058 }
1059 break;
e80436bb
CK
1060 default:
1061 break;
1062 }
62d62b59
MB
1063 }
1064
3cc72986
MB
1065 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1066 if (!arizona->pdata.gpio_defaults[i])
1067 continue;
1068
1069 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1070 arizona->pdata.gpio_defaults[i]);
1071 }
1072
1073 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1074 pm_runtime_use_autosuspend(arizona->dev);
1075 pm_runtime_enable(arizona->dev);
1076
1077 /* Chip default */
1078 if (!arizona->pdata.clk32k_src)
1079 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1080
1081 switch (arizona->pdata.clk32k_src) {
1082 case ARIZONA_32KZ_MCLK1:
1083 case ARIZONA_32KZ_MCLK2:
1084 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1085 ARIZONA_CLK_32K_SRC_MASK,
1086 arizona->pdata.clk32k_src - 1);
767c6dc0 1087 arizona_clk32k_enable(arizona);
3cc72986
MB
1088 break;
1089 case ARIZONA_32KZ_NONE:
1090 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1091 ARIZONA_CLK_32K_SRC_MASK, 2);
1092 break;
1093 default:
1094 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1095 arizona->pdata.clk32k_src);
1096 ret = -EINVAL;
59db9691 1097 goto err_reset;
3cc72986
MB
1098 }
1099
3d91f828 1100 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB
1101 if (!arizona->pdata.micbias[i].mV &&
1102 !arizona->pdata.micbias[i].bypass)
3d91f828
MB
1103 continue;
1104
544c7aad
MB
1105 /* Apply default for bypass mode */
1106 if (!arizona->pdata.micbias[i].mV)
1107 arizona->pdata.micbias[i].mV = 2800;
1108
3d91f828 1109 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 1110
3d91f828
MB
1111 val <<= ARIZONA_MICB1_LVL_SHIFT;
1112
1113 if (arizona->pdata.micbias[i].ext_cap)
1114 val |= ARIZONA_MICB1_EXT_CAP;
1115
1116 if (arizona->pdata.micbias[i].discharge)
1117 val |= ARIZONA_MICB1_DISCH;
1118
f773fc6d 1119 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB
1120 val |= ARIZONA_MICB1_RATE;
1121
544c7aad
MB
1122 if (arizona->pdata.micbias[i].bypass)
1123 val |= ARIZONA_MICB1_BYPASS;
1124
3d91f828
MB
1125 regmap_update_bits(arizona->regmap,
1126 ARIZONA_MIC_BIAS_CTRL_1 + i,
1127 ARIZONA_MICB1_LVL_MASK |
71d134b9 1128 ARIZONA_MICB1_EXT_CAP |
3d91f828 1129 ARIZONA_MICB1_DISCH |
544c7aad 1130 ARIZONA_MICB1_BYPASS |
3d91f828
MB
1131 ARIZONA_MICB1_RATE, val);
1132 }
1133
3cc72986
MB
1134 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1135 /* Default for both is 0 so noop with defaults */
1136 val = arizona->pdata.dmic_ref[i]
1137 << ARIZONA_IN1_DMIC_SUP_SHIFT;
1138 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
1139
1140 regmap_update_bits(arizona->regmap,
1141 ARIZONA_IN1L_CONTROL + (i * 8),
1142 ARIZONA_IN1_DMIC_SUP_MASK |
1143 ARIZONA_IN1_MODE_MASK, val);
1144 }
1145
1146 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1147 /* Default is 0 so noop with defaults */
1148 if (arizona->pdata.out_mono[i])
1149 val = ARIZONA_OUT1_MONO;
1150 else
1151 val = 0;
1152
1153 regmap_update_bits(arizona->regmap,
1154 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1155 ARIZONA_OUT1_MONO, val);
1156 }
1157
3cc72986
MB
1158 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1159 if (arizona->pdata.spk_mute[i])
1160 regmap_update_bits(arizona->regmap,
2a51da04 1161 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB
1162 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1163 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1164 arizona->pdata.spk_mute[i]);
1165
1166 if (arizona->pdata.spk_fmt[i])
1167 regmap_update_bits(arizona->regmap,
2a51da04 1168 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB
1169 ARIZONA_SPK1_FMT_MASK,
1170 arizona->pdata.spk_fmt[i]);
1171 }
1172
1173 /* Set up for interrupts */
1174 ret = arizona_irq_init(arizona);
1175 if (ret != 0)
59db9691 1176 goto err_reset;
3cc72986
MB
1177
1178 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1179 arizona_clkgen_err, arizona);
1180 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1181 arizona_overclocked, arizona);
1182 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1183 arizona_underclocked, arizona);
1184
1185 switch (arizona->type) {
1186 case WM5102:
1187 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
0848c94f 1188 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
e102befe
MB
1189 break;
1190 case WM5110:
e5d4ef0d 1191 case WM8280:
e102befe 1192 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
78566afd 1193 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
3cc72986 1194 break;
dc7d4863
CK
1195 case WM8997:
1196 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1197 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1198 break;
3cc72986
MB
1199 }
1200
1201 if (ret != 0) {
1202 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1203 goto err_irq;
1204 }
1205
48bb9fe4 1206#ifdef CONFIG_PM
59db9691
MB
1207 regulator_disable(arizona->dcvdd);
1208#endif
1209
3cc72986
MB
1210 return 0;
1211
1212err_irq:
1213 arizona_irq_exit(arizona);
3cc72986 1214err_reset:
2229875d 1215 arizona_enable_reset(arizona);
59db9691 1216 regulator_disable(arizona->dcvdd);
3cc72986 1217err_enable:
3a36a0db 1218 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1219 arizona->core_supplies);
e6021511
CK
1220err_dcvdd:
1221 regulator_put(arizona->dcvdd);
3cc72986
MB
1222err_early:
1223 mfd_remove_devices(dev);
1224 return ret;
1225}
1226EXPORT_SYMBOL_GPL(arizona_dev_init);
1227
4740f73f 1228int arizona_dev_exit(struct arizona *arizona)
3cc72986 1229{
b804020a
CK
1230 pm_runtime_disable(arizona->dev);
1231
df6b3352 1232 regulator_disable(arizona->dcvdd);
e6021511 1233 regulator_put(arizona->dcvdd);
df6b3352 1234
3cc72986
MB
1235 mfd_remove_devices(arizona->dev);
1236 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1237 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1238 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1239 arizona_irq_exit(arizona);
2229875d 1240 arizona_enable_reset(arizona);
df6b3352 1241
4420286e 1242 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1243 arizona->core_supplies);
3cc72986
MB
1244 return 0;
1245}
1246EXPORT_SYMBOL_GPL(arizona_dev_exit);
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