Commit | Line | Data |
---|---|---|
cfb61a41 | 1 | /* |
af7e9069 | 2 | * axp20x.c - MFD core driver for the X-Powers' Power Management ICs |
cfb61a41 | 3 | * |
af7e9069 JP |
4 | * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC |
5 | * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature | |
6 | * as well as configurable GPIOs. | |
cfb61a41 CC |
7 | * |
8 | * Author: Carlo Caione <carlo@caione.org> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/err.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/pm_runtime.h> | |
21 | #include <linux/regmap.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/regulator/consumer.h> | |
24 | #include <linux/mfd/axp20x.h> | |
25 | #include <linux/mfd/core.h> | |
26 | #include <linux/of_device.h> | |
27 | #include <linux/of_irq.h> | |
af7e9069 | 28 | #include <linux/acpi.h> |
cfb61a41 CC |
29 | |
30 | #define AXP20X_OFF 0x80 | |
31 | ||
c31e858b | 32 | static const char * const axp20x_model_names[] = { |
af7e9069 JP |
33 | "AXP202", |
34 | "AXP209", | |
f05be589 | 35 | "AXP221", |
af7e9069 JP |
36 | "AXP288", |
37 | }; | |
38 | ||
cfb61a41 CC |
39 | static const struct regmap_range axp20x_writeable_ranges[] = { |
40 | regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), | |
41 | regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), | |
42 | }; | |
43 | ||
44 | static const struct regmap_range axp20x_volatile_ranges[] = { | |
45 | regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), | |
46 | }; | |
47 | ||
48 | static const struct regmap_access_table axp20x_writeable_table = { | |
49 | .yes_ranges = axp20x_writeable_ranges, | |
50 | .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), | |
51 | }; | |
52 | ||
53 | static const struct regmap_access_table axp20x_volatile_table = { | |
54 | .yes_ranges = axp20x_volatile_ranges, | |
55 | .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), | |
56 | }; | |
57 | ||
f05be589 BB |
58 | static const struct regmap_range axp22x_writeable_ranges[] = { |
59 | regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), | |
60 | regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), | |
61 | }; | |
62 | ||
63 | static const struct regmap_range axp22x_volatile_ranges[] = { | |
64 | regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), | |
65 | }; | |
66 | ||
67 | static const struct regmap_access_table axp22x_writeable_table = { | |
68 | .yes_ranges = axp22x_writeable_ranges, | |
69 | .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), | |
70 | }; | |
71 | ||
72 | static const struct regmap_access_table axp22x_volatile_table = { | |
73 | .yes_ranges = axp22x_volatile_ranges, | |
74 | .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), | |
75 | }; | |
76 | ||
af7e9069 JP |
77 | static const struct regmap_range axp288_writeable_ranges[] = { |
78 | regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), | |
79 | regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), | |
80 | }; | |
81 | ||
82 | static const struct regmap_range axp288_volatile_ranges[] = { | |
83 | regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), | |
84 | }; | |
85 | ||
86 | static const struct regmap_access_table axp288_writeable_table = { | |
87 | .yes_ranges = axp288_writeable_ranges, | |
88 | .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), | |
89 | }; | |
90 | ||
91 | static const struct regmap_access_table axp288_volatile_table = { | |
92 | .yes_ranges = axp288_volatile_ranges, | |
93 | .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), | |
94 | }; | |
95 | ||
cfb61a41 CC |
96 | static struct resource axp20x_pek_resources[] = { |
97 | { | |
98 | .name = "PEK_DBR", | |
99 | .start = AXP20X_IRQ_PEK_RIS_EDGE, | |
100 | .end = AXP20X_IRQ_PEK_RIS_EDGE, | |
101 | .flags = IORESOURCE_IRQ, | |
102 | }, { | |
103 | .name = "PEK_DBF", | |
104 | .start = AXP20X_IRQ_PEK_FAL_EDGE, | |
105 | .end = AXP20X_IRQ_PEK_FAL_EDGE, | |
106 | .flags = IORESOURCE_IRQ, | |
107 | }, | |
108 | }; | |
109 | ||
f05be589 BB |
110 | static struct resource axp22x_pek_resources[] = { |
111 | { | |
112 | .name = "PEK_DBR", | |
113 | .start = AXP22X_IRQ_PEK_RIS_EDGE, | |
114 | .end = AXP22X_IRQ_PEK_RIS_EDGE, | |
115 | .flags = IORESOURCE_IRQ, | |
116 | }, { | |
117 | .name = "PEK_DBF", | |
118 | .start = AXP22X_IRQ_PEK_FAL_EDGE, | |
119 | .end = AXP22X_IRQ_PEK_FAL_EDGE, | |
120 | .flags = IORESOURCE_IRQ, | |
121 | }, | |
122 | }; | |
123 | ||
d6387874 | 124 | static struct resource axp288_fuel_gauge_resources[] = { |
af7e9069 JP |
125 | { |
126 | .start = AXP288_IRQ_QWBTU, | |
127 | .end = AXP288_IRQ_QWBTU, | |
128 | .flags = IORESOURCE_IRQ, | |
129 | }, | |
130 | { | |
131 | .start = AXP288_IRQ_WBTU, | |
132 | .end = AXP288_IRQ_WBTU, | |
133 | .flags = IORESOURCE_IRQ, | |
134 | }, | |
135 | { | |
136 | .start = AXP288_IRQ_QWBTO, | |
137 | .end = AXP288_IRQ_QWBTO, | |
138 | .flags = IORESOURCE_IRQ, | |
139 | }, | |
140 | { | |
141 | .start = AXP288_IRQ_WBTO, | |
142 | .end = AXP288_IRQ_WBTO, | |
143 | .flags = IORESOURCE_IRQ, | |
144 | }, | |
145 | { | |
146 | .start = AXP288_IRQ_WL2, | |
147 | .end = AXP288_IRQ_WL2, | |
148 | .flags = IORESOURCE_IRQ, | |
149 | }, | |
150 | { | |
151 | .start = AXP288_IRQ_WL1, | |
152 | .end = AXP288_IRQ_WL1, | |
153 | .flags = IORESOURCE_IRQ, | |
154 | }, | |
155 | }; | |
156 | ||
cfb61a41 CC |
157 | static const struct regmap_config axp20x_regmap_config = { |
158 | .reg_bits = 8, | |
159 | .val_bits = 8, | |
160 | .wr_table = &axp20x_writeable_table, | |
161 | .volatile_table = &axp20x_volatile_table, | |
162 | .max_register = AXP20X_FG_RES, | |
163 | .cache_type = REGCACHE_RBTREE, | |
164 | }; | |
165 | ||
f05be589 BB |
166 | static const struct regmap_config axp22x_regmap_config = { |
167 | .reg_bits = 8, | |
168 | .val_bits = 8, | |
169 | .wr_table = &axp22x_writeable_table, | |
170 | .volatile_table = &axp22x_volatile_table, | |
171 | .max_register = AXP22X_BATLOW_THRES1, | |
172 | .cache_type = REGCACHE_RBTREE, | |
173 | }; | |
174 | ||
af7e9069 JP |
175 | static const struct regmap_config axp288_regmap_config = { |
176 | .reg_bits = 8, | |
177 | .val_bits = 8, | |
178 | .wr_table = &axp288_writeable_table, | |
179 | .volatile_table = &axp288_volatile_table, | |
180 | .max_register = AXP288_FG_TUNE5, | |
181 | .cache_type = REGCACHE_RBTREE, | |
182 | }; | |
183 | ||
184 | #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ | |
185 | [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } | |
cfb61a41 CC |
186 | |
187 | static const struct regmap_irq axp20x_regmap_irqs[] = { | |
af7e9069 JP |
188 | INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), |
189 | INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), | |
190 | INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), | |
191 | INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), | |
192 | INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), | |
193 | INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), | |
194 | INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), | |
195 | INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), | |
196 | INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), | |
197 | INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), | |
198 | INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), | |
199 | INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), | |
200 | INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), | |
201 | INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), | |
202 | INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), | |
203 | INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), | |
204 | INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), | |
205 | INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), | |
206 | INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), | |
207 | INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), | |
208 | INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), | |
209 | INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), | |
210 | INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), | |
211 | INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), | |
212 | INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), | |
213 | INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), | |
214 | INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), | |
215 | INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), | |
216 | INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), | |
217 | INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), | |
218 | INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), | |
219 | INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), | |
220 | INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), | |
221 | INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), | |
222 | INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), | |
223 | INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), | |
224 | INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), | |
225 | }; | |
226 | ||
f05be589 BB |
227 | static const struct regmap_irq axp22x_regmap_irqs[] = { |
228 | INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), | |
229 | INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), | |
230 | INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), | |
231 | INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), | |
232 | INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), | |
233 | INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), | |
234 | INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), | |
235 | INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), | |
236 | INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), | |
237 | INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), | |
238 | INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), | |
239 | INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), | |
240 | INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), | |
241 | INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), | |
242 | INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), | |
243 | INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), | |
244 | INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), | |
245 | INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), | |
246 | INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), | |
247 | INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), | |
248 | INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), | |
249 | INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), | |
250 | INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), | |
251 | INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), | |
252 | INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), | |
253 | }; | |
254 | ||
af7e9069 JP |
255 | /* some IRQs are compatible with axp20x models */ |
256 | static const struct regmap_irq axp288_regmap_irqs[] = { | |
ff3bbc5c JP |
257 | INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), |
258 | INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), | |
259 | INIT_REGMAP_IRQ(AXP288, OV, 0, 4), | |
af7e9069 | 260 | |
ff3bbc5c JP |
261 | INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), |
262 | INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), | |
af7e9069 JP |
263 | INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), |
264 | INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), | |
ff3bbc5c JP |
265 | INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), |
266 | INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), | |
af7e9069 JP |
267 | |
268 | INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), | |
269 | INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), | |
270 | INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), | |
ff3bbc5c | 271 | INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), |
af7e9069 JP |
272 | INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), |
273 | INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), | |
274 | INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), | |
275 | INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), | |
276 | ||
277 | INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), | |
278 | INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), | |
279 | INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), | |
280 | INIT_REGMAP_IRQ(AXP288, OT, 3, 7), | |
281 | ||
282 | INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), | |
283 | INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), | |
284 | INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), | |
285 | INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), | |
286 | INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), | |
287 | INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), | |
288 | INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), | |
ff3bbc5c | 289 | INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), |
af7e9069 JP |
290 | |
291 | INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), | |
292 | INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), | |
cfb61a41 CC |
293 | }; |
294 | ||
295 | static const struct of_device_id axp20x_of_match[] = { | |
296 | { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID }, | |
297 | { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID }, | |
f05be589 | 298 | { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID }, |
cfb61a41 CC |
299 | { }, |
300 | }; | |
301 | MODULE_DEVICE_TABLE(of, axp20x_of_match); | |
302 | ||
303 | /* | |
304 | * This is useless for OF-enabled devices, but it is needed by I2C subsystem | |
305 | */ | |
306 | static const struct i2c_device_id axp20x_i2c_id[] = { | |
307 | { }, | |
308 | }; | |
309 | MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); | |
310 | ||
0e50e926 | 311 | static const struct acpi_device_id axp20x_acpi_match[] = { |
af7e9069 JP |
312 | { |
313 | .id = "INT33F4", | |
314 | .driver_data = AXP288_ID, | |
315 | }, | |
316 | { }, | |
317 | }; | |
318 | MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match); | |
319 | ||
cfb61a41 CC |
320 | static const struct regmap_irq_chip axp20x_regmap_irq_chip = { |
321 | .name = "axp20x_irq_chip", | |
322 | .status_base = AXP20X_IRQ1_STATE, | |
323 | .ack_base = AXP20X_IRQ1_STATE, | |
324 | .mask_base = AXP20X_IRQ1_EN, | |
af7e9069 JP |
325 | .mask_invert = true, |
326 | .init_ack_masked = true, | |
cfb61a41 CC |
327 | .irqs = axp20x_regmap_irqs, |
328 | .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), | |
af7e9069 JP |
329 | .num_regs = 5, |
330 | ||
331 | }; | |
332 | ||
f05be589 BB |
333 | static const struct regmap_irq_chip axp22x_regmap_irq_chip = { |
334 | .name = "axp22x_irq_chip", | |
335 | .status_base = AXP20X_IRQ1_STATE, | |
336 | .ack_base = AXP20X_IRQ1_STATE, | |
337 | .mask_base = AXP20X_IRQ1_EN, | |
338 | .mask_invert = true, | |
339 | .init_ack_masked = true, | |
340 | .irqs = axp22x_regmap_irqs, | |
341 | .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), | |
342 | .num_regs = 5, | |
343 | }; | |
344 | ||
af7e9069 JP |
345 | static const struct regmap_irq_chip axp288_regmap_irq_chip = { |
346 | .name = "axp288_irq_chip", | |
347 | .status_base = AXP20X_IRQ1_STATE, | |
348 | .ack_base = AXP20X_IRQ1_STATE, | |
349 | .mask_base = AXP20X_IRQ1_EN, | |
cfb61a41 CC |
350 | .mask_invert = true, |
351 | .init_ack_masked = true, | |
af7e9069 JP |
352 | .irqs = axp288_regmap_irqs, |
353 | .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), | |
354 | .num_regs = 6, | |
355 | ||
cfb61a41 CC |
356 | }; |
357 | ||
cfb61a41 CC |
358 | static struct mfd_cell axp20x_cells[] = { |
359 | { | |
360 | .name = "axp20x-pek", | |
361 | .num_resources = ARRAY_SIZE(axp20x_pek_resources), | |
362 | .resources = axp20x_pek_resources, | |
363 | }, { | |
364 | .name = "axp20x-regulator", | |
cfb61a41 CC |
365 | }, |
366 | }; | |
367 | ||
f05be589 BB |
368 | static struct mfd_cell axp22x_cells[] = { |
369 | { | |
370 | .name = "axp20x-pek", | |
371 | .num_resources = ARRAY_SIZE(axp22x_pek_resources), | |
372 | .resources = axp22x_pek_resources, | |
6d4fa89d CYT |
373 | }, { |
374 | .name = "axp20x-regulator", | |
f05be589 BB |
375 | }, |
376 | }; | |
377 | ||
af7e9069 JP |
378 | static struct resource axp288_adc_resources[] = { |
379 | { | |
380 | .name = "GPADC", | |
381 | .start = AXP288_IRQ_GPADC, | |
382 | .end = AXP288_IRQ_GPADC, | |
383 | .flags = IORESOURCE_IRQ, | |
384 | }, | |
385 | }; | |
386 | ||
bdb01f78 RP |
387 | static struct resource axp288_extcon_resources[] = { |
388 | { | |
389 | .start = AXP288_IRQ_VBUS_FALL, | |
390 | .end = AXP288_IRQ_VBUS_FALL, | |
391 | .flags = IORESOURCE_IRQ, | |
392 | }, | |
393 | { | |
394 | .start = AXP288_IRQ_VBUS_RISE, | |
395 | .end = AXP288_IRQ_VBUS_RISE, | |
396 | .flags = IORESOURCE_IRQ, | |
397 | }, | |
398 | { | |
399 | .start = AXP288_IRQ_MV_CHNG, | |
400 | .end = AXP288_IRQ_MV_CHNG, | |
401 | .flags = IORESOURCE_IRQ, | |
402 | }, | |
403 | { | |
404 | .start = AXP288_IRQ_BC_USB_CHNG, | |
405 | .end = AXP288_IRQ_BC_USB_CHNG, | |
406 | .flags = IORESOURCE_IRQ, | |
407 | }, | |
408 | }; | |
409 | ||
af7e9069 JP |
410 | static struct resource axp288_charger_resources[] = { |
411 | { | |
412 | .start = AXP288_IRQ_OV, | |
413 | .end = AXP288_IRQ_OV, | |
414 | .flags = IORESOURCE_IRQ, | |
415 | }, | |
416 | { | |
417 | .start = AXP288_IRQ_DONE, | |
418 | .end = AXP288_IRQ_DONE, | |
419 | .flags = IORESOURCE_IRQ, | |
420 | }, | |
421 | { | |
422 | .start = AXP288_IRQ_CHARGING, | |
423 | .end = AXP288_IRQ_CHARGING, | |
424 | .flags = IORESOURCE_IRQ, | |
425 | }, | |
426 | { | |
427 | .start = AXP288_IRQ_SAFE_QUIT, | |
428 | .end = AXP288_IRQ_SAFE_QUIT, | |
429 | .flags = IORESOURCE_IRQ, | |
430 | }, | |
431 | { | |
432 | .start = AXP288_IRQ_SAFE_ENTER, | |
433 | .end = AXP288_IRQ_SAFE_ENTER, | |
434 | .flags = IORESOURCE_IRQ, | |
435 | }, | |
436 | { | |
437 | .start = AXP288_IRQ_QCBTU, | |
438 | .end = AXP288_IRQ_QCBTU, | |
439 | .flags = IORESOURCE_IRQ, | |
440 | }, | |
441 | { | |
442 | .start = AXP288_IRQ_CBTU, | |
443 | .end = AXP288_IRQ_CBTU, | |
444 | .flags = IORESOURCE_IRQ, | |
445 | }, | |
446 | { | |
447 | .start = AXP288_IRQ_QCBTO, | |
448 | .end = AXP288_IRQ_QCBTO, | |
449 | .flags = IORESOURCE_IRQ, | |
450 | }, | |
451 | { | |
452 | .start = AXP288_IRQ_CBTO, | |
453 | .end = AXP288_IRQ_CBTO, | |
454 | .flags = IORESOURCE_IRQ, | |
455 | }, | |
456 | }; | |
457 | ||
458 | static struct mfd_cell axp288_cells[] = { | |
459 | { | |
460 | .name = "axp288_adc", | |
461 | .num_resources = ARRAY_SIZE(axp288_adc_resources), | |
462 | .resources = axp288_adc_resources, | |
463 | }, | |
bdb01f78 RP |
464 | { |
465 | .name = "axp288_extcon", | |
466 | .num_resources = ARRAY_SIZE(axp288_extcon_resources), | |
467 | .resources = axp288_extcon_resources, | |
468 | }, | |
af7e9069 JP |
469 | { |
470 | .name = "axp288_charger", | |
471 | .num_resources = ARRAY_SIZE(axp288_charger_resources), | |
472 | .resources = axp288_charger_resources, | |
473 | }, | |
474 | { | |
d6387874 TB |
475 | .name = "axp288_fuel_gauge", |
476 | .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), | |
477 | .resources = axp288_fuel_gauge_resources, | |
af7e9069 | 478 | }, |
d8139f63 AL |
479 | { |
480 | .name = "axp288_pmic_acpi", | |
481 | }, | |
af7e9069 JP |
482 | }; |
483 | ||
cfb61a41 CC |
484 | static struct axp20x_dev *axp20x_pm_power_off; |
485 | static void axp20x_power_off(void) | |
486 | { | |
af7e9069 JP |
487 | if (axp20x_pm_power_off->variant == AXP288_ID) |
488 | return; | |
489 | ||
cfb61a41 CC |
490 | regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL, |
491 | AXP20X_OFF); | |
492 | } | |
493 | ||
af7e9069 JP |
494 | static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev) |
495 | { | |
496 | const struct acpi_device_id *acpi_id; | |
497 | const struct of_device_id *of_id; | |
498 | ||
499 | if (dev->of_node) { | |
500 | of_id = of_match_device(axp20x_of_match, dev); | |
501 | if (!of_id) { | |
502 | dev_err(dev, "Unable to match OF ID\n"); | |
503 | return -ENODEV; | |
504 | } | |
505 | axp20x->variant = (long) of_id->data; | |
506 | } else { | |
507 | acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); | |
508 | if (!acpi_id || !acpi_id->driver_data) { | |
509 | dev_err(dev, "Unable to match ACPI ID and data\n"); | |
510 | return -ENODEV; | |
511 | } | |
512 | axp20x->variant = (long) acpi_id->driver_data; | |
513 | } | |
514 | ||
515 | switch (axp20x->variant) { | |
516 | case AXP202_ID: | |
517 | case AXP209_ID: | |
518 | axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); | |
519 | axp20x->cells = axp20x_cells; | |
520 | axp20x->regmap_cfg = &axp20x_regmap_config; | |
521 | axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; | |
522 | break; | |
f05be589 BB |
523 | case AXP221_ID: |
524 | axp20x->nr_cells = ARRAY_SIZE(axp22x_cells); | |
525 | axp20x->cells = axp22x_cells; | |
526 | axp20x->regmap_cfg = &axp22x_regmap_config; | |
527 | axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; | |
528 | break; | |
af7e9069 JP |
529 | case AXP288_ID: |
530 | axp20x->cells = axp288_cells; | |
531 | axp20x->nr_cells = ARRAY_SIZE(axp288_cells); | |
532 | axp20x->regmap_cfg = &axp288_regmap_config; | |
533 | axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; | |
534 | break; | |
535 | default: | |
536 | dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); | |
537 | return -EINVAL; | |
538 | } | |
539 | dev_info(dev, "AXP20x variant %s found\n", | |
540 | axp20x_model_names[axp20x->variant]); | |
541 | ||
542 | return 0; | |
543 | } | |
544 | ||
cfb61a41 CC |
545 | static int axp20x_i2c_probe(struct i2c_client *i2c, |
546 | const struct i2c_device_id *id) | |
547 | { | |
548 | struct axp20x_dev *axp20x; | |
cfb61a41 CC |
549 | int ret; |
550 | ||
551 | axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); | |
552 | if (!axp20x) | |
553 | return -ENOMEM; | |
554 | ||
af7e9069 JP |
555 | ret = axp20x_match_device(axp20x, &i2c->dev); |
556 | if (ret) | |
557 | return ret; | |
cfb61a41 CC |
558 | |
559 | axp20x->i2c_client = i2c; | |
560 | axp20x->dev = &i2c->dev; | |
561 | dev_set_drvdata(axp20x->dev, axp20x); | |
562 | ||
af7e9069 | 563 | axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg); |
cfb61a41 CC |
564 | if (IS_ERR(axp20x->regmap)) { |
565 | ret = PTR_ERR(axp20x->regmap); | |
566 | dev_err(&i2c->dev, "regmap init failed: %d\n", ret); | |
567 | return ret; | |
568 | } | |
569 | ||
570 | ret = regmap_add_irq_chip(axp20x->regmap, i2c->irq, | |
571 | IRQF_ONESHOT | IRQF_SHARED, -1, | |
af7e9069 | 572 | axp20x->regmap_irq_chip, |
cfb61a41 CC |
573 | &axp20x->regmap_irqc); |
574 | if (ret) { | |
575 | dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret); | |
576 | return ret; | |
577 | } | |
578 | ||
af7e9069 JP |
579 | ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, |
580 | axp20x->nr_cells, NULL, 0, NULL); | |
cfb61a41 CC |
581 | |
582 | if (ret) { | |
583 | dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); | |
584 | regmap_del_irq_chip(i2c->irq, axp20x->regmap_irqc); | |
585 | return ret; | |
586 | } | |
587 | ||
588 | if (!pm_power_off) { | |
589 | axp20x_pm_power_off = axp20x; | |
590 | pm_power_off = axp20x_power_off; | |
591 | } | |
592 | ||
593 | dev_info(&i2c->dev, "AXP20X driver loaded\n"); | |
594 | ||
595 | return 0; | |
596 | } | |
597 | ||
598 | static int axp20x_i2c_remove(struct i2c_client *i2c) | |
599 | { | |
600 | struct axp20x_dev *axp20x = i2c_get_clientdata(i2c); | |
601 | ||
602 | if (axp20x == axp20x_pm_power_off) { | |
603 | axp20x_pm_power_off = NULL; | |
604 | pm_power_off = NULL; | |
605 | } | |
606 | ||
607 | mfd_remove_devices(axp20x->dev); | |
608 | regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc); | |
609 | ||
610 | return 0; | |
611 | } | |
612 | ||
613 | static struct i2c_driver axp20x_i2c_driver = { | |
614 | .driver = { | |
615 | .name = "axp20x", | |
616 | .owner = THIS_MODULE, | |
617 | .of_match_table = of_match_ptr(axp20x_of_match), | |
af7e9069 | 618 | .acpi_match_table = ACPI_PTR(axp20x_acpi_match), |
cfb61a41 CC |
619 | }, |
620 | .probe = axp20x_i2c_probe, | |
621 | .remove = axp20x_i2c_remove, | |
622 | .id_table = axp20x_i2c_id, | |
623 | }; | |
624 | ||
625 | module_i2c_driver(axp20x_i2c_driver); | |
626 | ||
627 | MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); | |
628 | MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); | |
629 | MODULE_LICENSE("GPL"); |