[deliverable/linux.git] / drivers / mfd / da9062-core.c

/*
 * Core, IRQ and I2C device driver for DA9062 PMIC
 * Copyright (C) 2015  Dialog Semiconductor Ltd.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/regmap.h>
#include <linux/irq.h>
#include <linux/mfd/core.h>
#include <linux/i2c.h>
#include <linux/mfd/da9062/core.h>
#include <linux/mfd/da9062/registers.h>
#include <linux/regulator/of_regulator.h>

#define	DA9062_REG_EVENT_A_OFFSET	0
#define	DA9062_REG_EVENT_B_OFFSET	1
#define	DA9062_REG_EVENT_C_OFFSET	2

static struct regmap_irq da9062_irqs[] = {
	/* EVENT A */
	[DA9062_IRQ_ONKEY] = {
		.reg_offset = DA9062_REG_EVENT_A_OFFSET,
		.mask = DA9062AA_M_NONKEY_MASK,
	},
	[DA9062_IRQ_ALARM] = {
		.reg_offset = DA9062_REG_EVENT_A_OFFSET,
		.mask = DA9062AA_M_ALARM_MASK,
	},
	[DA9062_IRQ_TICK] = {
		.reg_offset = DA9062_REG_EVENT_A_OFFSET,
		.mask = DA9062AA_M_TICK_MASK,
	},
	[DA9062_IRQ_WDG_WARN] = {
		.reg_offset = DA9062_REG_EVENT_A_OFFSET,
		.mask = DA9062AA_M_WDG_WARN_MASK,
	},
	[DA9062_IRQ_SEQ_RDY] = {
		.reg_offset = DA9062_REG_EVENT_A_OFFSET,
		.mask = DA9062AA_M_SEQ_RDY_MASK,
	},
	/* EVENT B */
	[DA9062_IRQ_TEMP] = {
		.reg_offset = DA9062_REG_EVENT_B_OFFSET,
		.mask = DA9062AA_M_TEMP_MASK,
	},
	[DA9062_IRQ_LDO_LIM] = {
		.reg_offset = DA9062_REG_EVENT_B_OFFSET,
		.mask = DA9062AA_M_LDO_LIM_MASK,
	},
	[DA9062_IRQ_DVC_RDY] = {
		.reg_offset = DA9062_REG_EVENT_B_OFFSET,
		.mask = DA9062AA_M_DVC_RDY_MASK,
	},
	[DA9062_IRQ_VDD_WARN] = {
		.reg_offset = DA9062_REG_EVENT_B_OFFSET,
		.mask = DA9062AA_M_VDD_WARN_MASK,
	},
	/* EVENT C */
	[DA9062_IRQ_GPI0] = {
		.reg_offset = DA9062_REG_EVENT_C_OFFSET,
		.mask = DA9062AA_M_GPI0_MASK,
	},
	[DA9062_IRQ_GPI1] = {
		.reg_offset = DA9062_REG_EVENT_C_OFFSET,
		.mask = DA9062AA_M_GPI1_MASK,
	},
	[DA9062_IRQ_GPI2] = {
		.reg_offset = DA9062_REG_EVENT_C_OFFSET,
		.mask = DA9062AA_M_GPI2_MASK,
	},
	[DA9062_IRQ_GPI3] = {
		.reg_offset = DA9062_REG_EVENT_C_OFFSET,
		.mask = DA9062AA_M_GPI3_MASK,
	},
	[DA9062_IRQ_GPI4] = {
		.reg_offset = DA9062_REG_EVENT_C_OFFSET,
		.mask = DA9062AA_M_GPI4_MASK,
	},
};

static struct regmap_irq_chip da9062_irq_chip = {
	.name = "da9062-irq",
	.irqs = da9062_irqs,
	.num_irqs = DA9062_NUM_IRQ,
	.num_regs = 3,
	.status_base = DA9062AA_EVENT_A,
	.mask_base = DA9062AA_IRQ_MASK_A,
	.ack_base = DA9062AA_EVENT_A,
};

static struct resource da9062_core_resources[] = {
	DEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ),
};

static struct resource da9062_regulators_resources[] = {
	DEFINE_RES_NAMED(DA9062_IRQ_LDO_LIM, 1, "LDO_LIM", IORESOURCE_IRQ),
};

static struct resource da9062_thermal_resources[] = {
	DEFINE_RES_NAMED(DA9062_IRQ_TEMP, 1, "THERMAL", IORESOURCE_IRQ),
};

static struct resource da9062_wdt_resources[] = {
	DEFINE_RES_NAMED(DA9062_IRQ_WDG_WARN, 1, "WD_WARN", IORESOURCE_IRQ),
};

static struct resource da9062_rtc_resources[] = {
	DEFINE_RES_NAMED(DA9062_IRQ_ALARM, 1, "ALARM", IORESOURCE_IRQ),
	DEFINE_RES_NAMED(DA9062_IRQ_TICK, 1, "TICK", IORESOURCE_IRQ),
};

static const struct mfd_cell da9062_devs[] = {
	{
		.name		= "da9062-core",
		.num_resources	= ARRAY_SIZE(da9062_core_resources),
		.resources	= da9062_core_resources,
	},
	{
		.name		= "da9062-regulators",
		.num_resources	= ARRAY_SIZE(da9062_regulators_resources),
		.resources	= da9062_regulators_resources,
	},
	{
		.name		= "da9062-watchdog",
		.num_resources	= ARRAY_SIZE(da9062_wdt_resources),
		.resources	= da9062_wdt_resources,
		.of_compatible  = "dlg,da9062-wdt",
	},
	{
		.name		= "da9062-thermal",
		.num_resources	= ARRAY_SIZE(da9062_thermal_resources),
		.resources	= da9062_thermal_resources,
		.of_compatible  = "dlg,da9062-thermal",
	},
	{
		.name		= "da9062-rtc",
		.num_resources	= ARRAY_SIZE(da9062_rtc_resources),
		.resources	= da9062_rtc_resources,
		.of_compatible  = "dlg,da9062-rtc",
	},
};

static int da9062_clear_fault_log(struct da9062 *chip)
{
	int ret;
	int fault_log;

	ret = regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log);
	if (ret < 0)
		return ret;

	if (fault_log) {
		if (fault_log & DA9062AA_TWD_ERROR_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: TWD_ERROR\n");
		if (fault_log & DA9062AA_POR_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: POR\n");
		if (fault_log & DA9062AA_VDD_FAULT_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: VDD_FAULT\n");
		if (fault_log & DA9062AA_VDD_START_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: VDD_START\n");
		if (fault_log & DA9062AA_TEMP_CRIT_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: TEMP_CRIT\n");
		if (fault_log & DA9062AA_KEY_RESET_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: KEY_RESET\n");
		if (fault_log & DA9062AA_NSHUTDOWN_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: NSHUTDOWN\n");
		if (fault_log & DA9062AA_WAIT_SHUT_MASK)
			dev_dbg(chip->dev, "Fault log entry detected: WAIT_SHUT\n");

		ret = regmap_write(chip->regmap, DA9062AA_FAULT_LOG,
				   fault_log);
	}

	return ret;
}

int get_device_type(struct da9062 *chip)
{
	int device_id, variant_id, variant_mrc;
	int ret;

	ret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id);
	if (ret < 0) {
		dev_err(chip->dev, "Cannot read chip ID.\n");
		return -EIO;
	}
	if (device_id != DA9062_PMIC_DEVICE_ID) {
		dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
		return -ENODEV;
	}

	ret = regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id);
	if (ret < 0) {
		dev_err(chip->dev, "Cannot read chip variant id.\n");
		return -EIO;
	}

	dev_info(chip->dev,
		 "Device detected (device-ID: 0x%02X, var-ID: 0x%02X)\n",
		 device_id, variant_id);

	variant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT;

	if (variant_mrc < DA9062_PMIC_VARIANT_MRC_AA) {
		dev_err(chip->dev,
			"Cannot support variant MRC: 0x%02X\n", variant_mrc);
		return -ENODEV;
	}

	return ret;
}

static const struct regmap_range da9062_aa_readable_ranges[] = {
	{
		.range_min = DA9062AA_PAGE_CON,
		.range_max = DA9062AA_STATUS_B,
	}, {
		.range_min = DA9062AA_STATUS_D,
		.range_max = DA9062AA_EVENT_C,
	}, {
		.range_min = DA9062AA_IRQ_MASK_A,
		.range_max = DA9062AA_IRQ_MASK_C,
	}, {
		.range_min = DA9062AA_CONTROL_A,
		.range_max = DA9062AA_GPIO_4,
	}, {
		.range_min = DA9062AA_GPIO_WKUP_MODE,
		.range_max = DA9062AA_BUCK4_CONT,
	}, {
		.range_min = DA9062AA_BUCK3_CONT,
		.range_max = DA9062AA_BUCK3_CONT,
	}, {
		.range_min = DA9062AA_LDO1_CONT,
		.range_max = DA9062AA_LDO4_CONT,
	}, {
		.range_min = DA9062AA_DVC_1,
		.range_max = DA9062AA_DVC_1,
	}, {
		.range_min = DA9062AA_COUNT_S,
		.range_max = DA9062AA_SECOND_D,
	}, {
		.range_min = DA9062AA_SEQ,
		.range_max = DA9062AA_ID_4_3,
	}, {
		.range_min = DA9062AA_ID_12_11,
		.range_max = DA9062AA_ID_16_15,
	}, {
		.range_min = DA9062AA_ID_22_21,
		.range_max = DA9062AA_ID_32_31,
	}, {
		.range_min = DA9062AA_SEQ_A,
		.range_max = DA9062AA_BUCK3_CFG,
	}, {
		.range_min = DA9062AA_VBUCK2_A,
		.range_max = DA9062AA_VBUCK4_A,
	}, {
		.range_min = DA9062AA_VBUCK3_A,
		.range_max = DA9062AA_VBUCK3_A,
	}, {
		.range_min = DA9062AA_VLDO1_A,
		.range_max = DA9062AA_VLDO4_A,
	}, {
		.range_min = DA9062AA_VBUCK2_B,
		.range_max = DA9062AA_VBUCK4_B,
	}, {
		.range_min = DA9062AA_VBUCK3_B,
		.range_max = DA9062AA_VBUCK3_B,
	}, {
		.range_min = DA9062AA_VLDO1_B,
		.range_max = DA9062AA_VLDO4_B,
	}, {
		.range_min = DA9062AA_BBAT_CONT,
		.range_max = DA9062AA_BBAT_CONT,
	}, {
		.range_min = DA9062AA_INTERFACE,
		.range_max = DA9062AA_CONFIG_E,
	}, {
		.range_min = DA9062AA_CONFIG_G,
		.range_max = DA9062AA_CONFIG_K,
	}, {
		.range_min = DA9062AA_CONFIG_M,
		.range_max = DA9062AA_CONFIG_M,
	}, {
		.range_min = DA9062AA_TRIM_CLDR,
		.range_max = DA9062AA_GP_ID_19,
	}, {
		.range_min = DA9062AA_DEVICE_ID,
		.range_max = DA9062AA_CONFIG_ID,
	},
};

static const struct regmap_range da9062_aa_writeable_ranges[] = {
	{
		.range_min = DA9062AA_PAGE_CON,
		.range_max = DA9062AA_PAGE_CON,
	}, {
		.range_min = DA9062AA_FAULT_LOG,
		.range_max = DA9062AA_EVENT_C,
	}, {
		.range_min = DA9062AA_IRQ_MASK_A,
		.range_max = DA9062AA_IRQ_MASK_C,
	}, {
		.range_min = DA9062AA_CONTROL_A,
		.range_max = DA9062AA_GPIO_4,
	}, {
		.range_min = DA9062AA_GPIO_WKUP_MODE,
		.range_max = DA9062AA_BUCK4_CONT,
	}, {
		.range_min = DA9062AA_BUCK3_CONT,
		.range_max = DA9062AA_BUCK3_CONT,
	}, {
		.range_min = DA9062AA_LDO1_CONT,
		.range_max = DA9062AA_LDO4_CONT,
	}, {
		.range_min = DA9062AA_DVC_1,
		.range_max = DA9062AA_DVC_1,
	}, {
		.range_min = DA9062AA_COUNT_S,
		.range_max = DA9062AA_ALARM_Y,
	}, {
		.range_min = DA9062AA_SEQ,
		.range_max = DA9062AA_ID_4_3,
	}, {
		.range_min = DA9062AA_ID_12_11,
		.range_max = DA9062AA_ID_16_15,
	}, {
		.range_min = DA9062AA_ID_22_21,
		.range_max = DA9062AA_ID_32_31,
	}, {
		.range_min = DA9062AA_SEQ_A,
		.range_max = DA9062AA_BUCK3_CFG,
	}, {
		.range_min = DA9062AA_VBUCK2_A,
		.range_max = DA9062AA_VBUCK4_A,
	}, {
		.range_min = DA9062AA_VBUCK3_A,
		.range_max = DA9062AA_VBUCK3_A,
	}, {
		.range_min = DA9062AA_VLDO1_A,
		.range_max = DA9062AA_VLDO4_A,
	}, {
		.range_min = DA9062AA_VBUCK2_B,
		.range_max = DA9062AA_VBUCK4_B,
	}, {
		.range_min = DA9062AA_VBUCK3_B,
		.range_max = DA9062AA_VBUCK3_B,
	}, {
		.range_min = DA9062AA_VLDO1_B,
		.range_max = DA9062AA_VLDO4_B,
	}, {
		.range_min = DA9062AA_BBAT_CONT,
		.range_max = DA9062AA_BBAT_CONT,
	}, {
		.range_min = DA9062AA_GP_ID_0,
		.range_max = DA9062AA_GP_ID_19,
	},
};

static const struct regmap_range da9062_aa_volatile_ranges[] = {
	{
		.range_min = DA9062AA_PAGE_CON,
		.range_max = DA9062AA_STATUS_B,
	}, {
		.range_min = DA9062AA_STATUS_D,
		.range_max = DA9062AA_EVENT_C,
	}, {
		.range_min = DA9062AA_CONTROL_F,
		.range_max = DA9062AA_CONTROL_F,
	}, {
		.range_min = DA9062AA_COUNT_S,
		.range_max = DA9062AA_SECOND_D,
	},
};

static const struct regmap_access_table da9062_aa_readable_table = {
	.yes_ranges = da9062_aa_readable_ranges,
	.n_yes_ranges = ARRAY_SIZE(da9062_aa_readable_ranges),
};

static const struct regmap_access_table da9062_aa_writeable_table = {
	.yes_ranges = da9062_aa_writeable_ranges,
	.n_yes_ranges = ARRAY_SIZE(da9062_aa_writeable_ranges),
};

static const struct regmap_access_table da9062_aa_volatile_table = {
	.yes_ranges = da9062_aa_volatile_ranges,
	.n_yes_ranges = ARRAY_SIZE(da9062_aa_volatile_ranges),
};

static const struct regmap_range_cfg da9062_range_cfg[] = {
	{
		.range_min = DA9062AA_PAGE_CON,
		.range_max = DA9062AA_CONFIG_ID,
		.selector_reg = DA9062AA_PAGE_CON,
		.selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT,
		.selector_shift = DA9062_I2C_PAGE_SEL_SHIFT,
		.window_start = 0,
		.window_len = 256,
	}
};

static struct regmap_config da9062_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.ranges = da9062_range_cfg,
	.num_ranges = ARRAY_SIZE(da9062_range_cfg),
	.max_register = DA9062AA_CONFIG_ID,
	.cache_type = REGCACHE_RBTREE,
	.rd_table = &da9062_aa_readable_table,
	.wr_table = &da9062_aa_writeable_table,
	.volatile_table = &da9062_aa_volatile_table,
};

static int da9062_i2c_probe(struct i2c_client *i2c,
	const struct i2c_device_id *id)
{
	struct da9062 *chip;
	unsigned int irq_base;
	int ret;

	chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	i2c_set_clientdata(i2c, chip);
	chip->dev = &i2c->dev;

	if (!i2c->irq) {
		dev_err(chip->dev, "No IRQ configured\n");
		return -EINVAL;
	}

	chip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config);
	if (IS_ERR(chip->regmap)) {
		ret = PTR_ERR(chip->regmap);
		dev_err(chip->dev, "Failed to allocate register map: %d\n",
			ret);
		return ret;
	}

	ret = da9062_clear_fault_log(chip);
	if (ret < 0)
		dev_warn(chip->dev, "Cannot clear fault log\n");

	ret = get_device_type(chip);
	if (ret)
		return ret;

	ret = regmap_add_irq_chip(chip->regmap, i2c->irq,
			IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
			-1, &da9062_irq_chip,
			&chip->regmap_irq);
	if (ret) {
		dev_err(chip->dev, "Failed to request IRQ %d: %d\n",
			i2c->irq, ret);
		return ret;
	}

	irq_base = regmap_irq_chip_get_base(chip->regmap_irq);

	ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs,
			      ARRAY_SIZE(da9062_devs), NULL, irq_base,
			      NULL);
	if (ret) {
		dev_err(chip->dev, "Cannot register child devices\n");
		regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
		return ret;
	}

	return ret;
}

static int da9062_i2c_remove(struct i2c_client *i2c)
{
	struct da9062 *chip = i2c_get_clientdata(i2c);

	mfd_remove_devices(chip->dev);
	regmap_del_irq_chip(i2c->irq, chip->regmap_irq);

	return 0;
}

static const struct i2c_device_id da9062_i2c_id[] = {
	{ "da9062", 0 },
	{ },
};
MODULE_DEVICE_TABLE(i2c, da9062_i2c_id);

static const struct of_device_id da9062_dt_ids[] = {
	{ .compatible = "dlg,da9062", },
	{ }
};
MODULE_DEVICE_TABLE(of, da9062_dt_ids);

static struct i2c_driver da9062_i2c_driver = {
	.driver = {
		.name = "da9062",
		.of_match_table = of_match_ptr(da9062_dt_ids),
	},
	.probe    = da9062_i2c_probe,
	.remove   = da9062_i2c_remove,
	.id_table = da9062_i2c_id,
};

module_i2c_driver(da9062_i2c_driver);

MODULE_DESCRIPTION("Core device driver for Dialog DA9062");
MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
9b40b030 T	1	/*
	2	* Core, IRQ and I2C device driver for DA9062 PMIC
	3	* Copyright (C) 2015 Dialog Semiconductor Ltd.
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#include <linux/kernel.h>
	17	#include <linux/module.h>
	18	#include <linux/init.h>
	19	#include <linux/device.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/regmap.h>
	22	#include <linux/irq.h>
	23	#include <linux/mfd/core.h>
	24	#include <linux/i2c.h>
	25	#include <linux/mfd/da9062/core.h>
	26	#include <linux/mfd/da9062/registers.h>
	27	#include <linux/regulator/of_regulator.h>
	28
	29	#define DA9062_REG_EVENT_A_OFFSET 0
	30	#define DA9062_REG_EVENT_B_OFFSET 1
	31	#define DA9062_REG_EVENT_C_OFFSET 2
	32
	33	static struct regmap_irq da9062_irqs[] = {
	34	/* EVENT A */
	35	[DA9062_IRQ_ONKEY] = {
	36	.reg_offset = DA9062_REG_EVENT_A_OFFSET,
	37	.mask = DA9062AA_M_NONKEY_MASK,
	38	},
	39	[DA9062_IRQ_ALARM] = {
	40	.reg_offset = DA9062_REG_EVENT_A_OFFSET,
	41	.mask = DA9062AA_M_ALARM_MASK,
	42	},
	43	[DA9062_IRQ_TICK] = {
	44	.reg_offset = DA9062_REG_EVENT_A_OFFSET,
	45	.mask = DA9062AA_M_TICK_MASK,
	46	},
	47	[DA9062_IRQ_WDG_WARN] = {
	48	.reg_offset = DA9062_REG_EVENT_A_OFFSET,
	49	.mask = DA9062AA_M_WDG_WARN_MASK,
	50	},
	51	[DA9062_IRQ_SEQ_RDY] = {
	52	.reg_offset = DA9062_REG_EVENT_A_OFFSET,
	53	.mask = DA9062AA_M_SEQ_RDY_MASK,
	54	},
	55	/* EVENT B */
	56	[DA9062_IRQ_TEMP] = {
	57	.reg_offset = DA9062_REG_EVENT_B_OFFSET,
	58	.mask = DA9062AA_M_TEMP_MASK,
	59	},
	60	[DA9062_IRQ_LDO_LIM] = {
	61	.reg_offset = DA9062_REG_EVENT_B_OFFSET,
	62	.mask = DA9062AA_M_LDO_LIM_MASK,
	63	},
	64	[DA9062_IRQ_DVC_RDY] = {
65	.reg_offset = DA9062_REG_EVENT_B_OFFSET,
66	.mask = DA9062AA_M_DVC_RDY_MASK,
67	},
68	[DA9062_IRQ_VDD_WARN] = {
69	.reg_offset = DA9062_REG_EVENT_B_OFFSET,
70	.mask = DA9062AA_M_VDD_WARN_MASK,
71	},
72	/* EVENT C */
73	[DA9062_IRQ_GPI0] = {
74	.reg_offset = DA9062_REG_EVENT_C_OFFSET,
75	.mask = DA9062AA_M_GPI0_MASK,
76	},
77	[DA9062_IRQ_GPI1] = {
78	.reg_offset = DA9062_REG_EVENT_C_OFFSET,
79	.mask = DA9062AA_M_GPI1_MASK,
80	},
81	[DA9062_IRQ_GPI2] = {
82	.reg_offset = DA9062_REG_EVENT_C_OFFSET,
83	.mask = DA9062AA_M_GPI2_MASK,
84	},
85	[DA9062_IRQ_GPI3] = {
86	.reg_offset = DA9062_REG_EVENT_C_OFFSET,
87	.mask = DA9062AA_M_GPI3_MASK,
88	},
89	[DA9062_IRQ_GPI4] = {
90	.reg_offset = DA9062_REG_EVENT_C_OFFSET,
91	.mask = DA9062AA_M_GPI4_MASK,
92	},
93	};
94
95	static struct regmap_irq_chip da9062_irq_chip = {
96	.name = "da9062-irq",
97	.irqs = da9062_irqs,
98	.num_irqs = DA9062_NUM_IRQ,
99	.num_regs = 3,
100	.status_base = DA9062AA_EVENT_A,
101	.mask_base = DA9062AA_IRQ_MASK_A,
102	.ack_base = DA9062AA_EVENT_A,
103	};
104
105	static struct resource da9062_core_resources[] = {
106	DEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ),
107	};
108
109	static struct resource da9062_regulators_resources[] = {
110	DEFINE_RES_NAMED(DA9062_IRQ_LDO_LIM, 1, "LDO_LIM", IORESOURCE_IRQ),
111	};
112
113	static struct resource da9062_thermal_resources[] = {
114	DEFINE_RES_NAMED(DA9062_IRQ_TEMP, 1, "THERMAL", IORESOURCE_IRQ),
115	};
116
117	static struct resource da9062_wdt_resources[] = {
118	DEFINE_RES_NAMED(DA9062_IRQ_WDG_WARN, 1, "WD_WARN", IORESOURCE_IRQ),
119	};
120
ca1ce176 T	121	static struct resource da9062_rtc_resources[] = {
	122	DEFINE_RES_NAMED(DA9062_IRQ_ALARM, 1, "ALARM", IORESOURCE_IRQ),
	123	DEFINE_RES_NAMED(DA9062_IRQ_TICK, 1, "TICK", IORESOURCE_IRQ),
	124	};
	125
9b40b030 T	126	static const struct mfd_cell da9062_devs[] = {
	127	{
	128	.name = "da9062-core",
	129	.num_resources = ARRAY_SIZE(da9062_core_resources),
	130	.resources = da9062_core_resources,
	131	},
	132	{
	133	.name = "da9062-regulators",
	134	.num_resources = ARRAY_SIZE(da9062_regulators_resources),
	135	.resources = da9062_regulators_resources,
	136	},
	137	{
	138	.name = "da9062-watchdog",
	139	.num_resources = ARRAY_SIZE(da9062_wdt_resources),
	140	.resources = da9062_wdt_resources,
	141	.of_compatible = "dlg,da9062-wdt",
	142	},
	143	{
	144	.name = "da9062-thermal",
	145	.num_resources = ARRAY_SIZE(da9062_thermal_resources),
	146	.resources = da9062_thermal_resources,
	147	.of_compatible = "dlg,da9062-thermal",
	148	},
ca1ce176 T	149	{
	150	.name = "da9062-rtc",
	151	.num_resources = ARRAY_SIZE(da9062_rtc_resources),
	152	.resources = da9062_rtc_resources,
	153	.of_compatible = "dlg,da9062-rtc",
	154	},
9b40b030 T	155	};
	156
	157	static int da9062_clear_fault_log(struct da9062 *chip)
	158	{
	159	int ret;
	160	int fault_log;
	161
	162	ret = regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log);
	163	if (ret < 0)
	164	return ret;
	165
	166	if (fault_log) {
	167	if (fault_log & DA9062AA_TWD_ERROR_MASK)
	168	dev_dbg(chip->dev, "Fault log entry detected: TWD_ERROR\n");
	169	if (fault_log & DA9062AA_POR_MASK)
	170	dev_dbg(chip->dev, "Fault log entry detected: POR\n");
	171	if (fault_log & DA9062AA_VDD_FAULT_MASK)
	172	dev_dbg(chip->dev, "Fault log entry detected: VDD_FAULT\n");
	173	if (fault_log & DA9062AA_VDD_START_MASK)
	174	dev_dbg(chip->dev, "Fault log entry detected: VDD_START\n");
	175	if (fault_log & DA9062AA_TEMP_CRIT_MASK)
	176	dev_dbg(chip->dev, "Fault log entry detected: TEMP_CRIT\n");
	177	if (fault_log & DA9062AA_KEY_RESET_MASK)
	178	dev_dbg(chip->dev, "Fault log entry detected: KEY_RESET\n");
	179	if (fault_log & DA9062AA_NSHUTDOWN_MASK)
	180	dev_dbg(chip->dev, "Fault log entry detected: NSHUTDOWN\n");
	181	if (fault_log & DA9062AA_WAIT_SHUT_MASK)
	182	dev_dbg(chip->dev, "Fault log entry detected: WAIT_SHUT\n");
	183
	184	ret = regmap_write(chip->regmap, DA9062AA_FAULT_LOG,
	185	fault_log);
	186	}
	187
	188	return ret;
	189	}
	190
	191	int get_device_type(struct da9062 *chip)
	192	{
	193	int device_id, variant_id, variant_mrc;
	194	int ret;
	195
	196	ret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id);
	197	if (ret < 0) {
	198	dev_err(chip->dev, "Cannot read chip ID.\n");
	199	return -EIO;
	200	}
	201	if (device_id != DA9062_PMIC_DEVICE_ID) {
	202	dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
	203	return -ENODEV;
	204	}
	205
	206	ret = regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id);
	207	if (ret < 0) {
	208	dev_err(chip->dev, "Cannot read chip variant id.\n");
	209	return -EIO;
	210	}
	211
	212	dev_info(chip->dev,
	213	"Device detected (device-ID: 0x%02X, var-ID: 0x%02X)\n",
	214	device_id, variant_id);
	215
	216	variant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT;
	217
	218	if (variant_mrc < DA9062_PMIC_VARIANT_MRC_AA) {
219	dev_err(chip->dev,
220	"Cannot support variant MRC: 0x%02X\n", variant_mrc);
221	return -ENODEV;
222	}
223
224	return ret;
225	}
226
227	static const struct regmap_range da9062_aa_readable_ranges[] = {
228	{
229	.range_min = DA9062AA_PAGE_CON,
230	.range_max = DA9062AA_STATUS_B,
231	}, {
232	.range_min = DA9062AA_STATUS_D,
233	.range_max = DA9062AA_EVENT_C,
234	}, {
235	.range_min = DA9062AA_IRQ_MASK_A,
236	.range_max = DA9062AA_IRQ_MASK_C,
237	}, {
238	.range_min = DA9062AA_CONTROL_A,
239	.range_max = DA9062AA_GPIO_4,
240	}, {
241	.range_min = DA9062AA_GPIO_WKUP_MODE,
242	.range_max = DA9062AA_BUCK4_CONT,
243	}, {
244	.range_min = DA9062AA_BUCK3_CONT,
245	.range_max = DA9062AA_BUCK3_CONT,
246	}, {
247	.range_min = DA9062AA_LDO1_CONT,
248	.range_max = DA9062AA_LDO4_CONT,
249	}, {
250	.range_min = DA9062AA_DVC_1,
251	.range_max = DA9062AA_DVC_1,
252	}, {
253	.range_min = DA9062AA_COUNT_S,
254	.range_max = DA9062AA_SECOND_D,
255	}, {
256	.range_min = DA9062AA_SEQ,
257	.range_max = DA9062AA_ID_4_3,
258	}, {
259	.range_min = DA9062AA_ID_12_11,
260	.range_max = DA9062AA_ID_16_15,
261	}, {
262	.range_min = DA9062AA_ID_22_21,
263	.range_max = DA9062AA_ID_32_31,
264	}, {
265	.range_min = DA9062AA_SEQ_A,
266	.range_max = DA9062AA_BUCK3_CFG,
267	}, {
268	.range_min = DA9062AA_VBUCK2_A,
269	.range_max = DA9062AA_VBUCK4_A,
270	}, {
271	.range_min = DA9062AA_VBUCK3_A,
272	.range_max = DA9062AA_VBUCK3_A,
273	}, {
274	.range_min = DA9062AA_VLDO1_A,
275	.range_max = DA9062AA_VLDO4_A,
276	}, {
277	.range_min = DA9062AA_VBUCK2_B,
278	.range_max = DA9062AA_VBUCK4_B,
279	}, {
280	.range_min = DA9062AA_VBUCK3_B,
281	.range_max = DA9062AA_VBUCK3_B,
282	}, {
283	.range_min = DA9062AA_VLDO1_B,
284	.range_max = DA9062AA_VLDO4_B,
285	}, {
286	.range_min = DA9062AA_BBAT_CONT,
287	.range_max = DA9062AA_BBAT_CONT,
288	}, {
289	.range_min = DA9062AA_INTERFACE,
290	.range_max = DA9062AA_CONFIG_E,
291	}, {
292	.range_min = DA9062AA_CONFIG_G,
293	.range_max = DA9062AA_CONFIG_K,
294	}, {
295	.range_min = DA9062AA_CONFIG_M,
296	.range_max = DA9062AA_CONFIG_M,
297	}, {
298	.range_min = DA9062AA_TRIM_CLDR,
299	.range_max = DA9062AA_GP_ID_19,
300	}, {
301	.range_min = DA9062AA_DEVICE_ID,
302	.range_max = DA9062AA_CONFIG_ID,
303	},
304	};
305
306	static const struct regmap_range da9062_aa_writeable_ranges[] = {
307	{
308	.range_min = DA9062AA_PAGE_CON,
309	.range_max = DA9062AA_PAGE_CON,
310	}, {
311	.range_min = DA9062AA_FAULT_LOG,
312	.range_max = DA9062AA_EVENT_C,
313	}, {
314	.range_min = DA9062AA_IRQ_MASK_A,
315	.range_max = DA9062AA_IRQ_MASK_C,
316	}, {
317	.range_min = DA9062AA_CONTROL_A,
318	.range_max = DA9062AA_GPIO_4,
319	}, {
320	.range_min = DA9062AA_GPIO_WKUP_MODE,
321	.range_max = DA9062AA_BUCK4_CONT,
322	}, {
323	.range_min = DA9062AA_BUCK3_CONT,
324	.range_max = DA9062AA_BUCK3_CONT,
325	}, {
326	.range_min = DA9062AA_LDO1_CONT,
327	.range_max = DA9062AA_LDO4_CONT,
328	}, {
329	.range_min = DA9062AA_DVC_1,
330	.range_max = DA9062AA_DVC_1,
331	}, {
332	.range_min = DA9062AA_COUNT_S,
333	.range_max = DA9062AA_ALARM_Y,
334	}, {
335	.range_min = DA9062AA_SEQ,
336	.range_max = DA9062AA_ID_4_3,
337	}, {
338	.range_min = DA9062AA_ID_12_11,
339	.range_max = DA9062AA_ID_16_15,
340	}, {
341	.range_min = DA9062AA_ID_22_21,
342	.range_max = DA9062AA_ID_32_31,
343	}, {
344	.range_min = DA9062AA_SEQ_A,
345	.range_max = DA9062AA_BUCK3_CFG,
346	}, {
347	.range_min = DA9062AA_VBUCK2_A,
348	.range_max = DA9062AA_VBUCK4_A,
349	}, {
350	.range_min = DA9062AA_VBUCK3_A,
351	.range_max = DA9062AA_VBUCK3_A,
352	}, {
353	.range_min = DA9062AA_VLDO1_A,
354	.range_max = DA9062AA_VLDO4_A,
355	}, {
356	.range_min = DA9062AA_VBUCK2_B,
357	.range_max = DA9062AA_VBUCK4_B,
358	}, {
359	.range_min = DA9062AA_VBUCK3_B,
360	.range_max = DA9062AA_VBUCK3_B,
361	}, {
362	.range_min = DA9062AA_VLDO1_B,
363	.range_max = DA9062AA_VLDO4_B,
364	}, {
365	.range_min = DA9062AA_BBAT_CONT,
366	.range_max = DA9062AA_BBAT_CONT,
367	}, {
368	.range_min = DA9062AA_GP_ID_0,
369	.range_max = DA9062AA_GP_ID_19,
370	},
371	};
372
373	static const struct regmap_range da9062_aa_volatile_ranges[] = {
374	{
375	.range_min = DA9062AA_PAGE_CON,
376	.range_max = DA9062AA_STATUS_B,
377	}, {
378	.range_min = DA9062AA_STATUS_D,
379	.range_max = DA9062AA_EVENT_C,
380	}, {
381	.range_min = DA9062AA_CONTROL_F,
382	.range_max = DA9062AA_CONTROL_F,
383	}, {
384	.range_min = DA9062AA_COUNT_S,
385	.range_max = DA9062AA_SECOND_D,
386	},
387	};
388
389	static const struct regmap_access_table da9062_aa_readable_table = {
390	.yes_ranges = da9062_aa_readable_ranges,
391	.n_yes_ranges = ARRAY_SIZE(da9062_aa_readable_ranges),
392	};
393
394	static const struct regmap_access_table da9062_aa_writeable_table = {
395	.yes_ranges = da9062_aa_writeable_ranges,
396	.n_yes_ranges = ARRAY_SIZE(da9062_aa_writeable_ranges),
397	};
398
399	static const struct regmap_access_table da9062_aa_volatile_table = {
400	.yes_ranges = da9062_aa_volatile_ranges,
401	.n_yes_ranges = ARRAY_SIZE(da9062_aa_volatile_ranges),
402	};
403
404	static const struct regmap_range_cfg da9062_range_cfg[] = {
405	{
406	.range_min = DA9062AA_PAGE_CON,
407	.range_max = DA9062AA_CONFIG_ID,
408	.selector_reg = DA9062AA_PAGE_CON,
409	.selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT,
410	.selector_shift = DA9062_I2C_PAGE_SEL_SHIFT,
411	.window_start = 0,
412	.window_len = 256,
413	}
414	};
415
416	static struct regmap_config da9062_regmap_config = {
417	.reg_bits = 8,
418	.val_bits = 8,
419	.ranges = da9062_range_cfg,
420	.num_ranges = ARRAY_SIZE(da9062_range_cfg),
421	.max_register = DA9062AA_CONFIG_ID,
422	.cache_type = REGCACHE_RBTREE,
423	.rd_table = &da9062_aa_readable_table,
424	.wr_table = &da9062_aa_writeable_table,
425	.volatile_table = &da9062_aa_volatile_table,
426	};
427
428	static int da9062_i2c_probe(struct i2c_client *i2c,
429	const struct i2c_device_id *id)
430	{
431	struct da9062 *chip;
432	unsigned int irq_base;
433	int ret;
434
435	chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL);
436	if (!chip)
437	return -ENOMEM;
438
439	i2c_set_clientdata(i2c, chip);
440	chip->dev = &i2c->dev;
441
442	if (!i2c->irq) {
443	dev_err(chip->dev, "No IRQ configured\n");
444	return -EINVAL;
445	}
446
447	chip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config);
448	if (IS_ERR(chip->regmap)) {
449	ret = PTR_ERR(chip->regmap);
450	dev_err(chip->dev, "Failed to allocate register map: %d\n",
451	ret);
452	return ret;
453	}
454
455	ret = da9062_clear_fault_log(chip);
456	if (ret < 0)
457	dev_warn(chip->dev, "Cannot clear fault log\n");
458
459	ret = get_device_type(chip);
460	if (ret)
461	return ret;
462
463	ret = regmap_add_irq_chip(chip->regmap, i2c->irq,
464	IRQF_TRIGGER_LOW \| IRQF_ONESHOT \| IRQF_SHARED,
465	-1, &da9062_irq_chip,
466	&chip->regmap_irq);
467	if (ret) {
468	dev_err(chip->dev, "Failed to request IRQ %d: %d\n",
469	i2c->irq, ret);
470	return ret;
471	}
472
473	irq_base = regmap_irq_chip_get_base(chip->regmap_irq);
474
475	ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs,
476	ARRAY_SIZE(da9062_devs), NULL, irq_base,
477	NULL);
478	if (ret) {
479	dev_err(chip->dev, "Cannot register child devices\n");
480	regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
481	return ret;
482	}
483
484	return ret;
485	}
486
487	static int da9062_i2c_remove(struct i2c_client *i2c)
488	{
489	struct da9062 *chip = i2c_get_clientdata(i2c);
490
491	mfd_remove_devices(chip->dev);
492	regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
493
494	return 0;
495	}
496
497	static const struct i2c_device_id da9062_i2c_id[] = {
498	{ "da9062", 0 },
499	{ },
500	};
501	MODULE_DEVICE_TABLE(i2c, da9062_i2c_id);
502
503	static const struct of_device_id da9062_dt_ids[] = {
504	{ .compatible = "dlg,da9062", },
505	{ }
506	};
507	MODULE_DEVICE_TABLE(of, da9062_dt_ids);
508
509	static struct i2c_driver da9062_i2c_driver = {
510	.driver = {
511	.name = "da9062",
512	.of_match_table = of_match_ptr(da9062_dt_ids),
513	},
514	.probe = da9062_i2c_probe,
515	.remove = da9062_i2c_remove,
516	.id_table = da9062_i2c_id,
517	};
518
519	module_i2c_driver(da9062_i2c_driver);
520
521	MODULE_DESCRIPTION("Core device driver for Dialog DA9062");
522	MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>");
523	MODULE_LICENSE("GPL");