[deliverable/linux.git] / drivers / mfd / lpc_sch.c

/*
 *  lpc_sch.c - LPC interface for Intel Poulsbo SCH
 *
 *  LPC bridge function of the Intel SCH contains many other
 *  functional units, such as Interrupt controllers, Timers,
 *  Power Management, System Management, GPIO, RTC, and LPC
 *  Configuration Registers.
 *
 *  Copyright (c) 2010 CompuLab Ltd
 *  Author: Denis Turischev <denis@compulab.co.il>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License 2 as published
 *  by the Free Software Foundation.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/acpi.h>
#include <linux/pci.h>
#include <linux/mfd/core.h>

#define SMBASE		0x40
#define SMBUS_IO_SIZE	64

#define GPIOBASE	0x44
#define GPIO_IO_SIZE	64
#define GPIO_IO_SIZE_CENTERTON	128

#define WDTBASE		0x84
#define WDT_IO_SIZE	64

enum sch_chipsets {
	LPC_SCH = 0,		/* Intel Poulsbo SCH */
	LPC_ITC,		/* Intel Tunnel Creek */
	LPC_CENTERTON,		/* Intel Centerton */
};

struct lpc_sch_info {
	unsigned int io_size_smbus;
	unsigned int io_size_gpio;
	unsigned int io_size_wdt;
};

static struct lpc_sch_info sch_chipset_info[] = {
	[LPC_SCH] = {
		.io_size_smbus = SMBUS_IO_SIZE,
		.io_size_gpio = GPIO_IO_SIZE,
	},
	[LPC_ITC] = {
		.io_size_smbus = SMBUS_IO_SIZE,
		.io_size_gpio = GPIO_IO_SIZE,
		.io_size_wdt = WDT_IO_SIZE,
	},
	[LPC_CENTERTON] = {
		.io_size_smbus = SMBUS_IO_SIZE,
		.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
		.io_size_wdt = WDT_IO_SIZE,
	},
};

static const struct pci_device_id lpc_sch_ids[] = {
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, lpc_sch_ids);

#define LPC_NO_RESOURCE		1
#define LPC_SKIP_RESOURCE	2

static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
			  struct resource *res, int size)
{
	unsigned int base_addr_cfg;
	unsigned short base_addr;

	if (size == 0)
		return LPC_NO_RESOURCE;

	pci_read_config_dword(pdev, where, &base_addr_cfg);
	base_addr = 0;
	if (!(base_addr_cfg & (1 << 31)))
		dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
			 name);
	else
		base_addr = (unsigned short)base_addr_cfg;

	if (base_addr == 0) {
		dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
		return LPC_SKIP_RESOURCE;
	}

	res->start = base_addr;
	res->end = base_addr + size - 1;
	res->flags = IORESOURCE_IO;

	return 0;
}

static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
				 const char *name, int size, int id,
				 struct mfd_cell *cell)
{
	struct resource *res;
	int ret;

	res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
	if (!res)
		return -ENOMEM;

	ret = lpc_sch_get_io(pdev, where, name, res, size);
	if (ret)
		return ret;

	memset(cell, 0, sizeof(*cell));

	cell->name = name;
	cell->resources = res;
	cell->num_resources = 1;
	cell->ignore_resource_conflicts = true;
	cell->id = id;

	return 0;
}

static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct mfd_cell lpc_sch_cells[3];
	struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
	unsigned int cells = 0;
	int ret;

	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
				    info->io_size_smbus,
				    id->device, &lpc_sch_cells[cells]);
	if (ret < 0)
		return ret;
	if (ret == 0)
		cells++;

	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
				    info->io_size_gpio,
				    id->device, &lpc_sch_cells[cells]);
	if (ret < 0)
		return ret;
	if (ret == 0)
		cells++;

	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
				    info->io_size_wdt,
				    id->device, &lpc_sch_cells[cells]);
	if (ret < 0)
		return ret;
	if (ret == 0)
		cells++;

	if (cells == 0) {
		dev_err(&dev->dev, "All decode registers disabled.\n");
		return -ENODEV;
	}

	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
	if (ret)
		mfd_remove_devices(&dev->dev);

	return ret;
}

static void lpc_sch_remove(struct pci_dev *dev)
{
	mfd_remove_devices(&dev->dev);
}

static struct pci_driver lpc_sch_driver = {
	.name		= "lpc_sch",
	.id_table	= lpc_sch_ids,
	.probe		= lpc_sch_probe,
	.remove		= lpc_sch_remove,
};

module_pci_driver(lpc_sch_driver);

MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
MODULE_LICENSE("GPL");
Commit	Line	Data
e82c60ae DT	1	/*
	2	* lpc_sch.c - LPC interface for Intel Poulsbo SCH
	3	*
	4	* LPC bridge function of the Intel SCH contains many other
	5	* functional units, such as Interrupt controllers, Timers,
	6	* Power Management, System Management, GPIO, RTC, and LPC
	7	* Configuration Registers.
	8	*
	9	* Copyright (c) 2010 CompuLab Ltd
	10	* Author: Denis Turischev <denis@compulab.co.il>
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License 2 as published
	14	* by the Free Software Foundation.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; see the file COPYING. If not, write to
	23	* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
e82c60ae DT	26	#include <linux/kernel.h>
	27	#include <linux/module.h>
	28	#include <linux/errno.h>
	29	#include <linux/acpi.h>
	30	#include <linux/pci.h>
	31	#include <linux/mfd/core.h>
	32
	33	#define SMBASE 0x40
	34	#define SMBUS_IO_SIZE 64
	35
	36	#define GPIOBASE 0x44
	37	#define GPIO_IO_SIZE 64
8ee3c2a7	38	#define GPIO_IO_SIZE_CENTERTON 128
e82c60ae	39
19921ef6 AS	40	#define WDTBASE 0x84
	41	#define WDT_IO_SIZE 64
	42
b24512c8 AS	43	enum sch_chipsets {
	44	LPC_SCH = 0, /* Intel Poulsbo SCH */
	45	LPC_ITC, /* Intel Tunnel Creek */
	46	LPC_CENTERTON, /* Intel Centerton */
e82c60ae DT	47	};
e82c60ae DT	48
b24512c8 AS	49	struct lpc_sch_info {
	50	unsigned int io_size_smbus;
	51	unsigned int io_size_gpio;
	52	unsigned int io_size_wdt;
e82c60ae DT	53	};
e82c60ae DT	54
b24512c8 AS	55	static struct lpc_sch_info sch_chipset_info[] = {
	56	[LPC_SCH] = {
	57	.io_size_smbus = SMBUS_IO_SIZE,
	58	.io_size_gpio = GPIO_IO_SIZE,
	59	},
	60	[LPC_ITC] = {
	61	.io_size_smbus = SMBUS_IO_SIZE,
	62	.io_size_gpio = GPIO_IO_SIZE,
	63	.io_size_wdt = WDT_IO_SIZE,
	64	},
	65	[LPC_CENTERTON] = {
	66	.io_size_smbus = SMBUS_IO_SIZE,
	67	.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
	68	.io_size_wdt = WDT_IO_SIZE,
	69	},
19921ef6 AS	70	};
19921ef6 AS	71
36fcd06c	72	static const struct pci_device_id lpc_sch_ids[] = {
b24512c8 AS	73	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
	74	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
	75	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
e82c60ae DT	76	{ 0, }
	77	};
	78	MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
	79
b24512c8 AS	80	#define LPC_NO_RESOURCE 1
	81	#define LPC_SKIP_RESOURCE 2
	82
	83	static int lpc_sch_get_io(struct pci_dev pdev, int where, const char name,
	84	struct resource *res, int size)
e82c60ae DT	85	{
	86	unsigned int base_addr_cfg;
	87	unsigned short base_addr;
	88
b24512c8 AS	89	if (size == 0)
	90	return LPC_NO_RESOURCE;
	91
	92	pci_read_config_dword(pdev, where, &base_addr_cfg);
5829e9b6 DH	93	base_addr = 0;
5829e9b6 DH	94	if (!(base_addr_cfg & (1 << 31)))
b24512c8 AS	95	dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
b24512c8 AS	96	name);
5829e9b6 DH	97	else
5829e9b6 DH	98	base_addr = (unsigned short)base_addr_cfg;
e82c60ae	99
e82c60ae	100	if (base_addr == 0) {
b24512c8 AS	101	dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
b24512c8 AS	102	return LPC_SKIP_RESOURCE;
e82c60ae DT	103	}
e82c60ae DT	104
b24512c8 AS	105	res->start = base_addr;
	106	res->end = base_addr + size - 1;
	107	res->flags = IORESOURCE_IO;
e967f77d	108
b24512c8 AS	109	return 0;
b24512c8 AS	110	}
19921ef6	111
b24512c8 AS	112	static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
	113	const char *name, int size, int id,
	114	struct mfd_cell *cell)
	115	{
	116	struct resource *res;
	117	int ret;
19921ef6	118
b24512c8 AS	119	res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
	120	if (!res)
	121	return -ENOMEM;
	122
	123	ret = lpc_sch_get_io(pdev, where, name, res, size);
	124	if (ret)
	125	return ret;
	126
	127	memset(cell, 0, sizeof(*cell));
	128
	129	cell->name = name;
	130	cell->resources = res;
	131	cell->num_resources = 1;
	132	cell->ignore_resource_conflicts = true;
	133	cell->id = id;
	134
	135	return 0;
	136	}
	137
	138	static int lpc_sch_probe(struct pci_dev dev, const struct pci_device_id id)
	139	{
	140	struct mfd_cell lpc_sch_cells[3];
	141	struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
	142	unsigned int cells = 0;
	143	int ret;
	144
	145	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
	146	info->io_size_smbus,
	147	id->device, &lpc_sch_cells[cells]);
	148	if (ret < 0)
	149	return ret;
	150	if (ret == 0)
	151	cells++;
	152
	153	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
	154	info->io_size_gpio,
	155	id->device, &lpc_sch_cells[cells]);
	156	if (ret < 0)
	157	return ret;
	158	if (ret == 0)
	159	cells++;
	160
	161	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
	162	info->io_size_wdt,
	163	id->device, &lpc_sch_cells[cells]);
	164	if (ret < 0)
	165	return ret;
	166	if (ret == 0)
	167	cells++;
19921ef6	168
5829e9b6 DH	169	if (cells == 0) {
	170	dev_err(&dev->dev, "All decode registers disabled.\n");
	171	return -ENODEV;
19921ef6 AS	172	}
19921ef6 AS	173
5829e9b6 DH	174	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
	175	if (ret)
	176	mfd_remove_devices(&dev->dev);
	177
19921ef6	178	return ret;
e82c60ae DT	179	}
e82c60ae DT	180
4740f73f	181	static void lpc_sch_remove(struct pci_dev *dev)
e82c60ae DT	182	{
	183	mfd_remove_devices(&dev->dev);
	184	}
	185
	186	static struct pci_driver lpc_sch_driver = {
	187	.name = "lpc_sch",
	188	.id_table = lpc_sch_ids,
	189	.probe = lpc_sch_probe,
84449216	190	.remove = lpc_sch_remove,
e82c60ae DT	191	};
e82c60ae DT	192
38a36f5a	193	module_pci_driver(lpc_sch_driver);
e82c60ae DT	194
	195	MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
	196	MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
	197	MODULE_LICENSE("GPL");