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0c4a59fe TL |
1 | /* |
2 | * Copyright (C) 2004 Texas Instruments, Inc. | |
3 | * | |
4 | * Some parts based tps65010.c: | |
5 | * Copyright (C) 2004 Texas Instruments and | |
6 | * Copyright (C) 2004-2005 David Brownell | |
7 | * | |
8 | * Some parts based on tlv320aic24.c: | |
9 | * Copyright (C) by Kai Svahn <kai.svahn@nokia.com> | |
10 | * | |
11 | * Changes for interrupt handling and clean-up by | |
12 | * Tony Lindgren <tony@atomide.com> and Imre Deak <imre.deak@nokia.com> | |
13 | * Cleanup and generalized support for voltage setting by | |
14 | * Juha Yrjola | |
15 | * Added support for controlling VCORE and regulator sleep states, | |
16 | * Amit Kucheria <amit.kucheria@nokia.com> | |
17 | * Copyright (C) 2005, 2006 Nokia Corporation | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or modify | |
20 | * it under the terms of the GNU General Public License as published by | |
21 | * the Free Software Foundation; either version 2 of the License, or | |
22 | * (at your option) any later version. | |
23 | * | |
24 | * This program is distributed in the hope that it will be useful, | |
25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
27 | * GNU General Public License for more details. | |
28 | * | |
29 | * You should have received a copy of the GNU General Public License | |
30 | * along with this program; if not, write to the Free Software | |
31 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
32 | */ | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/i2c.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/sched.h> | |
38 | #include <linux/mutex.h> | |
39 | #include <linux/workqueue.h> | |
40 | #include <linux/delay.h> | |
41 | #include <linux/rtc.h> | |
42 | #include <linux/bcd.h> | |
5a0e3ad6 | 43 | #include <linux/slab.h> |
0c4a59fe | 44 | |
0c4a59fe TL |
45 | #include <asm/mach/irq.h> |
46 | ||
a09e64fb | 47 | #include <mach/gpio.h> |
ce491cf8 | 48 | #include <plat/menelaus.h> |
0c4a59fe TL |
49 | |
50 | #define DRIVER_NAME "menelaus" | |
51 | ||
0c4a59fe TL |
52 | #define MENELAUS_I2C_ADDRESS 0x72 |
53 | ||
54 | #define MENELAUS_REV 0x01 | |
55 | #define MENELAUS_VCORE_CTRL1 0x02 | |
56 | #define MENELAUS_VCORE_CTRL2 0x03 | |
57 | #define MENELAUS_VCORE_CTRL3 0x04 | |
58 | #define MENELAUS_VCORE_CTRL4 0x05 | |
59 | #define MENELAUS_VCORE_CTRL5 0x06 | |
60 | #define MENELAUS_DCDC_CTRL1 0x07 | |
61 | #define MENELAUS_DCDC_CTRL2 0x08 | |
62 | #define MENELAUS_DCDC_CTRL3 0x09 | |
63 | #define MENELAUS_LDO_CTRL1 0x0A | |
64 | #define MENELAUS_LDO_CTRL2 0x0B | |
65 | #define MENELAUS_LDO_CTRL3 0x0C | |
66 | #define MENELAUS_LDO_CTRL4 0x0D | |
67 | #define MENELAUS_LDO_CTRL5 0x0E | |
68 | #define MENELAUS_LDO_CTRL6 0x0F | |
69 | #define MENELAUS_LDO_CTRL7 0x10 | |
70 | #define MENELAUS_LDO_CTRL8 0x11 | |
71 | #define MENELAUS_SLEEP_CTRL1 0x12 | |
72 | #define MENELAUS_SLEEP_CTRL2 0x13 | |
73 | #define MENELAUS_DEVICE_OFF 0x14 | |
74 | #define MENELAUS_OSC_CTRL 0x15 | |
75 | #define MENELAUS_DETECT_CTRL 0x16 | |
76 | #define MENELAUS_INT_MASK1 0x17 | |
77 | #define MENELAUS_INT_MASK2 0x18 | |
78 | #define MENELAUS_INT_STATUS1 0x19 | |
79 | #define MENELAUS_INT_STATUS2 0x1A | |
80 | #define MENELAUS_INT_ACK1 0x1B | |
81 | #define MENELAUS_INT_ACK2 0x1C | |
82 | #define MENELAUS_GPIO_CTRL 0x1D | |
83 | #define MENELAUS_GPIO_IN 0x1E | |
84 | #define MENELAUS_GPIO_OUT 0x1F | |
85 | #define MENELAUS_BBSMS 0x20 | |
86 | #define MENELAUS_RTC_CTRL 0x21 | |
87 | #define MENELAUS_RTC_UPDATE 0x22 | |
88 | #define MENELAUS_RTC_SEC 0x23 | |
89 | #define MENELAUS_RTC_MIN 0x24 | |
90 | #define MENELAUS_RTC_HR 0x25 | |
91 | #define MENELAUS_RTC_DAY 0x26 | |
92 | #define MENELAUS_RTC_MON 0x27 | |
93 | #define MENELAUS_RTC_YR 0x28 | |
94 | #define MENELAUS_RTC_WKDAY 0x29 | |
95 | #define MENELAUS_RTC_AL_SEC 0x2A | |
96 | #define MENELAUS_RTC_AL_MIN 0x2B | |
97 | #define MENELAUS_RTC_AL_HR 0x2C | |
98 | #define MENELAUS_RTC_AL_DAY 0x2D | |
99 | #define MENELAUS_RTC_AL_MON 0x2E | |
100 | #define MENELAUS_RTC_AL_YR 0x2F | |
101 | #define MENELAUS_RTC_COMP_MSB 0x30 | |
102 | #define MENELAUS_RTC_COMP_LSB 0x31 | |
103 | #define MENELAUS_S1_PULL_EN 0x32 | |
104 | #define MENELAUS_S1_PULL_DIR 0x33 | |
105 | #define MENELAUS_S2_PULL_EN 0x34 | |
106 | #define MENELAUS_S2_PULL_DIR 0x35 | |
107 | #define MENELAUS_MCT_CTRL1 0x36 | |
108 | #define MENELAUS_MCT_CTRL2 0x37 | |
109 | #define MENELAUS_MCT_CTRL3 0x38 | |
110 | #define MENELAUS_MCT_PIN_ST 0x39 | |
111 | #define MENELAUS_DEBOUNCE1 0x3A | |
112 | ||
113 | #define IH_MENELAUS_IRQS 12 | |
114 | #define MENELAUS_MMC_S1CD_IRQ 0 /* MMC slot 1 card change */ | |
115 | #define MENELAUS_MMC_S2CD_IRQ 1 /* MMC slot 2 card change */ | |
116 | #define MENELAUS_MMC_S1D1_IRQ 2 /* MMC DAT1 low in slot 1 */ | |
117 | #define MENELAUS_MMC_S2D1_IRQ 3 /* MMC DAT1 low in slot 2 */ | |
118 | #define MENELAUS_LOWBAT_IRQ 4 /* Low battery */ | |
119 | #define MENELAUS_HOTDIE_IRQ 5 /* Hot die detect */ | |
120 | #define MENELAUS_UVLO_IRQ 6 /* UVLO detect */ | |
121 | #define MENELAUS_TSHUT_IRQ 7 /* Thermal shutdown */ | |
122 | #define MENELAUS_RTCTMR_IRQ 8 /* RTC timer */ | |
123 | #define MENELAUS_RTCALM_IRQ 9 /* RTC alarm */ | |
124 | #define MENELAUS_RTCERR_IRQ 10 /* RTC error */ | |
125 | #define MENELAUS_PSHBTN_IRQ 11 /* Push button */ | |
126 | #define MENELAUS_RESERVED12_IRQ 12 /* Reserved */ | |
127 | #define MENELAUS_RESERVED13_IRQ 13 /* Reserved */ | |
128 | #define MENELAUS_RESERVED14_IRQ 14 /* Reserved */ | |
129 | #define MENELAUS_RESERVED15_IRQ 15 /* Reserved */ | |
130 | ||
131 | static void menelaus_work(struct work_struct *_menelaus); | |
132 | ||
133 | struct menelaus_chip { | |
134 | struct mutex lock; | |
135 | struct i2c_client *client; | |
136 | struct work_struct work; | |
137 | #ifdef CONFIG_RTC_DRV_TWL92330 | |
138 | struct rtc_device *rtc; | |
139 | u8 rtc_control; | |
140 | unsigned uie:1; | |
141 | #endif | |
142 | unsigned vcore_hw_mode:1; | |
143 | u8 mask1, mask2; | |
144 | void (*handlers[16])(struct menelaus_chip *); | |
145 | void (*mmc_callback)(void *data, u8 mask); | |
146 | void *mmc_callback_data; | |
147 | }; | |
148 | ||
149 | static struct menelaus_chip *the_menelaus; | |
150 | ||
151 | static int menelaus_write_reg(int reg, u8 value) | |
152 | { | |
153 | int val = i2c_smbus_write_byte_data(the_menelaus->client, reg, value); | |
154 | ||
155 | if (val < 0) { | |
1f7c8234 | 156 | pr_err(DRIVER_NAME ": write error"); |
0c4a59fe TL |
157 | return val; |
158 | } | |
159 | ||
160 | return 0; | |
161 | } | |
162 | ||
163 | static int menelaus_read_reg(int reg) | |
164 | { | |
165 | int val = i2c_smbus_read_byte_data(the_menelaus->client, reg); | |
166 | ||
167 | if (val < 0) | |
1f7c8234 | 168 | pr_err(DRIVER_NAME ": read error"); |
0c4a59fe TL |
169 | |
170 | return val; | |
171 | } | |
172 | ||
173 | static int menelaus_enable_irq(int irq) | |
174 | { | |
175 | if (irq > 7) { | |
176 | irq -= 8; | |
177 | the_menelaus->mask2 &= ~(1 << irq); | |
178 | return menelaus_write_reg(MENELAUS_INT_MASK2, | |
179 | the_menelaus->mask2); | |
180 | } else { | |
181 | the_menelaus->mask1 &= ~(1 << irq); | |
182 | return menelaus_write_reg(MENELAUS_INT_MASK1, | |
183 | the_menelaus->mask1); | |
184 | } | |
185 | } | |
186 | ||
187 | static int menelaus_disable_irq(int irq) | |
188 | { | |
189 | if (irq > 7) { | |
190 | irq -= 8; | |
191 | the_menelaus->mask2 |= (1 << irq); | |
192 | return menelaus_write_reg(MENELAUS_INT_MASK2, | |
193 | the_menelaus->mask2); | |
194 | } else { | |
195 | the_menelaus->mask1 |= (1 << irq); | |
196 | return menelaus_write_reg(MENELAUS_INT_MASK1, | |
197 | the_menelaus->mask1); | |
198 | } | |
199 | } | |
200 | ||
201 | static int menelaus_ack_irq(int irq) | |
202 | { | |
203 | if (irq > 7) | |
204 | return menelaus_write_reg(MENELAUS_INT_ACK2, 1 << (irq - 8)); | |
205 | else | |
206 | return menelaus_write_reg(MENELAUS_INT_ACK1, 1 << irq); | |
207 | } | |
208 | ||
209 | /* Adds a handler for an interrupt. Does not run in interrupt context */ | |
210 | static int menelaus_add_irq_work(int irq, | |
211 | void (*handler)(struct menelaus_chip *)) | |
212 | { | |
213 | int ret = 0; | |
214 | ||
215 | mutex_lock(&the_menelaus->lock); | |
216 | the_menelaus->handlers[irq] = handler; | |
217 | ret = menelaus_enable_irq(irq); | |
218 | mutex_unlock(&the_menelaus->lock); | |
219 | ||
220 | return ret; | |
221 | } | |
222 | ||
223 | /* Removes handler for an interrupt */ | |
224 | static int menelaus_remove_irq_work(int irq) | |
225 | { | |
226 | int ret = 0; | |
227 | ||
228 | mutex_lock(&the_menelaus->lock); | |
229 | ret = menelaus_disable_irq(irq); | |
230 | the_menelaus->handlers[irq] = NULL; | |
231 | mutex_unlock(&the_menelaus->lock); | |
232 | ||
233 | return ret; | |
234 | } | |
235 | ||
236 | /* | |
237 | * Gets scheduled when a card detect interrupt happens. Note that in some cases | |
238 | * this line is wired to card cover switch rather than the card detect switch | |
239 | * in each slot. In this case the cards are not seen by menelaus. | |
240 | * FIXME: Add handling for D1 too | |
241 | */ | |
242 | static void menelaus_mmc_cd_work(struct menelaus_chip *menelaus_hw) | |
243 | { | |
244 | int reg; | |
245 | unsigned char card_mask = 0; | |
246 | ||
247 | reg = menelaus_read_reg(MENELAUS_MCT_PIN_ST); | |
248 | if (reg < 0) | |
249 | return; | |
250 | ||
251 | if (!(reg & 0x1)) | |
252 | card_mask |= (1 << 0); | |
253 | ||
254 | if (!(reg & 0x2)) | |
255 | card_mask |= (1 << 1); | |
256 | ||
257 | if (menelaus_hw->mmc_callback) | |
258 | menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data, | |
259 | card_mask); | |
260 | } | |
261 | ||
262 | /* | |
263 | * Toggles the MMC slots between open-drain and push-pull mode. | |
264 | */ | |
265 | int menelaus_set_mmc_opendrain(int slot, int enable) | |
266 | { | |
267 | int ret, val; | |
268 | ||
269 | if (slot != 1 && slot != 2) | |
270 | return -EINVAL; | |
271 | mutex_lock(&the_menelaus->lock); | |
272 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL1); | |
273 | if (ret < 0) { | |
274 | mutex_unlock(&the_menelaus->lock); | |
275 | return ret; | |
276 | } | |
277 | val = ret; | |
278 | if (slot == 1) { | |
279 | if (enable) | |
280 | val |= 1 << 2; | |
281 | else | |
282 | val &= ~(1 << 2); | |
283 | } else { | |
284 | if (enable) | |
285 | val |= 1 << 3; | |
286 | else | |
287 | val &= ~(1 << 3); | |
288 | } | |
289 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, val); | |
290 | mutex_unlock(&the_menelaus->lock); | |
291 | ||
292 | return ret; | |
293 | } | |
294 | EXPORT_SYMBOL(menelaus_set_mmc_opendrain); | |
295 | ||
296 | int menelaus_set_slot_sel(int enable) | |
297 | { | |
298 | int ret; | |
299 | ||
300 | mutex_lock(&the_menelaus->lock); | |
301 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); | |
302 | if (ret < 0) | |
303 | goto out; | |
304 | ret |= 0x02; | |
305 | if (enable) | |
306 | ret |= 1 << 5; | |
307 | else | |
308 | ret &= ~(1 << 5); | |
309 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); | |
310 | out: | |
311 | mutex_unlock(&the_menelaus->lock); | |
312 | return ret; | |
313 | } | |
314 | EXPORT_SYMBOL(menelaus_set_slot_sel); | |
315 | ||
316 | int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_en) | |
317 | { | |
318 | int ret, val; | |
319 | ||
320 | if (slot != 1 && slot != 2) | |
321 | return -EINVAL; | |
322 | if (power >= 3) | |
323 | return -EINVAL; | |
324 | ||
325 | mutex_lock(&the_menelaus->lock); | |
326 | ||
327 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL2); | |
328 | if (ret < 0) | |
329 | goto out; | |
330 | val = ret; | |
331 | if (slot == 1) { | |
332 | if (cd_en) | |
333 | val |= (1 << 4) | (1 << 6); | |
334 | else | |
335 | val &= ~((1 << 4) | (1 << 6)); | |
336 | } else { | |
337 | if (cd_en) | |
338 | val |= (1 << 5) | (1 << 7); | |
339 | else | |
340 | val &= ~((1 << 5) | (1 << 7)); | |
341 | } | |
342 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, val); | |
343 | if (ret < 0) | |
344 | goto out; | |
345 | ||
346 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL3); | |
347 | if (ret < 0) | |
348 | goto out; | |
349 | val = ret; | |
350 | if (slot == 1) { | |
351 | if (enable) | |
352 | val |= 1 << 0; | |
353 | else | |
354 | val &= ~(1 << 0); | |
355 | } else { | |
356 | int b; | |
357 | ||
358 | if (enable) | |
214044b4 | 359 | val |= 1 << 1; |
0c4a59fe | 360 | else |
214044b4 | 361 | val &= ~(1 << 1); |
0c4a59fe TL |
362 | b = menelaus_read_reg(MENELAUS_MCT_CTRL2); |
363 | b &= ~0x03; | |
364 | b |= power; | |
365 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, b); | |
366 | if (ret < 0) | |
367 | goto out; | |
368 | } | |
369 | /* Disable autonomous shutdown */ | |
370 | val &= ~(0x03 << 2); | |
371 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, val); | |
372 | out: | |
373 | mutex_unlock(&the_menelaus->lock); | |
374 | return ret; | |
375 | } | |
376 | EXPORT_SYMBOL(menelaus_set_mmc_slot); | |
377 | ||
378 | int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), | |
379 | void *data) | |
380 | { | |
381 | int ret = 0; | |
382 | ||
383 | the_menelaus->mmc_callback_data = data; | |
384 | the_menelaus->mmc_callback = callback; | |
385 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1CD_IRQ, | |
386 | menelaus_mmc_cd_work); | |
387 | if (ret < 0) | |
388 | return ret; | |
389 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2CD_IRQ, | |
390 | menelaus_mmc_cd_work); | |
391 | if (ret < 0) | |
392 | return ret; | |
393 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1D1_IRQ, | |
394 | menelaus_mmc_cd_work); | |
395 | if (ret < 0) | |
396 | return ret; | |
397 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2D1_IRQ, | |
398 | menelaus_mmc_cd_work); | |
399 | ||
400 | return ret; | |
401 | } | |
402 | EXPORT_SYMBOL(menelaus_register_mmc_callback); | |
403 | ||
404 | void menelaus_unregister_mmc_callback(void) | |
405 | { | |
406 | menelaus_remove_irq_work(MENELAUS_MMC_S1CD_IRQ); | |
407 | menelaus_remove_irq_work(MENELAUS_MMC_S2CD_IRQ); | |
408 | menelaus_remove_irq_work(MENELAUS_MMC_S1D1_IRQ); | |
409 | menelaus_remove_irq_work(MENELAUS_MMC_S2D1_IRQ); | |
410 | ||
411 | the_menelaus->mmc_callback = NULL; | |
412 | the_menelaus->mmc_callback_data = 0; | |
413 | } | |
414 | EXPORT_SYMBOL(menelaus_unregister_mmc_callback); | |
415 | ||
416 | struct menelaus_vtg { | |
417 | const char *name; | |
418 | u8 vtg_reg; | |
419 | u8 vtg_shift; | |
420 | u8 vtg_bits; | |
421 | u8 mode_reg; | |
422 | }; | |
423 | ||
424 | struct menelaus_vtg_value { | |
425 | u16 vtg; | |
426 | u16 val; | |
427 | }; | |
428 | ||
429 | static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, | |
430 | int vtg_val, int mode) | |
431 | { | |
432 | int val, ret; | |
433 | struct i2c_client *c = the_menelaus->client; | |
434 | ||
435 | mutex_lock(&the_menelaus->lock); | |
436 | if (vtg == 0) | |
437 | goto set_voltage; | |
438 | ||
439 | ret = menelaus_read_reg(vtg->vtg_reg); | |
440 | if (ret < 0) | |
441 | goto out; | |
442 | val = ret & ~(((1 << vtg->vtg_bits) - 1) << vtg->vtg_shift); | |
443 | val |= vtg_val << vtg->vtg_shift; | |
444 | ||
445 | dev_dbg(&c->dev, "Setting voltage '%s'" | |
446 | "to %d mV (reg 0x%02x, val 0x%02x)\n", | |
447 | vtg->name, mV, vtg->vtg_reg, val); | |
448 | ||
449 | ret = menelaus_write_reg(vtg->vtg_reg, val); | |
450 | if (ret < 0) | |
451 | goto out; | |
452 | set_voltage: | |
453 | ret = menelaus_write_reg(vtg->mode_reg, mode); | |
454 | out: | |
455 | mutex_unlock(&the_menelaus->lock); | |
456 | if (ret == 0) { | |
457 | /* Wait for voltage to stabilize */ | |
458 | msleep(1); | |
459 | } | |
460 | return ret; | |
461 | } | |
462 | ||
463 | static int menelaus_get_vtg_value(int vtg, const struct menelaus_vtg_value *tbl, | |
464 | int n) | |
465 | { | |
466 | int i; | |
467 | ||
468 | for (i = 0; i < n; i++, tbl++) | |
469 | if (tbl->vtg == vtg) | |
470 | return tbl->val; | |
471 | return -EINVAL; | |
472 | } | |
473 | ||
474 | /* | |
475 | * Vcore can be programmed in two ways: | |
476 | * SW-controlled: Required voltage is programmed into VCORE_CTRL1 | |
477 | * HW-controlled: Required range (roof-floor) is programmed into VCORE_CTRL3 | |
478 | * and VCORE_CTRL4 | |
479 | * | |
480 | * Call correct 'set' function accordingly | |
481 | */ | |
482 | ||
483 | static const struct menelaus_vtg_value vcore_values[] = { | |
484 | { 1000, 0 }, | |
485 | { 1025, 1 }, | |
486 | { 1050, 2 }, | |
487 | { 1075, 3 }, | |
488 | { 1100, 4 }, | |
489 | { 1125, 5 }, | |
490 | { 1150, 6 }, | |
491 | { 1175, 7 }, | |
492 | { 1200, 8 }, | |
493 | { 1225, 9 }, | |
494 | { 1250, 10 }, | |
495 | { 1275, 11 }, | |
496 | { 1300, 12 }, | |
497 | { 1325, 13 }, | |
498 | { 1350, 14 }, | |
499 | { 1375, 15 }, | |
500 | { 1400, 16 }, | |
501 | { 1425, 17 }, | |
502 | { 1450, 18 }, | |
503 | }; | |
504 | ||
505 | int menelaus_set_vcore_sw(unsigned int mV) | |
506 | { | |
507 | int val, ret; | |
508 | struct i2c_client *c = the_menelaus->client; | |
509 | ||
510 | val = menelaus_get_vtg_value(mV, vcore_values, | |
511 | ARRAY_SIZE(vcore_values)); | |
512 | if (val < 0) | |
513 | return -EINVAL; | |
514 | ||
515 | dev_dbg(&c->dev, "Setting VCORE to %d mV (val 0x%02x)\n", mV, val); | |
516 | ||
517 | /* Set SW mode and the voltage in one go. */ | |
518 | mutex_lock(&the_menelaus->lock); | |
519 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); | |
520 | if (ret == 0) | |
521 | the_menelaus->vcore_hw_mode = 0; | |
522 | mutex_unlock(&the_menelaus->lock); | |
523 | msleep(1); | |
524 | ||
525 | return ret; | |
526 | } | |
527 | ||
528 | int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV) | |
529 | { | |
530 | int fval, rval, val, ret; | |
531 | struct i2c_client *c = the_menelaus->client; | |
532 | ||
533 | rval = menelaus_get_vtg_value(roof_mV, vcore_values, | |
534 | ARRAY_SIZE(vcore_values)); | |
535 | if (rval < 0) | |
536 | return -EINVAL; | |
537 | fval = menelaus_get_vtg_value(floor_mV, vcore_values, | |
538 | ARRAY_SIZE(vcore_values)); | |
539 | if (fval < 0) | |
540 | return -EINVAL; | |
541 | ||
542 | dev_dbg(&c->dev, "Setting VCORE FLOOR to %d mV and ROOF to %d mV\n", | |
543 | floor_mV, roof_mV); | |
544 | ||
545 | mutex_lock(&the_menelaus->lock); | |
546 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL3, fval); | |
547 | if (ret < 0) | |
548 | goto out; | |
549 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL4, rval); | |
550 | if (ret < 0) | |
551 | goto out; | |
552 | if (!the_menelaus->vcore_hw_mode) { | |
553 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); | |
554 | /* HW mode, turn OFF byte comparator */ | |
555 | val |= ((1 << 7) | (1 << 5)); | |
556 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); | |
557 | the_menelaus->vcore_hw_mode = 1; | |
558 | } | |
559 | msleep(1); | |
560 | out: | |
561 | mutex_unlock(&the_menelaus->lock); | |
562 | return ret; | |
563 | } | |
564 | ||
565 | static const struct menelaus_vtg vmem_vtg = { | |
566 | .name = "VMEM", | |
567 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
568 | .vtg_shift = 0, | |
569 | .vtg_bits = 2, | |
570 | .mode_reg = MENELAUS_LDO_CTRL3, | |
571 | }; | |
572 | ||
573 | static const struct menelaus_vtg_value vmem_values[] = { | |
574 | { 1500, 0 }, | |
575 | { 1800, 1 }, | |
576 | { 1900, 2 }, | |
577 | { 2500, 3 }, | |
578 | }; | |
579 | ||
580 | int menelaus_set_vmem(unsigned int mV) | |
581 | { | |
582 | int val; | |
583 | ||
584 | if (mV == 0) | |
585 | return menelaus_set_voltage(&vmem_vtg, 0, 0, 0); | |
586 | ||
587 | val = menelaus_get_vtg_value(mV, vmem_values, ARRAY_SIZE(vmem_values)); | |
588 | if (val < 0) | |
589 | return -EINVAL; | |
590 | return menelaus_set_voltage(&vmem_vtg, mV, val, 0x02); | |
591 | } | |
592 | EXPORT_SYMBOL(menelaus_set_vmem); | |
593 | ||
594 | static const struct menelaus_vtg vio_vtg = { | |
595 | .name = "VIO", | |
596 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
597 | .vtg_shift = 2, | |
598 | .vtg_bits = 2, | |
599 | .mode_reg = MENELAUS_LDO_CTRL4, | |
600 | }; | |
601 | ||
602 | static const struct menelaus_vtg_value vio_values[] = { | |
603 | { 1500, 0 }, | |
604 | { 1800, 1 }, | |
605 | { 2500, 2 }, | |
606 | { 2800, 3 }, | |
607 | }; | |
608 | ||
609 | int menelaus_set_vio(unsigned int mV) | |
610 | { | |
611 | int val; | |
612 | ||
613 | if (mV == 0) | |
614 | return menelaus_set_voltage(&vio_vtg, 0, 0, 0); | |
615 | ||
616 | val = menelaus_get_vtg_value(mV, vio_values, ARRAY_SIZE(vio_values)); | |
617 | if (val < 0) | |
618 | return -EINVAL; | |
619 | return menelaus_set_voltage(&vio_vtg, mV, val, 0x02); | |
620 | } | |
621 | EXPORT_SYMBOL(menelaus_set_vio); | |
622 | ||
623 | static const struct menelaus_vtg_value vdcdc_values[] = { | |
624 | { 1500, 0 }, | |
625 | { 1800, 1 }, | |
626 | { 2000, 2 }, | |
627 | { 2200, 3 }, | |
628 | { 2400, 4 }, | |
629 | { 2800, 5 }, | |
630 | { 3000, 6 }, | |
631 | { 3300, 7 }, | |
632 | }; | |
633 | ||
634 | static const struct menelaus_vtg vdcdc2_vtg = { | |
635 | .name = "VDCDC2", | |
636 | .vtg_reg = MENELAUS_DCDC_CTRL1, | |
637 | .vtg_shift = 0, | |
638 | .vtg_bits = 3, | |
639 | .mode_reg = MENELAUS_DCDC_CTRL2, | |
640 | }; | |
641 | ||
642 | static const struct menelaus_vtg vdcdc3_vtg = { | |
643 | .name = "VDCDC3", | |
644 | .vtg_reg = MENELAUS_DCDC_CTRL1, | |
645 | .vtg_shift = 3, | |
646 | .vtg_bits = 3, | |
647 | .mode_reg = MENELAUS_DCDC_CTRL3, | |
648 | }; | |
649 | ||
650 | int menelaus_set_vdcdc(int dcdc, unsigned int mV) | |
651 | { | |
652 | const struct menelaus_vtg *vtg; | |
653 | int val; | |
654 | ||
655 | if (dcdc != 2 && dcdc != 3) | |
656 | return -EINVAL; | |
657 | if (dcdc == 2) | |
658 | vtg = &vdcdc2_vtg; | |
659 | else | |
660 | vtg = &vdcdc3_vtg; | |
661 | ||
662 | if (mV == 0) | |
663 | return menelaus_set_voltage(vtg, 0, 0, 0); | |
664 | ||
665 | val = menelaus_get_vtg_value(mV, vdcdc_values, | |
666 | ARRAY_SIZE(vdcdc_values)); | |
667 | if (val < 0) | |
668 | return -EINVAL; | |
669 | return menelaus_set_voltage(vtg, mV, val, 0x03); | |
670 | } | |
671 | ||
672 | static const struct menelaus_vtg_value vmmc_values[] = { | |
673 | { 1850, 0 }, | |
674 | { 2800, 1 }, | |
675 | { 3000, 2 }, | |
676 | { 3100, 3 }, | |
677 | }; | |
678 | ||
679 | static const struct menelaus_vtg vmmc_vtg = { | |
680 | .name = "VMMC", | |
681 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
682 | .vtg_shift = 6, | |
683 | .vtg_bits = 2, | |
684 | .mode_reg = MENELAUS_LDO_CTRL7, | |
685 | }; | |
686 | ||
687 | int menelaus_set_vmmc(unsigned int mV) | |
688 | { | |
689 | int val; | |
690 | ||
691 | if (mV == 0) | |
692 | return menelaus_set_voltage(&vmmc_vtg, 0, 0, 0); | |
693 | ||
694 | val = menelaus_get_vtg_value(mV, vmmc_values, ARRAY_SIZE(vmmc_values)); | |
695 | if (val < 0) | |
696 | return -EINVAL; | |
697 | return menelaus_set_voltage(&vmmc_vtg, mV, val, 0x02); | |
698 | } | |
699 | EXPORT_SYMBOL(menelaus_set_vmmc); | |
700 | ||
701 | ||
702 | static const struct menelaus_vtg_value vaux_values[] = { | |
703 | { 1500, 0 }, | |
704 | { 1800, 1 }, | |
705 | { 2500, 2 }, | |
706 | { 2800, 3 }, | |
707 | }; | |
708 | ||
709 | static const struct menelaus_vtg vaux_vtg = { | |
710 | .name = "VAUX", | |
711 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
712 | .vtg_shift = 4, | |
713 | .vtg_bits = 2, | |
714 | .mode_reg = MENELAUS_LDO_CTRL6, | |
715 | }; | |
716 | ||
717 | int menelaus_set_vaux(unsigned int mV) | |
718 | { | |
719 | int val; | |
720 | ||
721 | if (mV == 0) | |
722 | return menelaus_set_voltage(&vaux_vtg, 0, 0, 0); | |
723 | ||
724 | val = menelaus_get_vtg_value(mV, vaux_values, ARRAY_SIZE(vaux_values)); | |
725 | if (val < 0) | |
726 | return -EINVAL; | |
727 | return menelaus_set_voltage(&vaux_vtg, mV, val, 0x02); | |
728 | } | |
729 | EXPORT_SYMBOL(menelaus_set_vaux); | |
730 | ||
731 | int menelaus_get_slot_pin_states(void) | |
732 | { | |
733 | return menelaus_read_reg(MENELAUS_MCT_PIN_ST); | |
734 | } | |
735 | EXPORT_SYMBOL(menelaus_get_slot_pin_states); | |
736 | ||
737 | int menelaus_set_regulator_sleep(int enable, u32 val) | |
738 | { | |
739 | int t, ret; | |
740 | struct i2c_client *c = the_menelaus->client; | |
741 | ||
742 | mutex_lock(&the_menelaus->lock); | |
743 | ret = menelaus_write_reg(MENELAUS_SLEEP_CTRL2, val); | |
744 | if (ret < 0) | |
745 | goto out; | |
746 | ||
747 | dev_dbg(&c->dev, "regulator sleep configuration: %02x\n", val); | |
748 | ||
749 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); | |
750 | if (ret < 0) | |
751 | goto out; | |
752 | t = ((1 << 6) | 0x04); | |
753 | if (enable) | |
754 | ret |= t; | |
755 | else | |
756 | ret &= ~t; | |
757 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); | |
758 | out: | |
759 | mutex_unlock(&the_menelaus->lock); | |
760 | return ret; | |
761 | } | |
762 | ||
763 | /*-----------------------------------------------------------------------*/ | |
764 | ||
765 | /* Handles Menelaus interrupts. Does not run in interrupt context */ | |
766 | static void menelaus_work(struct work_struct *_menelaus) | |
767 | { | |
768 | struct menelaus_chip *menelaus = | |
769 | container_of(_menelaus, struct menelaus_chip, work); | |
770 | void (*handler)(struct menelaus_chip *menelaus); | |
771 | ||
772 | while (1) { | |
773 | unsigned isr; | |
774 | ||
775 | isr = (menelaus_read_reg(MENELAUS_INT_STATUS2) | |
776 | & ~menelaus->mask2) << 8; | |
777 | isr |= menelaus_read_reg(MENELAUS_INT_STATUS1) | |
778 | & ~menelaus->mask1; | |
779 | if (!isr) | |
780 | break; | |
781 | ||
782 | while (isr) { | |
783 | int irq = fls(isr) - 1; | |
784 | isr &= ~(1 << irq); | |
785 | ||
786 | mutex_lock(&menelaus->lock); | |
787 | menelaus_disable_irq(irq); | |
788 | menelaus_ack_irq(irq); | |
789 | handler = menelaus->handlers[irq]; | |
790 | if (handler) | |
791 | handler(menelaus); | |
792 | menelaus_enable_irq(irq); | |
793 | mutex_unlock(&menelaus->lock); | |
794 | } | |
795 | } | |
796 | enable_irq(menelaus->client->irq); | |
797 | } | |
798 | ||
799 | /* | |
800 | * We cannot use I2C in interrupt context, so we just schedule work. | |
801 | */ | |
802 | static irqreturn_t menelaus_irq(int irq, void *_menelaus) | |
803 | { | |
804 | struct menelaus_chip *menelaus = _menelaus; | |
805 | ||
806 | disable_irq_nosync(irq); | |
807 | (void)schedule_work(&menelaus->work); | |
808 | ||
809 | return IRQ_HANDLED; | |
810 | } | |
811 | ||
812 | /*-----------------------------------------------------------------------*/ | |
813 | ||
814 | /* | |
815 | * The RTC needs to be set once, then it runs on backup battery power. | |
816 | * It supports alarms, including system wake alarms (from some modes); | |
817 | * and 1/second IRQs if requested. | |
818 | */ | |
819 | #ifdef CONFIG_RTC_DRV_TWL92330 | |
820 | ||
821 | #define RTC_CTRL_RTC_EN (1 << 0) | |
822 | #define RTC_CTRL_AL_EN (1 << 1) | |
823 | #define RTC_CTRL_MODE12 (1 << 2) | |
824 | #define RTC_CTRL_EVERY_MASK (3 << 3) | |
825 | #define RTC_CTRL_EVERY_SEC (0 << 3) | |
826 | #define RTC_CTRL_EVERY_MIN (1 << 3) | |
827 | #define RTC_CTRL_EVERY_HR (2 << 3) | |
828 | #define RTC_CTRL_EVERY_DAY (3 << 3) | |
829 | ||
830 | #define RTC_UPDATE_EVERY 0x08 | |
831 | ||
832 | #define RTC_HR_PM (1 << 7) | |
833 | ||
834 | static void menelaus_to_time(char *regs, struct rtc_time *t) | |
835 | { | |
e4d33969 AB |
836 | t->tm_sec = bcd2bin(regs[0]); |
837 | t->tm_min = bcd2bin(regs[1]); | |
0c4a59fe | 838 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { |
e4d33969 | 839 | t->tm_hour = bcd2bin(regs[2] & 0x1f) - 1; |
0c4a59fe TL |
840 | if (regs[2] & RTC_HR_PM) |
841 | t->tm_hour += 12; | |
842 | } else | |
e4d33969 AB |
843 | t->tm_hour = bcd2bin(regs[2] & 0x3f); |
844 | t->tm_mday = bcd2bin(regs[3]); | |
845 | t->tm_mon = bcd2bin(regs[4]) - 1; | |
846 | t->tm_year = bcd2bin(regs[5]) + 100; | |
0c4a59fe TL |
847 | } |
848 | ||
849 | static int time_to_menelaus(struct rtc_time *t, int regnum) | |
850 | { | |
851 | int hour, status; | |
852 | ||
e4d33969 | 853 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_sec)); |
0c4a59fe TL |
854 | if (status < 0) |
855 | goto fail; | |
856 | ||
e4d33969 | 857 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_min)); |
0c4a59fe TL |
858 | if (status < 0) |
859 | goto fail; | |
860 | ||
861 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { | |
862 | hour = t->tm_hour + 1; | |
863 | if (hour > 12) | |
e4d33969 | 864 | hour = RTC_HR_PM | bin2bcd(hour - 12); |
0c4a59fe | 865 | else |
e4d33969 | 866 | hour = bin2bcd(hour); |
0c4a59fe | 867 | } else |
e4d33969 | 868 | hour = bin2bcd(t->tm_hour); |
0c4a59fe TL |
869 | status = menelaus_write_reg(regnum++, hour); |
870 | if (status < 0) | |
871 | goto fail; | |
872 | ||
e4d33969 | 873 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mday)); |
0c4a59fe TL |
874 | if (status < 0) |
875 | goto fail; | |
876 | ||
e4d33969 | 877 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mon + 1)); |
0c4a59fe TL |
878 | if (status < 0) |
879 | goto fail; | |
880 | ||
e4d33969 | 881 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_year - 100)); |
0c4a59fe TL |
882 | if (status < 0) |
883 | goto fail; | |
884 | ||
885 | return 0; | |
886 | fail: | |
887 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x, err %d\n", | |
888 | --regnum, status); | |
889 | return status; | |
890 | } | |
891 | ||
892 | static int menelaus_read_time(struct device *dev, struct rtc_time *t) | |
893 | { | |
894 | struct i2c_msg msg[2]; | |
895 | char regs[7]; | |
896 | int status; | |
897 | ||
898 | /* block read date and time registers */ | |
899 | regs[0] = MENELAUS_RTC_SEC; | |
900 | ||
901 | msg[0].addr = MENELAUS_I2C_ADDRESS; | |
902 | msg[0].flags = 0; | |
903 | msg[0].len = 1; | |
904 | msg[0].buf = regs; | |
905 | ||
906 | msg[1].addr = MENELAUS_I2C_ADDRESS; | |
907 | msg[1].flags = I2C_M_RD; | |
908 | msg[1].len = sizeof(regs); | |
909 | msg[1].buf = regs; | |
910 | ||
911 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); | |
912 | if (status != 2) { | |
913 | dev_err(dev, "%s error %d\n", "read", status); | |
914 | return -EIO; | |
915 | } | |
916 | ||
917 | menelaus_to_time(regs, t); | |
e4d33969 | 918 | t->tm_wday = bcd2bin(regs[6]); |
0c4a59fe TL |
919 | |
920 | return 0; | |
921 | } | |
922 | ||
923 | static int menelaus_set_time(struct device *dev, struct rtc_time *t) | |
924 | { | |
925 | int status; | |
926 | ||
927 | /* write date and time registers */ | |
928 | status = time_to_menelaus(t, MENELAUS_RTC_SEC); | |
929 | if (status < 0) | |
930 | return status; | |
e4d33969 | 931 | status = menelaus_write_reg(MENELAUS_RTC_WKDAY, bin2bcd(t->tm_wday)); |
0c4a59fe | 932 | if (status < 0) { |
c1147cc6 | 933 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x " |
0c4a59fe TL |
934 | "err %d\n", MENELAUS_RTC_WKDAY, status); |
935 | return status; | |
936 | } | |
937 | ||
938 | /* now commit the write */ | |
939 | status = menelaus_write_reg(MENELAUS_RTC_UPDATE, RTC_UPDATE_EVERY); | |
940 | if (status < 0) | |
941 | dev_err(&the_menelaus->client->dev, "rtc commit time, err %d\n", | |
942 | status); | |
943 | ||
944 | return 0; | |
945 | } | |
946 | ||
947 | static int menelaus_read_alarm(struct device *dev, struct rtc_wkalrm *w) | |
948 | { | |
949 | struct i2c_msg msg[2]; | |
950 | char regs[6]; | |
951 | int status; | |
952 | ||
953 | /* block read alarm registers */ | |
954 | regs[0] = MENELAUS_RTC_AL_SEC; | |
955 | ||
956 | msg[0].addr = MENELAUS_I2C_ADDRESS; | |
957 | msg[0].flags = 0; | |
958 | msg[0].len = 1; | |
959 | msg[0].buf = regs; | |
960 | ||
961 | msg[1].addr = MENELAUS_I2C_ADDRESS; | |
962 | msg[1].flags = I2C_M_RD; | |
963 | msg[1].len = sizeof(regs); | |
964 | msg[1].buf = regs; | |
965 | ||
966 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); | |
967 | if (status != 2) { | |
968 | dev_err(dev, "%s error %d\n", "alarm read", status); | |
969 | return -EIO; | |
970 | } | |
971 | ||
972 | menelaus_to_time(regs, &w->time); | |
973 | ||
974 | w->enabled = !!(the_menelaus->rtc_control & RTC_CTRL_AL_EN); | |
975 | ||
976 | /* NOTE we *could* check if actually pending... */ | |
977 | w->pending = 0; | |
978 | ||
979 | return 0; | |
980 | } | |
981 | ||
982 | static int menelaus_set_alarm(struct device *dev, struct rtc_wkalrm *w) | |
983 | { | |
984 | int status; | |
985 | ||
986 | if (the_menelaus->client->irq <= 0 && w->enabled) | |
987 | return -ENODEV; | |
988 | ||
989 | /* clear previous alarm enable */ | |
990 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) { | |
991 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; | |
992 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, | |
993 | the_menelaus->rtc_control); | |
994 | if (status < 0) | |
995 | return status; | |
996 | } | |
997 | ||
998 | /* write alarm registers */ | |
999 | status = time_to_menelaus(&w->time, MENELAUS_RTC_AL_SEC); | |
1000 | if (status < 0) | |
1001 | return status; | |
1002 | ||
1003 | /* enable alarm if requested */ | |
1004 | if (w->enabled) { | |
1005 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; | |
1006 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, | |
1007 | the_menelaus->rtc_control); | |
1008 | } | |
1009 | ||
1010 | return status; | |
1011 | } | |
1012 | ||
1013 | #ifdef CONFIG_RTC_INTF_DEV | |
1014 | ||
1015 | static void menelaus_rtc_update_work(struct menelaus_chip *m) | |
1016 | { | |
1017 | /* report 1/sec update */ | |
1018 | local_irq_disable(); | |
1019 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_UF); | |
1020 | local_irq_enable(); | |
1021 | } | |
1022 | ||
1023 | static int menelaus_ioctl(struct device *dev, unsigned cmd, unsigned long arg) | |
1024 | { | |
1025 | int status; | |
1026 | ||
1027 | if (the_menelaus->client->irq <= 0) | |
1028 | return -ENOIOCTLCMD; | |
1029 | ||
1030 | switch (cmd) { | |
1031 | /* alarm IRQ */ | |
1032 | case RTC_AIE_ON: | |
1033 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) | |
1034 | return 0; | |
1035 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; | |
1036 | break; | |
1037 | case RTC_AIE_OFF: | |
1038 | if (!(the_menelaus->rtc_control & RTC_CTRL_AL_EN)) | |
1039 | return 0; | |
1040 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; | |
1041 | break; | |
1042 | /* 1/second "update" IRQ */ | |
1043 | case RTC_UIE_ON: | |
1044 | if (the_menelaus->uie) | |
1045 | return 0; | |
1046 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); | |
1047 | status = menelaus_add_irq_work(MENELAUS_RTCTMR_IRQ, | |
1048 | menelaus_rtc_update_work); | |
1049 | if (status == 0) | |
1050 | the_menelaus->uie = 1; | |
1051 | return status; | |
1052 | case RTC_UIE_OFF: | |
1053 | if (!the_menelaus->uie) | |
1054 | return 0; | |
1055 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); | |
1056 | if (status == 0) | |
1057 | the_menelaus->uie = 0; | |
1058 | return status; | |
1059 | default: | |
1060 | return -ENOIOCTLCMD; | |
1061 | } | |
1062 | return menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); | |
1063 | } | |
1064 | ||
1065 | #else | |
1066 | #define menelaus_ioctl NULL | |
1067 | #endif | |
1068 | ||
1069 | /* REVISIT no compensation register support ... */ | |
1070 | ||
1071 | static const struct rtc_class_ops menelaus_rtc_ops = { | |
1072 | .ioctl = menelaus_ioctl, | |
1073 | .read_time = menelaus_read_time, | |
1074 | .set_time = menelaus_set_time, | |
1075 | .read_alarm = menelaus_read_alarm, | |
1076 | .set_alarm = menelaus_set_alarm, | |
1077 | }; | |
1078 | ||
1079 | static void menelaus_rtc_alarm_work(struct menelaus_chip *m) | |
1080 | { | |
1081 | /* report alarm */ | |
1082 | local_irq_disable(); | |
1083 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_AF); | |
1084 | local_irq_enable(); | |
1085 | ||
1086 | /* then disable it; alarms are oneshot */ | |
1087 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; | |
1088 | menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); | |
1089 | } | |
1090 | ||
1091 | static inline void menelaus_rtc_init(struct menelaus_chip *m) | |
1092 | { | |
1093 | int alarm = (m->client->irq > 0); | |
1094 | ||
1095 | /* assume 32KDETEN pin is pulled high */ | |
1096 | if (!(menelaus_read_reg(MENELAUS_OSC_CTRL) & 0x80)) { | |
1097 | dev_dbg(&m->client->dev, "no 32k oscillator\n"); | |
1098 | return; | |
1099 | } | |
1100 | ||
1101 | /* support RTC alarm; it can issue wakeups */ | |
1102 | if (alarm) { | |
1103 | if (menelaus_add_irq_work(MENELAUS_RTCALM_IRQ, | |
1104 | menelaus_rtc_alarm_work) < 0) { | |
1105 | dev_err(&m->client->dev, "can't handle RTC alarm\n"); | |
1106 | return; | |
1107 | } | |
1108 | device_init_wakeup(&m->client->dev, 1); | |
1109 | } | |
1110 | ||
1111 | /* be sure RTC is enabled; allow 1/sec irqs; leave 12hr mode alone */ | |
1112 | m->rtc_control = menelaus_read_reg(MENELAUS_RTC_CTRL); | |
1113 | if (!(m->rtc_control & RTC_CTRL_RTC_EN) | |
1114 | || (m->rtc_control & RTC_CTRL_AL_EN) | |
1115 | || (m->rtc_control & RTC_CTRL_EVERY_MASK)) { | |
1116 | if (!(m->rtc_control & RTC_CTRL_RTC_EN)) { | |
1117 | dev_warn(&m->client->dev, "rtc clock needs setting\n"); | |
1118 | m->rtc_control |= RTC_CTRL_RTC_EN; | |
1119 | } | |
1120 | m->rtc_control &= ~RTC_CTRL_EVERY_MASK; | |
1121 | m->rtc_control &= ~RTC_CTRL_AL_EN; | |
1122 | menelaus_write_reg(MENELAUS_RTC_CTRL, m->rtc_control); | |
1123 | } | |
1124 | ||
1125 | m->rtc = rtc_device_register(DRIVER_NAME, | |
1126 | &m->client->dev, | |
1127 | &menelaus_rtc_ops, THIS_MODULE); | |
1128 | if (IS_ERR(m->rtc)) { | |
1129 | if (alarm) { | |
1130 | menelaus_remove_irq_work(MENELAUS_RTCALM_IRQ); | |
1131 | device_init_wakeup(&m->client->dev, 0); | |
1132 | } | |
1133 | dev_err(&m->client->dev, "can't register RTC: %d\n", | |
1134 | (int) PTR_ERR(m->rtc)); | |
1135 | the_menelaus->rtc = NULL; | |
1136 | } | |
1137 | } | |
1138 | ||
1139 | #else | |
1140 | ||
1141 | static inline void menelaus_rtc_init(struct menelaus_chip *m) | |
1142 | { | |
1143 | /* nothing */ | |
1144 | } | |
1145 | ||
1146 | #endif | |
1147 | ||
1148 | /*-----------------------------------------------------------------------*/ | |
1149 | ||
1150 | static struct i2c_driver menelaus_i2c_driver; | |
1151 | ||
d2653e92 JD |
1152 | static int menelaus_probe(struct i2c_client *client, |
1153 | const struct i2c_device_id *id) | |
0c4a59fe TL |
1154 | { |
1155 | struct menelaus_chip *menelaus; | |
1156 | int rev = 0, val; | |
1157 | int err = 0; | |
1158 | struct menelaus_platform_data *menelaus_pdata = | |
1159 | client->dev.platform_data; | |
1160 | ||
1161 | if (the_menelaus) { | |
1162 | dev_dbg(&client->dev, "only one %s for now\n", | |
1163 | DRIVER_NAME); | |
1164 | return -ENODEV; | |
1165 | } | |
1166 | ||
1167 | menelaus = kzalloc(sizeof *menelaus, GFP_KERNEL); | |
1168 | if (!menelaus) | |
1169 | return -ENOMEM; | |
1170 | ||
1171 | i2c_set_clientdata(client, menelaus); | |
1172 | ||
1173 | the_menelaus = menelaus; | |
1174 | menelaus->client = client; | |
1175 | ||
1176 | /* If a true probe check the device */ | |
1177 | rev = menelaus_read_reg(MENELAUS_REV); | |
1178 | if (rev < 0) { | |
1f7c8234 | 1179 | pr_err(DRIVER_NAME ": device not found"); |
0c4a59fe TL |
1180 | err = -ENODEV; |
1181 | goto fail1; | |
1182 | } | |
1183 | ||
1184 | /* Ack and disable all Menelaus interrupts */ | |
1185 | menelaus_write_reg(MENELAUS_INT_ACK1, 0xff); | |
1186 | menelaus_write_reg(MENELAUS_INT_ACK2, 0xff); | |
1187 | menelaus_write_reg(MENELAUS_INT_MASK1, 0xff); | |
1188 | menelaus_write_reg(MENELAUS_INT_MASK2, 0xff); | |
1189 | menelaus->mask1 = 0xff; | |
1190 | menelaus->mask2 = 0xff; | |
1191 | ||
1192 | /* Set output buffer strengths */ | |
1193 | menelaus_write_reg(MENELAUS_MCT_CTRL1, 0x73); | |
1194 | ||
1195 | if (client->irq > 0) { | |
1196 | err = request_irq(client->irq, menelaus_irq, IRQF_DISABLED, | |
1197 | DRIVER_NAME, menelaus); | |
1198 | if (err) { | |
898eb71c | 1199 | dev_dbg(&client->dev, "can't get IRQ %d, err %d\n", |
0c4a59fe TL |
1200 | client->irq, err); |
1201 | goto fail1; | |
1202 | } | |
1203 | } | |
1204 | ||
1205 | mutex_init(&menelaus->lock); | |
1206 | INIT_WORK(&menelaus->work, menelaus_work); | |
1207 | ||
1208 | pr_info("Menelaus rev %d.%d\n", rev >> 4, rev & 0x0f); | |
1209 | ||
1210 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); | |
1211 | if (val < 0) | |
1212 | goto fail2; | |
1213 | if (val & (1 << 7)) | |
1214 | menelaus->vcore_hw_mode = 1; | |
1215 | else | |
1216 | menelaus->vcore_hw_mode = 0; | |
1217 | ||
1218 | if (menelaus_pdata != NULL && menelaus_pdata->late_init != NULL) { | |
1219 | err = menelaus_pdata->late_init(&client->dev); | |
1220 | if (err < 0) | |
1221 | goto fail2; | |
1222 | } | |
1223 | ||
1224 | menelaus_rtc_init(menelaus); | |
1225 | ||
1226 | return 0; | |
1227 | fail2: | |
1228 | free_irq(client->irq, menelaus); | |
1229 | flush_scheduled_work(); | |
1230 | fail1: | |
1231 | kfree(menelaus); | |
1232 | return err; | |
1233 | } | |
1234 | ||
1235 | static int __exit menelaus_remove(struct i2c_client *client) | |
1236 | { | |
1237 | struct menelaus_chip *menelaus = i2c_get_clientdata(client); | |
1238 | ||
1239 | free_irq(client->irq, menelaus); | |
f322d5f0 | 1240 | kfree(menelaus); |
0c4a59fe TL |
1241 | the_menelaus = NULL; |
1242 | return 0; | |
1243 | } | |
1244 | ||
3760f736 JD |
1245 | static const struct i2c_device_id menelaus_id[] = { |
1246 | { "menelaus", 0 }, | |
1247 | { } | |
1248 | }; | |
1249 | MODULE_DEVICE_TABLE(i2c, menelaus_id); | |
1250 | ||
0c4a59fe TL |
1251 | static struct i2c_driver menelaus_i2c_driver = { |
1252 | .driver = { | |
1253 | .name = DRIVER_NAME, | |
1254 | }, | |
1255 | .probe = menelaus_probe, | |
1256 | .remove = __exit_p(menelaus_remove), | |
3760f736 | 1257 | .id_table = menelaus_id, |
0c4a59fe TL |
1258 | }; |
1259 | ||
1260 | static int __init menelaus_init(void) | |
1261 | { | |
1262 | int res; | |
1263 | ||
1264 | res = i2c_add_driver(&menelaus_i2c_driver); | |
1265 | if (res < 0) { | |
1f7c8234 | 1266 | pr_err(DRIVER_NAME ": driver registration failed\n"); |
0c4a59fe TL |
1267 | return res; |
1268 | } | |
1269 | ||
1270 | return 0; | |
1271 | } | |
1272 | ||
1273 | static void __exit menelaus_exit(void) | |
1274 | { | |
1275 | i2c_del_driver(&menelaus_i2c_driver); | |
1276 | ||
1277 | /* FIXME: Shutdown menelaus parts that can be shut down */ | |
1278 | } | |
1279 | ||
1280 | MODULE_AUTHOR("Texas Instruments, Inc. (and others)"); | |
1281 | MODULE_DESCRIPTION("I2C interface for Menelaus."); | |
1282 | MODULE_LICENSE("GPL"); | |
1283 | ||
1284 | module_init(menelaus_init); | |
1285 | module_exit(menelaus_exit); |