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mfd: Kconfig alphabetical re-ordering
[deliverable/linux.git] / drivers / mfd / omap-usb-host.c
CommitLineData
17cdd29d
KM		 1/**
2 * omap-usb-host.c - The USBHS core driver for OMAP EHCI & OHCI
3 *
03a8f438 4 * Copyright (C) 2011-2013 Texas Instruments Incorporated - http://www.ti.com
17cdd29d 5 * Author: Keshava Munegowda <keshava_mgowda@ti.com>
03a8f438 6 * Author: Roger Quadros <rogerq@ti.com>
17cdd29d
KM		 7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 of
10 * the License as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20#include <linux/kernel.h>
417e206b 21#include <linux/module.h>
17cdd29d
KM		 22#include <linux/types.h>
23#include <linux/slab.h>
24#include <linux/delay.h>
17cdd29d
KM		 25#include <linux/clk.h>
26#include <linux/dma-mapping.h>
c05995c3 27#include <linux/gpio.h>
e8c4a7ac
FB		 28#include <linux/platform_device.h>
29#include <linux/platform_data/usb-omap.h>
1e7fe1a9 30#include <linux/pm_runtime.h>
03a8f438
RQ		 31#include <linux/of.h>
32#include <linux/of_platform.h>
17cdd29d 33
e8c4a7ac
FB		 34#include "omap-usb.h"
35
a6d3a662 36#define USBHS_DRIVER_NAME "usbhs_omap"
17cdd29d
KM		 37#define OMAP_EHCI_DEVICE "ehci-omap"
38#define OMAP_OHCI_DEVICE "ohci-omap3"
39
40/* OMAP USBHOST Register addresses */
41
17cdd29d
KM		 42/* UHH Register Set */
43#define OMAP_UHH_REVISION (0x00)
44#define OMAP_UHH_SYSCONFIG (0x10)
45#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12)
46#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8)
47#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3)
48#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2)
49#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1)
50#define OMAP_UHH_SYSCONFIG_AUTOIDLE (1 << 0)
51
52#define OMAP_UHH_SYSSTATUS (0x14)
53#define OMAP_UHH_HOSTCONFIG (0x40)
54#define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS (1 << 0)
55#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS (1 << 0)
56#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS (1 << 11)
57#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS (1 << 12)
58#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
59#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
60#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
61#define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN (1 << 5)
62#define OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS (1 << 8)
63#define OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS (1 << 9)
64#define OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS (1 << 10)
65#define OMAP4_UHH_HOSTCONFIG_APP_START_CLK (1 << 31)
66
67/* OMAP4-specific defines */
68#define OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR (3 << 2)
69#define OMAP4_UHH_SYSCONFIG_NOIDLE (1 << 2)
70#define OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR (3 << 4)
71#define OMAP4_UHH_SYSCONFIG_NOSTDBY (1 << 4)
72#define OMAP4_UHH_SYSCONFIG_SOFTRESET (1 << 0)
73
74#define OMAP4_P1_MODE_CLEAR (3 << 16)
75#define OMAP4_P1_MODE_TLL (1 << 16)
76#define OMAP4_P1_MODE_HSIC (3 << 16)
77#define OMAP4_P2_MODE_CLEAR (3 << 18)
78#define OMAP4_P2_MODE_TLL (1 << 18)
79#define OMAP4_P2_MODE_HSIC (3 << 18)
80
17cdd29d
KM		 81#define OMAP_UHH_DEBUG_CSR (0x44)
82
83/* Values of UHH_REVISION - Note: these are not given in the TRM */
84#define OMAP_USBHS_REV1 0x00000010 /* OMAP3 */
85#define OMAP_USBHS_REV2 0x50700100 /* OMAP4 */
86
87#define is_omap_usbhs_rev1(x) (x->usbhs_rev == OMAP_USBHS_REV1)
88#define is_omap_usbhs_rev2(x) (x->usbhs_rev == OMAP_USBHS_REV2)
89
90#define is_ehci_phy_mode(x) (x == OMAP_EHCI_PORT_MODE_PHY)
91#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
92#define is_ehci_hsic_mode(x) (x == OMAP_EHCI_PORT_MODE_HSIC)
93
94
95struct usbhs_hcd_omap {
d7eaf866 96 int nports;
06ba7dc7 97 struct clk **utmi_clk;
340c64ea
RQ		 98 struct clk **hsic60m_clk;
99 struct clk **hsic480m_clk;
d7eaf866 100
17cdd29d
KM		 101 struct clk *xclk60mhsp1_ck;
102 struct clk *xclk60mhsp2_ck;
06ba7dc7
RQ		 103 struct clk *utmi_p1_gfclk;
104 struct clk *utmi_p2_gfclk;
17cdd29d 105 struct clk *init_60m_fclk;
1e7fe1a9 106 struct clk *ehci_logic_fck;
17cdd29d
KM		 107
108 void __iomem *uhh_base;
17cdd29d 109
9d9c6ae7 110 struct usbhs_omap_platform_data *pdata;
17cdd29d
KM		 111
112 u32 usbhs_rev;
17cdd29d
KM		 113};
114/*-------------------------------------------------------------------------*/
115
116const char usbhs_driver_name[] = USBHS_DRIVER_NAME;
cbb8c220 117static u64 usbhs_dmamask = DMA_BIT_MASK(32);
17cdd29d
KM		 118
119/*-------------------------------------------------------------------------*/
120
121static inline void usbhs_write(void __iomem *base, u32 reg, u32 val)
122{
123 __raw_writel(val, base + reg);
124}
125
126static inline u32 usbhs_read(void __iomem *base, u32 reg)
127{
128 return __raw_readl(base + reg);
129}
130
131static inline void usbhs_writeb(void __iomem *base, u8 reg, u8 val)
132{
133 __raw_writeb(val, base + reg);
134}
135
136static inline u8 usbhs_readb(void __iomem *base, u8 reg)
137{
138 return __raw_readb(base + reg);
139}
140
141/*-------------------------------------------------------------------------*/
142
03a8f438
RQ		 143/**
144 * Map 'enum usbhs_omap_port_mode' found in <linux/platform_data/usb-omap.h>
145 * to the device tree binding portN-mode found in
146 * 'Documentation/devicetree/bindings/mfd/omap-usb-host.txt'
147 */
148static const char * const port_modes[] = {
149 [OMAP_USBHS_PORT_MODE_UNUSED] = "",
150 [OMAP_EHCI_PORT_MODE_PHY] = "ehci-phy",
151 [OMAP_EHCI_PORT_MODE_TLL] = "ehci-tll",
152 [OMAP_EHCI_PORT_MODE_HSIC] = "ehci-hsic",
153 [OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0] = "ohci-phy-6pin-datse0",
154 [OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM] = "ohci-phy-6pin-dpdm",
155 [OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0] = "ohci-phy-3pin-datse0",
156 [OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM] = "ohci-phy-4pin-dpdm",
157 [OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0] = "ohci-tll-6pin-datse0",
158 [OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM] = "ohci-tll-6pin-dpdm",
159 [OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0] = "ohci-tll-3pin-datse0",
160 [OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM] = "ohci-tll-4pin-dpdm",
161 [OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0] = "ohci-tll-2pin-datse0",
162 [OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM] = "ohci-tll-2pin-dpdm",
163};
164
165/**
166 * omap_usbhs_get_dt_port_mode - Get the 'enum usbhs_omap_port_mode'
167 * from the port mode string.
168 * @mode: The port mode string, usually obtained from device tree.
169 *
170 * The function returns the 'enum usbhs_omap_port_mode' that matches the
171 * provided port mode string as per the port_modes table.
172 * If no match is found it returns -ENODEV
173 */
174static const int omap_usbhs_get_dt_port_mode(const char *mode)
175{
176 int i;
177
178 for (i = 0; i < ARRAY_SIZE(port_modes); i++) {
179 if (!strcmp(mode, port_modes[i]))
180 return i;
181 }
182
183 return -ENODEV;
184}
185
17cdd29d
KM		 186static struct platform_device *omap_usbhs_alloc_child(const char *name,
187 struct resource *res, int num_resources, void *pdata,
188 size_t pdata_size, struct device *dev)
189{
190 struct platform_device *child;
191 int ret;
192
193 child = platform_device_alloc(name, 0);
194
195 if (!child) {
196 dev_err(dev, "platform_device_alloc %s failed\n", name);
197 goto err_end;
198 }
199
200 ret = platform_device_add_resources(child, res, num_resources);
201 if (ret) {
202 dev_err(dev, "platform_device_add_resources failed\n");
203 goto err_alloc;
204 }
205
206 ret = platform_device_add_data(child, pdata, pdata_size);
207 if (ret) {
208 dev_err(dev, "platform_device_add_data failed\n");
209 goto err_alloc;
210 }
211
212 child->dev.dma_mask = &usbhs_dmamask;
cbb8c220 213 dma_set_coherent_mask(&child->dev, DMA_BIT_MASK(32));
17cdd29d
KM		 214 child->dev.parent = dev;
215
216 ret = platform_device_add(child);
217 if (ret) {
218 dev_err(dev, "platform_device_add failed\n");
219 goto err_alloc;
220 }
221
222 return child;
223
224err_alloc:
225 platform_device_put(child);
226
227err_end:
228 return NULL;
229}
230
231static int omap_usbhs_alloc_children(struct platform_device *pdev)
232{
233 struct device *dev = &pdev->dev;
9d9c6ae7 234 struct usbhs_omap_platform_data *pdata = dev->platform_data;
17cdd29d
KM		 235 struct platform_device *ehci;
236 struct platform_device *ohci;
237 struct resource *res;
238 struct resource resources[2];
239 int ret;
240
17cdd29d
KM		 241 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ehci");
242 if (!res) {
243 dev_err(dev, "EHCI get resource IORESOURCE_MEM failed\n");
244 ret = -ENODEV;
245 goto err_end;
246 }
247 resources[0] = *res;
248
249 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ehci-irq");
250 if (!res) {
251 dev_err(dev, " EHCI get resource IORESOURCE_IRQ failed\n");
252 ret = -ENODEV;
253 goto err_end;
254 }
255 resources[1] = *res;
256
9d9c6ae7
RQ		 257 ehci = omap_usbhs_alloc_child(OMAP_EHCI_DEVICE, resources, 2, pdata,
258 sizeof(*pdata), dev);
17cdd29d
KM		 259
260 if (!ehci) {
261 dev_err(dev, "omap_usbhs_alloc_child failed\n");
d910774f 262 ret = -ENOMEM;
17cdd29d
KM		 263 goto err_end;
264 }
265
266 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ohci");
267 if (!res) {
268 dev_err(dev, "OHCI get resource IORESOURCE_MEM failed\n");
269 ret = -ENODEV;
270 goto err_ehci;
271 }
272 resources[0] = *res;
273
274 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ohci-irq");
275 if (!res) {
276 dev_err(dev, "OHCI get resource IORESOURCE_IRQ failed\n");
277 ret = -ENODEV;
278 goto err_ehci;
279 }
280 resources[1] = *res;
281
9d9c6ae7
RQ		 282 ohci = omap_usbhs_alloc_child(OMAP_OHCI_DEVICE, resources, 2, pdata,
283 sizeof(*pdata), dev);
17cdd29d
KM		 284 if (!ohci) {
285 dev_err(dev, "omap_usbhs_alloc_child failed\n");
d910774f 286 ret = -ENOMEM;
17cdd29d
KM		 287 goto err_ehci;
288 }
289
290 return 0;
291
292err_ehci:
d910774f 293 platform_device_unregister(ehci);
17cdd29d
KM		 294
295err_end:
296 return ret;
297}
298
17cdd29d
KM		 299static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
300{
301 switch (pmode) {
302 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
303 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
304 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
305 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
306 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
307 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
308 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
309 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
310 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
311 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
312 return true;
313
314 default:
315 return false;
316 }
317}
318
1e7fe1a9 319static int usbhs_runtime_resume(struct device *dev)
17cdd29d
KM		 320{
321 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
9d9c6ae7 322 struct usbhs_omap_platform_data *pdata = omap->pdata;
06ba7dc7 323 int i, r;
1e7fe1a9
KM		 324
325 dev_dbg(dev, "usbhs_runtime_resume\n");
17cdd29d 326
9f4a3ece 327 omap_tll_enable(pdata);
17cdd29d 328
06ba7dc7 329 if (!IS_ERR(omap->ehci_logic_fck))
1e7fe1a9
KM		 330 clk_enable(omap->ehci_logic_fck);
331
06ba7dc7 332 for (i = 0; i < omap->nports; i++) {
340c64ea
RQ		 333 switch (pdata->port_mode[i]) {
334 case OMAP_EHCI_PORT_MODE_HSIC:
335 if (!IS_ERR(omap->hsic60m_clk[i])) {
336 r = clk_enable(omap->hsic60m_clk[i]);
337 if (r) {
338 dev_err(dev,
339 "Can't enable port %d hsic60m clk:%d\n",
340 i, r);
341 }
342 }
343
344 if (!IS_ERR(omap->hsic480m_clk[i])) {
345 r = clk_enable(omap->hsic480m_clk[i]);
346 if (r) {
347 dev_err(dev,
348 "Can't enable port %d hsic480m clk:%d\n",
349 i, r);
350 }
351 }
352 /* Fall through as HSIC mode needs utmi_clk */
353
354 case OMAP_EHCI_PORT_MODE_TLL:
355 if (!IS_ERR(omap->utmi_clk[i])) {
356 r = clk_enable(omap->utmi_clk[i]);
357 if (r) {
358 dev_err(dev,
359 "Can't enable port %d clk : %d\n",
360 i, r);
361 }
362 }
363 break;
364 default:
365 break;
366 }
06ba7dc7 367 }
1e7fe1a9 368
1e7fe1a9
KM		 369 return 0;
370}
371
372static int usbhs_runtime_suspend(struct device *dev)
373{
374 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
9d9c6ae7 375 struct usbhs_omap_platform_data *pdata = omap->pdata;
06ba7dc7 376 int i;
1e7fe1a9
KM		 377
378 dev_dbg(dev, "usbhs_runtime_suspend\n");
379
06ba7dc7 380 for (i = 0; i < omap->nports; i++) {
340c64ea
RQ		 381 switch (pdata->port_mode[i]) {
382 case OMAP_EHCI_PORT_MODE_HSIC:
383 if (!IS_ERR(omap->hsic60m_clk[i]))
384 clk_disable(omap->hsic60m_clk[i]);
385
386 if (!IS_ERR(omap->hsic480m_clk[i]))
387 clk_disable(omap->hsic480m_clk[i]);
388 /* Fall through as utmi_clks were used in HSIC mode */
389
390 case OMAP_EHCI_PORT_MODE_TLL:
391 if (!IS_ERR(omap->utmi_clk[i]))
392 clk_disable(omap->utmi_clk[i]);
393 break;
394 default:
395 break;
396 }
06ba7dc7 397 }
1e7fe1a9 398
06ba7dc7 399 if (!IS_ERR(omap->ehci_logic_fck))
1e7fe1a9
KM		 400 clk_disable(omap->ehci_logic_fck);
401
9f4a3ece 402 omap_tll_disable(pdata);
1e7fe1a9
KM		 403
404 return 0;
405}
406
c4df00ae
RQ		 407static unsigned omap_usbhs_rev1_hostconfig(struct usbhs_hcd_omap *omap,
408 unsigned reg)
409{
410 struct usbhs_omap_platform_data *pdata = omap->pdata;
411 int i;
412
413 for (i = 0; i < omap->nports; i++) {
414 switch (pdata->port_mode[i]) {
415 case OMAP_USBHS_PORT_MODE_UNUSED:
416 reg &= ~(OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS << i);
417 break;
418 case OMAP_EHCI_PORT_MODE_PHY:
419 if (pdata->single_ulpi_bypass)
420 break;
421
422 if (i == 0)
423 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
424 else
425 reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
426 << (i-1));
427 break;
428 default:
429 if (pdata->single_ulpi_bypass)
430 break;
431
432 if (i == 0)
433 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
434 else
435 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
436 << (i-1);
437 break;
438 }
439 }
440
441 if (pdata->single_ulpi_bypass) {
442 /* bypass ULPI only if none of the ports use PHY mode */
443 reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
444
445 for (i = 0; i < omap->nports; i++) {
446 if (is_ehci_phy_mode(pdata->port_mode[i])) {
447 reg &= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
448 break;
449 }
450 }
451 }
452
453 return reg;
454}
455
456static unsigned omap_usbhs_rev2_hostconfig(struct usbhs_hcd_omap *omap,
457 unsigned reg)
458{
459 struct usbhs_omap_platform_data *pdata = omap->pdata;
460 int i;
461
462 for (i = 0; i < omap->nports; i++) {
463 /* Clear port mode fields for PHY mode */
464 reg &= ~(OMAP4_P1_MODE_CLEAR << 2 * i);
465
466 if (is_ehci_tll_mode(pdata->port_mode[i]) ||
467 (is_ohci_port(pdata->port_mode[i])))
468 reg |= OMAP4_P1_MODE_TLL << 2 * i;
469 else if (is_ehci_hsic_mode(pdata->port_mode[i]))
470 reg |= OMAP4_P1_MODE_HSIC << 2 * i;
471 }
472
473 return reg;
474}
475
1e7fe1a9
KM		 476static void omap_usbhs_init(struct device *dev)
477{
478 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
1e7fe1a9
KM		 479 unsigned reg;
480
481 dev_dbg(dev, "starting TI HSUSB Controller\n");
482
760189b3 483 pm_runtime_get_sync(dev);
17cdd29d 484
17cdd29d
KM		 485 reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
486 /* setup ULPI bypass and burst configurations */
487 reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
488 | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
489 | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
490 reg |= OMAP4_UHH_HOSTCONFIG_APP_START_CLK;
491 reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
492
c4df00ae
RQ		 493 switch (omap->usbhs_rev) {
494 case OMAP_USBHS_REV1:
26bacba1 495 reg = omap_usbhs_rev1_hostconfig(omap, reg);
c4df00ae
RQ		 496 break;
497
498 case OMAP_USBHS_REV2:
26bacba1 499 reg = omap_usbhs_rev2_hostconfig(omap, reg);
c4df00ae
RQ		 500 break;
501
502 default: /* newer revisions */
26bacba1 503 reg = omap_usbhs_rev2_hostconfig(omap, reg);
c4df00ae 504 break;
17cdd29d
KM		 505 }
506
507 usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
508 dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
509
760189b3 510 pm_runtime_put_sync(dev);
1e7fe1a9
KM		 511}
512
03a8f438
RQ		 513static int usbhs_omap_get_dt_pdata(struct device *dev,
514 struct usbhs_omap_platform_data *pdata)
515{
516 int ret, i;
517 struct device_node *node = dev->of_node;
518
519 ret = of_property_read_u32(node, "num-ports", &pdata->nports);
520 if (ret)
521 pdata->nports = 0;
522
523 if (pdata->nports > OMAP3_HS_USB_PORTS) {
524 dev_warn(dev, "Too many num_ports <%d> in device tree. Max %d\n",
525 pdata->nports, OMAP3_HS_USB_PORTS);
526 return -ENODEV;
527 }
528
529 /* get port modes */
530 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
531 char prop[11];
532 const char *mode;
533
534 pdata->port_mode[i] = OMAP_USBHS_PORT_MODE_UNUSED;
535
536 snprintf(prop, sizeof(prop), "port%d-mode", i + 1);
537 ret = of_property_read_string(node, prop, &mode);
538 if (ret < 0)
539 continue;
540
541 ret = omap_usbhs_get_dt_port_mode(mode);
542 if (ret < 0) {
543 dev_warn(dev, "Invalid port%d-mode \"%s\" in device tree\n",
544 i, mode);
545 return -ENODEV;
546 }
547
548 dev_dbg(dev, "port%d-mode: %s -> %d\n", i, mode, ret);
549 pdata->port_mode[i] = ret;
550 }
551
552 /* get flags */
553 pdata->single_ulpi_bypass = of_property_read_bool(node,
554 "single-ulpi-bypass");
555
556 return 0;
557}
558
559static struct of_device_id usbhs_child_match_table[] = {
560 { .compatible = "ti,omap-ehci", },
561 { .compatible = "ti,omap-ohci", },
562 { }
563};
564
1e7fe1a9
KM		 565/**
566 * usbhs_omap_probe - initialize TI-based HCDs
567 *
568 * Allocates basic resources for this USB host controller.
569 */
f791be49 570static int usbhs_omap_probe(struct platform_device *pdev)
17cdd29d 571{
1e7fe1a9
KM		 572 struct device *dev = &pdev->dev;
573 struct usbhs_omap_platform_data *pdata = dev->platform_data;
574 struct usbhs_hcd_omap *omap;
575 struct resource *res;
576 int ret = 0;
577 int i;
06ba7dc7 578 bool need_logic_fck;
17cdd29d 579
03a8f438
RQ		 580 if (dev->of_node) {
581 /* For DT boot we populate platform data from OF node */
582 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
583 if (!pdata)
584 return -ENOMEM;
585
586 ret = usbhs_omap_get_dt_pdata(dev, pdata);
587 if (ret)
588 return ret;
589
590 dev->platform_data = pdata;
591 }
592
1e7fe1a9
KM		 593 if (!pdata) {
594 dev_err(dev, "Missing platform data\n");
27d4f2c6 595 return -ENODEV;
1e7fe1a9 596 }
17cdd29d 597
03a8f438
RQ		 598 if (pdata->nports > OMAP3_HS_USB_PORTS) {
599 dev_info(dev, "Too many num_ports <%d> in platform_data. Max %d\n",
600 pdata->nports, OMAP3_HS_USB_PORTS);
601 return -ENODEV;
602 }
603
27d4f2c6 604 omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL);
1e7fe1a9
KM		 605 if (!omap) {
606 dev_err(dev, "Memory allocation failed\n");
27d4f2c6
RQ		 607 return -ENOMEM;
608 }
609
03a8f438 610 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
27d4f2c6
RQ		 611 omap->uhh_base = devm_request_and_ioremap(dev, res);
612 if (!omap->uhh_base) {
613 dev_err(dev, "Resource request/ioremap failed\n");
614 return -EADDRNOTAVAIL;
1e7fe1a9 615 }
17cdd29d 616
9d9c6ae7 617 omap->pdata = pdata;
17cdd29d 618
9f4a3ece
RQ		 619 /* Initialize the TLL subsystem */
620 omap_tll_init(pdata);
621
1e7fe1a9 622 pm_runtime_enable(dev);
17cdd29d 623
d7eaf866
RQ		 624 platform_set_drvdata(pdev, omap);
625 pm_runtime_get_sync(dev);
626
627 omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
628
629 /* we need to call runtime suspend before we update omap->nports
630 * to prevent unbalanced clk_disable()
631 */
632 pm_runtime_put_sync(dev);
633
ccac71a7
RQ		 634 /*
635 * If platform data contains nports then use that
636 * else make out number of ports from USBHS revision
637 */
638 if (pdata->nports) {
639 omap->nports = pdata->nports;
640 } else {
641 switch (omap->usbhs_rev) {
642 case OMAP_USBHS_REV1:
643 omap->nports = 3;
644 break;
645 case OMAP_USBHS_REV2:
646 omap->nports = 2;
647 break;
648 default:
649 omap->nports = OMAP3_HS_USB_PORTS;
650 dev_dbg(dev,
651 "USB HOST Rev:0x%d not recognized, assuming %d ports\n",
652 omap->usbhs_rev, omap->nports);
653 break;
654 }
662e469e 655 pdata->nports = omap->nports;
d7eaf866
RQ		 656 }
657
06ba7dc7
RQ		 658 i = sizeof(struct clk *) * omap->nports;
659 omap->utmi_clk = devm_kzalloc(dev, i, GFP_KERNEL);
340c64ea
RQ		 660 omap->hsic480m_clk = devm_kzalloc(dev, i, GFP_KERNEL);
661 omap->hsic60m_clk = devm_kzalloc(dev, i, GFP_KERNEL);
662
663 if (!omap->utmi_clk || !omap->hsic480m_clk || !omap->hsic60m_clk) {
06ba7dc7
RQ		 664 dev_err(dev, "Memory allocation failed\n");
665 ret = -ENOMEM;
666 goto err_mem;
667 }
668
669 need_logic_fck = false;
670 for (i = 0; i < omap->nports; i++) {
1e7fe1a9 671 if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
06ba7dc7
RQ		 672 is_ehci_hsic_mode(i))
673 need_logic_fck |= true;
674 }
675
676 omap->ehci_logic_fck = ERR_PTR(-EINVAL);
677 if (need_logic_fck) {
678 omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck");
679 if (IS_ERR(omap->ehci_logic_fck)) {
680 ret = PTR_ERR(omap->ehci_logic_fck);
681 dev_dbg(dev, "ehci_logic_fck failed:%d\n", ret);
1e7fe1a9 682 }
06ba7dc7 683 }
17cdd29d 684
06ba7dc7
RQ		 685 omap->utmi_p1_gfclk = clk_get(dev, "utmi_p1_gfclk");
686 if (IS_ERR(omap->utmi_p1_gfclk)) {
687 ret = PTR_ERR(omap->utmi_p1_gfclk);
688 dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
689 goto err_p1_gfclk;
690 }
691
692 omap->utmi_p2_gfclk = clk_get(dev, "utmi_p2_gfclk");
693 if (IS_ERR(omap->utmi_p2_gfclk)) {
694 ret = PTR_ERR(omap->utmi_p2_gfclk);
695 dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
696 goto err_p2_gfclk;
17cdd29d
KM		 697 }
698
1e7fe1a9
KM		 699 omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
700 if (IS_ERR(omap->xclk60mhsp1_ck)) {
701 ret = PTR_ERR(omap->xclk60mhsp1_ck);
702 dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
06ba7dc7 703 goto err_xclk60mhsp1;
17cdd29d
KM		 704 }
705
1e7fe1a9
KM		 706 omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
707 if (IS_ERR(omap->xclk60mhsp2_ck)) {
708 ret = PTR_ERR(omap->xclk60mhsp2_ck);
709 dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
06ba7dc7 710 goto err_xclk60mhsp2;
17cdd29d
KM		 711 }
712
1e7fe1a9
KM		 713 omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
714 if (IS_ERR(omap->init_60m_fclk)) {
715 ret = PTR_ERR(omap->init_60m_fclk);
716 dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
06ba7dc7
RQ		 717 goto err_init60m;
718 }
719
720 for (i = 0; i < omap->nports; i++) {
340c64ea 721 char clkname[30];
06ba7dc7
RQ		 722
723 /* clock names are indexed from 1*/
724 snprintf(clkname, sizeof(clkname),
725 "usb_host_hs_utmi_p%d_clk", i + 1);
726
727 /* If a clock is not found we won't bail out as not all
728 * platforms have all clocks and we can function without
729 * them
730 */
731 omap->utmi_clk[i] = clk_get(dev, clkname);
732 if (IS_ERR(omap->utmi_clk[i]))
733 dev_dbg(dev, "Failed to get clock : %s : %ld\n",
734 clkname, PTR_ERR(omap->utmi_clk[i]));
340c64ea
RQ		 735
736 snprintf(clkname, sizeof(clkname),
737 "usb_host_hs_hsic480m_p%d_clk", i + 1);
738 omap->hsic480m_clk[i] = clk_get(dev, clkname);
739 if (IS_ERR(omap->hsic480m_clk[i]))
740 dev_dbg(dev, "Failed to get clock : %s : %ld\n",
741 clkname, PTR_ERR(omap->hsic480m_clk[i]));
742
743 snprintf(clkname, sizeof(clkname),
744 "usb_host_hs_hsic60m_p%d_clk", i + 1);
745 omap->hsic60m_clk[i] = clk_get(dev, clkname);
746 if (IS_ERR(omap->hsic60m_clk[i]))
747 dev_dbg(dev, "Failed to get clock : %s : %ld\n",
748 clkname, PTR_ERR(omap->hsic60m_clk[i]));
17cdd29d
KM		 749 }
750
1e7fe1a9 751 if (is_ehci_phy_mode(pdata->port_mode[0])) {
a8c4e9e1 752 /* for OMAP3, clk_set_parent fails */
06ba7dc7 753 ret = clk_set_parent(omap->utmi_p1_gfclk,
1e7fe1a9
KM		 754 omap->xclk60mhsp1_ck);
755 if (ret != 0)
a8c4e9e1
RQ		 756 dev_dbg(dev, "xclk60mhsp1_ck set parent failed: %d\n",
757 ret);
1e7fe1a9 758 } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
06ba7dc7 759 ret = clk_set_parent(omap->utmi_p1_gfclk,
1e7fe1a9
KM		 760 omap->init_60m_fclk);
761 if (ret != 0)
a8c4e9e1
RQ		 762 dev_dbg(dev, "P0 init_60m_fclk set parent failed: %d\n",
763 ret);
1e7fe1a9 764 }
17cdd29d 765
1e7fe1a9 766 if (is_ehci_phy_mode(pdata->port_mode[1])) {
06ba7dc7 767 ret = clk_set_parent(omap->utmi_p2_gfclk,
1e7fe1a9
KM		 768 omap->xclk60mhsp2_ck);
769 if (ret != 0)
a8c4e9e1
RQ		 770 dev_dbg(dev, "xclk60mhsp2_ck set parent failed: %d\n",
771 ret);
1e7fe1a9 772 } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
06ba7dc7 773 ret = clk_set_parent(omap->utmi_p2_gfclk,
1e7fe1a9
KM		 774 omap->init_60m_fclk);
775 if (ret != 0)
a8c4e9e1
RQ		 776 dev_dbg(dev, "P1 init_60m_fclk set parent failed: %d\n",
777 ret);
1e7fe1a9 778 }
6eb6fbbf 779
f0447a69 780 omap_usbhs_init(dev);
03a8f438
RQ		 781
782 if (dev->of_node) {
783 ret = of_platform_populate(dev->of_node,
784 usbhs_child_match_table, NULL, dev);
785
786 if (ret) {
787 dev_err(dev, "Failed to create DT children: %d\n", ret);
788 goto err_alloc;
789 }
790
791 } else {
792 ret = omap_usbhs_alloc_children(pdev);
793 if (ret) {
794 dev_err(dev, "omap_usbhs_alloc_children failed: %d\n",
795 ret);
796 goto err_alloc;
797 }
1e7fe1a9
KM		 798 }
799
27d4f2c6 800 return 0;
1e7fe1a9
KM		 801
802err_alloc:
340c64ea 803 for (i = 0; i < omap->nports; i++) {
06ba7dc7
RQ		 804 if (!IS_ERR(omap->utmi_clk[i]))
805 clk_put(omap->utmi_clk[i]);
340c64ea
RQ		 806 if (!IS_ERR(omap->hsic60m_clk[i]))
807 clk_put(omap->hsic60m_clk[i]);
808 if (!IS_ERR(omap->hsic480m_clk[i]))
809 clk_put(omap->hsic480m_clk[i]);
810 }
1e7fe1a9 811
06ba7dc7 812 clk_put(omap->init_60m_fclk);
1e7fe1a9 813
06ba7dc7 814err_init60m:
1e7fe1a9
KM		 815 clk_put(omap->xclk60mhsp2_ck);
816
06ba7dc7 817err_xclk60mhsp2:
1e7fe1a9
KM		 818 clk_put(omap->xclk60mhsp1_ck);
819
06ba7dc7
RQ		 820err_xclk60mhsp1:
821 clk_put(omap->utmi_p2_gfclk);
1e7fe1a9 822
06ba7dc7
RQ		 823err_p2_gfclk:
824 clk_put(omap->utmi_p1_gfclk);
825
826err_p1_gfclk:
827 if (!IS_ERR(omap->ehci_logic_fck))
828 clk_put(omap->ehci_logic_fck);
829
830err_mem:
1e7fe1a9 831 pm_runtime_disable(dev);
1e7fe1a9 832
1e7fe1a9 833 return ret;
17cdd29d 834}
17cdd29d 835
03a8f438
RQ		 836static int usbhs_omap_remove_child(struct device *dev, void *data)
837{
838 dev_info(dev, "unregistering\n");
839 platform_device_unregister(to_platform_device(dev));
840 return 0;
841}
842
1e7fe1a9
KM		 843/**
844 * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
845 * @pdev: USB Host Controller being removed
846 *
847 * Reverses the effect of usbhs_omap_probe().
848 */
4740f73f 849static int usbhs_omap_remove(struct platform_device *pdev)
17cdd29d 850{
1e7fe1a9 851 struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
06ba7dc7 852 int i;
1e7fe1a9 853
340c64ea 854 for (i = 0; i < omap->nports; i++) {
06ba7dc7
RQ		 855 if (!IS_ERR(omap->utmi_clk[i]))
856 clk_put(omap->utmi_clk[i]);
340c64ea
RQ		 857 if (!IS_ERR(omap->hsic60m_clk[i]))
858 clk_put(omap->hsic60m_clk[i]);
859 if (!IS_ERR(omap->hsic480m_clk[i]))
860 clk_put(omap->hsic480m_clk[i]);
861 }
06ba7dc7 862
1e7fe1a9 863 clk_put(omap->init_60m_fclk);
06ba7dc7
RQ		 864 clk_put(omap->utmi_p1_gfclk);
865 clk_put(omap->utmi_p2_gfclk);
1e7fe1a9 866 clk_put(omap->xclk60mhsp2_ck);
1e7fe1a9 867 clk_put(omap->xclk60mhsp1_ck);
06ba7dc7
RQ		 868
869 if (!IS_ERR(omap->ehci_logic_fck))
870 clk_put(omap->ehci_logic_fck);
871
1e7fe1a9 872 pm_runtime_disable(&pdev->dev);
1e7fe1a9 873
03a8f438
RQ		 874 /* remove children */
875 device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child);
1e7fe1a9 876 return 0;
17cdd29d 877}
1e7fe1a9
KM		 878
879static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
880 .runtime_suspend = usbhs_runtime_suspend,
881 .runtime_resume = usbhs_runtime_resume,
882};
17cdd29d 883
03a8f438
RQ		 884static const struct of_device_id usbhs_omap_dt_ids[] = {
885 { .compatible = "ti,usbhs-host" },
886 { }
887};
888
889MODULE_DEVICE_TABLE(of, usbhs_omap_dt_ids);
890
891
17cdd29d
KM		 892static struct platform_driver usbhs_omap_driver = {
893 .driver = {
894 .name = (char *)usbhs_driver_name,
895 .owner = THIS_MODULE,
1e7fe1a9 896 .pm = &usbhsomap_dev_pm_ops,
03a8f438 897 .of_match_table = of_match_ptr(usbhs_omap_dt_ids),
17cdd29d 898 },
ab3f2a86 899 .remove = usbhs_omap_remove,
17cdd29d
KM		 900};
901
902MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
03a8f438 903MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
17cdd29d
KM		 904MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
905MODULE_LICENSE("GPL v2");
906MODULE_DESCRIPTION("usb host common core driver for omap EHCI and OHCI");
907
908static int __init omap_usbhs_drvinit(void)
909{
910 return platform_driver_probe(&usbhs_omap_driver, usbhs_omap_probe);
911}
912
913/*
914 * init before ehci and ohci drivers;
915 * The usbhs core driver should be initialized much before
916 * the omap ehci and ohci probe functions are called.
4dc2cceb
KM		 917 * This usbhs core driver should be initialized after
918 * usb tll driver
17cdd29d 919 */
4dc2cceb 920fs_initcall_sync(omap_usbhs_drvinit);
17cdd29d
KM		 921
922static void __exit omap_usbhs_drvexit(void)
923{
924 platform_driver_unregister(&usbhs_omap_driver);
925}
926module_exit(omap_usbhs_drvexit);
Linux kernel - Deliverables
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