[deliverable/linux.git] / drivers / mfd / omap-usb-tll.c

/**
 * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
 * Author: Keshava Munegowda <keshava_mgowda@ti.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2  of
 * the License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <linux/platform_data/usb-omap.h>

#define USBTLL_DRIVER_NAME	"usbhs_tll"

/* TLL Register Set */
#define	OMAP_USBTLL_REVISION				(0x00)
#define	OMAP_USBTLL_SYSCONFIG				(0x10)
#define	OMAP_USBTLL_SYSCONFIG_CACTIVITY			(1 << 8)
#define	OMAP_USBTLL_SYSCONFIG_SIDLEMODE			(1 << 3)
#define	OMAP_USBTLL_SYSCONFIG_ENAWAKEUP			(1 << 2)
#define	OMAP_USBTLL_SYSCONFIG_SOFTRESET			(1 << 1)
#define	OMAP_USBTLL_SYSCONFIG_AUTOIDLE			(1 << 0)

#define	OMAP_USBTLL_SYSSTATUS				(0x14)
#define	OMAP_USBTLL_SYSSTATUS_RESETDONE			(1 << 0)

#define	OMAP_USBTLL_IRQSTATUS				(0x18)
#define	OMAP_USBTLL_IRQENABLE				(0x1C)

#define	OMAP_TLL_SHARED_CONF				(0x30)
#define	OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN		(1 << 6)
#define	OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN		(1 << 5)
#define	OMAP_TLL_SHARED_CONF_USB_DIVRATION		(1 << 2)
#define	OMAP_TLL_SHARED_CONF_FCLK_REQ			(1 << 1)
#define	OMAP_TLL_SHARED_CONF_FCLK_IS_ON			(1 << 0)

#define	OMAP_TLL_CHANNEL_CONF(num)			(0x040 + 0x004 * num)
#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT		24
#define	OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF		(1 << 11)
#define	OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE		(1 << 10)
#define	OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE		(1 << 9)
#define	OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE		(1 << 8)
#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS		(1 << 1)
#define	OMAP_TLL_CHANNEL_CONF_CHANEN			(1 << 0)

#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0		0x0
#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM		0x1
#define OMAP_TLL_FSLSMODE_3PIN_PHY			0x2
#define OMAP_TLL_FSLSMODE_4PIN_PHY			0x3
#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0		0x4
#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM		0x5
#define OMAP_TLL_FSLSMODE_3PIN_TLL			0x6
#define OMAP_TLL_FSLSMODE_4PIN_TLL			0x7
#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0		0xA
#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM		0xB

#define	OMAP_TLL_ULPI_FUNCTION_CTRL(num)		(0x804 + 0x100 * num)
#define	OMAP_TLL_ULPI_INTERFACE_CTRL(num)		(0x807 + 0x100 * num)
#define	OMAP_TLL_ULPI_OTG_CTRL(num)			(0x80A + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_EN_RISE(num)			(0x80D + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_EN_FALL(num)			(0x810 + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_STATUS(num)			(0x813 + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_LATCH(num)			(0x814 + 0x100 * num)
#define	OMAP_TLL_ULPI_DEBUG(num)			(0x815 + 0x100 * num)
#define	OMAP_TLL_ULPI_SCRATCH_REGISTER(num)		(0x816 + 0x100 * num)

#define OMAP_REV2_TLL_CHANNEL_COUNT			2
#define OMAP_TLL_CHANNEL_COUNT				3
#define OMAP_TLL_CHANNEL_1_EN_MASK			(1 << 0)
#define OMAP_TLL_CHANNEL_2_EN_MASK			(1 << 1)
#define OMAP_TLL_CHANNEL_3_EN_MASK			(1 << 2)

/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
#define OMAP_USBTLL_REV1		0x00000015	/* OMAP3 */
#define OMAP_USBTLL_REV2		0x00000018	/* OMAP 3630 */
#define OMAP_USBTLL_REV3		0x00000004	/* OMAP4 */

#define is_ehci_tll_mode(x)	(x == OMAP_EHCI_PORT_MODE_TLL)

struct usbtll_omap {
	struct clk				*usbtll_p1_fck;
	struct clk				*usbtll_p2_fck;
	int					nch;	/* num. of channels */
	struct usbhs_omap_platform_data		*pdata;
	/* secure the register updates */
	spinlock_t				lock;
};

/*-------------------------------------------------------------------------*/

const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
struct platform_device	*tll_pdev;

/*-------------------------------------------------------------------------*/

static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
{
	__raw_writel(val, base + reg);
}

static inline u32 usbtll_read(void __iomem *base, u32 reg)
{
	return __raw_readl(base + reg);
}

static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
{
	__raw_writeb(val, base + reg);
}

static inline u8 usbtll_readb(void __iomem *base, u8 reg)
{
	return __raw_readb(base + reg);
}

/*-------------------------------------------------------------------------*/

static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
{
	switch (pmode) {
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
		return true;

	default:
		return false;
	}
}

/*
 * convert the port-mode enum to a value we can use in the FSLSMODE
 * field of USBTLL_CHANNEL_CONF
 */
static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
{
	switch (mode) {
	case OMAP_USBHS_PORT_MODE_UNUSED:
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;

	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_3PIN_PHY;

	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
		return OMAP_TLL_FSLSMODE_4PIN_PHY;

	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
		return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;

	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_3PIN_TLL;

	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
		return OMAP_TLL_FSLSMODE_4PIN_TLL;

	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
		return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
	default:
		pr_warn("Invalid port mode, using default\n");
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
	}
}

/**
 * usbtll_omap_probe - initialize TI-based HCDs
 *
 * Allocates basic resources for this USB host controller.
 */
static int usbtll_omap_probe(struct platform_device *pdev)
{
	struct device				*dev =  &pdev->dev;
	struct usbhs_omap_platform_data		*pdata = dev->platform_data;
	void __iomem				*base;
	struct resource				*res;
	struct usbtll_omap			*tll;
	unsigned				reg;
	unsigned long				flags;
	int					ret = 0;
	int					i, ver;

	dev_dbg(dev, "starting TI HSUSB TLL Controller\n");

	tll = kzalloc(sizeof(struct usbtll_omap), GFP_KERNEL);
	if (!tll) {
		dev_err(dev, "Memory allocation failed\n");
		ret = -ENOMEM;
		goto end;
	}

	spin_lock_init(&tll->lock);

	tll->pdata = pdata;

	tll->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
	if (IS_ERR(tll->usbtll_p1_fck)) {
		ret = PTR_ERR(tll->usbtll_p1_fck);
		dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
		goto err_tll;
	}

	tll->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
	if (IS_ERR(tll->usbtll_p2_fck)) {
		ret = PTR_ERR(tll->usbtll_p2_fck);
		dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
		goto err_usbtll_p1_fck;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(dev, "usb tll get resource failed\n");
		ret = -ENODEV;
		goto err_usbtll_p2_fck;
	}

	base = ioremap(res->start, resource_size(res));
	if (!base) {
		dev_err(dev, "TLL ioremap failed\n");
		ret = -ENOMEM;
		goto err_usbtll_p2_fck;
	}

	platform_set_drvdata(pdev, tll);
	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	spin_lock_irqsave(&tll->lock, flags);

	ver =  usbtll_read(base, OMAP_USBTLL_REVISION);
	switch (ver) {
	case OMAP_USBTLL_REV1:
		tll->nch = OMAP_TLL_CHANNEL_COUNT;
		break;
	case OMAP_USBTLL_REV2:
	case OMAP_USBTLL_REV3:
		tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
		break;
	default:
		tll->nch = OMAP_TLL_CHANNEL_COUNT;
		dev_dbg(dev,
		 "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
			ver, tll->nch);
		break;
	}

	if (is_ehci_tll_mode(pdata->port_mode[0]) ||
	    is_ehci_tll_mode(pdata->port_mode[1]) ||
	    is_ehci_tll_mode(pdata->port_mode[2]) ||
	    is_ohci_port(pdata->port_mode[0]) ||
	    is_ohci_port(pdata->port_mode[1]) ||
	    is_ohci_port(pdata->port_mode[2])) {

		/* Program Common TLL register */
		reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
		reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
			| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
		reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
		reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;

		usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);

		/* Enable channels now */
		for (i = 0; i < tll->nch; i++) {
			reg = usbtll_read(base,	OMAP_TLL_CHANNEL_CONF(i));

			if (is_ohci_port(pdata->port_mode[i])) {
				reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
				<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
				reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
			} else if (pdata->port_mode[i] ==
					OMAP_EHCI_PORT_MODE_TLL) {
				/*
				 * Disable AutoIdle, BitStuffing
				 * and use SDR Mode
				 */
				reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
					| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
					| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
			} else {
				continue;
			}
			reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
			usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);

			usbtll_writeb(base,
				      OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
				      0xbe);
		}
	}

	spin_unlock_irqrestore(&tll->lock, flags);
	iounmap(base);
	pm_runtime_put_sync(dev);
	tll_pdev = pdev;
	if (!ret)
		goto end;
	pm_runtime_disable(dev);

err_usbtll_p2_fck:
	clk_put(tll->usbtll_p2_fck);

err_usbtll_p1_fck:
	clk_put(tll->usbtll_p1_fck);

err_tll:
	kfree(tll);

end:
	return ret;
}

/**
 * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
 * @pdev: USB Host Controller being removed
 *
 * Reverses the effect of usbtll_omap_probe().
 */
static int usbtll_omap_remove(struct platform_device *pdev)
{
	struct usbtll_omap *tll = platform_get_drvdata(pdev);

	clk_put(tll->usbtll_p2_fck);
	clk_put(tll->usbtll_p1_fck);
	pm_runtime_disable(&pdev->dev);
	kfree(tll);
	return 0;
}

static int usbtll_runtime_resume(struct device *dev)
{
	struct usbtll_omap			*tll = dev_get_drvdata(dev);
	struct usbhs_omap_platform_data		*pdata = tll->pdata;
	unsigned long				flags;

	dev_dbg(dev, "usbtll_runtime_resume\n");

	if (!pdata) {
		dev_dbg(dev, "missing platform_data\n");
		return  -ENODEV;
	}

	spin_lock_irqsave(&tll->lock, flags);

	if (is_ehci_tll_mode(pdata->port_mode[0]))
		clk_enable(tll->usbtll_p1_fck);

	if (is_ehci_tll_mode(pdata->port_mode[1]))
		clk_enable(tll->usbtll_p2_fck);

	spin_unlock_irqrestore(&tll->lock, flags);

	return 0;
}

static int usbtll_runtime_suspend(struct device *dev)
{
	struct usbtll_omap			*tll = dev_get_drvdata(dev);
	struct usbhs_omap_platform_data		*pdata = tll->pdata;
	unsigned long				flags;

	dev_dbg(dev, "usbtll_runtime_suspend\n");

	if (!pdata) {
		dev_dbg(dev, "missing platform_data\n");
		return  -ENODEV;
	}

	spin_lock_irqsave(&tll->lock, flags);

	if (is_ehci_tll_mode(pdata->port_mode[0]))
		clk_disable(tll->usbtll_p1_fck);

	if (is_ehci_tll_mode(pdata->port_mode[1]))
		clk_disable(tll->usbtll_p2_fck);

	spin_unlock_irqrestore(&tll->lock, flags);

	return 0;
}

static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
	SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
			   usbtll_runtime_resume,
			   NULL)
};

static struct platform_driver usbtll_omap_driver = {
	.driver = {
		.name		= (char *)usbtll_driver_name,
		.owner		= THIS_MODULE,
		.pm		= &usbtllomap_dev_pm_ops,
	},
	.probe		= usbtll_omap_probe,
	.remove		= usbtll_omap_remove,
};

int omap_tll_enable(void)
{
	if (!tll_pdev) {
		pr_err("missing omap usbhs tll platform_data\n");
		return  -ENODEV;
	}
	return pm_runtime_get_sync(&tll_pdev->dev);
}
EXPORT_SYMBOL_GPL(omap_tll_enable);

int omap_tll_disable(void)
{
	if (!tll_pdev) {
		pr_err("missing omap usbhs tll platform_data\n");
		return  -ENODEV;
	}
	return pm_runtime_put_sync(&tll_pdev->dev);
}
EXPORT_SYMBOL_GPL(omap_tll_disable);

MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");

static int __init omap_usbtll_drvinit(void)
{
	return platform_driver_register(&usbtll_omap_driver);
}

/*
 * init before usbhs core driver;
 * The usbtll driver should be initialized before
 * the usbhs core driver probe function is called.
 */
fs_initcall(omap_usbtll_drvinit);

static void __exit omap_usbtll_drvexit(void)
{
	platform_driver_unregister(&usbtll_omap_driver);
}
module_exit(omap_usbtll_drvexit);
Commit	Line	Data
16fa3dc7 KM	1	/**
	2	* omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
	5	* Author: Keshava Munegowda <keshava_mgowda@ti.com>
	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 of
	9	* the License as published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/types.h>
	22	#include <linux/slab.h>
	23	#include <linux/spinlock.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/clk.h>
	26	#include <linux/io.h>
	27	#include <linux/err.h>
16fa3dc7	28	#include <linux/pm_runtime.h>
e8c4a7ac	29	#include <linux/platform_data/usb-omap.h>
16fa3dc7 KM	30
	31	#define USBTLL_DRIVER_NAME "usbhs_tll"
	32
	33	/* TLL Register Set */
	34	#define OMAP_USBTLL_REVISION (0x00)
	35	#define OMAP_USBTLL_SYSCONFIG (0x10)
	36	#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
	37	#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
	38	#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
	39	#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
	40	#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
	41
	42	#define OMAP_USBTLL_SYSSTATUS (0x14)
	43	#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
	44
	45	#define OMAP_USBTLL_IRQSTATUS (0x18)
	46	#define OMAP_USBTLL_IRQENABLE (0x1C)
	47
	48	#define OMAP_TLL_SHARED_CONF (0x30)
	49	#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
	50	#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
	51	#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
	52	#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
	53	#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
	54
	55	#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
	56	#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
	57	#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
	58	#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
	59	#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
	60	#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
	61	#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
	62	#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
	63
	64	#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
	65	#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
	66	#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
	67	#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
	68	#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
	69	#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
	70	#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
	71	#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
	72	#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
	73	#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
	74
	75	#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
	76	#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
	77	#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
	78	#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
	79	#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
	80	#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
	81	#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
	82	#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
	83	#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
	84
	85	#define OMAP_REV2_TLL_CHANNEL_COUNT 2
	86	#define OMAP_TLL_CHANNEL_COUNT 3
	87	#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
	88	#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
	89	#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
	90
	91	/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
	92	#define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
	93	#define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
94	#define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
95
96	#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
97
98	struct usbtll_omap {
99	struct clk *usbtll_p1_fck;
100	struct clk *usbtll_p2_fck;
7e0ff103	101	int nch; /* num. of channels */
9d9c6ae7	102	struct usbhs_omap_platform_data *pdata;
16fa3dc7 KM	103	/* secure the register updates */
	104	spinlock_t lock;
	105	};
	106
	107	/-------------------------------------------------------------------------/
	108
	109	const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
	110	struct platform_device *tll_pdev;
	111
	112	/-------------------------------------------------------------------------/
	113
	114	static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
	115	{
	116	__raw_writel(val, base + reg);
	117	}
	118
	119	static inline u32 usbtll_read(void __iomem *base, u32 reg)
	120	{
	121	return __raw_readl(base + reg);
	122	}
	123
	124	static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
	125	{
	126	__raw_writeb(val, base + reg);
	127	}
	128
	129	static inline u8 usbtll_readb(void __iomem *base, u8 reg)
	130	{
	131	return __raw_readb(base + reg);
	132	}
	133
	134	/-------------------------------------------------------------------------/
	135
	136	static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
	137	{
	138	switch (pmode) {
	139	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	140	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	141	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	142	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	143	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
	144	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
	145	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
	146	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
	147	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
	148	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
	149	return true;
	150
	151	default:
	152	return false;
	153	}
	154	}
	155
	156	/*
	157	* convert the port-mode enum to a value we can use in the FSLSMODE
	158	* field of USBTLL_CHANNEL_CONF
	159	*/
	160	static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
	161	{
	162	switch (mode) {
	163	case OMAP_USBHS_PORT_MODE_UNUSED:
	164	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	165	return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
	166
167	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
168	return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
169
170	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
171	return OMAP_TLL_FSLSMODE_3PIN_PHY;
172
173	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
174	return OMAP_TLL_FSLSMODE_4PIN_PHY;
175
176	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
177	return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
178
179	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
180	return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
181
182	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
183	return OMAP_TLL_FSLSMODE_3PIN_TLL;
184
185	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
186	return OMAP_TLL_FSLSMODE_4PIN_TLL;
187
188	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
189	return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
190
191	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
192	return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
193	default:
194	pr_warn("Invalid port mode, using default\n");
195	return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
196	}
197	}
198
199	/**
200	* usbtll_omap_probe - initialize TI-based HCDs
201	*
202	* Allocates basic resources for this USB host controller.
203	*/
f791be49	204	static int usbtll_omap_probe(struct platform_device *pdev)
16fa3dc7 KM	205	{
16fa3dc7 KM	206	struct device *dev = &pdev->dev;
9d9c6ae7	207	struct usbhs_omap_platform_data *pdata = dev->platform_data;
16fa3dc7 KM	208	void __iomem *base;
	209	struct resource *res;
	210	struct usbtll_omap *tll;
	211	unsigned reg;
	212	unsigned long flags;
	213	int ret = 0;
7e0ff103	214	int i, ver;
16fa3dc7 KM	215
	216	dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
	217
	218	tll = kzalloc(sizeof(struct usbtll_omap), GFP_KERNEL);
	219	if (!tll) {
	220	dev_err(dev, "Memory allocation failed\n");
	221	ret = -ENOMEM;
	222	goto end;
	223	}
	224
	225	spin_lock_init(&tll->lock);
	226
9d9c6ae7	227	tll->pdata = pdata;
16fa3dc7 KM	228
	229	tll->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
	230	if (IS_ERR(tll->usbtll_p1_fck)) {
	231	ret = PTR_ERR(tll->usbtll_p1_fck);
	232	dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
	233	goto err_tll;
	234	}
	235
	236	tll->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
	237	if (IS_ERR(tll->usbtll_p2_fck)) {
	238	ret = PTR_ERR(tll->usbtll_p2_fck);
	239	dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
	240	goto err_usbtll_p1_fck;
	241	}
	242
	243	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	244	if (!res) {
	245	dev_err(dev, "usb tll get resource failed\n");
	246	ret = -ENODEV;
	247	goto err_usbtll_p2_fck;
	248	}
	249
	250	base = ioremap(res->start, resource_size(res));
	251	if (!base) {
	252	dev_err(dev, "TLL ioremap failed\n");
	253	ret = -ENOMEM;
	254	goto err_usbtll_p2_fck;
	255	}
	256
	257	platform_set_drvdata(pdev, tll);
	258	pm_runtime_enable(dev);
	259	pm_runtime_get_sync(dev);
	260
	261	spin_lock_irqsave(&tll->lock, flags);
	262
	263	ver = usbtll_read(base, OMAP_USBTLL_REVISION);
	264	switch (ver) {
	265	case OMAP_USBTLL_REV1:
7e0ff103	266	tll->nch = OMAP_TLL_CHANNEL_COUNT;
16fa3dc7	267	break;
7e0ff103	268	case OMAP_USBTLL_REV2:
16fa3dc7	269	case OMAP_USBTLL_REV3:
7e0ff103	270	tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
16fa3dc7 KM	271	break;
16fa3dc7 KM	272	default:
7e0ff103 RQ	273	tll->nch = OMAP_TLL_CHANNEL_COUNT;
	274	dev_dbg(dev,
	275	"USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
	276	ver, tll->nch);
	277	break;
16fa3dc7 KM	278	}
	279
	280	if (is_ehci_tll_mode(pdata->port_mode[0]) \|\|
	281	is_ehci_tll_mode(pdata->port_mode[1]) \|\|
	282	is_ehci_tll_mode(pdata->port_mode[2]) \|\|
	283	is_ohci_port(pdata->port_mode[0]) \|\|
	284	is_ohci_port(pdata->port_mode[1]) \|\|
	285	is_ohci_port(pdata->port_mode[2])) {
	286
	287	/* Program Common TLL register */
	288	reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
	289	reg \|= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
	290	\| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
	291	reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
	292	reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
	293
	294	usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
	295
	296	/* Enable channels now */
7e0ff103	297	for (i = 0; i < tll->nch; i++) {
16fa3dc7 KM	298	reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
	299
	300	if (is_ohci_port(pdata->port_mode[i])) {
	301	reg \|= ohci_omap3_fslsmode(pdata->port_mode[i])
	302	<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
	303	reg \|= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
	304	} else if (pdata->port_mode[i] ==
	305	OMAP_EHCI_PORT_MODE_TLL) {
	306	/*
	307	* Disable AutoIdle, BitStuffing
	308	* and use SDR Mode
	309	*/
	310	reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
	311	\| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
	312	\| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
	313	} else {
	314	continue;
	315	}
	316	reg \|= OMAP_TLL_CHANNEL_CONF_CHANEN;
	317	usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
	318
	319	usbtll_writeb(base,
	320	OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
	321	0xbe);
	322	}
	323	}
	324
16fa3dc7 KM	325	spin_unlock_irqrestore(&tll->lock, flags);
	326	iounmap(base);
	327	pm_runtime_put_sync(dev);
	328	tll_pdev = pdev;
	329	if (!ret)
	330	goto end;
	331	pm_runtime_disable(dev);
	332
	333	err_usbtll_p2_fck:
	334	clk_put(tll->usbtll_p2_fck);
	335
	336	err_usbtll_p1_fck:
	337	clk_put(tll->usbtll_p1_fck);
	338
	339	err_tll:
	340	kfree(tll);
	341
	342	end:
	343	return ret;
	344	}
	345
	346	/**
	347	* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
	348	* @pdev: USB Host Controller being removed
	349	*
	350	* Reverses the effect of usbtll_omap_probe().
	351	*/
4740f73f	352	static int usbtll_omap_remove(struct platform_device *pdev)
16fa3dc7 KM	353	{
	354	struct usbtll_omap *tll = platform_get_drvdata(pdev);
	355
	356	clk_put(tll->usbtll_p2_fck);
	357	clk_put(tll->usbtll_p1_fck);
	358	pm_runtime_disable(&pdev->dev);
	359	kfree(tll);
	360	return 0;
	361	}
	362
	363	static int usbtll_runtime_resume(struct device *dev)
	364	{
	365	struct usbtll_omap *tll = dev_get_drvdata(dev);
9d9c6ae7	366	struct usbhs_omap_platform_data *pdata = tll->pdata;
16fa3dc7 KM	367	unsigned long flags;
	368
	369	dev_dbg(dev, "usbtll_runtime_resume\n");
	370
	371	if (!pdata) {
	372	dev_dbg(dev, "missing platform_data\n");
	373	return -ENODEV;
	374	}
	375
	376	spin_lock_irqsave(&tll->lock, flags);
	377
	378	if (is_ehci_tll_mode(pdata->port_mode[0]))
	379	clk_enable(tll->usbtll_p1_fck);
	380
	381	if (is_ehci_tll_mode(pdata->port_mode[1]))
	382	clk_enable(tll->usbtll_p2_fck);
	383
	384	spin_unlock_irqrestore(&tll->lock, flags);
	385
	386	return 0;
	387	}
	388
	389	static int usbtll_runtime_suspend(struct device *dev)
	390	{
	391	struct usbtll_omap *tll = dev_get_drvdata(dev);
9d9c6ae7	392	struct usbhs_omap_platform_data *pdata = tll->pdata;
16fa3dc7 KM	393	unsigned long flags;
	394
	395	dev_dbg(dev, "usbtll_runtime_suspend\n");
	396
	397	if (!pdata) {
	398	dev_dbg(dev, "missing platform_data\n");
	399	return -ENODEV;
	400	}
	401
	402	spin_lock_irqsave(&tll->lock, flags);
	403
	404	if (is_ehci_tll_mode(pdata->port_mode[0]))
	405	clk_disable(tll->usbtll_p1_fck);
	406
	407	if (is_ehci_tll_mode(pdata->port_mode[1]))
	408	clk_disable(tll->usbtll_p2_fck);
	409
	410	spin_unlock_irqrestore(&tll->lock, flags);
	411
	412	return 0;
	413	}
	414
	415	static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
	416	SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
	417	usbtll_runtime_resume,
	418	NULL)
	419	};
	420
	421	static struct platform_driver usbtll_omap_driver = {
	422	.driver = {
	423	.name = (char *)usbtll_driver_name,
	424	.owner = THIS_MODULE,
	425	.pm = &usbtllomap_dev_pm_ops,
	426	},
	427	.probe = usbtll_omap_probe,
84449216	428	.remove = usbtll_omap_remove,
16fa3dc7 KM	429	};
	430
	431	int omap_tll_enable(void)
	432	{
	433	if (!tll_pdev) {
	434	pr_err("missing omap usbhs tll platform_data\n");
	435	return -ENODEV;
	436	}
	437	return pm_runtime_get_sync(&tll_pdev->dev);
	438	}
	439	EXPORT_SYMBOL_GPL(omap_tll_enable);
	440
	441	int omap_tll_disable(void)
	442	{
	443	if (!tll_pdev) {
	444	pr_err("missing omap usbhs tll platform_data\n");
	445	return -ENODEV;
	446	}
	447	return pm_runtime_put_sync(&tll_pdev->dev);
	448	}
	449	EXPORT_SYMBOL_GPL(omap_tll_disable);
	450
	451	MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
	452	MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
	453	MODULE_LICENSE("GPL v2");
	454	MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
	455
	456	static int __init omap_usbtll_drvinit(void)
	457	{
	458	return platform_driver_register(&usbtll_omap_driver);
	459	}
	460
	461	/*
	462	* init before usbhs core driver;
	463	* The usbtll driver should be initialized before
	464	* the usbhs core driver probe function is called.
	465	*/
	466	fs_initcall(omap_usbtll_drvinit);
	467
	468	static void __exit omap_usbtll_drvexit(void)
	469	{
	470	platform_driver_unregister(&usbtll_omap_driver);
	471	}
	472	module_exit(omap_usbtll_drvexit);