[deliverable/linux.git] / drivers / mfd / palmas.c

/*
 * TI Palmas MFD Driver
 *
 * Copyright 2011-2012 Texas Instruments Inc.
 *
 * Author: Graeme Gregory <gg@slimlogic.co.uk>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under  the terms of the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the License, or (at your
 *  option) any later version.
 *
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/regmap.h>
#include <linux/err.h>
#include <linux/mfd/core.h>
#include <linux/mfd/palmas.h>
#include <linux/of_device.h>

#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |	\
			PALMAS_EXT_CONTROL_ENABLE2 |	\
			PALMAS_EXT_CONTROL_NSLEEP)

struct palmas_sleep_requestor_info {
	int id;
	int reg_offset;
	int bit_pos;
};

#define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
		.reg_offset = _offset,			\
		.bit_pos = _pos,			\
	}

static struct palmas_sleep_requestor_info sleep_req_info[] = {
	EXTERNAL_REQUESTOR(REGEN1, 0, 0),
	EXTERNAL_REQUESTOR(REGEN2, 0, 1),
	EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
	EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
	EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
	EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
	EXTERNAL_REQUESTOR(REGEN3, 0, 6),
	EXTERNAL_REQUESTOR(SMPS12, 1, 0),
	EXTERNAL_REQUESTOR(SMPS3, 1, 1),
	EXTERNAL_REQUESTOR(SMPS45, 1, 2),
	EXTERNAL_REQUESTOR(SMPS6, 1, 3),
	EXTERNAL_REQUESTOR(SMPS7, 1, 4),
	EXTERNAL_REQUESTOR(SMPS8, 1, 5),
	EXTERNAL_REQUESTOR(SMPS9, 1, 6),
	EXTERNAL_REQUESTOR(SMPS10, 1, 7),
	EXTERNAL_REQUESTOR(LDO1, 2, 0),
	EXTERNAL_REQUESTOR(LDO2, 2, 1),
	EXTERNAL_REQUESTOR(LDO3, 2, 2),
	EXTERNAL_REQUESTOR(LDO4, 2, 3),
	EXTERNAL_REQUESTOR(LDO5, 2, 4),
	EXTERNAL_REQUESTOR(LDO6, 2, 5),
	EXTERNAL_REQUESTOR(LDO7, 2, 6),
	EXTERNAL_REQUESTOR(LDO8, 2, 7),
	EXTERNAL_REQUESTOR(LDO9, 3, 0),
	EXTERNAL_REQUESTOR(LDOLN, 3, 1),
	EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
};

static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
	{
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
					PALMAS_PRIMARY_SECONDARY_PAD3),
	},
	{
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
					PALMAS_GPADC_SMPS_VSEL_MONITORING),
	},
	{
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
					PALMAS_GPADC_TRIM16),
	},
};

static const struct regmap_irq palmas_irqs[] = {
	/* INT1 IRQs */
	[PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
		.mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,
	},
	[PALMAS_PWRON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_PWRON,
	},
	[PALMAS_LONG_PRESS_KEY_IRQ] = {
		.mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,
	},
	[PALMAS_RPWRON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_RPWRON,
	},
	[PALMAS_PWRDOWN_IRQ] = {
		.mask = PALMAS_INT1_STATUS_PWRDOWN,
	},
	[PALMAS_HOTDIE_IRQ] = {
		.mask = PALMAS_INT1_STATUS_HOTDIE,
	},
	[PALMAS_VSYS_MON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_VSYS_MON,
	},
	[PALMAS_VBAT_MON_IRQ] = {
		.mask = PALMAS_INT1_STATUS_VBAT_MON,
	},
	/* INT2 IRQs*/
	[PALMAS_RTC_ALARM_IRQ] = {
		.mask = PALMAS_INT2_STATUS_RTC_ALARM,
		.reg_offset = 1,
	},
	[PALMAS_RTC_TIMER_IRQ] = {
		.mask = PALMAS_INT2_STATUS_RTC_TIMER,
		.reg_offset = 1,
	},
	[PALMAS_WDT_IRQ] = {
		.mask = PALMAS_INT2_STATUS_WDT,
		.reg_offset = 1,
	},
	[PALMAS_BATREMOVAL_IRQ] = {
		.mask = PALMAS_INT2_STATUS_BATREMOVAL,
		.reg_offset = 1,
	},
	[PALMAS_RESET_IN_IRQ] = {
		.mask = PALMAS_INT2_STATUS_RESET_IN,
		.reg_offset = 1,
	},
	[PALMAS_FBI_BB_IRQ] = {
		.mask = PALMAS_INT2_STATUS_FBI_BB,
		.reg_offset = 1,
	},
	[PALMAS_SHORT_IRQ] = {
		.mask = PALMAS_INT2_STATUS_SHORT,
		.reg_offset = 1,
	},
	[PALMAS_VAC_ACOK_IRQ] = {
		.mask = PALMAS_INT2_STATUS_VAC_ACOK,
		.reg_offset = 1,
	},
	/* INT3 IRQs */
	[PALMAS_GPADC_AUTO_0_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,
		.reg_offset = 2,
	},
	[PALMAS_GPADC_AUTO_1_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,
		.reg_offset = 2,
	},
	[PALMAS_GPADC_EOC_SW_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,
		.reg_offset = 2,
	},
	[PALMAS_GPADC_EOC_RT_IRQ] = {
		.mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,
		.reg_offset = 2,
	},
	[PALMAS_ID_OTG_IRQ] = {
		.mask = PALMAS_INT3_STATUS_ID_OTG,
		.reg_offset = 2,
	},
	[PALMAS_ID_IRQ] = {
		.mask = PALMAS_INT3_STATUS_ID,
		.reg_offset = 2,
	},
	[PALMAS_VBUS_OTG_IRQ] = {
		.mask = PALMAS_INT3_STATUS_VBUS_OTG,
		.reg_offset = 2,
	},
	[PALMAS_VBUS_IRQ] = {
		.mask = PALMAS_INT3_STATUS_VBUS,
		.reg_offset = 2,
	},
	/* INT4 IRQs */
	[PALMAS_GPIO_0_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_0,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_1_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_1,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_2_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_2,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_3_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_3,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_4_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_4,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_5_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_5,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_6_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_6,
		.reg_offset = 3,
	},
	[PALMAS_GPIO_7_IRQ] = {
		.mask = PALMAS_INT4_STATUS_GPIO_7,
		.reg_offset = 3,
	},
};

static struct regmap_irq_chip palmas_irq_chip = {
	.name = "palmas",
	.irqs = palmas_irqs,
	.num_irqs = ARRAY_SIZE(palmas_irqs),

	.num_regs = 4,
	.irq_reg_stride = 5,
	.status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
			PALMAS_INT1_STATUS),
	.mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
			PALMAS_INT1_MASK),
};

int palmas_ext_control_req_config(struct palmas *palmas,
	enum palmas_external_requestor_id id,  int ext_ctrl, bool enable)
{
	int preq_mask_bit = 0;
	int reg_add = 0;
	int bit_pos;
	int ret;

	if (!(ext_ctrl & PALMAS_EXT_REQ))
		return 0;

	if (id >= PALMAS_EXTERNAL_REQSTR_ID_MAX)
		return 0;

	if (ext_ctrl & PALMAS_EXT_CONTROL_NSLEEP) {
		reg_add = PALMAS_NSLEEP_RES_ASSIGN;
		preq_mask_bit = 0;
	} else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE1) {
		reg_add = PALMAS_ENABLE1_RES_ASSIGN;
		preq_mask_bit = 1;
	} else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE2) {
		reg_add = PALMAS_ENABLE2_RES_ASSIGN;
		preq_mask_bit = 2;
	}

	bit_pos = sleep_req_info[id].bit_pos;
	reg_add += sleep_req_info[id].reg_offset;
	if (enable)
		ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
				reg_add, BIT(bit_pos), BIT(bit_pos));
	else
		ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
				reg_add, BIT(bit_pos), 0);
	if (ret < 0) {
		dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
			reg_add, ret);
		return ret;
	}

	/* Unmask the PREQ */
	ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
			PALMAS_POWER_CTRL, BIT(preq_mask_bit), 0);
	if (ret < 0) {
		dev_err(palmas->dev, "POWER_CTRL register update failed %d\n",
			ret);
		return ret;
	}
	return ret;
}
EXPORT_SYMBOL_GPL(palmas_ext_control_req_config);

static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
		struct palmas_platform_data *pdata)
{
	struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
	if (!irq_data) {
		dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
		return -EINVAL;
	}

	pdata->irq_flags = irqd_get_trigger_type(irq_data);
	dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
	return 0;
}

static void palmas_dt_to_pdata(struct i2c_client *i2c,
		struct palmas_platform_data *pdata)
{
	struct device_node *node = i2c->dev.of_node;
	int ret;
	u32 prop;

	ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
	if (!ret) {
		pdata->mux_from_pdata = 1;
		pdata->pad1 = prop;
	}

	ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
	if (!ret) {
		pdata->mux_from_pdata = 1;
		pdata->pad2 = prop;
	}

	/* The default for this register is all masked */
	ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
	if (!ret)
		pdata->power_ctrl = prop;
	else
		pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK |
					PALMAS_POWER_CTRL_ENABLE1_MASK |
					PALMAS_POWER_CTRL_ENABLE2_MASK;
	if (i2c->irq)
		palmas_set_pdata_irq_flag(i2c, pdata);

	pdata->pm_off = of_property_read_bool(node,
			"ti,system-power-controller");
}

static struct palmas *palmas_dev;
static void palmas_power_off(void)
{
	unsigned int addr;
	int ret, slave;

	if (!palmas_dev)
		return;

	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
	addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_DEV_CTRL);

	ret = regmap_update_bits(
			palmas_dev->regmap[slave],
			addr,
			PALMAS_DEV_CTRL_DEV_ON,
			0);

	if (ret)
		pr_err("%s: Unable to write to DEV_CTRL_DEV_ON: %d\n",
				__func__, ret);
}

static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST;
static unsigned int tps659038_features;

static const struct of_device_id of_palmas_match_tbl[] = {
	{
		.compatible = "ti,palmas",
		.data = &palmas_features,
	},
	{
		.compatible = "ti,tps659038",
		.data = &tps659038_features,
	},
	{ },
};

static int palmas_i2c_probe(struct i2c_client *i2c,
			    const struct i2c_device_id *id)
{
	struct palmas *palmas;
	struct palmas_platform_data *pdata;
	struct device_node *node = i2c->dev.of_node;
	int ret = 0, i;
	unsigned int reg, addr, *features;
	int slave;
	const struct of_device_id *match;

	pdata = dev_get_platdata(&i2c->dev);

	if (node && !pdata) {
		pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);

		if (!pdata)
			return -ENOMEM;

		palmas_dt_to_pdata(i2c, pdata);
	}

	if (!pdata)
		return -EINVAL;

	palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
	if (palmas == NULL)
		return -ENOMEM;

	i2c_set_clientdata(i2c, palmas);
	palmas->dev = &i2c->dev;
	palmas->irq = i2c->irq;

	match = of_match_device(of_match_ptr(of_palmas_match_tbl), &i2c->dev);

	if (!match)
		return -ENODATA;

	features = (unsigned int *)match->data;
	palmas->features = *features;

	for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
		if (i == 0)
			palmas->i2c_clients[i] = i2c;
		else {
			palmas->i2c_clients[i] =
					i2c_new_dummy(i2c->adapter,
							i2c->addr + i);
			if (!palmas->i2c_clients[i]) {
				dev_err(palmas->dev,
					"can't attach client %d\n", i);
				ret = -ENOMEM;
				goto err;
			}
			palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
		}
		palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
				&palmas_regmap_config[i]);
		if (IS_ERR(palmas->regmap[i])) {
			ret = PTR_ERR(palmas->regmap[i]);
			dev_err(palmas->dev,
				"Failed to allocate regmap %d, err: %d\n",
				i, ret);
			goto err;
		}
	}

	if (!palmas->irq) {
		dev_warn(palmas->dev, "IRQ missing: skipping irq request\n");
		goto no_irq;
	}

	/* Change interrupt line output polarity */
	if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
		reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
	else
		reg = 0;
	ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
			PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
			reg);
	if (ret < 0) {
		dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
		goto err;
	}

	/* Change IRQ into clear on read mode for efficiency */
	slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
	addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
	reg = PALMAS_INT_CTRL_INT_CLEAR;

	regmap_write(palmas->regmap[slave], addr, reg);

	ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
			IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip,
			&palmas->irq_data);
	if (ret < 0)
		goto err;

no_irq:
	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
			PALMAS_PRIMARY_SECONDARY_PAD1);

	if (pdata->mux_from_pdata) {
		reg = pdata->pad1;
		ret = regmap_write(palmas->regmap[slave], addr, reg);
		if (ret)
			goto err_irq;
	} else {
		ret = regmap_read(palmas->regmap[slave], addr, &reg);
		if (ret)
			goto err_irq;
	}

	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))
		palmas->gpio_muxed |= PALMAS_GPIO_0_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_1_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
			(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
		palmas->led_muxed |= PALMAS_LED1_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
			(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
		palmas->pwm_muxed |= PALMAS_PWM1_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_2_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
			(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
		palmas->led_muxed |= PALMAS_LED2_MUXED;
	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
			(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
		palmas->pwm_muxed |= PALMAS_PWM2_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))
		palmas->gpio_muxed |= PALMAS_GPIO_3_MUXED;

	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
			PALMAS_PRIMARY_SECONDARY_PAD2);

	if (pdata->mux_from_pdata) {
		reg = pdata->pad2;
		ret = regmap_write(palmas->regmap[slave], addr, reg);
		if (ret)
			goto err_irq;
	} else {
		ret = regmap_read(palmas->regmap[slave], addr, &reg);
		if (ret)
			goto err_irq;
	}

	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))
		palmas->gpio_muxed |= PALMAS_GPIO_4_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_5_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))
		palmas->gpio_muxed |= PALMAS_GPIO_6_MUXED;
	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))
		palmas->gpio_muxed |= PALMAS_GPIO_7_MUXED;

	dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n",
			palmas->gpio_muxed, palmas->pwm_muxed,
			palmas->led_muxed);

	reg = pdata->power_ctrl;

	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
	addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);

	ret = regmap_write(palmas->regmap[slave], addr, reg);
	if (ret)
		goto err_irq;

	/*
	 * If we are probing with DT do this the DT way and return here
	 * otherwise continue and add devices using mfd helpers.
	 */
	if (node) {
		ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
		if (ret < 0) {
			goto err_irq;
		} else if (pdata->pm_off && !pm_power_off) {
			palmas_dev = palmas;
			pm_power_off = palmas_power_off;
			return ret;
		}
	}

	return ret;

err_irq:
	regmap_del_irq_chip(palmas->irq, palmas->irq_data);
err:
	return ret;
}

static int palmas_i2c_remove(struct i2c_client *i2c)
{
	struct palmas *palmas = i2c_get_clientdata(i2c);

	mfd_remove_devices(palmas->dev);
	regmap_del_irq_chip(palmas->irq, palmas->irq_data);

	return 0;
}

static const struct i2c_device_id palmas_i2c_id[] = {
	{ "palmas", },
	{ "twl6035", },
	{ "twl6037", },
	{ "tps65913", },
	{ /* end */ }
};
MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);

static struct i2c_driver palmas_i2c_driver = {
	.driver = {
		   .name = "palmas",
		   .of_match_table = of_palmas_match_tbl,
		   .owner = THIS_MODULE,
	},
	.probe = palmas_i2c_probe,
	.remove = palmas_i2c_remove,
	.id_table = palmas_i2c_id,
};

static int __init palmas_i2c_init(void)
{
	return i2c_add_driver(&palmas_i2c_driver);
}
/* init early so consumer devices can complete system boot */
subsys_initcall(palmas_i2c_init);

static void __exit palmas_i2c_exit(void)
{
	i2c_del_driver(&palmas_i2c_driver);
}
module_exit(palmas_i2c_exit);

MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
MODULE_DESCRIPTION("Palmas chip family multi-function driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
2945fbc2 GG	1	/*
	2	* TI Palmas MFD Driver
	3	*
	4	* Copyright 2011-2012 Texas Instruments Inc.
	5	*
	6	* Author: Graeme Gregory <gg@slimlogic.co.uk>
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*
	13	*/
	14
	15	#include <linux/module.h>
	16	#include <linux/moduleparam.h>
	17	#include <linux/init.h>
	18	#include <linux/slab.h>
	19	#include <linux/i2c.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/irq.h>
	22	#include <linux/regmap.h>
	23	#include <linux/err.h>
	24	#include <linux/mfd/core.h>
	25	#include <linux/mfd/palmas.h>
1ffb0be3	26	#include <linux/of_device.h>
2945fbc2	27
cc01b463 LD	28	#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 \| \
	29	PALMAS_EXT_CONTROL_ENABLE2 \| \
	30	PALMAS_EXT_CONTROL_NSLEEP)
	31
	32	struct palmas_sleep_requestor_info {
	33	int id;
	34	int reg_offset;
	35	int bit_pos;
	36	};
	37
	38	#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
	39	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
	40	.id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
	41	.reg_offset = _offset, \
	42	.bit_pos = _pos, \
	43	}
	44
	45	static struct palmas_sleep_requestor_info sleep_req_info[] = {
	46	EXTERNAL_REQUESTOR(REGEN1, 0, 0),
	47	EXTERNAL_REQUESTOR(REGEN2, 0, 1),
	48	EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
	49	EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
	50	EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
	51	EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
	52	EXTERNAL_REQUESTOR(REGEN3, 0, 6),
	53	EXTERNAL_REQUESTOR(SMPS12, 1, 0),
	54	EXTERNAL_REQUESTOR(SMPS3, 1, 1),
	55	EXTERNAL_REQUESTOR(SMPS45, 1, 2),
	56	EXTERNAL_REQUESTOR(SMPS6, 1, 3),
	57	EXTERNAL_REQUESTOR(SMPS7, 1, 4),
	58	EXTERNAL_REQUESTOR(SMPS8, 1, 5),
	59	EXTERNAL_REQUESTOR(SMPS9, 1, 6),
	60	EXTERNAL_REQUESTOR(SMPS10, 1, 7),
	61	EXTERNAL_REQUESTOR(LDO1, 2, 0),
	62	EXTERNAL_REQUESTOR(LDO2, 2, 1),
	63	EXTERNAL_REQUESTOR(LDO3, 2, 2),
	64	EXTERNAL_REQUESTOR(LDO4, 2, 3),
	65	EXTERNAL_REQUESTOR(LDO5, 2, 4),
	66	EXTERNAL_REQUESTOR(LDO6, 2, 5),
	67	EXTERNAL_REQUESTOR(LDO7, 2, 6),
	68	EXTERNAL_REQUESTOR(LDO8, 2, 7),
	69	EXTERNAL_REQUESTOR(LDO9, 3, 0),
	70	EXTERNAL_REQUESTOR(LDOLN, 3, 1),
	71	EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
	72	};
	73
2945fbc2 GG	74	static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
	75	{
	76	.reg_bits = 8,
	77	.val_bits = 8,
	78	.max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
	79	PALMAS_PRIMARY_SECONDARY_PAD3),
	80	},
	81	{
	82	.reg_bits = 8,
	83	.val_bits = 8,
	84	.max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
	85	PALMAS_GPADC_SMPS_VSEL_MONITORING),
	86	},
	87	{
	88	.reg_bits = 8,
	89	.val_bits = 8,
	90	.max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
	91	PALMAS_GPADC_TRIM16),
	92	},
	93	};
	94
	95	static const struct regmap_irq palmas_irqs[] = {
	96	/* INT1 IRQs */
	97	[PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
	98	.mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,
	99	},
	100	[PALMAS_PWRON_IRQ] = {
	101	.mask = PALMAS_INT1_STATUS_PWRON,
	102	},
	103	[PALMAS_LONG_PRESS_KEY_IRQ] = {
	104	.mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,
	105	},
	106	[PALMAS_RPWRON_IRQ] = {
	107	.mask = PALMAS_INT1_STATUS_RPWRON,
	108	},
	109	[PALMAS_PWRDOWN_IRQ] = {
	110	.mask = PALMAS_INT1_STATUS_PWRDOWN,
	111	},
	112	[PALMAS_HOTDIE_IRQ] = {
	113	.mask = PALMAS_INT1_STATUS_HOTDIE,
	114	},
	115	[PALMAS_VSYS_MON_IRQ] = {
	116	.mask = PALMAS_INT1_STATUS_VSYS_MON,
	117	},
	118	[PALMAS_VBAT_MON_IRQ] = {
	119	.mask = PALMAS_INT1_STATUS_VBAT_MON,
	120	},
	121	/* INT2 IRQs*/
	122	[PALMAS_RTC_ALARM_IRQ] = {
	123	.mask = PALMAS_INT2_STATUS_RTC_ALARM,
	124	.reg_offset = 1,
	125	},
	126	[PALMAS_RTC_TIMER_IRQ] = {
	127	.mask = PALMAS_INT2_STATUS_RTC_TIMER,
	128	.reg_offset = 1,
	129	},
	130	[PALMAS_WDT_IRQ] = {
	131	.mask = PALMAS_INT2_STATUS_WDT,
	132	.reg_offset = 1,
	133	},
	134	[PALMAS_BATREMOVAL_IRQ] = {
	135	.mask = PALMAS_INT2_STATUS_BATREMOVAL,
	136	.reg_offset = 1,
	137	},
138	[PALMAS_RESET_IN_IRQ] = {
139	.mask = PALMAS_INT2_STATUS_RESET_IN,
140	.reg_offset = 1,
141	},
142	[PALMAS_FBI_BB_IRQ] = {
143	.mask = PALMAS_INT2_STATUS_FBI_BB,
144	.reg_offset = 1,
145	},
146	[PALMAS_SHORT_IRQ] = {
147	.mask = PALMAS_INT2_STATUS_SHORT,
148	.reg_offset = 1,
149	},
150	[PALMAS_VAC_ACOK_IRQ] = {
151	.mask = PALMAS_INT2_STATUS_VAC_ACOK,
152	.reg_offset = 1,
153	},
154	/* INT3 IRQs */
155	[PALMAS_GPADC_AUTO_0_IRQ] = {
156	.mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,
157	.reg_offset = 2,
158	},
159	[PALMAS_GPADC_AUTO_1_IRQ] = {
160	.mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,
161	.reg_offset = 2,
162	},
163	[PALMAS_GPADC_EOC_SW_IRQ] = {
164	.mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,
165	.reg_offset = 2,
166	},
167	[PALMAS_GPADC_EOC_RT_IRQ] = {
168	.mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,
169	.reg_offset = 2,
170	},
171	[PALMAS_ID_OTG_IRQ] = {
172	.mask = PALMAS_INT3_STATUS_ID_OTG,
173	.reg_offset = 2,
174	},
175	[PALMAS_ID_IRQ] = {
176	.mask = PALMAS_INT3_STATUS_ID,
177	.reg_offset = 2,
178	},
179	[PALMAS_VBUS_OTG_IRQ] = {
180	.mask = PALMAS_INT3_STATUS_VBUS_OTG,
181	.reg_offset = 2,
182	},
183	[PALMAS_VBUS_IRQ] = {
184	.mask = PALMAS_INT3_STATUS_VBUS,
185	.reg_offset = 2,
186	},
187	/* INT4 IRQs */
188	[PALMAS_GPIO_0_IRQ] = {
189	.mask = PALMAS_INT4_STATUS_GPIO_0,
190	.reg_offset = 3,
191	},
192	[PALMAS_GPIO_1_IRQ] = {
193	.mask = PALMAS_INT4_STATUS_GPIO_1,
194	.reg_offset = 3,
195	},
196	[PALMAS_GPIO_2_IRQ] = {
197	.mask = PALMAS_INT4_STATUS_GPIO_2,
198	.reg_offset = 3,
199	},
200	[PALMAS_GPIO_3_IRQ] = {
201	.mask = PALMAS_INT4_STATUS_GPIO_3,
202	.reg_offset = 3,
203	},
204	[PALMAS_GPIO_4_IRQ] = {
205	.mask = PALMAS_INT4_STATUS_GPIO_4,
206	.reg_offset = 3,
207	},
208	[PALMAS_GPIO_5_IRQ] = {
209	.mask = PALMAS_INT4_STATUS_GPIO_5,
210	.reg_offset = 3,
211	},
212	[PALMAS_GPIO_6_IRQ] = {
213	.mask = PALMAS_INT4_STATUS_GPIO_6,
214	.reg_offset = 3,
215	},
216	[PALMAS_GPIO_7_IRQ] = {
217	.mask = PALMAS_INT4_STATUS_GPIO_7,
218	.reg_offset = 3,
219	},
220	};
221
222	static struct regmap_irq_chip palmas_irq_chip = {
223	.name = "palmas",
224	.irqs = palmas_irqs,
225	.num_irqs = ARRAY_SIZE(palmas_irqs),
226
227	.num_regs = 4,
228	.irq_reg_stride = 5,
229	.status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
230	PALMAS_INT1_STATUS),
231	.mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
232	PALMAS_INT1_MASK),
233	};
234
cc01b463 LD	235	int palmas_ext_control_req_config(struct palmas *palmas,
	236	enum palmas_external_requestor_id id, int ext_ctrl, bool enable)
	237	{
	238	int preq_mask_bit = 0;
	239	int reg_add = 0;
	240	int bit_pos;
	241	int ret;
	242
	243	if (!(ext_ctrl & PALMAS_EXT_REQ))
	244	return 0;
	245
	246	if (id >= PALMAS_EXTERNAL_REQSTR_ID_MAX)
	247	return 0;
	248
	249	if (ext_ctrl & PALMAS_EXT_CONTROL_NSLEEP) {
	250	reg_add = PALMAS_NSLEEP_RES_ASSIGN;
	251	preq_mask_bit = 0;
	252	} else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE1) {
	253	reg_add = PALMAS_ENABLE1_RES_ASSIGN;
	254	preq_mask_bit = 1;
	255	} else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE2) {
	256	reg_add = PALMAS_ENABLE2_RES_ASSIGN;
	257	preq_mask_bit = 2;
	258	}
	259
	260	bit_pos = sleep_req_info[id].bit_pos;
	261	reg_add += sleep_req_info[id].reg_offset;
	262	if (enable)
	263	ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
	264	reg_add, BIT(bit_pos), BIT(bit_pos));
	265	else
	266	ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
	267	reg_add, BIT(bit_pos), 0);
	268	if (ret < 0) {
	269	dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
	270	reg_add, ret);
	271	return ret;
	272	}
	273
	274	/* Unmask the PREQ */
	275	ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
	276	PALMAS_POWER_CTRL, BIT(preq_mask_bit), 0);
	277	if (ret < 0) {
	278	dev_err(palmas->dev, "POWER_CTRL register update failed %d\n",
	279	ret);
	280	return ret;
	281	}
	282	return ret;
	283	}
	284	EXPORT_SYMBOL_GPL(palmas_ext_control_req_config);
	285
df545d1c	286	static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
9c14ac33 GG	287	struct palmas_platform_data *pdata)
9c14ac33 GG	288	{
df545d1c LD	289	struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
	290	if (!irq_data) {
	291	dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
	292	return -EINVAL;
	293	}
	294
	295	pdata->irq_flags = irqd_get_trigger_type(irq_data);
	296	dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
	297	return 0;
	298	}
	299
	300	static void palmas_dt_to_pdata(struct i2c_client *i2c,
	301	struct palmas_platform_data *pdata)
	302	{
	303	struct device_node *node = i2c->dev.of_node;
9c14ac33 GG	304	int ret;
	305	u32 prop;
	306
2154a2b3	307	ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
9c14ac33 GG	308	if (!ret) {
	309	pdata->mux_from_pdata = 1;
	310	pdata->pad1 = prop;
	311	}
	312
2154a2b3	313	ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
9c14ac33 GG	314	if (!ret) {
	315	pdata->mux_from_pdata = 1;
	316	pdata->pad2 = prop;
	317	}
	318
	319	/* The default for this register is all masked */
2154a2b3	320	ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
9c14ac33 GG	321	if (!ret)
	322	pdata->power_ctrl = prop;
	323	else
	324	pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK \|
	325	PALMAS_POWER_CTRL_ENABLE1_MASK \|
	326	PALMAS_POWER_CTRL_ENABLE2_MASK;
df545d1c LD	327	if (i2c->irq)
df545d1c LD	328	palmas_set_pdata_irq_flag(i2c, pdata);
b81eec09 BH	329
	330	pdata->pm_off = of_property_read_bool(node,
	331	"ti,system-power-controller");
	332	}
	333
	334	static struct palmas *palmas_dev;
	335	static void palmas_power_off(void)
	336	{
	337	unsigned int addr;
	338	int ret, slave;
	339
	340	if (!palmas_dev)
	341	return;
	342
	343	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
	344	addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_DEV_CTRL);
	345
	346	ret = regmap_update_bits(
	347	palmas_dev->regmap[slave],
	348	addr,
	349	PALMAS_DEV_CTRL_DEV_ON,
	350	0);
	351
	352	if (ret)
	353	pr_err("%s: Unable to write to DEV_CTRL_DEV_ON: %d\n",
	354	__func__, ret);
9c14ac33 GG	355	}
9c14ac33 GG	356
1ffb0be3	357	static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST;
4124e6e2	358	static unsigned int tps659038_features;
1ffb0be3 K	359
	360	static const struct of_device_id of_palmas_match_tbl[] = {
	361	{
	362	.compatible = "ti,palmas",
	363	.data = &palmas_features,
	364	},
4124e6e2 K	365	{
	366	.compatible = "ti,tps659038",
	367	.data = &tps659038_features,
	368	},
1ffb0be3 K	369	{ },
	370	};
	371
f791be49	372	static int palmas_i2c_probe(struct i2c_client *i2c,
2945fbc2 GG	373	const struct i2c_device_id *id)
	374	{
	375	struct palmas *palmas;
	376	struct palmas_platform_data *pdata;
9c14ac33	377	struct device_node *node = i2c->dev.of_node;
2945fbc2	378	int ret = 0, i;
1ffb0be3	379	unsigned int reg, addr, *features;
2945fbc2	380	int slave;
1ffb0be3	381	const struct of_device_id *match;
2945fbc2 GG	382
2945fbc2 GG	383	pdata = dev_get_platdata(&i2c->dev);
9c14ac33 GG	384
	385	if (node && !pdata) {
	386	pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);
	387
	388	if (!pdata)
	389	return -ENOMEM;
	390
df545d1c	391	palmas_dt_to_pdata(i2c, pdata);
9c14ac33 GG	392	}
9c14ac33 GG	393
2945fbc2 GG	394	if (!pdata)
	395	return -EINVAL;
	396
	397	palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
	398	if (palmas == NULL)
	399	return -ENOMEM;
	400
	401	i2c_set_clientdata(i2c, palmas);
	402	palmas->dev = &i2c->dev;
2945fbc2 GG	403	palmas->irq = i2c->irq;
2945fbc2 GG	404
1ffb0be3 K	405	match = of_match_device(of_match_ptr(of_palmas_match_tbl), &i2c->dev);
	406
	407	if (!match)
	408	return -ENODATA;
	409
	410	features = (unsigned int *)match->data;
	411	palmas->features = *features;
	412
2945fbc2 GG	413	for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
	414	if (i == 0)
	415	palmas->i2c_clients[i] = i2c;
	416	else {
	417	palmas->i2c_clients[i] =
	418	i2c_new_dummy(i2c->adapter,
	419	i2c->addr + i);
	420	if (!palmas->i2c_clients[i]) {
	421	dev_err(palmas->dev,
	422	"can't attach client %d\n", i);
	423	ret = -ENOMEM;
	424	goto err;
	425	}
c4fbec3c	426	palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
2945fbc2 GG	427	}
	428	palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
	429	&palmas_regmap_config[i]);
	430	if (IS_ERR(palmas->regmap[i])) {
	431	ret = PTR_ERR(palmas->regmap[i]);
	432	dev_err(palmas->dev,
	433	"Failed to allocate regmap %d, err: %d\n",
	434	i, ret);
	435	goto err;
	436	}
	437	}
	438
ad522f4e K	439	if (!palmas->irq) {
	440	dev_warn(palmas->dev, "IRQ missing: skipping irq request\n");
	441	goto no_irq;
	442	}
	443
df545d1c LD	444	/* Change interrupt line output polarity */
	445	if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
	446	reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
	447	else
	448	reg = 0;
	449	ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
	450	PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
	451	reg);
	452	if (ret < 0) {
	453	dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
	454	goto err;
	455	}
	456
b330f85d GG	457	/* Change IRQ into clear on read mode for efficiency */
	458	slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
	459	addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
	460	reg = PALMAS_INT_CTRL_INT_CLEAR;
	461
	462	regmap_write(palmas->regmap[slave], addr, reg);
	463
	464	ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
df545d1c	465	IRQF_ONESHOT \| pdata->irq_flags, 0, &palmas_irq_chip,
2945fbc2 GG	466	&palmas->irq_data);
	467	if (ret < 0)
	468	goto err;
	469
ad522f4e	470	no_irq:
2945fbc2 GG	471	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
	472	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
	473	PALMAS_PRIMARY_SECONDARY_PAD1);
	474
	475	if (pdata->mux_from_pdata) {
	476	reg = pdata->pad1;
	477	ret = regmap_write(palmas->regmap[slave], addr, reg);
	478	if (ret)
3f78decc	479	goto err_irq;
2945fbc2 GG	480	} else {
	481	ret = regmap_read(palmas->regmap[slave], addr, &reg);
	482	if (ret)
3f78decc	483	goto err_irq;
2945fbc2 GG	484	}
	485
	486	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))
	487	palmas->gpio_muxed \|= PALMAS_GPIO_0_MUXED;
	488	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))
	489	palmas->gpio_muxed \|= PALMAS_GPIO_1_MUXED;
	490	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
	491	(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
	492	palmas->led_muxed \|= PALMAS_LED1_MUXED;
	493	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
	494	(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
	495	palmas->pwm_muxed \|= PALMAS_PWM1_MUXED;
	496	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))
	497	palmas->gpio_muxed \|= PALMAS_GPIO_2_MUXED;
	498	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
	499	(2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
	500	palmas->led_muxed \|= PALMAS_LED2_MUXED;
	501	else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
	502	(3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
	503	palmas->pwm_muxed \|= PALMAS_PWM2_MUXED;
	504	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))
	505	palmas->gpio_muxed \|= PALMAS_GPIO_3_MUXED;
	506
	507	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
	508	PALMAS_PRIMARY_SECONDARY_PAD2);
	509
	510	if (pdata->mux_from_pdata) {
	511	reg = pdata->pad2;
	512	ret = regmap_write(palmas->regmap[slave], addr, reg);
	513	if (ret)
3f78decc	514	goto err_irq;
2945fbc2 GG	515	} else {
	516	ret = regmap_read(palmas->regmap[slave], addr, &reg);
	517	if (ret)
3f78decc	518	goto err_irq;
2945fbc2 GG	519	}
	520
	521	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))
	522	palmas->gpio_muxed \|= PALMAS_GPIO_4_MUXED;
	523	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))
	524	palmas->gpio_muxed \|= PALMAS_GPIO_5_MUXED;
	525	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))
	526	palmas->gpio_muxed \|= PALMAS_GPIO_6_MUXED;
	527	if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))
	528	palmas->gpio_muxed \|= PALMAS_GPIO_7_MUXED;
	529
	530	dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n",
	531	palmas->gpio_muxed, palmas->pwm_muxed,
	532	palmas->led_muxed);
	533
	534	reg = pdata->power_ctrl;
	535
	536	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
	537	addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);
	538
	539	ret = regmap_write(palmas->regmap[slave], addr, reg);
	540	if (ret)
3f78decc	541	goto err_irq;
2945fbc2	542
9c14ac33 GG	543	/*
	544	* If we are probing with DT do this the DT way and return here
	545	* otherwise continue and add devices using mfd helpers.
	546	*/
	547	if (node) {
	548	ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
b81eec09	549	if (ret < 0) {
9c14ac33	550	goto err_irq;
b81eec09 BH	551	} else if (pdata->pm_off && !pm_power_off) {
	552	palmas_dev = palmas;
	553	pm_power_off = palmas_power_off;
9c14ac33	554	return ret;
b81eec09	555	}
9c14ac33 GG	556	}
9c14ac33 GG	557
2945fbc2 GG	558	return ret;
2945fbc2 GG	559
3f78decc GG	560	err_irq:
	561	regmap_del_irq_chip(palmas->irq, palmas->irq_data);
	562	err:
2945fbc2 GG	563	return ret;
	564	}
	565
	566	static int palmas_i2c_remove(struct i2c_client *i2c)
	567	{
	568	struct palmas *palmas = i2c_get_clientdata(i2c);
	569
	570	mfd_remove_devices(palmas->dev);
	571	regmap_del_irq_chip(palmas->irq, palmas->irq_data);
	572
	573	return 0;
	574	}
	575
	576	static const struct i2c_device_id palmas_i2c_id[] = {
	577	{ "palmas", },
	578	{ "twl6035", },
	579	{ "twl6037", },
	580	{ "tps65913", },
00ba81c1	581	{ /* end */ }
2945fbc2 GG	582	};
	583	MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);
	584
2945fbc2 GG	585	static struct i2c_driver palmas_i2c_driver = {
	586	.driver = {
	587	.name = "palmas",
	588	.of_match_table = of_palmas_match_tbl,
	589	.owner = THIS_MODULE,
	590	},
	591	.probe = palmas_i2c_probe,
	592	.remove = palmas_i2c_remove,
	593	.id_table = palmas_i2c_id,
	594	};
	595
	596	static int __init palmas_i2c_init(void)
	597	{
	598	return i2c_add_driver(&palmas_i2c_driver);
	599	}
	600	/* init early so consumer devices can complete system boot */
	601	subsys_initcall(palmas_i2c_init);
	602
	603	static void __exit palmas_i2c_exit(void)
	604	{
	605	i2c_del_driver(&palmas_i2c_driver);
	606	}
	607	module_exit(palmas_i2c_exit);
	608
	609	MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
	610	MODULE_DESCRIPTION("Palmas chip family multi-function driver");
	611	MODULE_LICENSE("GPL");