[deliverable/linux.git] / drivers / mfd / sta2x11-mfd.c

/*
 * Copyright (c) 2009-2011 Wind River Systems, Inc.
 * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See the GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/errno.h>
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/seq_file.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
#include <linux/mfd/sta2x11-mfd.h>
#include <linux/regmap.h>

#include <asm/sta2x11.h>

static inline int __reg_within_range(unsigned int r,
				     unsigned int start,
				     unsigned int end)
{
	return ((r >= start) && (r <= end));
}

/* This describes STA2X11 MFD chip for us, we may have several */
struct sta2x11_mfd {
	struct sta2x11_instance *instance;
	struct regmap *regmap[sta2x11_n_mfd_plat_devs];
	spinlock_t lock;
	struct list_head list;
	void __iomem *regs[sta2x11_n_mfd_plat_devs];
};

static LIST_HEAD(sta2x11_mfd_list);

/* Three functions to act on the list */
static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev)
{
	struct sta2x11_instance *instance;
	struct sta2x11_mfd *mfd;

	if (!pdev && !list_empty(&sta2x11_mfd_list)) {
		pr_warning("%s: Unspecified device, "
			    "using first instance\n", __func__);
		return list_entry(sta2x11_mfd_list.next,
				  struct sta2x11_mfd, list);
	}

	instance = sta2x11_get_instance(pdev);
	if (!instance)
		return NULL;
	list_for_each_entry(mfd, &sta2x11_mfd_list, list) {
		if (mfd->instance == instance)
			return mfd;
	}
	return NULL;
}

static int __devinit sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
{
	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
	struct sta2x11_instance *instance;

	if (mfd)
		return -EBUSY;
	instance = sta2x11_get_instance(pdev);
	if (!instance)
		return -EINVAL;
	mfd = kzalloc(sizeof(*mfd), flags);
	if (!mfd)
		return -ENOMEM;
	INIT_LIST_HEAD(&mfd->list);
	spin_lock_init(&mfd->lock);
	mfd->instance = instance;
	list_add(&mfd->list, &sta2x11_mfd_list);
	return 0;
}

static int __devexit mfd_remove(struct pci_dev *pdev)
{
	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);

	if (!mfd)
		return -ENODEV;
	list_del(&mfd->list);
	kfree(mfd);
	return 0;
}

/* This function is exported and is not expected to fail */
u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val,
		       enum sta2x11_mfd_plat_dev index)
{
	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
	u32 r;
	unsigned long flags;
	void __iomem *regs = mfd->regs[index];

	if (!mfd) {
		dev_warn(&pdev->dev, ": can't access sctl regs\n");
		return 0;
	}
	if (!regs) {
		dev_warn(&pdev->dev, ": system ctl not initialized\n");
		return 0;
	}
	spin_lock_irqsave(&mfd->lock, flags);
	r = readl(regs + reg);
	r &= ~mask;
	r |= val;
	if (mask)
		writel(r, regs + reg);
	spin_unlock_irqrestore(&mfd->lock, flags);
	return r;
}
EXPORT_SYMBOL(__sta2x11_mfd_mask);

int sta2x11_mfd_get_regs_data(struct platform_device *dev,
			      enum sta2x11_mfd_plat_dev index,
			      void __iomem **regs,
			      spinlock_t **lock)
{
	struct pci_dev *pdev = *(struct pci_dev **)(dev->dev.platform_data);
	struct sta2x11_mfd *mfd;

	if (!pdev)
		return -ENODEV;
	mfd = sta2x11_mfd_find(pdev);
	if (!mfd)
		return -ENODEV;
	if (index >= sta2x11_n_mfd_plat_devs)
		return -ENODEV;
	*regs = mfd->regs[index];
	*lock = &mfd->lock[index];
	pr_debug("%s %d *regs = %p\n", __func__, __LINE__, *regs);
	return *regs ? 0 : -ENODEV;
}
EXPORT_SYMBOL(sta2x11_mfd_get_regs_data);

/*
 * Special sta2x11-mfd regmap lock/unlock functions
 */

static void sta2x11_regmap_lock(void *__lock)
{
	spinlock_t *lock = __lock;
	spin_lock(lock);
}

static void sta2x11_regmap_unlock(void *__lock)
{
	spinlock_t *lock = __lock;
	spin_unlock(lock);
}

static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = {
	[sta2x11_sctl] = "sta2x11-sctl",
	[sta2x11_apbreg] = "sta2x11-apbreg",
	[sta2x11_apb_soc_regs] = "sta2x11-apb-soc-regs",
};

static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg)
{
	return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA);
}

static struct regmap_config sta2x11_sctl_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.lock = sta2x11_regmap_lock,
	.unlock = sta2x11_regmap_unlock,
	.max_register = SCTL_SCRSTSTA,
	.writeable_reg = sta2x11_sctl_writeable_reg,
};

static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg)
{
	/* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */
	if (reg >= APBREG_BSR_SARAC)
		reg -= APBREG_BSR_SARAC;
	switch (reg) {
	case APBREG_BSR:
	case APBREG_PAER:
	case APBREG_PWAC:
	case APBREG_PRAC:
	case APBREG_PCG:
	case APBREG_PUR:
	case APBREG_EMU_PCG:
		return true;
	default:
		return false;
	}
}

static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg)
{
	if (reg >= APBREG_BSR_SARAC)
		reg -= APBREG_BSR_SARAC;
	if (!sta2x11_apbreg_readable_reg(dev, reg))
		return false;
	return reg != APBREG_PAER;
}

static struct regmap_config sta2x11_apbreg_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.lock = sta2x11_regmap_lock,
	.unlock = sta2x11_regmap_unlock,
	.max_register = APBREG_EMU_PCG_SARAC,
	.readable_reg = sta2x11_apbreg_readable_reg,
	.writeable_reg = sta2x11_apbreg_writeable_reg,
};

static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev,
					      unsigned int reg)
{
	return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG ||
		__reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) ||
		__reg_within_range(reg, MASTER_LOCK_REG,
				   SYSTEM_CONFIG_STATUS_REG) ||
		reg == MSP_CLK_CTRL_REG ||
		__reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG);
}

static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev,
					       unsigned int reg)
{
	if (!sta2x11_apb_soc_regs_readable_reg(dev, reg))
		return false;
	switch (reg) {
	case PCIE_COMMON_CLOCK_CONFIG_0_4_0:
	case SYSTEM_CONFIG_STATUS_REG:
	case COMPENSATION_REG1:
	case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG:
	case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4:
		return false;
	default:
		return true;
	}
}

static struct regmap_config sta2x11_apb_soc_regs_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.lock = sta2x11_regmap_lock,
	.unlock = sta2x11_regmap_unlock,
	.max_register = TEST_CTL_REG,
	.readable_reg = sta2x11_apb_soc_regs_readable_reg,
	.writeable_reg = sta2x11_apb_soc_regs_writeable_reg,
};

static struct regmap_config *
sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = {
	[sta2x11_sctl] = &sta2x11_sctl_regmap_config,
	[sta2x11_apbreg] = &sta2x11_apbreg_regmap_config,
	[sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config,
};

/* Probe for the three platform devices */

static int sta2x11_mfd_platform_probe(struct platform_device *dev,
				      enum sta2x11_mfd_plat_dev index)
{
	struct pci_dev **pdev;
	struct sta2x11_mfd *mfd;
	struct resource *res;
	const char *name = sta2x11_mfd_names[index];
	struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index];

	pdev = dev->dev.platform_data;
	mfd = sta2x11_mfd_find(*pdev);
	if (!mfd)
		return -ENODEV;
	if (!regmap_config)
		return -ENODEV;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENOMEM;

	if (!request_mem_region(res->start, resource_size(res), name))
		return -EBUSY;

	mfd->regs[index] = ioremap(res->start, resource_size(res));
	if (!mfd->regs[index]) {
		release_mem_region(res->start, resource_size(res));
		return -ENOMEM;
	}
	regmap_config->lock_arg = &mfd->lock;
	/*
	   No caching, registers could be reached both via regmap and via
	   void __iomem *
	*/
	regmap_config->cache_type = REGCACHE_NONE;
	mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index],
						   regmap_config);
	WARN_ON(!mfd->regmap[index]);

	return 0;
}

static int sta2x11_sctl_probe(struct platform_device *dev)
{
	return sta2x11_mfd_platform_probe(dev, sta2x11_sctl);
}

static int sta2x11_apbreg_probe(struct platform_device *dev)
{
	return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg);
}

static int sta2x11_apb_soc_regs_probe(struct platform_device *dev)
{
	return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs);
}

/* The three platform drivers */
static struct platform_driver sta2x11_sctl_platform_driver = {
	.driver = {
		.name	= "sta2x11-sctl",
		.owner	= THIS_MODULE,
	},
	.probe		= sta2x11_sctl_probe,
};

static int __init sta2x11_sctl_init(void)
{
	pr_info("%s\n", __func__);
	return platform_driver_register(&sta2x11_sctl_platform_driver);
}

static struct platform_driver sta2x11_platform_driver = {
	.driver = {
		.name	= "sta2x11-apbreg",
		.owner	= THIS_MODULE,
	},
	.probe		= sta2x11_apbreg_probe,
};

static int __init sta2x11_apbreg_init(void)
{
	pr_info("%s\n", __func__);
	return platform_driver_register(&sta2x11_platform_driver);
}

static struct platform_driver sta2x11_apb_soc_regs_platform_driver = {
	.driver = {
		.name	= "sta2x11-apb-soc-regs",
		.owner	= THIS_MODULE,
	},
	.probe		= sta2x11_apb_soc_regs_probe,
};

static int __init sta2x11_apb_soc_regs_init(void)
{
	pr_info("%s\n", __func__);
	return platform_driver_register(&sta2x11_apb_soc_regs_platform_driver);
}

/*
 * What follows are the PCI devices that host the above pdevs.
 * Each logic block is 4kB and they are all consecutive: we use this info.
 */

/* Mfd 0 device */

/* Mfd 0, Bar 0 */
enum mfd0_bar0_cells {
	STA2X11_GPIO_0 = 0,
	STA2X11_GPIO_1,
	STA2X11_GPIO_2,
	STA2X11_GPIO_3,
	STA2X11_SCTL,
	STA2X11_SCR,
	STA2X11_TIME,
};
/* Mfd 0 , Bar 1 */
enum mfd0_bar1_cells {
	STA2X11_APBREG = 0,
};
#define CELL_4K(_name, _cell) { \
		.name = _name, \
		.start = _cell * 4096, .end = _cell * 4096 + 4095, \
		.flags = IORESOURCE_MEM, \
		}

static const __devinitconst struct resource gpio_resources[] = {
	{
		.name = "sta2x11_gpio", /* 4 consecutive cells, 1 driver */
		.start = 0,
		.end = (4 * 4096) - 1,
		.flags = IORESOURCE_MEM,
	}
};
static const __devinitconst struct resource sctl_resources[] = {
	CELL_4K("sta2x11-sctl", STA2X11_SCTL),
};
static const __devinitconst struct resource scr_resources[] = {
	CELL_4K("sta2x11-scr", STA2X11_SCR),
};
static const __devinitconst struct resource time_resources[] = {
	CELL_4K("sta2x11-time", STA2X11_TIME),
};

static const __devinitconst struct resource apbreg_resources[] = {
	CELL_4K("sta2x11-apbreg", STA2X11_APBREG),
};

#define DEV(_name, _r) \
	{ .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }

static __devinitdata struct mfd_cell sta2x11_mfd0_bar0[] = {
	DEV("sta2x11-gpio", gpio_resources), /* offset 0: we add pdata later */
	DEV("sta2x11-sctl", sctl_resources),
	DEV("sta2x11-scr", scr_resources),
	DEV("sta2x11-time", time_resources),
};

static __devinitdata struct mfd_cell sta2x11_mfd0_bar1[] = {
	DEV("sta2x11-apbreg", apbreg_resources),
};

/* Mfd 1 devices */

/* Mfd 1, Bar 0 */
enum mfd1_bar0_cells {
	STA2X11_VIC = 0,
};

/* Mfd 1, Bar 1 */
enum mfd1_bar1_cells {
	STA2X11_APB_SOC_REGS = 0,
};

static const __devinitconst struct resource vic_resources[] = {
	CELL_4K("sta2x11-vic", STA2X11_VIC),
};

static const __devinitconst struct resource apb_soc_regs_resources[] = {
	CELL_4K("sta2x11-apb-soc-regs", STA2X11_APB_SOC_REGS),
};

static __devinitdata struct mfd_cell sta2x11_mfd1_bar0[] = {
	DEV("sta2x11-vic", vic_resources),
};

static __devinitdata struct mfd_cell sta2x11_mfd1_bar1[] = {
	DEV("sta2x11-apb-soc-regs", apb_soc_regs_resources),
};


static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)
{
	pci_save_state(pdev);
	pci_disable_device(pdev);
	pci_set_power_state(pdev, pci_choose_state(pdev, state));

	return 0;
}

static int sta2x11_mfd_resume(struct pci_dev *pdev)
{
	int err;

	pci_set_power_state(pdev, 0);
	err = pci_enable_device(pdev);
	if (err)
		return err;
	pci_restore_state(pdev);

	return 0;
}

struct sta2x11_mfd_bar_setup_data {
	struct mfd_cell *cells;
	int ncells;
};

struct sta2x11_mfd_setup_data {
	struct sta2x11_mfd_bar_setup_data bars[2];
};

#define STA2X11_MFD0 0
#define STA2X11_MFD1 1

static struct sta2x11_mfd_setup_data mfd_setup_data[] = {
	/* Mfd 0: gpio, sctl, scr, timers / apbregs */
	[STA2X11_MFD0] = {
		.bars = {
			[0] = {
				.cells = sta2x11_mfd0_bar0,
				.ncells = ARRAY_SIZE(sta2x11_mfd0_bar0),
			},
			[1] = {
				.cells = sta2x11_mfd0_bar1,
				.ncells = ARRAY_SIZE(sta2x11_mfd0_bar1),
			},
		},
	},
	/* Mfd 1: vic / apb-soc-regs */
	[STA2X11_MFD1] = {
		.bars = {
			[0] = {
				.cells = sta2x11_mfd1_bar0,
				.ncells = ARRAY_SIZE(sta2x11_mfd1_bar0),
			},
			[1] = {
				.cells = sta2x11_mfd1_bar1,
				.ncells = ARRAY_SIZE(sta2x11_mfd1_bar1),
			},
		},
	},
};

static void __devinit sta2x11_mfd_setup(struct pci_dev *pdev,
					struct sta2x11_mfd_setup_data *sd)
{
	int i, j;
	for (i = 0; i < ARRAY_SIZE(sd->bars); i++)
		for (j = 0; j < sd->bars[i].ncells; j++) {
			sd->bars[i].cells[j].pdata_size = sizeof(pdev);
			sd->bars[i].cells[j].platform_data = &pdev;
		}
}

static int __devinit sta2x11_mfd_probe(struct pci_dev *pdev,
				       const struct pci_device_id *pci_id)
{
	int err, i;
	struct sta2x11_mfd_setup_data *setup_data;
	struct sta2x11_gpio_pdata *gpio_data;

	dev_info(&pdev->dev, "%s\n", __func__);

	err = pci_enable_device(pdev);
	if (err) {
		dev_err(&pdev->dev, "Can't enable device.\n");
		return err;
	}

	err = pci_enable_msi(pdev);
	if (err)
		dev_info(&pdev->dev, "Enable msi failed\n");

	setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ?
		&mfd_setup_data[STA2X11_MFD0] :
		&mfd_setup_data[STA2X11_MFD1];

	/* Read gpio config data as pci device's platform data */
	gpio_data = dev_get_platdata(&pdev->dev);
	if (!gpio_data)
		dev_warn(&pdev->dev, "no gpio configuration\n");

	dev_dbg(&pdev->dev, "%s, gpio_data = %p (%p)\n", __func__,
		gpio_data, &gpio_data);
	dev_dbg(&pdev->dev, "%s, pdev = %p (%p)\n", __func__,
		pdev, &pdev);

	/* platform data is the pci device for all of them */
	sta2x11_mfd_setup(pdev, setup_data);

	/* Record this pdev before mfd_add_devices: their probe looks for it */
	sta2x11_mfd_add(pdev, GFP_ATOMIC);

	/* Just 2 bars for all mfd's at present */
	for (i = 0; i < 2; i++) {
		err = mfd_add_devices(&pdev->dev, -1,
				      setup_data->bars[i].cells,
				      setup_data->bars[i].ncells,
				      &pdev->resource[i],
				      0, NULL);
		if (err) {
			dev_err(&pdev->dev,
				"mfd_add_devices[%d] failed: %d\n", i, err);
			goto err_disable;
		}
	}

	return 0;

err_disable:
	mfd_remove_devices(&pdev->dev);
	pci_disable_device(pdev);
	pci_disable_msi(pdev);
	return err;
}

static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = {
	{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},
	{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)},
	{0,},
};

static struct pci_driver sta2x11_mfd_driver = {
	.name =		"sta2x11-mfd",
	.id_table =	sta2x11_mfd_tbl,
	.probe =	sta2x11_mfd_probe,
	.suspend =	sta2x11_mfd_suspend,
	.resume =	sta2x11_mfd_resume,
};

static int __init sta2x11_mfd_init(void)
{
	pr_info("%s\n", __func__);
	return pci_register_driver(&sta2x11_mfd_driver);
}

/*
 * All of this must be ready before "normal" devices like MMCI appear.
 * But MFD (the pci device) can't be too early. The following choice
 * prepares platform drivers very early and probe the PCI device later,
 * but before other PCI devices.
 */
subsys_initcall(sta2x11_apbreg_init);
subsys_initcall(sta2x11_sctl_init);
subsys_initcall(sta2x11_apb_soc_regs_init);
rootfs_initcall(sta2x11_mfd_init);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Wind River");
MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG");
MODULE_DEVICE_TABLE(pci, sta2x11_mfd_tbl);
Commit	Line	Data
35bdd290 AR	1	/*
	2	* Copyright (c) 2009-2011 Wind River Systems, Inc.
	3	* Copyright (c) 2011 ST Microelectronics (Alessandro Rubini)
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
	12	* See the GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	17	*
	18	*/
	19
	20	#include <linux/kernel.h>
	21	#include <linux/module.h>
	22	#include <linux/spinlock.h>
	23	#include <linux/errno.h>
	24	#include <linux/device.h>
	25	#include <linux/slab.h>
	26	#include <linux/list.h>
	27	#include <linux/io.h>
	28	#include <linux/ioport.h>
	29	#include <linux/pci.h>
35bdd290 AR	30	#include <linux/seq_file.h>
	31	#include <linux/platform_device.h>
	32	#include <linux/mfd/core.h>
	33	#include <linux/mfd/sta2x11-mfd.h>
d94e2553	34	#include <linux/regmap.h>
35bdd290 AR	35
	36	#include <asm/sta2x11.h>
	37
d94e2553 DC	38	static inline int __reg_within_range(unsigned int r,
	39	unsigned int start,
	40	unsigned int end)
	41	{
	42	return ((r >= start) && (r <= end));
	43	}
	44
35bdd290 AR	45	/* This describes STA2X11 MFD chip for us, we may have several */
	46	struct sta2x11_mfd {
	47	struct sta2x11_instance *instance;
d94e2553	48	struct regmap *regmap[sta2x11_n_mfd_plat_devs];
35bdd290 AR	49	spinlock_t lock;
35bdd290 AR	50	struct list_head list;
1950c716	51	void __iomem *regs[sta2x11_n_mfd_plat_devs];
35bdd290 AR	52	};
	53
	54	static LIST_HEAD(sta2x11_mfd_list);
	55
	56	/* Three functions to act on the list */
	57	static struct sta2x11_mfd sta2x11_mfd_find(struct pci_dev pdev)
	58	{
	59	struct sta2x11_instance *instance;
	60	struct sta2x11_mfd *mfd;
	61
	62	if (!pdev && !list_empty(&sta2x11_mfd_list)) {
	63	pr_warning("%s: Unspecified device, "
	64	"using first instance\n", __func__);
	65	return list_entry(sta2x11_mfd_list.next,
	66	struct sta2x11_mfd, list);
	67	}
	68
	69	instance = sta2x11_get_instance(pdev);
	70	if (!instance)
	71	return NULL;
	72	list_for_each_entry(mfd, &sta2x11_mfd_list, list) {
	73	if (mfd->instance == instance)
	74	return mfd;
	75	}
	76	return NULL;
	77	}
	78
	79	static int __devinit sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
	80	{
	81	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
	82	struct sta2x11_instance *instance;
	83
	84	if (mfd)
	85	return -EBUSY;
	86	instance = sta2x11_get_instance(pdev);
	87	if (!instance)
	88	return -EINVAL;
	89	mfd = kzalloc(sizeof(*mfd), flags);
	90	if (!mfd)
	91	return -ENOMEM;
	92	INIT_LIST_HEAD(&mfd->list);
	93	spin_lock_init(&mfd->lock);
	94	mfd->instance = instance;
	95	list_add(&mfd->list, &sta2x11_mfd_list);
	96	return 0;
	97	}
	98
	99	static int __devexit mfd_remove(struct pci_dev *pdev)
	100	{
	101	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
	102
	103	if (!mfd)
	104	return -ENODEV;
	105	list_del(&mfd->list);
	106	kfree(mfd);
	107	return 0;
	108	}
	109
1950c716 DC	110	/* This function is exported and is not expected to fail */
	111	u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val,
	112	enum sta2x11_mfd_plat_dev index)
35bdd290 AR	113	{
	114	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
	115	u32 r;
	116	unsigned long flags;
1950c716	117	void __iomem *regs = mfd->regs[index];
35bdd290 AR	118
	119	if (!mfd) {
	120	dev_warn(&pdev->dev, ": can't access sctl regs\n");
	121	return 0;
	122	}
1950c716	123	if (!regs) {
35bdd290 AR	124	dev_warn(&pdev->dev, ": system ctl not initialized\n");
	125	return 0;
	126	}
	127	spin_lock_irqsave(&mfd->lock, flags);
1950c716	128	r = readl(regs + reg);
35bdd290 AR	129	r &= ~mask;
	130	r \|= val;
	131	if (mask)
1950c716	132	writel(r, regs + reg);
35bdd290 AR	133	spin_unlock_irqrestore(&mfd->lock, flags);
	134	return r;
	135	}
1950c716	136	EXPORT_SYMBOL(__sta2x11_mfd_mask);
35bdd290	137
29f5b5a3 DC	138	int sta2x11_mfd_get_regs_data(struct platform_device *dev,
	139	enum sta2x11_mfd_plat_dev index,
	140	void __iomem **regs,
	141	spinlock_t **lock)
	142	{
	143	struct pci_dev pdev = (struct pci_dev **)(dev->dev.platform_data);
	144	struct sta2x11_mfd *mfd;
	145
	146	if (!pdev)
	147	return -ENODEV;
	148	mfd = sta2x11_mfd_find(pdev);
	149	if (!mfd)
	150	return -ENODEV;
	151	if (index >= sta2x11_n_mfd_plat_devs)
	152	return -ENODEV;
	153	*regs = mfd->regs[index];
	154	*lock = &mfd->lock[index];
	155	pr_debug("%s %d regs = %p\n", __func__, __LINE__, regs);
	156	return *regs ? 0 : -ENODEV;
	157	}
	158	EXPORT_SYMBOL(sta2x11_mfd_get_regs_data);
	159
d94e2553 DC	160	/*
	161	* Special sta2x11-mfd regmap lock/unlock functions
	162	*/
35bdd290	163
d94e2553 DC	164	static void sta2x11_regmap_lock(void *__lock)
	165	{
	166	spinlock_t *lock = __lock;
	167	spin_lock(lock);
	168	}
35bdd290	169
d94e2553 DC	170	static void sta2x11_regmap_unlock(void *__lock)
	171	{
	172	spinlock_t *lock = __lock;
	173	spin_unlock(lock);
	174	}
35bdd290	175
d94e2553 DC	176	static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = {
	177	[sta2x11_sctl] = "sta2x11-sctl",
	178	[sta2x11_apbreg] = "sta2x11-apbreg",
	179	[sta2x11_apb_soc_regs] = "sta2x11-apb-soc-regs",
35bdd290 AR	180	};
35bdd290 AR	181
d94e2553 DC	182	static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg)
	183	{
	184	return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA);
	185	}
	186
	187	static struct regmap_config sta2x11_sctl_regmap_config = {
	188	.reg_bits = 32,
	189	.reg_stride = 4,
	190	.val_bits = 32,
	191	.lock = sta2x11_regmap_lock,
	192	.unlock = sta2x11_regmap_unlock,
	193	.max_register = SCTL_SCRSTSTA,
	194	.writeable_reg = sta2x11_sctl_writeable_reg,
1950c716	195	};
35bdd290	196
d94e2553 DC	197	static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg)
	198	{
	199	/* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */
	200	if (reg >= APBREG_BSR_SARAC)
	201	reg -= APBREG_BSR_SARAC;
	202	switch (reg) {
	203	case APBREG_BSR:
	204	case APBREG_PAER:
	205	case APBREG_PWAC:
	206	case APBREG_PRAC:
	207	case APBREG_PCG:
	208	case APBREG_PUR:
	209	case APBREG_EMU_PCG:
	210	return true;
	211	default:
	212	return false;
	213	}
	214	}
	215
	216	static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg)
	217	{
	218	if (reg >= APBREG_BSR_SARAC)
	219	reg -= APBREG_BSR_SARAC;
	220	if (!sta2x11_apbreg_readable_reg(dev, reg))
	221	return false;
	222	return reg != APBREG_PAER;
	223	}
	224
	225	static struct regmap_config sta2x11_apbreg_regmap_config = {
	226	.reg_bits = 32,
	227	.reg_stride = 4,
	228	.val_bits = 32,
	229	.lock = sta2x11_regmap_lock,
	230	.unlock = sta2x11_regmap_unlock,
	231	.max_register = APBREG_EMU_PCG_SARAC,
	232	.readable_reg = sta2x11_apbreg_readable_reg,
	233	.writeable_reg = sta2x11_apbreg_writeable_reg,
1950c716	234	};
35bdd290	235
d94e2553 DC	236	static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev,
	237	unsigned int reg)
	238	{
	239	return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG \|\|
	240	__reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) \|\|
	241	__reg_within_range(reg, MASTER_LOCK_REG,
	242	SYSTEM_CONFIG_STATUS_REG) \|\|
	243	reg == MSP_CLK_CTRL_REG \|\|
	244	__reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG);
	245	}
35bdd290	246
d94e2553 DC	247	static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev,
	248	unsigned int reg)
	249	{
	250	if (!sta2x11_apb_soc_regs_readable_reg(dev, reg))
	251	return false;
	252	switch (reg) {
	253	case PCIE_COMMON_CLOCK_CONFIG_0_4_0:
	254	case SYSTEM_CONFIG_STATUS_REG:
	255	case COMPENSATION_REG1:
	256	case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG:
	257	case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4:
	258	return false;
	259	default:
	260	return true;
	261	}
	262	}
35bdd290	263
d94e2553 DC	264	static struct regmap_config sta2x11_apb_soc_regs_regmap_config = {
	265	.reg_bits = 32,
	266	.reg_stride = 4,
	267	.val_bits = 32,
	268	.lock = sta2x11_regmap_lock,
	269	.unlock = sta2x11_regmap_unlock,
	270	.max_register = TEST_CTL_REG,
	271	.readable_reg = sta2x11_apb_soc_regs_readable_reg,
	272	.writeable_reg = sta2x11_apb_soc_regs_writeable_reg,
1950c716	273	};
35bdd290	274
d94e2553 DC	275	static struct regmap_config *
	276	sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = {
	277	[sta2x11_sctl] = &sta2x11_sctl_regmap_config,
	278	[sta2x11_apbreg] = &sta2x11_apbreg_regmap_config,
	279	[sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config,
1950c716	280	};
35bdd290	281
1950c716 DC	282	/* Probe for the three platform devices */
	283
	284	static int sta2x11_mfd_platform_probe(struct platform_device *dev,
	285	enum sta2x11_mfd_plat_dev index)
35bdd290 AR	286	{
	287	struct pci_dev **pdev;
	288	struct sta2x11_mfd *mfd;
	289	struct resource *res;
1950c716	290	const char *name = sta2x11_mfd_names[index];
d94e2553	291	struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index];
35bdd290 AR	292
35bdd290 AR	293	pdev = dev->dev.platform_data;
35bdd290 AR	294	mfd = sta2x11_mfd_find(*pdev);
	295	if (!mfd)
	296	return -ENODEV;
d94e2553 DC	297	if (!regmap_config)
d94e2553 DC	298	return -ENODEV;
35bdd290 AR	299
	300	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	301	if (!res)
	302	return -ENOMEM;
	303
1950c716	304	if (!request_mem_region(res->start, resource_size(res), name))
35bdd290 AR	305	return -EBUSY;
35bdd290 AR	306
1950c716 DC	307	mfd->regs[index] = ioremap(res->start, resource_size(res));
1950c716 DC	308	if (!mfd->regs[index]) {
35bdd290 AR	309	release_mem_region(res->start, resource_size(res));
	310	return -ENOMEM;
	311	}
d94e2553 DC	312	regmap_config->lock_arg = &mfd->lock;
	313	/*
	314	No caching, registers could be reached both via regmap and via
	315	void __iomem *
	316	*/
	317	regmap_config->cache_type = REGCACHE_NONE;
	318	mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index],
	319	regmap_config);
	320	WARN_ON(!mfd->regmap[index]);
	321
35bdd290 AR	322	return 0;
	323	}
	324
1950c716 DC	325	static int sta2x11_sctl_probe(struct platform_device *dev)
	326	{
	327	return sta2x11_mfd_platform_probe(dev, sta2x11_sctl);
	328	}
	329
	330	static int sta2x11_apbreg_probe(struct platform_device *dev)
	331	{
	332	return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg);
	333	}
	334
	335	static int sta2x11_apb_soc_regs_probe(struct platform_device *dev)
	336	{
	337	return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs);
	338	}
	339
	340	/* The three platform drivers */
35bdd290 AR	341	static struct platform_driver sta2x11_sctl_platform_driver = {
	342	.driver = {
	343	.name = "sta2x11-sctl",
	344	.owner = THIS_MODULE,
	345	},
	346	.probe = sta2x11_sctl_probe,
	347	};
	348
	349	static int __init sta2x11_sctl_init(void)
	350	{
	351	pr_info("%s\n", __func__);
	352	return platform_driver_register(&sta2x11_sctl_platform_driver);
	353	}
	354
	355	static struct platform_driver sta2x11_platform_driver = {
	356	.driver = {
	357	.name = "sta2x11-apbreg",
	358	.owner = THIS_MODULE,
	359	},
	360	.probe = sta2x11_apbreg_probe,
	361	};
	362
	363	static int __init sta2x11_apbreg_init(void)
	364	{
	365	pr_info("%s\n", __func__);
	366	return platform_driver_register(&sta2x11_platform_driver);
	367	}
	368
1950c716 DC	369	static struct platform_driver sta2x11_apb_soc_regs_platform_driver = {
	370	.driver = {
	371	.name = "sta2x11-apb-soc-regs",
	372	.owner = THIS_MODULE,
	373	},
	374	.probe = sta2x11_apb_soc_regs_probe,
	375	};
	376
	377	static int __init sta2x11_apb_soc_regs_init(void)
	378	{
	379	pr_info("%s\n", __func__);
	380	return platform_driver_register(&sta2x11_apb_soc_regs_platform_driver);
	381	}
	382
35bdd290	383	/*
1950c716	384	* What follows are the PCI devices that host the above pdevs.
35bdd290 AR	385	* Each logic block is 4kB and they are all consecutive: we use this info.
	386	*/
	387
1950c716 DC	388	/* Mfd 0 device */
	389
	390	/* Mfd 0, Bar 0 */
	391	enum mfd0_bar0_cells {
35bdd290 AR	392	STA2X11_GPIO_0 = 0,
	393	STA2X11_GPIO_1,
	394	STA2X11_GPIO_2,
	395	STA2X11_GPIO_3,
	396	STA2X11_SCTL,
	397	STA2X11_SCR,
	398	STA2X11_TIME,
	399	};
1950c716 DC	400	/* Mfd 0 , Bar 1 */
1950c716 DC	401	enum mfd0_bar1_cells {
35bdd290 AR	402	STA2X11_APBREG = 0,
	403	};
	404	#define CELL_4K(_name, _cell) { \
	405	.name = _name, \
	406	.start = _cell * 4096, .end = _cell * 4096 + 4095, \
	407	.flags = IORESOURCE_MEM, \
	408	}
	409
	410	static const __devinitconst struct resource gpio_resources[] = {
	411	{
	412	.name = "sta2x11_gpio", /* 4 consecutive cells, 1 driver */
	413	.start = 0,
	414	.end = (4 * 4096) - 1,
	415	.flags = IORESOURCE_MEM,
	416	}
	417	};
	418	static const __devinitconst struct resource sctl_resources[] = {
	419	CELL_4K("sta2x11-sctl", STA2X11_SCTL),
	420	};
	421	static const __devinitconst struct resource scr_resources[] = {
	422	CELL_4K("sta2x11-scr", STA2X11_SCR),
	423	};
	424	static const __devinitconst struct resource time_resources[] = {
	425	CELL_4K("sta2x11-time", STA2X11_TIME),
	426	};
	427
	428	static const __devinitconst struct resource apbreg_resources[] = {
	429	CELL_4K("sta2x11-apbreg", STA2X11_APBREG),
	430	};
	431
	432	#define DEV(_name, _r) \
	433	{ .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }
	434
1950c716	435	static __devinitdata struct mfd_cell sta2x11_mfd0_bar0[] = {
35bdd290 AR	436	DEV("sta2x11-gpio", gpio_resources), /* offset 0: we add pdata later */
	437	DEV("sta2x11-sctl", sctl_resources),
	438	DEV("sta2x11-scr", scr_resources),
	439	DEV("sta2x11-time", time_resources),
	440	};
	441
1950c716	442	static __devinitdata struct mfd_cell sta2x11_mfd0_bar1[] = {
35bdd290 AR	443	DEV("sta2x11-apbreg", apbreg_resources),
	444	};
	445
1950c716 DC	446	/* Mfd 1 devices */
	447
	448	/* Mfd 1, Bar 0 */
	449	enum mfd1_bar0_cells {
	450	STA2X11_VIC = 0,
	451	};
	452
	453	/* Mfd 1, Bar 1 */
	454	enum mfd1_bar1_cells {
	455	STA2X11_APB_SOC_REGS = 0,
	456	};
	457
	458	static const __devinitconst struct resource vic_resources[] = {
	459	CELL_4K("sta2x11-vic", STA2X11_VIC),
	460	};
	461
	462	static const __devinitconst struct resource apb_soc_regs_resources[] = {
	463	CELL_4K("sta2x11-apb-soc-regs", STA2X11_APB_SOC_REGS),
	464	};
	465
	466	static __devinitdata struct mfd_cell sta2x11_mfd1_bar0[] = {
	467	DEV("sta2x11-vic", vic_resources),
	468	};
	469
	470	static __devinitdata struct mfd_cell sta2x11_mfd1_bar1[] = {
	471	DEV("sta2x11-apb-soc-regs", apb_soc_regs_resources),
	472	};
	473
	474
35bdd290 AR	475	static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)
	476	{
	477	pci_save_state(pdev);
	478	pci_disable_device(pdev);
	479	pci_set_power_state(pdev, pci_choose_state(pdev, state));
	480
	481	return 0;
	482	}
	483
	484	static int sta2x11_mfd_resume(struct pci_dev *pdev)
	485	{
	486	int err;
	487
	488	pci_set_power_state(pdev, 0);
	489	err = pci_enable_device(pdev);
	490	if (err)
	491	return err;
	492	pci_restore_state(pdev);
	493
	494	return 0;
	495	}
	496
1950c716 DC	497	struct sta2x11_mfd_bar_setup_data {
	498	struct mfd_cell *cells;
	499	int ncells;
	500	};
	501
	502	struct sta2x11_mfd_setup_data {
	503	struct sta2x11_mfd_bar_setup_data bars[2];
	504	};
	505
	506	#define STA2X11_MFD0 0
	507	#define STA2X11_MFD1 1
	508
	509	static struct sta2x11_mfd_setup_data mfd_setup_data[] = {
	510	/* Mfd 0: gpio, sctl, scr, timers / apbregs */
	511	[STA2X11_MFD0] = {
	512	.bars = {
	513	[0] = {
	514	.cells = sta2x11_mfd0_bar0,
	515	.ncells = ARRAY_SIZE(sta2x11_mfd0_bar0),
	516	},
	517	[1] = {
	518	.cells = sta2x11_mfd0_bar1,
	519	.ncells = ARRAY_SIZE(sta2x11_mfd0_bar1),
	520	},
	521	},
	522	},
	523	/* Mfd 1: vic / apb-soc-regs */
	524	[STA2X11_MFD1] = {
	525	.bars = {
	526	[0] = {
	527	.cells = sta2x11_mfd1_bar0,
	528	.ncells = ARRAY_SIZE(sta2x11_mfd1_bar0),
	529	},
	530	[1] = {
	531	.cells = sta2x11_mfd1_bar1,
	532	.ncells = ARRAY_SIZE(sta2x11_mfd1_bar1),
	533	},
	534	},
	535	},
	536	};
	537
	538	static void __devinit sta2x11_mfd_setup(struct pci_dev *pdev,
	539	struct sta2x11_mfd_setup_data *sd)
	540	{
	541	int i, j;
	542	for (i = 0; i < ARRAY_SIZE(sd->bars); i++)
	543	for (j = 0; j < sd->bars[i].ncells; j++) {
	544	sd->bars[i].cells[j].pdata_size = sizeof(pdev);
	545	sd->bars[i].cells[j].platform_data = &pdev;
	546	}
	547	}
	548
35bdd290 AR	549	static int __devinit sta2x11_mfd_probe(struct pci_dev *pdev,
	550	const struct pci_device_id *pci_id)
	551	{
	552	int err, i;
1950c716	553	struct sta2x11_mfd_setup_data *setup_data;
35bdd290 AR	554	struct sta2x11_gpio_pdata *gpio_data;
	555
	556	dev_info(&pdev->dev, "%s\n", __func__);
	557
	558	err = pci_enable_device(pdev);
	559	if (err) {
	560	dev_err(&pdev->dev, "Can't enable device.\n");
	561	return err;
	562	}
	563
	564	err = pci_enable_msi(pdev);
	565	if (err)
	566	dev_info(&pdev->dev, "Enable msi failed\n");
	567
1950c716 DC	568	setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ?
	569	&mfd_setup_data[STA2X11_MFD0] :
	570	&mfd_setup_data[STA2X11_MFD1];
	571
35bdd290 AR	572	/* Read gpio config data as pci device's platform data */
	573	gpio_data = dev_get_platdata(&pdev->dev);
	574	if (!gpio_data)
	575	dev_warn(&pdev->dev, "no gpio configuration\n");
	576
	577	dev_dbg(&pdev->dev, "%s, gpio_data = %p (%p)\n", __func__,
	578	gpio_data, &gpio_data);
	579	dev_dbg(&pdev->dev, "%s, pdev = %p (%p)\n", __func__,
	580	pdev, &pdev);
	581
	582	/* platform data is the pci device for all of them */
1950c716	583	sta2x11_mfd_setup(pdev, setup_data);
35bdd290 AR	584
	585	/* Record this pdev before mfd_add_devices: their probe looks for it */
	586	sta2x11_mfd_add(pdev, GFP_ATOMIC);
	587
1950c716 DC	588	/* Just 2 bars for all mfd's at present */
	589	for (i = 0; i < 2; i++) {
	590	err = mfd_add_devices(&pdev->dev, -1,
	591	setup_data->bars[i].cells,
	592	setup_data->bars[i].ncells,
	593	&pdev->resource[i],
	594	0, NULL);
	595	if (err) {
	596	dev_err(&pdev->dev,
	597	"mfd_add_devices[%d] failed: %d\n", i, err);
	598	goto err_disable;
	599	}
35bdd290 AR	600	}
	601
	602	return 0;
	603
	604	err_disable:
	605	mfd_remove_devices(&pdev->dev);
	606	pci_disable_device(pdev);
	607	pci_disable_msi(pdev);
	608	return err;
	609	}
	610
	611	static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = {
	612	{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},
1950c716	613	{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)},
35bdd290 AR	614	{0,},
	615	};
	616
	617	static struct pci_driver sta2x11_mfd_driver = {
	618	.name = "sta2x11-mfd",
	619	.id_table = sta2x11_mfd_tbl,
	620	.probe = sta2x11_mfd_probe,
	621	.suspend = sta2x11_mfd_suspend,
	622	.resume = sta2x11_mfd_resume,
	623	};
	624
	625	static int __init sta2x11_mfd_init(void)
	626	{
	627	pr_info("%s\n", __func__);
	628	return pci_register_driver(&sta2x11_mfd_driver);
	629	}
	630
	631	/*
	632	* All of this must be ready before "normal" devices like MMCI appear.
	633	* But MFD (the pci device) can't be too early. The following choice
	634	* prepares platform drivers very early and probe the PCI device later,
	635	* but before other PCI devices.
	636	*/
	637	subsys_initcall(sta2x11_apbreg_init);
	638	subsys_initcall(sta2x11_sctl_init);
1950c716	639	subsys_initcall(sta2x11_apb_soc_regs_init);
35bdd290 AR	640	rootfs_initcall(sta2x11_mfd_init);
	641
	642	MODULE_LICENSE("GPL v2");
	643	MODULE_AUTHOR("Wind River");
	644	MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG");
	645	MODULE_DEVICE_TABLE(pci, sta2x11_mfd_tbl);