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35bdd290 AR |
1 | /* |
2 | * Copyright (c) 2009-2011 Wind River Systems, Inc. | |
3 | * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini) | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
12 | * See the GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | * | |
18 | */ | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/spinlock.h> | |
23 | #include <linux/errno.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/list.h> | |
27 | #include <linux/io.h> | |
28 | #include <linux/ioport.h> | |
29 | #include <linux/pci.h> | |
35bdd290 AR |
30 | #include <linux/seq_file.h> |
31 | #include <linux/platform_device.h> | |
32 | #include <linux/mfd/core.h> | |
33 | #include <linux/mfd/sta2x11-mfd.h> | |
d94e2553 | 34 | #include <linux/regmap.h> |
35bdd290 AR |
35 | |
36 | #include <asm/sta2x11.h> | |
37 | ||
d94e2553 DC |
38 | static inline int __reg_within_range(unsigned int r, |
39 | unsigned int start, | |
40 | unsigned int end) | |
41 | { | |
42 | return ((r >= start) && (r <= end)); | |
43 | } | |
44 | ||
35bdd290 AR |
45 | /* This describes STA2X11 MFD chip for us, we may have several */ |
46 | struct sta2x11_mfd { | |
47 | struct sta2x11_instance *instance; | |
d94e2553 | 48 | struct regmap *regmap[sta2x11_n_mfd_plat_devs]; |
35bdd290 AR |
49 | spinlock_t lock; |
50 | struct list_head list; | |
1950c716 | 51 | void __iomem *regs[sta2x11_n_mfd_plat_devs]; |
35bdd290 AR |
52 | }; |
53 | ||
54 | static LIST_HEAD(sta2x11_mfd_list); | |
55 | ||
56 | /* Three functions to act on the list */ | |
57 | static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev) | |
58 | { | |
59 | struct sta2x11_instance *instance; | |
60 | struct sta2x11_mfd *mfd; | |
61 | ||
62 | if (!pdev && !list_empty(&sta2x11_mfd_list)) { | |
63 | pr_warning("%s: Unspecified device, " | |
64 | "using first instance\n", __func__); | |
65 | return list_entry(sta2x11_mfd_list.next, | |
66 | struct sta2x11_mfd, list); | |
67 | } | |
68 | ||
69 | instance = sta2x11_get_instance(pdev); | |
70 | if (!instance) | |
71 | return NULL; | |
72 | list_for_each_entry(mfd, &sta2x11_mfd_list, list) { | |
73 | if (mfd->instance == instance) | |
74 | return mfd; | |
75 | } | |
76 | return NULL; | |
77 | } | |
78 | ||
79 | static int __devinit sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags) | |
80 | { | |
81 | struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); | |
82 | struct sta2x11_instance *instance; | |
83 | ||
84 | if (mfd) | |
85 | return -EBUSY; | |
86 | instance = sta2x11_get_instance(pdev); | |
87 | if (!instance) | |
88 | return -EINVAL; | |
89 | mfd = kzalloc(sizeof(*mfd), flags); | |
90 | if (!mfd) | |
91 | return -ENOMEM; | |
92 | INIT_LIST_HEAD(&mfd->list); | |
93 | spin_lock_init(&mfd->lock); | |
94 | mfd->instance = instance; | |
95 | list_add(&mfd->list, &sta2x11_mfd_list); | |
96 | return 0; | |
97 | } | |
98 | ||
99 | static int __devexit mfd_remove(struct pci_dev *pdev) | |
100 | { | |
101 | struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); | |
102 | ||
103 | if (!mfd) | |
104 | return -ENODEV; | |
105 | list_del(&mfd->list); | |
106 | kfree(mfd); | |
107 | return 0; | |
108 | } | |
109 | ||
1950c716 DC |
110 | /* This function is exported and is not expected to fail */ |
111 | u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val, | |
112 | enum sta2x11_mfd_plat_dev index) | |
35bdd290 AR |
113 | { |
114 | struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev); | |
115 | u32 r; | |
116 | unsigned long flags; | |
1950c716 | 117 | void __iomem *regs = mfd->regs[index]; |
35bdd290 AR |
118 | |
119 | if (!mfd) { | |
120 | dev_warn(&pdev->dev, ": can't access sctl regs\n"); | |
121 | return 0; | |
122 | } | |
1950c716 | 123 | if (!regs) { |
35bdd290 AR |
124 | dev_warn(&pdev->dev, ": system ctl not initialized\n"); |
125 | return 0; | |
126 | } | |
127 | spin_lock_irqsave(&mfd->lock, flags); | |
1950c716 | 128 | r = readl(regs + reg); |
35bdd290 AR |
129 | r &= ~mask; |
130 | r |= val; | |
131 | if (mask) | |
1950c716 | 132 | writel(r, regs + reg); |
35bdd290 AR |
133 | spin_unlock_irqrestore(&mfd->lock, flags); |
134 | return r; | |
135 | } | |
1950c716 | 136 | EXPORT_SYMBOL(__sta2x11_mfd_mask); |
35bdd290 | 137 | |
29f5b5a3 DC |
138 | int sta2x11_mfd_get_regs_data(struct platform_device *dev, |
139 | enum sta2x11_mfd_plat_dev index, | |
140 | void __iomem **regs, | |
141 | spinlock_t **lock) | |
142 | { | |
143 | struct pci_dev *pdev = *(struct pci_dev **)(dev->dev.platform_data); | |
144 | struct sta2x11_mfd *mfd; | |
145 | ||
146 | if (!pdev) | |
147 | return -ENODEV; | |
148 | mfd = sta2x11_mfd_find(pdev); | |
149 | if (!mfd) | |
150 | return -ENODEV; | |
151 | if (index >= sta2x11_n_mfd_plat_devs) | |
152 | return -ENODEV; | |
153 | *regs = mfd->regs[index]; | |
154 | *lock = &mfd->lock[index]; | |
155 | pr_debug("%s %d *regs = %p\n", __func__, __LINE__, *regs); | |
156 | return *regs ? 0 : -ENODEV; | |
157 | } | |
158 | EXPORT_SYMBOL(sta2x11_mfd_get_regs_data); | |
159 | ||
d94e2553 DC |
160 | /* |
161 | * Special sta2x11-mfd regmap lock/unlock functions | |
162 | */ | |
35bdd290 | 163 | |
d94e2553 DC |
164 | static void sta2x11_regmap_lock(void *__lock) |
165 | { | |
166 | spinlock_t *lock = __lock; | |
167 | spin_lock(lock); | |
168 | } | |
35bdd290 | 169 | |
d94e2553 DC |
170 | static void sta2x11_regmap_unlock(void *__lock) |
171 | { | |
172 | spinlock_t *lock = __lock; | |
173 | spin_unlock(lock); | |
174 | } | |
35bdd290 | 175 | |
d94e2553 | 176 | static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = { |
b18adafc DC |
177 | [sta2x11_sctl] = STA2X11_MFD_SCTL_NAME, |
178 | [sta2x11_apbreg] = STA2X11_MFD_APBREG_NAME, | |
179 | [sta2x11_apb_soc_regs] = STA2X11_MFD_APB_SOC_REGS_NAME, | |
35bdd290 AR |
180 | }; |
181 | ||
d94e2553 DC |
182 | static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg) |
183 | { | |
184 | return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA); | |
185 | } | |
186 | ||
187 | static struct regmap_config sta2x11_sctl_regmap_config = { | |
188 | .reg_bits = 32, | |
189 | .reg_stride = 4, | |
190 | .val_bits = 32, | |
191 | .lock = sta2x11_regmap_lock, | |
192 | .unlock = sta2x11_regmap_unlock, | |
193 | .max_register = SCTL_SCRSTSTA, | |
194 | .writeable_reg = sta2x11_sctl_writeable_reg, | |
1950c716 | 195 | }; |
35bdd290 | 196 | |
d94e2553 DC |
197 | static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg) |
198 | { | |
199 | /* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */ | |
200 | if (reg >= APBREG_BSR_SARAC) | |
201 | reg -= APBREG_BSR_SARAC; | |
202 | switch (reg) { | |
203 | case APBREG_BSR: | |
204 | case APBREG_PAER: | |
205 | case APBREG_PWAC: | |
206 | case APBREG_PRAC: | |
207 | case APBREG_PCG: | |
208 | case APBREG_PUR: | |
209 | case APBREG_EMU_PCG: | |
210 | return true; | |
211 | default: | |
212 | return false; | |
213 | } | |
214 | } | |
215 | ||
216 | static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg) | |
217 | { | |
218 | if (reg >= APBREG_BSR_SARAC) | |
219 | reg -= APBREG_BSR_SARAC; | |
220 | if (!sta2x11_apbreg_readable_reg(dev, reg)) | |
221 | return false; | |
222 | return reg != APBREG_PAER; | |
223 | } | |
224 | ||
225 | static struct regmap_config sta2x11_apbreg_regmap_config = { | |
226 | .reg_bits = 32, | |
227 | .reg_stride = 4, | |
228 | .val_bits = 32, | |
229 | .lock = sta2x11_regmap_lock, | |
230 | .unlock = sta2x11_regmap_unlock, | |
231 | .max_register = APBREG_EMU_PCG_SARAC, | |
232 | .readable_reg = sta2x11_apbreg_readable_reg, | |
233 | .writeable_reg = sta2x11_apbreg_writeable_reg, | |
1950c716 | 234 | }; |
35bdd290 | 235 | |
d94e2553 DC |
236 | static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev, |
237 | unsigned int reg) | |
238 | { | |
239 | return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG || | |
240 | __reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) || | |
241 | __reg_within_range(reg, MASTER_LOCK_REG, | |
242 | SYSTEM_CONFIG_STATUS_REG) || | |
243 | reg == MSP_CLK_CTRL_REG || | |
244 | __reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG); | |
245 | } | |
35bdd290 | 246 | |
d94e2553 DC |
247 | static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev, |
248 | unsigned int reg) | |
249 | { | |
250 | if (!sta2x11_apb_soc_regs_readable_reg(dev, reg)) | |
251 | return false; | |
252 | switch (reg) { | |
253 | case PCIE_COMMON_CLOCK_CONFIG_0_4_0: | |
254 | case SYSTEM_CONFIG_STATUS_REG: | |
255 | case COMPENSATION_REG1: | |
256 | case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG: | |
257 | case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4: | |
258 | return false; | |
259 | default: | |
260 | return true; | |
261 | } | |
262 | } | |
35bdd290 | 263 | |
d94e2553 DC |
264 | static struct regmap_config sta2x11_apb_soc_regs_regmap_config = { |
265 | .reg_bits = 32, | |
266 | .reg_stride = 4, | |
267 | .val_bits = 32, | |
268 | .lock = sta2x11_regmap_lock, | |
269 | .unlock = sta2x11_regmap_unlock, | |
270 | .max_register = TEST_CTL_REG, | |
271 | .readable_reg = sta2x11_apb_soc_regs_readable_reg, | |
272 | .writeable_reg = sta2x11_apb_soc_regs_writeable_reg, | |
1950c716 | 273 | }; |
35bdd290 | 274 | |
d94e2553 DC |
275 | static struct regmap_config * |
276 | sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = { | |
277 | [sta2x11_sctl] = &sta2x11_sctl_regmap_config, | |
278 | [sta2x11_apbreg] = &sta2x11_apbreg_regmap_config, | |
279 | [sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config, | |
1950c716 | 280 | }; |
35bdd290 | 281 | |
1950c716 DC |
282 | /* Probe for the three platform devices */ |
283 | ||
284 | static int sta2x11_mfd_platform_probe(struct platform_device *dev, | |
285 | enum sta2x11_mfd_plat_dev index) | |
35bdd290 AR |
286 | { |
287 | struct pci_dev **pdev; | |
288 | struct sta2x11_mfd *mfd; | |
289 | struct resource *res; | |
1950c716 | 290 | const char *name = sta2x11_mfd_names[index]; |
d94e2553 | 291 | struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index]; |
35bdd290 AR |
292 | |
293 | pdev = dev->dev.platform_data; | |
35bdd290 AR |
294 | mfd = sta2x11_mfd_find(*pdev); |
295 | if (!mfd) | |
296 | return -ENODEV; | |
d94e2553 DC |
297 | if (!regmap_config) |
298 | return -ENODEV; | |
35bdd290 AR |
299 | |
300 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
301 | if (!res) | |
302 | return -ENOMEM; | |
303 | ||
1950c716 | 304 | if (!request_mem_region(res->start, resource_size(res), name)) |
35bdd290 AR |
305 | return -EBUSY; |
306 | ||
1950c716 DC |
307 | mfd->regs[index] = ioremap(res->start, resource_size(res)); |
308 | if (!mfd->regs[index]) { | |
35bdd290 AR |
309 | release_mem_region(res->start, resource_size(res)); |
310 | return -ENOMEM; | |
311 | } | |
d94e2553 DC |
312 | regmap_config->lock_arg = &mfd->lock; |
313 | /* | |
314 | No caching, registers could be reached both via regmap and via | |
315 | void __iomem * | |
316 | */ | |
317 | regmap_config->cache_type = REGCACHE_NONE; | |
318 | mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index], | |
319 | regmap_config); | |
320 | WARN_ON(!mfd->regmap[index]); | |
321 | ||
35bdd290 AR |
322 | return 0; |
323 | } | |
324 | ||
1950c716 DC |
325 | static int sta2x11_sctl_probe(struct platform_device *dev) |
326 | { | |
327 | return sta2x11_mfd_platform_probe(dev, sta2x11_sctl); | |
328 | } | |
329 | ||
330 | static int sta2x11_apbreg_probe(struct platform_device *dev) | |
331 | { | |
332 | return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg); | |
333 | } | |
334 | ||
335 | static int sta2x11_apb_soc_regs_probe(struct platform_device *dev) | |
336 | { | |
337 | return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs); | |
338 | } | |
339 | ||
340 | /* The three platform drivers */ | |
35bdd290 AR |
341 | static struct platform_driver sta2x11_sctl_platform_driver = { |
342 | .driver = { | |
b18adafc | 343 | .name = STA2X11_MFD_SCTL_NAME, |
35bdd290 AR |
344 | .owner = THIS_MODULE, |
345 | }, | |
346 | .probe = sta2x11_sctl_probe, | |
347 | }; | |
348 | ||
349 | static int __init sta2x11_sctl_init(void) | |
350 | { | |
351 | pr_info("%s\n", __func__); | |
352 | return platform_driver_register(&sta2x11_sctl_platform_driver); | |
353 | } | |
354 | ||
355 | static struct platform_driver sta2x11_platform_driver = { | |
356 | .driver = { | |
b18adafc | 357 | .name = STA2X11_MFD_APBREG_NAME, |
35bdd290 AR |
358 | .owner = THIS_MODULE, |
359 | }, | |
360 | .probe = sta2x11_apbreg_probe, | |
361 | }; | |
362 | ||
363 | static int __init sta2x11_apbreg_init(void) | |
364 | { | |
365 | pr_info("%s\n", __func__); | |
366 | return platform_driver_register(&sta2x11_platform_driver); | |
367 | } | |
368 | ||
1950c716 DC |
369 | static struct platform_driver sta2x11_apb_soc_regs_platform_driver = { |
370 | .driver = { | |
b18adafc | 371 | .name = STA2X11_MFD_APB_SOC_REGS_NAME, |
1950c716 DC |
372 | .owner = THIS_MODULE, |
373 | }, | |
374 | .probe = sta2x11_apb_soc_regs_probe, | |
375 | }; | |
376 | ||
377 | static int __init sta2x11_apb_soc_regs_init(void) | |
378 | { | |
379 | pr_info("%s\n", __func__); | |
380 | return platform_driver_register(&sta2x11_apb_soc_regs_platform_driver); | |
381 | } | |
382 | ||
35bdd290 | 383 | /* |
1950c716 | 384 | * What follows are the PCI devices that host the above pdevs. |
35bdd290 AR |
385 | * Each logic block is 4kB and they are all consecutive: we use this info. |
386 | */ | |
387 | ||
1950c716 DC |
388 | /* Mfd 0 device */ |
389 | ||
390 | /* Mfd 0, Bar 0 */ | |
391 | enum mfd0_bar0_cells { | |
35bdd290 AR |
392 | STA2X11_GPIO_0 = 0, |
393 | STA2X11_GPIO_1, | |
394 | STA2X11_GPIO_2, | |
395 | STA2X11_GPIO_3, | |
396 | STA2X11_SCTL, | |
397 | STA2X11_SCR, | |
398 | STA2X11_TIME, | |
399 | }; | |
1950c716 DC |
400 | /* Mfd 0 , Bar 1 */ |
401 | enum mfd0_bar1_cells { | |
35bdd290 AR |
402 | STA2X11_APBREG = 0, |
403 | }; | |
404 | #define CELL_4K(_name, _cell) { \ | |
405 | .name = _name, \ | |
406 | .start = _cell * 4096, .end = _cell * 4096 + 4095, \ | |
407 | .flags = IORESOURCE_MEM, \ | |
408 | } | |
409 | ||
410 | static const __devinitconst struct resource gpio_resources[] = { | |
411 | { | |
b18adafc DC |
412 | /* 4 consecutive cells, 1 driver */ |
413 | .name = STA2X11_MFD_GPIO_NAME, | |
35bdd290 AR |
414 | .start = 0, |
415 | .end = (4 * 4096) - 1, | |
416 | .flags = IORESOURCE_MEM, | |
417 | } | |
418 | }; | |
419 | static const __devinitconst struct resource sctl_resources[] = { | |
b18adafc | 420 | CELL_4K(STA2X11_MFD_SCTL_NAME, STA2X11_SCTL), |
35bdd290 AR |
421 | }; |
422 | static const __devinitconst struct resource scr_resources[] = { | |
b18adafc | 423 | CELL_4K(STA2X11_MFD_SCR_NAME, STA2X11_SCR), |
35bdd290 AR |
424 | }; |
425 | static const __devinitconst struct resource time_resources[] = { | |
b18adafc | 426 | CELL_4K(STA2X11_MFD_TIME_NAME, STA2X11_TIME), |
35bdd290 AR |
427 | }; |
428 | ||
429 | static const __devinitconst struct resource apbreg_resources[] = { | |
b18adafc | 430 | CELL_4K(STA2X11_MFD_APBREG_NAME, STA2X11_APBREG), |
35bdd290 AR |
431 | }; |
432 | ||
433 | #define DEV(_name, _r) \ | |
434 | { .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, } | |
435 | ||
1950c716 | 436 | static __devinitdata struct mfd_cell sta2x11_mfd0_bar0[] = { |
b18adafc DC |
437 | /* offset 0: we add pdata later */ |
438 | DEV(STA2X11_MFD_GPIO_NAME, gpio_resources), | |
439 | DEV(STA2X11_MFD_SCTL_NAME, sctl_resources), | |
440 | DEV(STA2X11_MFD_SCR_NAME, scr_resources), | |
441 | DEV(STA2X11_MFD_TIME_NAME, time_resources), | |
35bdd290 AR |
442 | }; |
443 | ||
1950c716 | 444 | static __devinitdata struct mfd_cell sta2x11_mfd0_bar1[] = { |
b18adafc | 445 | DEV(STA2X11_MFD_APBREG_NAME, apbreg_resources), |
35bdd290 AR |
446 | }; |
447 | ||
1950c716 DC |
448 | /* Mfd 1 devices */ |
449 | ||
450 | /* Mfd 1, Bar 0 */ | |
451 | enum mfd1_bar0_cells { | |
452 | STA2X11_VIC = 0, | |
453 | }; | |
454 | ||
455 | /* Mfd 1, Bar 1 */ | |
456 | enum mfd1_bar1_cells { | |
457 | STA2X11_APB_SOC_REGS = 0, | |
458 | }; | |
459 | ||
460 | static const __devinitconst struct resource vic_resources[] = { | |
b18adafc | 461 | CELL_4K(STA2X11_MFD_VIC_NAME, STA2X11_VIC), |
1950c716 DC |
462 | }; |
463 | ||
464 | static const __devinitconst struct resource apb_soc_regs_resources[] = { | |
b18adafc | 465 | CELL_4K(STA2X11_MFD_APB_SOC_REGS_NAME, STA2X11_APB_SOC_REGS), |
1950c716 DC |
466 | }; |
467 | ||
468 | static __devinitdata struct mfd_cell sta2x11_mfd1_bar0[] = { | |
b18adafc | 469 | DEV(STA2X11_MFD_VIC_NAME, vic_resources), |
1950c716 DC |
470 | }; |
471 | ||
472 | static __devinitdata struct mfd_cell sta2x11_mfd1_bar1[] = { | |
b18adafc | 473 | DEV(STA2X11_MFD_APB_SOC_REGS_NAME, apb_soc_regs_resources), |
1950c716 DC |
474 | }; |
475 | ||
476 | ||
35bdd290 AR |
477 | static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state) |
478 | { | |
479 | pci_save_state(pdev); | |
480 | pci_disable_device(pdev); | |
481 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
482 | ||
483 | return 0; | |
484 | } | |
485 | ||
486 | static int sta2x11_mfd_resume(struct pci_dev *pdev) | |
487 | { | |
488 | int err; | |
489 | ||
490 | pci_set_power_state(pdev, 0); | |
491 | err = pci_enable_device(pdev); | |
492 | if (err) | |
493 | return err; | |
494 | pci_restore_state(pdev); | |
495 | ||
496 | return 0; | |
497 | } | |
498 | ||
1950c716 DC |
499 | struct sta2x11_mfd_bar_setup_data { |
500 | struct mfd_cell *cells; | |
501 | int ncells; | |
502 | }; | |
503 | ||
504 | struct sta2x11_mfd_setup_data { | |
505 | struct sta2x11_mfd_bar_setup_data bars[2]; | |
506 | }; | |
507 | ||
508 | #define STA2X11_MFD0 0 | |
509 | #define STA2X11_MFD1 1 | |
510 | ||
511 | static struct sta2x11_mfd_setup_data mfd_setup_data[] = { | |
512 | /* Mfd 0: gpio, sctl, scr, timers / apbregs */ | |
513 | [STA2X11_MFD0] = { | |
514 | .bars = { | |
515 | [0] = { | |
516 | .cells = sta2x11_mfd0_bar0, | |
517 | .ncells = ARRAY_SIZE(sta2x11_mfd0_bar0), | |
518 | }, | |
519 | [1] = { | |
520 | .cells = sta2x11_mfd0_bar1, | |
521 | .ncells = ARRAY_SIZE(sta2x11_mfd0_bar1), | |
522 | }, | |
523 | }, | |
524 | }, | |
525 | /* Mfd 1: vic / apb-soc-regs */ | |
526 | [STA2X11_MFD1] = { | |
527 | .bars = { | |
528 | [0] = { | |
529 | .cells = sta2x11_mfd1_bar0, | |
530 | .ncells = ARRAY_SIZE(sta2x11_mfd1_bar0), | |
531 | }, | |
532 | [1] = { | |
533 | .cells = sta2x11_mfd1_bar1, | |
534 | .ncells = ARRAY_SIZE(sta2x11_mfd1_bar1), | |
535 | }, | |
536 | }, | |
537 | }, | |
538 | }; | |
539 | ||
540 | static void __devinit sta2x11_mfd_setup(struct pci_dev *pdev, | |
541 | struct sta2x11_mfd_setup_data *sd) | |
542 | { | |
543 | int i, j; | |
544 | for (i = 0; i < ARRAY_SIZE(sd->bars); i++) | |
545 | for (j = 0; j < sd->bars[i].ncells; j++) { | |
546 | sd->bars[i].cells[j].pdata_size = sizeof(pdev); | |
547 | sd->bars[i].cells[j].platform_data = &pdev; | |
548 | } | |
549 | } | |
550 | ||
35bdd290 AR |
551 | static int __devinit sta2x11_mfd_probe(struct pci_dev *pdev, |
552 | const struct pci_device_id *pci_id) | |
553 | { | |
554 | int err, i; | |
1950c716 | 555 | struct sta2x11_mfd_setup_data *setup_data; |
35bdd290 AR |
556 | struct sta2x11_gpio_pdata *gpio_data; |
557 | ||
558 | dev_info(&pdev->dev, "%s\n", __func__); | |
559 | ||
560 | err = pci_enable_device(pdev); | |
561 | if (err) { | |
562 | dev_err(&pdev->dev, "Can't enable device.\n"); | |
563 | return err; | |
564 | } | |
565 | ||
566 | err = pci_enable_msi(pdev); | |
567 | if (err) | |
568 | dev_info(&pdev->dev, "Enable msi failed\n"); | |
569 | ||
1950c716 DC |
570 | setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ? |
571 | &mfd_setup_data[STA2X11_MFD0] : | |
572 | &mfd_setup_data[STA2X11_MFD1]; | |
573 | ||
35bdd290 AR |
574 | /* Read gpio config data as pci device's platform data */ |
575 | gpio_data = dev_get_platdata(&pdev->dev); | |
576 | if (!gpio_data) | |
577 | dev_warn(&pdev->dev, "no gpio configuration\n"); | |
578 | ||
579 | dev_dbg(&pdev->dev, "%s, gpio_data = %p (%p)\n", __func__, | |
580 | gpio_data, &gpio_data); | |
581 | dev_dbg(&pdev->dev, "%s, pdev = %p (%p)\n", __func__, | |
582 | pdev, &pdev); | |
583 | ||
584 | /* platform data is the pci device for all of them */ | |
1950c716 | 585 | sta2x11_mfd_setup(pdev, setup_data); |
35bdd290 AR |
586 | |
587 | /* Record this pdev before mfd_add_devices: their probe looks for it */ | |
588 | sta2x11_mfd_add(pdev, GFP_ATOMIC); | |
589 | ||
1950c716 DC |
590 | /* Just 2 bars for all mfd's at present */ |
591 | for (i = 0; i < 2; i++) { | |
592 | err = mfd_add_devices(&pdev->dev, -1, | |
593 | setup_data->bars[i].cells, | |
594 | setup_data->bars[i].ncells, | |
595 | &pdev->resource[i], | |
596 | 0, NULL); | |
597 | if (err) { | |
598 | dev_err(&pdev->dev, | |
599 | "mfd_add_devices[%d] failed: %d\n", i, err); | |
600 | goto err_disable; | |
601 | } | |
35bdd290 AR |
602 | } |
603 | ||
604 | return 0; | |
605 | ||
606 | err_disable: | |
607 | mfd_remove_devices(&pdev->dev); | |
608 | pci_disable_device(pdev); | |
609 | pci_disable_msi(pdev); | |
610 | return err; | |
611 | } | |
612 | ||
613 | static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = { | |
614 | {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)}, | |
1950c716 | 615 | {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)}, |
35bdd290 AR |
616 | {0,}, |
617 | }; | |
618 | ||
619 | static struct pci_driver sta2x11_mfd_driver = { | |
620 | .name = "sta2x11-mfd", | |
621 | .id_table = sta2x11_mfd_tbl, | |
622 | .probe = sta2x11_mfd_probe, | |
623 | .suspend = sta2x11_mfd_suspend, | |
624 | .resume = sta2x11_mfd_resume, | |
625 | }; | |
626 | ||
627 | static int __init sta2x11_mfd_init(void) | |
628 | { | |
629 | pr_info("%s\n", __func__); | |
630 | return pci_register_driver(&sta2x11_mfd_driver); | |
631 | } | |
632 | ||
633 | /* | |
634 | * All of this must be ready before "normal" devices like MMCI appear. | |
635 | * But MFD (the pci device) can't be too early. The following choice | |
636 | * prepares platform drivers very early and probe the PCI device later, | |
637 | * but before other PCI devices. | |
638 | */ | |
639 | subsys_initcall(sta2x11_apbreg_init); | |
640 | subsys_initcall(sta2x11_sctl_init); | |
1950c716 | 641 | subsys_initcall(sta2x11_apb_soc_regs_init); |
35bdd290 AR |
642 | rootfs_initcall(sta2x11_mfd_init); |
643 | ||
644 | MODULE_LICENSE("GPL v2"); | |
645 | MODULE_AUTHOR("Wind River"); | |
646 | MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG"); | |
647 | MODULE_DEVICE_TABLE(pci, sta2x11_mfd_tbl); |