drm/i915: Flush the context object from the CPU caches upon switching
[deliverable/linux.git] / drivers / mfd / twl-core.c
CommitLineData
a603a7fa 1/*
fc7b92fc
B
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
a603a7fa
DB
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
a603a7fa
DB
31#include <linux/init.h>
32#include <linux/mutex.h>
4e36dd33 33#include <linux/module.h>
a603a7fa
DB
34#include <linux/platform_device.h>
35#include <linux/clk.h>
a30d46c0 36#include <linux/err.h>
aeb5032b
BC
37#include <linux/device.h>
38#include <linux/of.h>
39#include <linux/of_irq.h>
40#include <linux/of_platform.h>
e7cc3aca 41#include <linux/irq.h>
aeb5032b 42#include <linux/irqdomain.h>
a603a7fa 43
dad759ff
DB
44#include <linux/regulator/machine.h>
45
a603a7fa 46#include <linux/i2c.h>
b07682b6 47#include <linux/i2c/twl.h>
a603a7fa 48
1b8f333f 49#include "twl-core.h"
a603a7fa
DB
50
51/*
52 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
53 * Management and System Companion Device" chips originally designed for
54 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
55 * often at around 3 Mbit/sec, including for interrupt handling.
56 *
57 * This driver core provides genirq support for the interrupts emitted,
58 * by the various modules, and exports register access primitives.
59 *
60 * FIXME this driver currently requires use of the first interrupt line
61 * (and associated registers).
62 */
63
fc7b92fc 64#define DRIVER_NAME "twl"
a603a7fa 65
a603a7fa
DB
66#if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE)
67#define twl_has_keypad() true
68#else
69#define twl_has_keypad() false
70#endif
71
72#if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE)
73#define twl_has_gpio() true
74#else
75#define twl_has_gpio() false
76#endif
77
dad759ff
DB
78#if defined(CONFIG_REGULATOR_TWL4030) \
79 || defined(CONFIG_REGULATOR_TWL4030_MODULE)
80#define twl_has_regulator() true
81#else
82#define twl_has_regulator() false
83#endif
84
a603a7fa
DB
85#if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE)
86#define twl_has_madc() true
87#else
88#define twl_has_madc() false
89#endif
90
ebf0bd36
AK
91#ifdef CONFIG_TWL4030_POWER
92#define twl_has_power() true
93#else
94#define twl_has_power() false
95#endif
96
a603a7fa
DB
97#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
98#define twl_has_rtc() true
99#else
100#define twl_has_rtc() false
101#endif
102
e70357e3
HH
103#if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) ||\
104 defined(CONFIG_TWL6030_USB) || defined(CONFIG_TWL6030_USB_MODULE)
a603a7fa
DB
105#define twl_has_usb() true
106#else
107#define twl_has_usb() false
108#endif
109
80e45b1e
TK
110#if defined(CONFIG_TWL4030_WATCHDOG) || \
111 defined(CONFIG_TWL4030_WATCHDOG_MODULE)
112#define twl_has_watchdog() true
113#else
114#define twl_has_watchdog() false
115#endif
a603a7fa 116
364cedb2
PU
117#if defined(CONFIG_MFD_TWL4030_AUDIO) || \
118 defined(CONFIG_MFD_TWL4030_AUDIO_MODULE)
0b83ddeb
PU
119#define twl_has_codec() true
120#else
121#define twl_has_codec() false
122#endif
123
11c39c4b
GI
124#if defined(CONFIG_CHARGER_TWL4030) || defined(CONFIG_CHARGER_TWL4030_MODULE)
125#define twl_has_bci() true
126#else
127#define twl_has_bci() false
128#endif
129
a603a7fa
DB
130/* Triton Core internal information (BEGIN) */
131
132/* Last - for index max*/
133#define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG
134
fc7b92fc 135#define TWL_NUM_SLAVES 4
a603a7fa 136
9c3664dd 137#if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \
14e5c82c 138 || defined(CONFIG_INPUT_TWL4030_PWRBUTTON_MODULE)
9c3664dd
FB
139#define twl_has_pwrbutton() true
140#else
141#define twl_has_pwrbutton() false
142#endif
a603a7fa 143
fc7b92fc
B
144#define SUB_CHIP_ID0 0
145#define SUB_CHIP_ID1 1
146#define SUB_CHIP_ID2 2
147#define SUB_CHIP_ID3 3
364cedb2 148#define SUB_CHIP_ID_INVAL 0xff
fc7b92fc
B
149
150#define TWL_MODULE_LAST TWL4030_MODULE_LAST
151
a603a7fa
DB
152/* Base Address defns for twl4030_map[] */
153
154/* subchip/slave 0 - USB ID */
155#define TWL4030_BASEADD_USB 0x0000
156
157/* subchip/slave 1 - AUD ID */
158#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
159#define TWL4030_BASEADD_GPIO 0x0098
160#define TWL4030_BASEADD_INTBR 0x0085
161#define TWL4030_BASEADD_PIH 0x0080
162#define TWL4030_BASEADD_TEST 0x004C
163
164/* subchip/slave 2 - AUX ID */
165#define TWL4030_BASEADD_INTERRUPTS 0x00B9
166#define TWL4030_BASEADD_LED 0x00EE
167#define TWL4030_BASEADD_MADC 0x0000
168#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
169#define TWL4030_BASEADD_PRECHARGE 0x00AA
170#define TWL4030_BASEADD_PWM0 0x00F8
171#define TWL4030_BASEADD_PWM1 0x00FB
172#define TWL4030_BASEADD_PWMA 0x00EF
173#define TWL4030_BASEADD_PWMB 0x00F1
174#define TWL4030_BASEADD_KEYPAD 0x00D2
175
1920a61e
IK
176#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
177#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
178 one */
179
a603a7fa
DB
180/* subchip/slave 3 - POWER ID */
181#define TWL4030_BASEADD_BACKUP 0x0014
182#define TWL4030_BASEADD_INT 0x002E
183#define TWL4030_BASEADD_PM_MASTER 0x0036
184#define TWL4030_BASEADD_PM_RECEIVER 0x005B
185#define TWL4030_BASEADD_RTC 0x001C
186#define TWL4030_BASEADD_SECURED_REG 0x0000
187
188/* Triton Core internal information (END) */
189
190
e8deb28c
B
191/* subchip/slave 0 0x48 - POWER */
192#define TWL6030_BASEADD_RTC 0x0000
193#define TWL6030_BASEADD_MEM 0x0017
194#define TWL6030_BASEADD_PM_MASTER 0x001F
195#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
196#define TWL6030_BASEADD_PM_MISC 0x00E2
197#define TWL6030_BASEADD_PM_PUPD 0x00F0
198
199/* subchip/slave 1 0x49 - FEATURE */
200#define TWL6030_BASEADD_USB 0x0000
201#define TWL6030_BASEADD_GPADC_CTRL 0x002E
202#define TWL6030_BASEADD_AUX 0x0090
203#define TWL6030_BASEADD_PWM 0x00BA
204#define TWL6030_BASEADD_GASGAUGE 0x00C0
205#define TWL6030_BASEADD_PIH 0x00D0
206#define TWL6030_BASEADD_CHARGER 0x00E0
521d8ec3 207#define TWL6025_BASEADD_CHARGER 0x00DA
e8deb28c
B
208
209/* subchip/slave 2 0x4A - DFT */
210#define TWL6030_BASEADD_DIEID 0x00C0
211
212/* subchip/slave 3 0x4B - AUDIO */
213#define TWL6030_BASEADD_AUDIO 0x0000
214#define TWL6030_BASEADD_RSV 0x0000
fa0d9762 215#define TWL6030_BASEADD_ZERO 0x0000
e8deb28c 216
a603a7fa
DB
217/* Few power values */
218#define R_CFG_BOOT 0x05
a603a7fa
DB
219
220/* some fields in R_CFG_BOOT */
221#define HFCLK_FREQ_19p2_MHZ (1 << 0)
222#define HFCLK_FREQ_26_MHZ (2 << 0)
223#define HFCLK_FREQ_38p4_MHZ (3 << 0)
224#define HIGH_PERF_SQ (1 << 3)
38a68496 225#define CK32K_LOWPWR_EN (1 << 7)
a603a7fa 226
a603a7fa
DB
227/*----------------------------------------------------------------------*/
228
a603a7fa
DB
229/* is driver active, bound to a chip? */
230static bool inuse;
231
ca972d13
L
232/* TWL IDCODE Register value */
233static u32 twl_idcode;
234
e8deb28c
B
235static unsigned int twl_id;
236unsigned int twl_rev(void)
237{
238 return twl_id;
239}
240EXPORT_SYMBOL(twl_rev);
241
242/* Structure for each TWL4030/TWL6030 Slave */
fc7b92fc 243struct twl_client {
a603a7fa
DB
244 struct i2c_client *client;
245 u8 address;
246
247 /* max numb of i2c_msg required is for read =2 */
248 struct i2c_msg xfer_msg[2];
249
250 /* To lock access to xfer_msg */
251 struct mutex xfer_lock;
252};
253
fc7b92fc 254static struct twl_client twl_modules[TWL_NUM_SLAVES];
a603a7fa 255
a603a7fa 256/* mapping the module id to slave id and base address */
fc7b92fc 257struct twl_mapping {
a603a7fa
DB
258 unsigned char sid; /* Slave ID */
259 unsigned char base; /* base address */
260};
2cfcce18 261static struct twl_mapping *twl_map;
a603a7fa 262
fc7b92fc 263static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
a603a7fa
DB
264 /*
265 * NOTE: don't change this table without updating the
e8deb28c 266 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
a603a7fa
DB
267 * so they continue to match the order in this table.
268 */
269
270 { 0, TWL4030_BASEADD_USB },
271
272 { 1, TWL4030_BASEADD_AUDIO_VOICE },
273 { 1, TWL4030_BASEADD_GPIO },
274 { 1, TWL4030_BASEADD_INTBR },
275 { 1, TWL4030_BASEADD_PIH },
276 { 1, TWL4030_BASEADD_TEST },
277
278 { 2, TWL4030_BASEADD_KEYPAD },
279 { 2, TWL4030_BASEADD_MADC },
280 { 2, TWL4030_BASEADD_INTERRUPTS },
281 { 2, TWL4030_BASEADD_LED },
282 { 2, TWL4030_BASEADD_MAIN_CHARGE },
283 { 2, TWL4030_BASEADD_PRECHARGE },
284 { 2, TWL4030_BASEADD_PWM0 },
285 { 2, TWL4030_BASEADD_PWM1 },
286 { 2, TWL4030_BASEADD_PWMA },
287 { 2, TWL4030_BASEADD_PWMB },
1920a61e
IK
288 { 2, TWL5031_BASEADD_ACCESSORY },
289 { 2, TWL5031_BASEADD_INTERRUPTS },
a603a7fa
DB
290
291 { 3, TWL4030_BASEADD_BACKUP },
292 { 3, TWL4030_BASEADD_INT },
293 { 3, TWL4030_BASEADD_PM_MASTER },
294 { 3, TWL4030_BASEADD_PM_RECEIVER },
295 { 3, TWL4030_BASEADD_RTC },
296 { 3, TWL4030_BASEADD_SECURED_REG },
297};
298
e8deb28c
B
299static struct twl_mapping twl6030_map[] = {
300 /*
301 * NOTE: don't change this table without updating the
302 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
303 * so they continue to match the order in this table.
304 */
305 { SUB_CHIP_ID1, TWL6030_BASEADD_USB },
364cedb2 306 { SUB_CHIP_ID_INVAL, TWL6030_BASEADD_AUDIO },
e8deb28c
B
307 { SUB_CHIP_ID2, TWL6030_BASEADD_DIEID },
308 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
309 { SUB_CHIP_ID1, TWL6030_BASEADD_PIH },
310
311 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
312 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
313 { SUB_CHIP_ID1, TWL6030_BASEADD_GPADC_CTRL },
314 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
315 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
316
317 { SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
318 { SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
319 { SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
fa0d9762
B
320 { SUB_CHIP_ID0, TWL6030_BASEADD_ZERO },
321 { SUB_CHIP_ID1, TWL6030_BASEADD_ZERO },
e8deb28c 322
fa0d9762
B
323 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
324 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
e8deb28c
B
325 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
326 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
327 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
328 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_MASTER },
329 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_SLAVE_MISC },
330
331 { SUB_CHIP_ID0, TWL6030_BASEADD_RTC },
332 { SUB_CHIP_ID0, TWL6030_BASEADD_MEM },
521d8ec3 333 { SUB_CHIP_ID1, TWL6025_BASEADD_CHARGER },
e8deb28c
B
334};
335
a603a7fa
DB
336/*----------------------------------------------------------------------*/
337
a603a7fa
DB
338/* Exported Functions */
339
340/**
fc7b92fc 341 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
342 * @mod_no: module number
343 * @value: an array of num_bytes+1 containing data to write
344 * @reg: register address (just offset will do)
345 * @num_bytes: number of bytes to transfer
346 *
347 * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and
348 * valid data starts at Offset 1.
349 *
350 * Returns the result of operation - 0 is success
351 */
fc7b92fc 352int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa
DB
353{
354 int ret;
355 int sid;
fc7b92fc 356 struct twl_client *twl;
a603a7fa
DB
357 struct i2c_msg *msg;
358
fc7b92fc 359 if (unlikely(mod_no > TWL_MODULE_LAST)) {
a603a7fa
DB
360 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
361 return -EPERM;
362 }
a603a7fa 363 if (unlikely(!inuse)) {
8653be1a 364 pr_err("%s: not initialized\n", DRIVER_NAME);
a603a7fa
DB
365 return -EPERM;
366 }
8653be1a 367 sid = twl_map[mod_no].sid;
364cedb2
PU
368 if (unlikely(sid == SUB_CHIP_ID_INVAL)) {
369 pr_err("%s: module %d is not part of the pmic\n",
370 DRIVER_NAME, mod_no);
371 return -EINVAL;
372 }
8653be1a
IY
373 twl = &twl_modules[sid];
374
a603a7fa
DB
375 mutex_lock(&twl->xfer_lock);
376 /*
377 * [MSG1]: fill the register address data
378 * fill the data Tx buffer
379 */
380 msg = &twl->xfer_msg[0];
381 msg->addr = twl->address;
382 msg->len = num_bytes + 1;
383 msg->flags = 0;
384 msg->buf = value;
385 /* over write the first byte of buffer with the register address */
e8deb28c 386 *value = twl_map[mod_no].base + reg;
a603a7fa
DB
387 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1);
388 mutex_unlock(&twl->xfer_lock);
389
147e0847
AK
390 /* i2c_transfer returns number of messages transferred */
391 if (ret != 1) {
392 pr_err("%s: i2c_write failed to transfer all messages\n",
393 DRIVER_NAME);
394 if (ret < 0)
395 return ret;
396 else
397 return -EIO;
398 } else {
399 return 0;
400 }
a603a7fa 401}
fc7b92fc 402EXPORT_SYMBOL(twl_i2c_write);
a603a7fa
DB
403
404/**
fc7b92fc 405 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
406 * @mod_no: module number
407 * @value: an array of num_bytes containing data to be read
408 * @reg: register address (just offset will do)
409 * @num_bytes: number of bytes to transfer
410 *
411 * Returns result of operation - num_bytes is success else failure.
412 */
fc7b92fc 413int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa
DB
414{
415 int ret;
416 u8 val;
417 int sid;
fc7b92fc 418 struct twl_client *twl;
a603a7fa
DB
419 struct i2c_msg *msg;
420
fc7b92fc 421 if (unlikely(mod_no > TWL_MODULE_LAST)) {
a603a7fa
DB
422 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
423 return -EPERM;
424 }
a603a7fa 425 if (unlikely(!inuse)) {
8653be1a 426 pr_err("%s: not initialized\n", DRIVER_NAME);
a603a7fa
DB
427 return -EPERM;
428 }
8653be1a 429 sid = twl_map[mod_no].sid;
364cedb2
PU
430 if (unlikely(sid == SUB_CHIP_ID_INVAL)) {
431 pr_err("%s: module %d is not part of the pmic\n",
432 DRIVER_NAME, mod_no);
433 return -EINVAL;
434 }
8653be1a
IY
435 twl = &twl_modules[sid];
436
a603a7fa
DB
437 mutex_lock(&twl->xfer_lock);
438 /* [MSG1] fill the register address data */
439 msg = &twl->xfer_msg[0];
440 msg->addr = twl->address;
441 msg->len = 1;
442 msg->flags = 0; /* Read the register value */
e8deb28c 443 val = twl_map[mod_no].base + reg;
a603a7fa
DB
444 msg->buf = &val;
445 /* [MSG2] fill the data rx buffer */
446 msg = &twl->xfer_msg[1];
447 msg->addr = twl->address;
448 msg->flags = I2C_M_RD; /* Read the register value */
449 msg->len = num_bytes; /* only n bytes */
450 msg->buf = value;
451 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2);
452 mutex_unlock(&twl->xfer_lock);
453
147e0847
AK
454 /* i2c_transfer returns number of messages transferred */
455 if (ret != 2) {
456 pr_err("%s: i2c_read failed to transfer all messages\n",
457 DRIVER_NAME);
458 if (ret < 0)
459 return ret;
460 else
461 return -EIO;
462 } else {
463 return 0;
464 }
a603a7fa 465}
fc7b92fc 466EXPORT_SYMBOL(twl_i2c_read);
a603a7fa
DB
467
468/**
fc7b92fc 469 * twl_i2c_write_u8 - Writes a 8 bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
470 * @mod_no: module number
471 * @value: the value to be written 8 bit
472 * @reg: register address (just offset will do)
473 *
474 * Returns result of operation - 0 is success
475 */
fc7b92fc 476int twl_i2c_write_u8(u8 mod_no, u8 value, u8 reg)
a603a7fa
DB
477{
478
479 /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */
480 u8 temp_buffer[2] = { 0 };
481 /* offset 1 contains the data */
482 temp_buffer[1] = value;
fc7b92fc 483 return twl_i2c_write(mod_no, temp_buffer, reg, 1);
a603a7fa 484}
fc7b92fc 485EXPORT_SYMBOL(twl_i2c_write_u8);
a603a7fa
DB
486
487/**
fc7b92fc 488 * twl_i2c_read_u8 - Reads a 8 bit register from TWL4030/TWL5030/TWL60X0
a603a7fa
DB
489 * @mod_no: module number
490 * @value: the value read 8 bit
491 * @reg: register address (just offset will do)
492 *
493 * Returns result of operation - 0 is success
494 */
fc7b92fc 495int twl_i2c_read_u8(u8 mod_no, u8 *value, u8 reg)
a603a7fa 496{
fc7b92fc 497 return twl_i2c_read(mod_no, value, reg, 1);
a603a7fa 498}
fc7b92fc 499EXPORT_SYMBOL(twl_i2c_read_u8);
a603a7fa
DB
500
501/*----------------------------------------------------------------------*/
502
ca972d13
L
503/**
504 * twl_read_idcode_register - API to read the IDCODE register.
505 *
506 * Unlocks the IDCODE register and read the 32 bit value.
507 */
508static int twl_read_idcode_register(void)
509{
510 int err;
511
512 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
513 REG_UNLOCK_TEST_REG);
514 if (err) {
515 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
516 goto fail;
517 }
518
519 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_idcode),
520 REG_IDCODE_7_0, 4);
521 if (err) {
522 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
523 goto fail;
524 }
525
526 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
527 if (err)
528 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
529fail:
530 return err;
531}
532
533/**
534 * twl_get_type - API to get TWL Si type.
535 *
536 * Api to get the TWL Si type from IDCODE value.
537 */
538int twl_get_type(void)
539{
540 return TWL_SIL_TYPE(twl_idcode);
541}
542EXPORT_SYMBOL_GPL(twl_get_type);
543
544/**
545 * twl_get_version - API to get TWL Si version.
546 *
547 * Api to get the TWL Si version from IDCODE value.
548 */
549int twl_get_version(void)
550{
551 return TWL_SIL_REV(twl_idcode);
552}
553EXPORT_SYMBOL_GPL(twl_get_version);
554
dad759ff
DB
555static struct device *
556add_numbered_child(unsigned chip, const char *name, int num,
5725d66b
DB
557 void *pdata, unsigned pdata_len,
558 bool can_wakeup, int irq0, int irq1)
a603a7fa 559{
5725d66b 560 struct platform_device *pdev;
fc7b92fc 561 struct twl_client *twl = &twl_modules[chip];
5725d66b
DB
562 int status;
563
dad759ff 564 pdev = platform_device_alloc(name, num);
5725d66b
DB
565 if (!pdev) {
566 dev_dbg(&twl->client->dev, "can't alloc dev\n");
567 status = -ENOMEM;
568 goto err;
569 }
a603a7fa 570
5725d66b
DB
571 device_init_wakeup(&pdev->dev, can_wakeup);
572 pdev->dev.parent = &twl->client->dev;
a603a7fa 573
5725d66b
DB
574 if (pdata) {
575 status = platform_device_add_data(pdev, pdata, pdata_len);
576 if (status < 0) {
577 dev_dbg(&pdev->dev, "can't add platform_data\n");
a603a7fa
DB
578 goto err;
579 }
5725d66b 580 }
a603a7fa 581
5725d66b
DB
582 if (irq0) {
583 struct resource r[2] = {
584 { .start = irq0, .flags = IORESOURCE_IRQ, },
585 { .start = irq1, .flags = IORESOURCE_IRQ, },
586 };
a603a7fa 587
5725d66b 588 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
a603a7fa 589 if (status < 0) {
5725d66b 590 dev_dbg(&pdev->dev, "can't add irqs\n");
a603a7fa
DB
591 goto err;
592 }
593 }
594
5725d66b 595 status = platform_device_add(pdev);
a603a7fa 596
5725d66b
DB
597err:
598 if (status < 0) {
599 platform_device_put(pdev);
600 dev_err(&twl->client->dev, "can't add %s dev\n", name);
601 return ERR_PTR(status);
602 }
603 return &pdev->dev;
604}
a603a7fa 605
dad759ff
DB
606static inline struct device *add_child(unsigned chip, const char *name,
607 void *pdata, unsigned pdata_len,
608 bool can_wakeup, int irq0, int irq1)
609{
610 return add_numbered_child(chip, name, -1, pdata, pdata_len,
611 can_wakeup, irq0, irq1);
612}
613
614static struct device *
615add_regulator_linked(int num, struct regulator_init_data *pdata,
616 struct regulator_consumer_supply *consumers,
521d8ec3 617 unsigned num_consumers, unsigned long features)
dad759ff 618{
e8deb28c 619 unsigned sub_chip_id;
63bfff4e
TK
620 struct twl_regulator_driver_data drv_data;
621
dad759ff
DB
622 /* regulator framework demands init_data ... */
623 if (!pdata)
624 return NULL;
625
b73eac78 626 if (consumers) {
dad759ff
DB
627 pdata->consumer_supplies = consumers;
628 pdata->num_consumer_supplies = num_consumers;
629 }
630
63bfff4e
TK
631 if (pdata->driver_data) {
632 /* If we have existing drv_data, just add the flags */
633 struct twl_regulator_driver_data *tmp;
634 tmp = pdata->driver_data;
635 tmp->features |= features;
636 } else {
637 /* add new driver data struct, used only during init */
638 drv_data.features = features;
639 drv_data.set_voltage = NULL;
640 drv_data.get_voltage = NULL;
641 drv_data.data = NULL;
642 pdata->driver_data = &drv_data;
643 }
521d8ec3 644
dad759ff 645 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
e8deb28c
B
646 sub_chip_id = twl_map[TWL_MODULE_PM_MASTER].sid;
647 return add_numbered_child(sub_chip_id, "twl_reg", num,
dad759ff
DB
648 pdata, sizeof(*pdata), false, 0, 0);
649}
650
651static struct device *
521d8ec3
GG
652add_regulator(int num, struct regulator_init_data *pdata,
653 unsigned long features)
dad759ff 654{
521d8ec3 655 return add_regulator_linked(num, pdata, NULL, 0, features);
dad759ff
DB
656}
657
5725d66b
DB
658/*
659 * NOTE: We know the first 8 IRQs after pdata->base_irq are
660 * for the PIH, and the next are for the PWR_INT SIH, since
661 * that's how twl_init_irq() sets things up.
662 */
a603a7fa 663
dad759ff 664static int
9e178620
FB
665add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
666 unsigned long features)
5725d66b
DB
667{
668 struct device *child;
e8deb28c 669 unsigned sub_chip_id;
a603a7fa 670
5725d66b 671 if (twl_has_gpio() && pdata->gpio) {
fc7b92fc 672 child = add_child(SUB_CHIP_ID1, "twl4030_gpio",
5725d66b 673 pdata->gpio, sizeof(*pdata->gpio),
9e178620 674 false, irq_base + GPIO_INTR_OFFSET, 0);
5725d66b
DB
675 if (IS_ERR(child))
676 return PTR_ERR(child);
a603a7fa
DB
677 }
678
679 if (twl_has_keypad() && pdata->keypad) {
fc7b92fc 680 child = add_child(SUB_CHIP_ID2, "twl4030_keypad",
5725d66b 681 pdata->keypad, sizeof(*pdata->keypad),
9e178620 682 true, irq_base + KEYPAD_INTR_OFFSET, 0);
5725d66b
DB
683 if (IS_ERR(child))
684 return PTR_ERR(child);
a603a7fa
DB
685 }
686
687 if (twl_has_madc() && pdata->madc) {
5725d66b
DB
688 child = add_child(2, "twl4030_madc",
689 pdata->madc, sizeof(*pdata->madc),
9e178620 690 true, irq_base + MADC_INTR_OFFSET, 0);
5725d66b
DB
691 if (IS_ERR(child))
692 return PTR_ERR(child);
a603a7fa
DB
693 }
694
695 if (twl_has_rtc()) {
a603a7fa 696 /*
5725d66b 697 * REVISIT platform_data here currently might expose the
a603a7fa 698 * "msecure" line ... but for now we just expect board
5725d66b 699 * setup to tell the chip "it's always ok to SET_TIME".
a603a7fa
DB
700 * Eventually, Linux might become more aware of such
701 * HW security concerns, and "least privilege".
702 */
e8deb28c
B
703 sub_chip_id = twl_map[TWL_MODULE_RTC].sid;
704 child = add_child(sub_chip_id, "twl_rtc",
5725d66b 705 NULL, 0,
9e178620 706 true, irq_base + RTC_INTR_OFFSET, 0);
5725d66b
DB
707 if (IS_ERR(child))
708 return PTR_ERR(child);
a603a7fa
DB
709 }
710
9da66539 711 if (twl_has_usb() && pdata->usb && twl_class_is_4030()) {
f8ebdff0
RQ
712
713 static struct regulator_consumer_supply usb1v5 = {
714 .supply = "usb1v5",
715 };
716 static struct regulator_consumer_supply usb1v8 = {
717 .supply = "usb1v8",
718 };
719 static struct regulator_consumer_supply usb3v1 = {
720 .supply = "usb3v1",
721 };
722
723 /* First add the regulators so that they can be used by transceiver */
724 if (twl_has_regulator()) {
725 /* this is a template that gets copied */
726 struct regulator_init_data usb_fixed = {
727 .constraints.valid_modes_mask =
728 REGULATOR_MODE_NORMAL
729 | REGULATOR_MODE_STANDBY,
730 .constraints.valid_ops_mask =
731 REGULATOR_CHANGE_MODE
732 | REGULATOR_CHANGE_STATUS,
733 };
734
735 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
521d8ec3
GG
736 &usb_fixed, &usb1v5, 1,
737 features);
f8ebdff0
RQ
738 if (IS_ERR(child))
739 return PTR_ERR(child);
740
741 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
521d8ec3
GG
742 &usb_fixed, &usb1v8, 1,
743 features);
f8ebdff0
RQ
744 if (IS_ERR(child))
745 return PTR_ERR(child);
746
747 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
521d8ec3
GG
748 &usb_fixed, &usb3v1, 1,
749 features);
f8ebdff0
RQ
750 if (IS_ERR(child))
751 return PTR_ERR(child);
752
753 }
754
5725d66b
DB
755 child = add_child(0, "twl4030_usb",
756 pdata->usb, sizeof(*pdata->usb),
757 true,
758 /* irq0 = USB_PRES, irq1 = USB */
9e178620
FB
759 irq_base + USB_PRES_INTR_OFFSET,
760 irq_base + USB_INTR_OFFSET);
f8ebdff0 761
5725d66b
DB
762 if (IS_ERR(child))
763 return PTR_ERR(child);
dad759ff
DB
764
765 /* we need to connect regulators to this transceiver */
f8ebdff0 766 if (twl_has_regulator() && child) {
1b65fa84
MB
767 usb1v5.dev_name = dev_name(child);
768 usb1v8.dev_name = dev_name(child);
769 usb3v1.dev_name = dev_name(child);
f8ebdff0 770 }
dad759ff 771 }
e70357e3
HH
772 if (twl_has_usb() && pdata->usb && twl_class_is_6030()) {
773
521d8ec3
GG
774 static struct regulator_consumer_supply usb3v3;
775 int regulator;
e70357e3
HH
776
777 if (twl_has_regulator()) {
778 /* this is a template that gets copied */
779 struct regulator_init_data usb_fixed = {
780 .constraints.valid_modes_mask =
781 REGULATOR_MODE_NORMAL
782 | REGULATOR_MODE_STANDBY,
783 .constraints.valid_ops_mask =
784 REGULATOR_CHANGE_MODE
785 | REGULATOR_CHANGE_STATUS,
786 };
787
521d8ec3
GG
788 if (features & TWL6025_SUBCLASS) {
789 usb3v3.supply = "ldousb";
790 regulator = TWL6025_REG_LDOUSB;
791 } else {
792 usb3v3.supply = "vusb";
793 regulator = TWL6030_REG_VUSB;
794 }
795 child = add_regulator_linked(regulator, &usb_fixed,
796 &usb3v3, 1,
797 features);
e70357e3
HH
798 if (IS_ERR(child))
799 return PTR_ERR(child);
800 }
801
521d8ec3
GG
802 pdata->usb->features = features;
803
e70357e3
HH
804 child = add_child(0, "twl6030_usb",
805 pdata->usb, sizeof(*pdata->usb),
806 true,
807 /* irq1 = VBUS_PRES, irq0 = USB ID */
9e178620
FB
808 irq_base + USBOTG_INTR_OFFSET,
809 irq_base + USB_PRES_INTR_OFFSET);
e70357e3
HH
810
811 if (IS_ERR(child))
812 return PTR_ERR(child);
813 /* we need to connect regulators to this transceiver */
814 if (twl_has_regulator() && child)
1b65fa84 815 usb3v3.dev_name = dev_name(child);
521d8ec3
GG
816 } else if (twl_has_regulator() && twl_class_is_6030()) {
817 if (features & TWL6025_SUBCLASS)
818 child = add_regulator(TWL6025_REG_LDOUSB,
819 pdata->ldousb, features);
820 else
821 child = add_regulator(TWL6030_REG_VUSB,
822 pdata->vusb, features);
e70357e3 823
521d8ec3
GG
824 if (IS_ERR(child))
825 return PTR_ERR(child);
e70357e3 826 }
dad759ff 827
153617fd 828 if (twl_has_watchdog() && twl_class_is_4030()) {
80e45b1e
TK
829 child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0);
830 if (IS_ERR(child))
9c3664dd
FB
831 return PTR_ERR(child);
832 }
833
153617fd 834 if (twl_has_pwrbutton() && twl_class_is_4030()) {
9c3664dd 835 child = add_child(1, "twl4030_pwrbutton",
9e178620 836 NULL, 0, true, irq_base + 8 + 0, 0);
9c3664dd 837 if (IS_ERR(child))
80e45b1e
TK
838 return PTR_ERR(child);
839 }
840
4ae6df5e 841 if (twl_has_codec() && pdata->audio && twl_class_is_4030()) {
d62abe56 842 sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
f0fba2ad 843 child = add_child(sub_chip_id, "twl4030-audio",
4ae6df5e 844 pdata->audio, sizeof(*pdata->audio),
d62abe56
MLC
845 false, 0, 0);
846 if (IS_ERR(child))
847 return PTR_ERR(child);
848 }
849
9da66539
RN
850 /* twl4030 regulators */
851 if (twl_has_regulator() && twl_class_is_4030()) {
521d8ec3
GG
852 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
853 features);
dad759ff
DB
854 if (IS_ERR(child))
855 return PTR_ERR(child);
ab4abe05 856
521d8ec3
GG
857 child = add_regulator(TWL4030_REG_VIO, pdata->vio,
858 features);
ab4abe05
JKS
859 if (IS_ERR(child))
860 return PTR_ERR(child);
861
521d8ec3
GG
862 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
863 features);
ab4abe05
JKS
864 if (IS_ERR(child))
865 return PTR_ERR(child);
866
521d8ec3
GG
867 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
868 features);
ab4abe05
JKS
869 if (IS_ERR(child))
870 return PTR_ERR(child);
dad759ff 871
521d8ec3
GG
872 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
873 features);
dad759ff
DB
874 if (IS_ERR(child))
875 return PTR_ERR(child);
876
521d8ec3
GG
877 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
878 features);
dad759ff
DB
879 if (IS_ERR(child))
880 return PTR_ERR(child);
881
882 child = add_regulator((features & TWL4030_VAUX2)
883 ? TWL4030_REG_VAUX2_4030
884 : TWL4030_REG_VAUX2,
521d8ec3 885 pdata->vaux2, features);
dad759ff
DB
886 if (IS_ERR(child))
887 return PTR_ERR(child);
ab4abe05 888
521d8ec3
GG
889 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
890 features);
ab4abe05
JKS
891 if (IS_ERR(child))
892 return PTR_ERR(child);
893
521d8ec3
GG
894 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
895 features);
ab4abe05
JKS
896 if (IS_ERR(child))
897 return PTR_ERR(child);
898
521d8ec3
GG
899 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
900 features);
ab4abe05
JKS
901 if (IS_ERR(child))
902 return PTR_ERR(child);
dad759ff
DB
903 }
904
dad759ff 905 /* maybe add LDOs that are omitted on cost-reduced parts */
9da66539
RN
906 if (twl_has_regulator() && !(features & TPS_SUBSET)
907 && twl_class_is_4030()) {
521d8ec3
GG
908 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
909 features);
dad759ff
DB
910 if (IS_ERR(child))
911 return PTR_ERR(child);
dad759ff 912
521d8ec3
GG
913 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
914 features);
dad759ff
DB
915 if (IS_ERR(child))
916 return PTR_ERR(child);
917
521d8ec3
GG
918 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
919 features);
dad759ff
DB
920 if (IS_ERR(child))
921 return PTR_ERR(child);
922
521d8ec3
GG
923 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
924 features);
dad759ff
DB
925 if (IS_ERR(child))
926 return PTR_ERR(child);
927
521d8ec3
GG
928 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
929 features);
dad759ff
DB
930 if (IS_ERR(child))
931 return PTR_ERR(child);
932
521d8ec3
GG
933 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
934 features);
dad759ff
DB
935 if (IS_ERR(child))
936 return PTR_ERR(child);
a603a7fa
DB
937 }
938
9da66539 939 /* twl6030 regulators */
521d8ec3
GG
940 if (twl_has_regulator() && twl_class_is_6030() &&
941 !(features & TWL6025_SUBCLASS)) {
34a38440
TK
942 child = add_regulator(TWL6030_REG_VDD1, pdata->vdd1,
943 features);
944 if (IS_ERR(child))
945 return PTR_ERR(child);
946
947 child = add_regulator(TWL6030_REG_VDD2, pdata->vdd2,
948 features);
949 if (IS_ERR(child))
950 return PTR_ERR(child);
951
952 child = add_regulator(TWL6030_REG_VDD3, pdata->vdd3,
953 features);
954 if (IS_ERR(child))
955 return PTR_ERR(child);
956
46eda3e9
PU
957 child = add_regulator(TWL6030_REG_V1V8, pdata->v1v8,
958 features);
959 if (IS_ERR(child))
960 return PTR_ERR(child);
961
962 child = add_regulator(TWL6030_REG_V2V1, pdata->v2v1,
963 features);
964 if (IS_ERR(child))
965 return PTR_ERR(child);
966
521d8ec3
GG
967 child = add_regulator(TWL6030_REG_VMMC, pdata->vmmc,
968 features);
969 if (IS_ERR(child))
970 return PTR_ERR(child);
971
972 child = add_regulator(TWL6030_REG_VPP, pdata->vpp,
973 features);
974 if (IS_ERR(child))
975 return PTR_ERR(child);
976
977 child = add_regulator(TWL6030_REG_VUSIM, pdata->vusim,
978 features);
979 if (IS_ERR(child))
980 return PTR_ERR(child);
981
982 child = add_regulator(TWL6030_REG_VCXIO, pdata->vcxio,
983 features);
984 if (IS_ERR(child))
985 return PTR_ERR(child);
986
987 child = add_regulator(TWL6030_REG_VDAC, pdata->vdac,
988 features);
989 if (IS_ERR(child))
990 return PTR_ERR(child);
991
992 child = add_regulator(TWL6030_REG_VAUX1_6030, pdata->vaux1,
993 features);
994 if (IS_ERR(child))
995 return PTR_ERR(child);
996
997 child = add_regulator(TWL6030_REG_VAUX2_6030, pdata->vaux2,
998 features);
999 if (IS_ERR(child))
1000 return PTR_ERR(child);
1001
1002 child = add_regulator(TWL6030_REG_VAUX3_6030, pdata->vaux3,
1003 features);
1004 if (IS_ERR(child))
1005 return PTR_ERR(child);
1006
1007 child = add_regulator(TWL6030_REG_CLK32KG, pdata->clk32kg,
1008 features);
1009 if (IS_ERR(child))
1010 return PTR_ERR(child);
1011 }
1012
1013 /* 6030 and 6025 share this regulator */
9da66539 1014 if (twl_has_regulator() && twl_class_is_6030()) {
521d8ec3
GG
1015 child = add_regulator(TWL6030_REG_VANA, pdata->vana,
1016 features);
1017 if (IS_ERR(child))
1018 return PTR_ERR(child);
1019 }
1020
1021 /* twl6025 regulators */
1022 if (twl_has_regulator() && twl_class_is_6030() &&
1023 (features & TWL6025_SUBCLASS)) {
1024 child = add_regulator(TWL6025_REG_LDO5, pdata->ldo5,
1025 features);
9da66539
RN
1026 if (IS_ERR(child))
1027 return PTR_ERR(child);
1028
521d8ec3
GG
1029 child = add_regulator(TWL6025_REG_LDO1, pdata->ldo1,
1030 features);
9da66539
RN
1031 if (IS_ERR(child))
1032 return PTR_ERR(child);
1033
521d8ec3
GG
1034 child = add_regulator(TWL6025_REG_LDO7, pdata->ldo7,
1035 features);
9da66539
RN
1036 if (IS_ERR(child))
1037 return PTR_ERR(child);
1038
521d8ec3
GG
1039 child = add_regulator(TWL6025_REG_LDO6, pdata->ldo6,
1040 features);
9da66539
RN
1041 if (IS_ERR(child))
1042 return PTR_ERR(child);
1043
521d8ec3
GG
1044 child = add_regulator(TWL6025_REG_LDOLN, pdata->ldoln,
1045 features);
9da66539
RN
1046 if (IS_ERR(child))
1047 return PTR_ERR(child);
1048
521d8ec3
GG
1049 child = add_regulator(TWL6025_REG_LDO2, pdata->ldo2,
1050 features);
9da66539
RN
1051 if (IS_ERR(child))
1052 return PTR_ERR(child);
1053
521d8ec3
GG
1054 child = add_regulator(TWL6025_REG_LDO4, pdata->ldo4,
1055 features);
9da66539
RN
1056 if (IS_ERR(child))
1057 return PTR_ERR(child);
1058
521d8ec3
GG
1059 child = add_regulator(TWL6025_REG_LDO3, pdata->ldo3,
1060 features);
9da66539
RN
1061 if (IS_ERR(child))
1062 return PTR_ERR(child);
1063
521d8ec3
GG
1064 child = add_regulator(TWL6025_REG_SMPS3, pdata->smps3,
1065 features);
9da66539
RN
1066 if (IS_ERR(child))
1067 return PTR_ERR(child);
8e6de4a3 1068
521d8ec3
GG
1069 child = add_regulator(TWL6025_REG_SMPS4, pdata->smps4,
1070 features);
8e6de4a3
B
1071 if (IS_ERR(child))
1072 return PTR_ERR(child);
521d8ec3
GG
1073
1074 child = add_regulator(TWL6025_REG_VIO, pdata->vio6025,
1075 features);
1076 if (IS_ERR(child))
1077 return PTR_ERR(child);
1078
9da66539
RN
1079 }
1080
11c39c4b
GI
1081 if (twl_has_bci() && pdata->bci &&
1082 !(features & (TPS_SUBSET | TWL5031))) {
1083 child = add_child(3, "twl4030_bci",
1084 pdata->bci, sizeof(*pdata->bci), false,
1085 /* irq0 = CHG_PRES, irq1 = BCI */
9e178620
FB
1086 irq_base + BCI_PRES_INTR_OFFSET,
1087 irq_base + BCI_INTR_OFFSET);
11c39c4b
GI
1088 if (IS_ERR(child))
1089 return PTR_ERR(child);
1090 }
1091
5725d66b 1092 return 0;
a603a7fa
DB
1093}
1094
1095/*----------------------------------------------------------------------*/
1096
1097/*
1098 * These three functions initialize the on-chip clock framework,
1099 * letting it generate the right frequencies for USB, MADC, and
1100 * other purposes.
1101 */
1102static inline int __init protect_pm_master(void)
1103{
1104 int e = 0;
1105
49e6f87e
FB
1106 e = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
1107 TWL4030_PM_MASTER_PROTECT_KEY);
a603a7fa
DB
1108 return e;
1109}
1110
1111static inline int __init unprotect_pm_master(void)
1112{
1113 int e = 0;
1114
49e6f87e
FB
1115 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
1116 TWL4030_PM_MASTER_KEY_CFG1,
1117 TWL4030_PM_MASTER_PROTECT_KEY);
1118 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
1119 TWL4030_PM_MASTER_KEY_CFG2,
1120 TWL4030_PM_MASTER_PROTECT_KEY);
1121
a603a7fa
DB
1122 return e;
1123}
1124
38a68496
IK
1125static void clocks_init(struct device *dev,
1126 struct twl4030_clock_init_data *clock)
a603a7fa
DB
1127{
1128 int e = 0;
1129 struct clk *osc;
1130 u32 rate;
1131 u8 ctrl = HFCLK_FREQ_26_MHZ;
1132
1133#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
1134 if (cpu_is_omap2430())
e6b50c8d 1135 osc = clk_get(dev, "osc_ck");
a603a7fa 1136 else
e6b50c8d 1137 osc = clk_get(dev, "osc_sys_ck");
6354ab5c 1138
a603a7fa 1139 if (IS_ERR(osc)) {
fc7b92fc 1140 printk(KERN_WARNING "Skipping twl internal clock init and "
a603a7fa
DB
1141 "using bootloader value (unknown osc rate)\n");
1142 return;
1143 }
1144
1145 rate = clk_get_rate(osc);
1146 clk_put(osc);
1147
6354ab5c
SO
1148#else
1149 /* REVISIT for non-OMAP systems, pass the clock rate from
1150 * board init code, using platform_data.
1151 */
1152 osc = ERR_PTR(-EIO);
1153
fc7b92fc 1154 printk(KERN_WARNING "Skipping twl internal clock init and "
6354ab5c
SO
1155 "using bootloader value (unknown osc rate)\n");
1156
1157 return;
1158#endif
1159
a603a7fa
DB
1160 switch (rate) {
1161 case 19200000:
1162 ctrl = HFCLK_FREQ_19p2_MHZ;
1163 break;
1164 case 26000000:
1165 ctrl = HFCLK_FREQ_26_MHZ;
1166 break;
1167 case 38400000:
1168 ctrl = HFCLK_FREQ_38p4_MHZ;
1169 break;
1170 }
1171
1172 ctrl |= HIGH_PERF_SQ;
38a68496
IK
1173 if (clock && clock->ck32k_lowpwr_enable)
1174 ctrl |= CK32K_LOWPWR_EN;
1175
a603a7fa
DB
1176 e |= unprotect_pm_master();
1177 /* effect->MADC+USB ck en */
fc7b92fc 1178 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
a603a7fa
DB
1179 e |= protect_pm_master();
1180
1181 if (e < 0)
1182 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
1183}
1184
1185/*----------------------------------------------------------------------*/
1186
a603a7fa 1187
fc7b92fc 1188static int twl_remove(struct i2c_client *client)
a603a7fa 1189{
364cedb2 1190 unsigned i, num_slaves;
a30d46c0 1191 int status;
a603a7fa 1192
364cedb2 1193 if (twl_class_is_4030()) {
e8deb28c 1194 status = twl4030_exit_irq();
364cedb2
PU
1195 num_slaves = TWL_NUM_SLAVES;
1196 } else {
e8deb28c 1197 status = twl6030_exit_irq();
364cedb2
PU
1198 num_slaves = TWL_NUM_SLAVES - 1;
1199 }
e8deb28c 1200
a30d46c0
DB
1201 if (status < 0)
1202 return status;
a603a7fa 1203
364cedb2 1204 for (i = 0; i < num_slaves; i++) {
fc7b92fc 1205 struct twl_client *twl = &twl_modules[i];
a603a7fa
DB
1206
1207 if (twl->client && twl->client != client)
1208 i2c_unregister_device(twl->client);
fc7b92fc 1209 twl_modules[i].client = NULL;
a603a7fa
DB
1210 }
1211 inuse = false;
1212 return 0;
1213}
1214
ec1a07b3 1215/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
5b9cecd6 1216static int __devinit
fc7b92fc 1217twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
a603a7fa 1218{
a603a7fa 1219 struct twl4030_platform_data *pdata = client->dev.platform_data;
aeb5032b 1220 struct device_node *node = client->dev.of_node;
ec1a07b3
BC
1221 int irq_base = 0;
1222 int status;
364cedb2 1223 unsigned i, num_slaves;
aeb5032b
BC
1224
1225 if (node && !pdata) {
1226 /*
1227 * XXX: Temporary pdata until the information is correctly
1228 * retrieved by every TWL modules from DT.
1229 */
1230 pdata = devm_kzalloc(&client->dev,
1231 sizeof(struct twl4030_platform_data),
1232 GFP_KERNEL);
1233 if (!pdata)
1234 return -ENOMEM;
1235 }
a603a7fa
DB
1236
1237 if (!pdata) {
1238 dev_dbg(&client->dev, "no platform data?\n");
1239 return -EINVAL;
1240 }
1241
1242 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1243 dev_dbg(&client->dev, "can't talk I2C?\n");
1244 return -EIO;
1245 }
1246
a30d46c0 1247 if (inuse) {
a603a7fa
DB
1248 dev_dbg(&client->dev, "driver is already in use\n");
1249 return -EBUSY;
1250 }
1251
364cedb2
PU
1252 if ((id->driver_data) & TWL6030_CLASS) {
1253 twl_id = TWL6030_CLASS_ID;
1254 twl_map = &twl6030_map[0];
1255 num_slaves = TWL_NUM_SLAVES - 1;
1256 } else {
1257 twl_id = TWL4030_CLASS_ID;
1258 twl_map = &twl4030_map[0];
1259 num_slaves = TWL_NUM_SLAVES;
1260 }
1261
1262 for (i = 0; i < num_slaves; i++) {
ec1a07b3 1263 struct twl_client *twl = &twl_modules[i];
a603a7fa
DB
1264
1265 twl->address = client->addr + i;
ec1a07b3 1266 if (i == 0) {
a603a7fa 1267 twl->client = client;
ec1a07b3 1268 } else {
a603a7fa
DB
1269 twl->client = i2c_new_dummy(client->adapter,
1270 twl->address);
1271 if (!twl->client) {
a8643430 1272 dev_err(&client->dev,
a603a7fa
DB
1273 "can't attach client %d\n", i);
1274 status = -ENOMEM;
1275 goto fail;
1276 }
a603a7fa
DB
1277 }
1278 mutex_init(&twl->xfer_lock);
1279 }
ec1a07b3 1280
a603a7fa
DB
1281 inuse = true;
1282
1283 /* setup clock framework */
38a68496 1284 clocks_init(&client->dev, pdata->clock);
a603a7fa 1285
ca972d13
L
1286 /* read TWL IDCODE Register */
1287 if (twl_id == TWL4030_CLASS_ID) {
ec1a07b3
BC
1288 status = twl_read_idcode_register();
1289 WARN(status < 0, "Error: reading twl_idcode register value\n");
ca972d13
L
1290 }
1291
ebf0bd36
AK
1292 /* load power event scripts */
1293 if (twl_has_power() && pdata->power)
1294 twl4030_power_init(pdata->power);
1295
a603a7fa 1296 /* Maybe init the T2 Interrupt subsystem */
9e178620 1297 if (client->irq) {
e8deb28c
B
1298 if (twl_class_is_4030()) {
1299 twl4030_init_chip_irq(id->name);
78518ffa 1300 irq_base = twl4030_init_irq(&client->dev, client->irq);
e8deb28c 1301 } else {
78518ffa 1302 irq_base = twl6030_init_irq(&client->dev, client->irq);
e8deb28c
B
1303 }
1304
78518ffa
BC
1305 if (irq_base < 0) {
1306 status = irq_base;
a30d46c0 1307 goto fail;
78518ffa 1308 }
a603a7fa
DB
1309 }
1310
ec1a07b3
BC
1311 /*
1312 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
a29aaf55
MS
1313 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1314 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1315 */
a29aaf55 1316 if (twl_class_is_4030()) {
ec1a07b3
BC
1317 u8 temp;
1318
a29aaf55
MS
1319 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1320 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
ec1a07b3 1321 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
a29aaf55
MS
1322 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1323 }
1324
964dba28 1325 status = -ENODEV;
aeb5032b
BC
1326 if (node)
1327 status = of_platform_populate(node, NULL, NULL, &client->dev);
964dba28 1328 if (status)
9e178620 1329 status = add_children(pdata, irq_base, id->driver_data);
aeb5032b 1330
a603a7fa
DB
1331fail:
1332 if (status < 0)
fc7b92fc 1333 twl_remove(client);
ec1a07b3 1334
a603a7fa
DB
1335 return status;
1336}
1337
fc7b92fc 1338static const struct i2c_device_id twl_ids[] = {
dad759ff
DB
1339 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1340 { "twl5030", 0 }, /* T2 updated */
1920a61e 1341 { "twl5031", TWL5031 }, /* TWL5030 updated */
dad759ff
DB
1342 { "tps65950", 0 }, /* catalog version of twl5030 */
1343 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1344 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
59dead5a
OD
1345 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1346 and vibrator. Charger in USB module*/
e8deb28c 1347 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
521d8ec3 1348 { "twl6025", TWL6030_CLASS | TWL6025_SUBCLASS }, /* "Phoenix lite" */
a603a7fa
DB
1349 { /* end of list */ },
1350};
fc7b92fc 1351MODULE_DEVICE_TABLE(i2c, twl_ids);
a603a7fa
DB
1352
1353/* One Client Driver , 4 Clients */
fc7b92fc 1354static struct i2c_driver twl_driver = {
a603a7fa 1355 .driver.name = DRIVER_NAME,
fc7b92fc
B
1356 .id_table = twl_ids,
1357 .probe = twl_probe,
1358 .remove = twl_remove,
a603a7fa
DB
1359};
1360
fc7b92fc 1361static int __init twl_init(void)
a603a7fa 1362{
fc7b92fc 1363 return i2c_add_driver(&twl_driver);
a603a7fa 1364}
fc7b92fc 1365subsys_initcall(twl_init);
a603a7fa 1366
fc7b92fc 1367static void __exit twl_exit(void)
a603a7fa 1368{
fc7b92fc 1369 i2c_del_driver(&twl_driver);
a603a7fa 1370}
fc7b92fc 1371module_exit(twl_exit);
a603a7fa
DB
1372
1373MODULE_AUTHOR("Texas Instruments, Inc.");
fc7b92fc 1374MODULE_DESCRIPTION("I2C Core interface for TWL");
a603a7fa 1375MODULE_LICENSE("GPL");
This page took 0.338669 seconds and 5 git commands to generate.