mfd: twl-core: API to set the regcache bypass for a given regmap in twl
[deliverable/linux.git] / drivers / mfd / twl-core.c
CommitLineData
a603a7fa 1/*
fc7b92fc
B
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
a603a7fa
DB
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
a603a7fa
DB
31#include <linux/init.h>
32#include <linux/mutex.h>
4e36dd33 33#include <linux/module.h>
a603a7fa 34#include <linux/platform_device.h>
2473d25a 35#include <linux/regmap.h>
a603a7fa 36#include <linux/clk.h>
a30d46c0 37#include <linux/err.h>
aeb5032b
BC
38#include <linux/device.h>
39#include <linux/of.h>
40#include <linux/of_irq.h>
41#include <linux/of_platform.h>
e7cc3aca 42#include <linux/irq.h>
aeb5032b 43#include <linux/irqdomain.h>
a603a7fa 44
dad759ff
DB
45#include <linux/regulator/machine.h>
46
a603a7fa 47#include <linux/i2c.h>
b07682b6 48#include <linux/i2c/twl.h>
a603a7fa 49
1b8f333f 50#include "twl-core.h"
a603a7fa
DB
51
52/*
53 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
54 * Management and System Companion Device" chips originally designed for
55 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
56 * often at around 3 Mbit/sec, including for interrupt handling.
57 *
58 * This driver core provides genirq support for the interrupts emitted,
59 * by the various modules, and exports register access primitives.
60 *
61 * FIXME this driver currently requires use of the first interrupt line
62 * (and associated registers).
63 */
64
fc7b92fc 65#define DRIVER_NAME "twl"
a603a7fa 66
a603a7fa
DB
67/* Triton Core internal information (BEGIN) */
68
a603a7fa
DB
69/* Base Address defns for twl4030_map[] */
70
71/* subchip/slave 0 - USB ID */
72#define TWL4030_BASEADD_USB 0x0000
73
74/* subchip/slave 1 - AUD ID */
75#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
76#define TWL4030_BASEADD_GPIO 0x0098
77#define TWL4030_BASEADD_INTBR 0x0085
78#define TWL4030_BASEADD_PIH 0x0080
79#define TWL4030_BASEADD_TEST 0x004C
80
81/* subchip/slave 2 - AUX ID */
82#define TWL4030_BASEADD_INTERRUPTS 0x00B9
83#define TWL4030_BASEADD_LED 0x00EE
84#define TWL4030_BASEADD_MADC 0x0000
85#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
86#define TWL4030_BASEADD_PRECHARGE 0x00AA
5d4e9bd7 87#define TWL4030_BASEADD_PWM 0x00F8
a603a7fa
DB
88#define TWL4030_BASEADD_KEYPAD 0x00D2
89
1920a61e
IK
90#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
91#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
92 one */
93
a603a7fa
DB
94/* subchip/slave 3 - POWER ID */
95#define TWL4030_BASEADD_BACKUP 0x0014
96#define TWL4030_BASEADD_INT 0x002E
97#define TWL4030_BASEADD_PM_MASTER 0x0036
98#define TWL4030_BASEADD_PM_RECEIVER 0x005B
99#define TWL4030_BASEADD_RTC 0x001C
100#define TWL4030_BASEADD_SECURED_REG 0x0000
101
102/* Triton Core internal information (END) */
103
104
e8deb28c
B
105/* subchip/slave 0 0x48 - POWER */
106#define TWL6030_BASEADD_RTC 0x0000
5d4e9bd7 107#define TWL6030_BASEADD_SECURED_REG 0x0017
e8deb28c
B
108#define TWL6030_BASEADD_PM_MASTER 0x001F
109#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
110#define TWL6030_BASEADD_PM_MISC 0x00E2
111#define TWL6030_BASEADD_PM_PUPD 0x00F0
112
113/* subchip/slave 1 0x49 - FEATURE */
114#define TWL6030_BASEADD_USB 0x0000
115#define TWL6030_BASEADD_GPADC_CTRL 0x002E
116#define TWL6030_BASEADD_AUX 0x0090
117#define TWL6030_BASEADD_PWM 0x00BA
118#define TWL6030_BASEADD_GASGAUGE 0x00C0
119#define TWL6030_BASEADD_PIH 0x00D0
120#define TWL6030_BASEADD_CHARGER 0x00E0
89ce43fb 121#define TWL6032_BASEADD_CHARGER 0x00DA
5d4e9bd7 122#define TWL6030_BASEADD_LED 0x00F4
e8deb28c
B
123
124/* subchip/slave 2 0x4A - DFT */
125#define TWL6030_BASEADD_DIEID 0x00C0
126
127/* subchip/slave 3 0x4B - AUDIO */
128#define TWL6030_BASEADD_AUDIO 0x0000
129#define TWL6030_BASEADD_RSV 0x0000
fa0d9762 130#define TWL6030_BASEADD_ZERO 0x0000
e8deb28c 131
a603a7fa
DB
132/* Few power values */
133#define R_CFG_BOOT 0x05
a603a7fa
DB
134
135/* some fields in R_CFG_BOOT */
136#define HFCLK_FREQ_19p2_MHZ (1 << 0)
137#define HFCLK_FREQ_26_MHZ (2 << 0)
138#define HFCLK_FREQ_38p4_MHZ (3 << 0)
139#define HIGH_PERF_SQ (1 << 3)
38a68496 140#define CK32K_LOWPWR_EN (1 << 7)
a603a7fa 141
a603a7fa
DB
142/*----------------------------------------------------------------------*/
143
e8deb28c 144/* Structure for each TWL4030/TWL6030 Slave */
fc7b92fc 145struct twl_client {
a603a7fa 146 struct i2c_client *client;
2473d25a 147 struct regmap *regmap;
a603a7fa
DB
148};
149
a603a7fa 150/* mapping the module id to slave id and base address */
fc7b92fc 151struct twl_mapping {
a603a7fa
DB
152 unsigned char sid; /* Slave ID */
153 unsigned char base; /* base address */
154};
80a97ccd
PU
155
156struct twl_private {
157 bool ready; /* The core driver is ready to be used */
158 u32 twl_idcode; /* TWL IDCODE Register value */
159 unsigned int twl_id;
160
161 struct twl_mapping *twl_map;
162 struct twl_client *twl_modules;
163};
164
165static struct twl_private *twl_priv;
a603a7fa 166
da059ecf 167static struct twl_mapping twl4030_map[] = {
a603a7fa
DB
168 /*
169 * NOTE: don't change this table without updating the
e8deb28c 170 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
a603a7fa
DB
171 * so they continue to match the order in this table.
172 */
173
5d4e9bd7 174 /* Common IPs */
a603a7fa 175 { 0, TWL4030_BASEADD_USB },
5d4e9bd7
PU
176 { 1, TWL4030_BASEADD_PIH },
177 { 2, TWL4030_BASEADD_MAIN_CHARGE },
178 { 3, TWL4030_BASEADD_PM_MASTER },
179 { 3, TWL4030_BASEADD_PM_RECEIVER },
180
181 { 3, TWL4030_BASEADD_RTC },
182 { 2, TWL4030_BASEADD_PWM },
183 { 2, TWL4030_BASEADD_LED },
184 { 3, TWL4030_BASEADD_SECURED_REG },
185
186 /* TWL4030 specific IPs */
a603a7fa
DB
187 { 1, TWL4030_BASEADD_AUDIO_VOICE },
188 { 1, TWL4030_BASEADD_GPIO },
189 { 1, TWL4030_BASEADD_INTBR },
6691ccd0 190 { 1, TWL4030_BASEADD_TEST },
a603a7fa 191 { 2, TWL4030_BASEADD_KEYPAD },
5d4e9bd7 192
a603a7fa
DB
193 { 2, TWL4030_BASEADD_MADC },
194 { 2, TWL4030_BASEADD_INTERRUPTS },
a603a7fa 195 { 2, TWL4030_BASEADD_PRECHARGE },
a603a7fa
DB
196 { 3, TWL4030_BASEADD_BACKUP },
197 { 3, TWL4030_BASEADD_INT },
6691ccd0 198
5d4e9bd7
PU
199 { 2, TWL5031_BASEADD_ACCESSORY },
200 { 2, TWL5031_BASEADD_INTERRUPTS },
a603a7fa
DB
201};
202
2473d25a
PU
203static struct regmap_config twl4030_regmap_config[4] = {
204 {
205 /* Address 0x48 */
206 .reg_bits = 8,
207 .val_bits = 8,
208 .max_register = 0xff,
209 },
210 {
211 /* Address 0x49 */
212 .reg_bits = 8,
213 .val_bits = 8,
214 .max_register = 0xff,
215 },
216 {
217 /* Address 0x4a */
218 .reg_bits = 8,
219 .val_bits = 8,
220 .max_register = 0xff,
221 },
222 {
223 /* Address 0x4b */
224 .reg_bits = 8,
225 .val_bits = 8,
226 .max_register = 0xff,
227 },
228};
229
e8deb28c
B
230static struct twl_mapping twl6030_map[] = {
231 /*
232 * NOTE: don't change this table without updating the
233 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
234 * so they continue to match the order in this table.
235 */
5d4e9bd7
PU
236
237 /* Common IPs */
238 { 1, TWL6030_BASEADD_USB },
239 { 1, TWL6030_BASEADD_PIH },
240 { 1, TWL6030_BASEADD_CHARGER },
241 { 0, TWL6030_BASEADD_PM_MASTER },
242 { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
243
244 { 0, TWL6030_BASEADD_RTC },
245 { 1, TWL6030_BASEADD_PWM },
246 { 1, TWL6030_BASEADD_LED },
247 { 0, TWL6030_BASEADD_SECURED_REG },
248
249 /* TWL6030 specific IPs */
250 { 0, TWL6030_BASEADD_ZERO },
251 { 1, TWL6030_BASEADD_ZERO },
252 { 2, TWL6030_BASEADD_ZERO },
253 { 1, TWL6030_BASEADD_GPADC_CTRL },
254 { 1, TWL6030_BASEADD_GASGAUGE },
e8deb28c
B
255};
256
2473d25a
PU
257static struct regmap_config twl6030_regmap_config[3] = {
258 {
259 /* Address 0x48 */
260 .reg_bits = 8,
261 .val_bits = 8,
262 .max_register = 0xff,
263 },
264 {
265 /* Address 0x49 */
266 .reg_bits = 8,
267 .val_bits = 8,
268 .max_register = 0xff,
269 },
270 {
271 /* Address 0x4a */
272 .reg_bits = 8,
273 .val_bits = 8,
274 .max_register = 0xff,
275 },
276};
277
a603a7fa
DB
278/*----------------------------------------------------------------------*/
279
6dd810b5
PU
280static inline int twl_get_num_slaves(void)
281{
282 if (twl_class_is_4030())
283 return 4; /* TWL4030 class have four slave address */
284 else
285 return 3; /* TWL6030 class have three slave address */
286}
287
5d4e9bd7
PU
288static inline int twl_get_last_module(void)
289{
290 if (twl_class_is_4030())
291 return TWL4030_MODULE_LAST;
292 else
293 return TWL6030_MODULE_LAST;
294}
295
a603a7fa
DB
296/* Exported Functions */
297
80a97ccd
PU
298unsigned int twl_rev(void)
299{
300 return twl_priv ? twl_priv->twl_id : 0;
301}
302EXPORT_SYMBOL(twl_rev);
303
a603a7fa 304/**
8daf3540 305 * twl_get_regmap - Get the regmap associated with the given module
a603a7fa 306 * @mod_no: module number
a603a7fa 307 *
8daf3540 308 * Returns the regmap pointer or NULL in case of failure.
a603a7fa 309 */
8daf3540 310static struct regmap *twl_get_regmap(u8 mod_no)
a603a7fa 311{
a603a7fa 312 int sid;
fc7b92fc 313 struct twl_client *twl;
a603a7fa 314
1765dbcc
JH
315 if (unlikely(!twl_priv || !twl_priv->ready)) {
316 pr_err("%s: not initialized\n", DRIVER_NAME);
8daf3540 317 return NULL;
a603a7fa 318 }
1765dbcc
JH
319 if (unlikely(mod_no >= twl_get_last_module())) {
320 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
8daf3540 321 return NULL;
a603a7fa 322 }
050cde13 323
80a97ccd
PU
324 sid = twl_priv->twl_map[mod_no].sid;
325 twl = &twl_priv->twl_modules[sid];
8653be1a 326
8daf3540
PU
327 return twl->regmap;
328}
329
330/**
331 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
332 * @mod_no: module number
333 * @value: an array of num_bytes+1 containing data to write
334 * @reg: register address (just offset will do)
335 * @num_bytes: number of bytes to transfer
336 *
337 * Returns the result of operation - 0 is success
338 */
339int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
340{
341 struct regmap *regmap = twl_get_regmap(mod_no);
342 int ret;
343
344 if (!regmap)
345 return -EPERM;
346
347 ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
348 value, num_bytes);
2473d25a
PU
349
350 if (ret)
351 pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
352 DRIVER_NAME, mod_no, reg, num_bytes);
353
354 return ret;
a603a7fa 355}
fc7b92fc 356EXPORT_SYMBOL(twl_i2c_write);
a603a7fa
DB
357
358/**
fc7b92fc 359 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
360 * @mod_no: module number
361 * @value: an array of num_bytes containing data to be read
362 * @reg: register address (just offset will do)
363 * @num_bytes: number of bytes to transfer
364 *
365 * Returns result of operation - num_bytes is success else failure.
366 */
fc7b92fc 367int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa 368{
8daf3540 369 struct regmap *regmap = twl_get_regmap(mod_no);
a603a7fa 370 int ret;
a603a7fa 371
8daf3540 372 if (!regmap)
a603a7fa 373 return -EPERM;
8653be1a 374
8daf3540
PU
375 ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
376 value, num_bytes);
2473d25a
PU
377
378 if (ret)
379 pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
380 DRIVER_NAME, mod_no, reg, num_bytes);
381
382 return ret;
a603a7fa 383}
fc7b92fc 384EXPORT_SYMBOL(twl_i2c_read);
a603a7fa 385
3def927e
PU
386/**
387 * twl_regcache_bypass - Configure the regcache bypass for the regmap associated
388 * with the module
389 * @mod_no: module number
390 * @enable: Regcache bypass state
391 *
392 * Returns 0 else failure.
393 */
394int twl_set_regcache_bypass(u8 mod_no, bool enable)
395{
396 struct regmap *regmap = twl_get_regmap(mod_no);
397
398 if (!regmap)
399 return -EPERM;
400
401 regcache_cache_bypass(regmap, enable);
402
403 return 0;
404}
405EXPORT_SYMBOL(twl_set_regcache_bypass);
406
a603a7fa
DB
407/*----------------------------------------------------------------------*/
408
ca972d13
L
409/**
410 * twl_read_idcode_register - API to read the IDCODE register.
411 *
412 * Unlocks the IDCODE register and read the 32 bit value.
413 */
414static int twl_read_idcode_register(void)
415{
416 int err;
417
418 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
419 REG_UNLOCK_TEST_REG);
420 if (err) {
421 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
422 goto fail;
423 }
424
80a97ccd 425 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
ca972d13
L
426 REG_IDCODE_7_0, 4);
427 if (err) {
428 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
429 goto fail;
430 }
431
432 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
433 if (err)
434 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
435fail:
436 return err;
437}
438
439/**
440 * twl_get_type - API to get TWL Si type.
441 *
442 * Api to get the TWL Si type from IDCODE value.
443 */
444int twl_get_type(void)
445{
80a97ccd 446 return TWL_SIL_TYPE(twl_priv->twl_idcode);
ca972d13
L
447}
448EXPORT_SYMBOL_GPL(twl_get_type);
449
450/**
451 * twl_get_version - API to get TWL Si version.
452 *
453 * Api to get the TWL Si version from IDCODE value.
454 */
455int twl_get_version(void)
456{
80a97ccd 457 return TWL_SIL_REV(twl_priv->twl_idcode);
ca972d13
L
458}
459EXPORT_SYMBOL_GPL(twl_get_version);
460
2275c544
PU
461/**
462 * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
463 *
464 * Api to get the TWL HFCLK rate based on BOOT_CFG register.
465 */
466int twl_get_hfclk_rate(void)
467{
468 u8 ctrl;
469 int rate;
470
471 twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
472
473 switch (ctrl & 0x3) {
474 case HFCLK_FREQ_19p2_MHZ:
475 rate = 19200000;
476 break;
477 case HFCLK_FREQ_26_MHZ:
478 rate = 26000000;
479 break;
480 case HFCLK_FREQ_38p4_MHZ:
481 rate = 38400000;
482 break;
483 default:
484 pr_err("TWL4030: HFCLK is not configured\n");
485 rate = -EINVAL;
486 break;
487 }
488
489 return rate;
490}
491EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
492
dad759ff 493static struct device *
3c330279 494add_numbered_child(unsigned mod_no, const char *name, int num,
5725d66b
DB
495 void *pdata, unsigned pdata_len,
496 bool can_wakeup, int irq0, int irq1)
a603a7fa 497{
5725d66b 498 struct platform_device *pdev;
3c330279
PU
499 struct twl_client *twl;
500 int status, sid;
501
502 if (unlikely(mod_no >= twl_get_last_module())) {
503 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
504 return ERR_PTR(-EPERM);
505 }
80a97ccd
PU
506 sid = twl_priv->twl_map[mod_no].sid;
507 twl = &twl_priv->twl_modules[sid];
5725d66b 508
dad759ff 509 pdev = platform_device_alloc(name, num);
5725d66b
DB
510 if (!pdev) {
511 dev_dbg(&twl->client->dev, "can't alloc dev\n");
512 status = -ENOMEM;
513 goto err;
514 }
a603a7fa 515
5725d66b 516 pdev->dev.parent = &twl->client->dev;
a603a7fa 517
5725d66b
DB
518 if (pdata) {
519 status = platform_device_add_data(pdev, pdata, pdata_len);
520 if (status < 0) {
521 dev_dbg(&pdev->dev, "can't add platform_data\n");
a603a7fa
DB
522 goto err;
523 }
5725d66b 524 }
a603a7fa 525
5725d66b
DB
526 if (irq0) {
527 struct resource r[2] = {
528 { .start = irq0, .flags = IORESOURCE_IRQ, },
529 { .start = irq1, .flags = IORESOURCE_IRQ, },
530 };
a603a7fa 531
5725d66b 532 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
a603a7fa 533 if (status < 0) {
5725d66b 534 dev_dbg(&pdev->dev, "can't add irqs\n");
a603a7fa
DB
535 goto err;
536 }
537 }
538
5725d66b 539 status = platform_device_add(pdev);
17ffba6a
N
540 if (status == 0)
541 device_init_wakeup(&pdev->dev, can_wakeup);
a603a7fa 542
5725d66b
DB
543err:
544 if (status < 0) {
545 platform_device_put(pdev);
546 dev_err(&twl->client->dev, "can't add %s dev\n", name);
547 return ERR_PTR(status);
548 }
549 return &pdev->dev;
550}
a603a7fa 551
3c330279 552static inline struct device *add_child(unsigned mod_no, const char *name,
dad759ff
DB
553 void *pdata, unsigned pdata_len,
554 bool can_wakeup, int irq0, int irq1)
555{
3c330279 556 return add_numbered_child(mod_no, name, -1, pdata, pdata_len,
dad759ff
DB
557 can_wakeup, irq0, irq1);
558}
559
560static struct device *
561add_regulator_linked(int num, struct regulator_init_data *pdata,
562 struct regulator_consumer_supply *consumers,
521d8ec3 563 unsigned num_consumers, unsigned long features)
dad759ff 564{
63bfff4e
TK
565 struct twl_regulator_driver_data drv_data;
566
dad759ff
DB
567 /* regulator framework demands init_data ... */
568 if (!pdata)
569 return NULL;
570
b73eac78 571 if (consumers) {
dad759ff
DB
572 pdata->consumer_supplies = consumers;
573 pdata->num_consumer_supplies = num_consumers;
574 }
575
63bfff4e
TK
576 if (pdata->driver_data) {
577 /* If we have existing drv_data, just add the flags */
578 struct twl_regulator_driver_data *tmp;
579 tmp = pdata->driver_data;
580 tmp->features |= features;
581 } else {
582 /* add new driver data struct, used only during init */
583 drv_data.features = features;
584 drv_data.set_voltage = NULL;
585 drv_data.get_voltage = NULL;
586 drv_data.data = NULL;
587 pdata->driver_data = &drv_data;
588 }
521d8ec3 589
dad759ff 590 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
3c330279 591 return add_numbered_child(TWL_MODULE_PM_MASTER, "twl_reg", num,
dad759ff
DB
592 pdata, sizeof(*pdata), false, 0, 0);
593}
594
595static struct device *
521d8ec3
GG
596add_regulator(int num, struct regulator_init_data *pdata,
597 unsigned long features)
dad759ff 598{
521d8ec3 599 return add_regulator_linked(num, pdata, NULL, 0, features);
dad759ff
DB
600}
601
5725d66b
DB
602/*
603 * NOTE: We know the first 8 IRQs after pdata->base_irq are
604 * for the PIH, and the next are for the PWR_INT SIH, since
605 * that's how twl_init_irq() sets things up.
606 */
a603a7fa 607
dad759ff 608static int
9e178620
FB
609add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
610 unsigned long features)
5725d66b
DB
611{
612 struct device *child;
a603a7fa 613
f78959cf 614 if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) {
3c330279 615 child = add_child(TWL4030_MODULE_GPIO, "twl4030_gpio",
5725d66b 616 pdata->gpio, sizeof(*pdata->gpio),
9e178620 617 false, irq_base + GPIO_INTR_OFFSET, 0);
5725d66b
DB
618 if (IS_ERR(child))
619 return PTR_ERR(child);
a603a7fa
DB
620 }
621
f78959cf 622 if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) {
3c330279 623 child = add_child(TWL4030_MODULE_KEYPAD, "twl4030_keypad",
5725d66b 624 pdata->keypad, sizeof(*pdata->keypad),
9e178620 625 true, irq_base + KEYPAD_INTR_OFFSET, 0);
5725d66b
DB
626 if (IS_ERR(child))
627 return PTR_ERR(child);
a603a7fa
DB
628 }
629
24ae36f5
PU
630 if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc &&
631 twl_class_is_4030()) {
3c330279 632 child = add_child(TWL4030_MODULE_MADC, "twl4030_madc",
5725d66b 633 pdata->madc, sizeof(*pdata->madc),
9e178620 634 true, irq_base + MADC_INTR_OFFSET, 0);
5725d66b
DB
635 if (IS_ERR(child))
636 return PTR_ERR(child);
a603a7fa
DB
637 }
638
f78959cf 639 if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) {
a603a7fa 640 /*
5725d66b 641 * REVISIT platform_data here currently might expose the
a603a7fa 642 * "msecure" line ... but for now we just expect board
5725d66b 643 * setup to tell the chip "it's always ok to SET_TIME".
a603a7fa
DB
644 * Eventually, Linux might become more aware of such
645 * HW security concerns, and "least privilege".
646 */
3c330279 647 child = add_child(TWL_MODULE_RTC, "twl_rtc", NULL, 0,
9e178620 648 true, irq_base + RTC_INTR_OFFSET, 0);
5725d66b
DB
649 if (IS_ERR(child))
650 return PTR_ERR(child);
a603a7fa
DB
651 }
652
afc45898 653 if (IS_ENABLED(CONFIG_PWM_TWL)) {
3c330279 654 child = add_child(TWL_MODULE_PWM, "twl-pwm", NULL, 0,
afc45898
PU
655 false, 0, 0);
656 if (IS_ERR(child))
657 return PTR_ERR(child);
658 }
659
660 if (IS_ENABLED(CONFIG_PWM_TWL_LED)) {
3c330279 661 child = add_child(TWL_MODULE_LED, "twl-pwmled", NULL, 0,
48a364b7
TR
662 false, 0, 0);
663 if (IS_ERR(child))
664 return PTR_ERR(child);
665 }
666
f78959cf
TR
667 if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb &&
668 twl_class_is_4030()) {
f8ebdff0
RQ
669
670 static struct regulator_consumer_supply usb1v5 = {
671 .supply = "usb1v5",
672 };
673 static struct regulator_consumer_supply usb1v8 = {
674 .supply = "usb1v8",
675 };
ab37813f
N
676 static struct regulator_consumer_supply usb3v1[] = {
677 { .supply = "usb3v1" },
678 { .supply = "bci3v1" },
f8ebdff0
RQ
679 };
680
681 /* First add the regulators so that they can be used by transceiver */
f78959cf 682 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
f8ebdff0
RQ
683 /* this is a template that gets copied */
684 struct regulator_init_data usb_fixed = {
685 .constraints.valid_modes_mask =
686 REGULATOR_MODE_NORMAL
687 | REGULATOR_MODE_STANDBY,
688 .constraints.valid_ops_mask =
689 REGULATOR_CHANGE_MODE
690 | REGULATOR_CHANGE_STATUS,
691 };
692
693 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
521d8ec3
GG
694 &usb_fixed, &usb1v5, 1,
695 features);
f8ebdff0
RQ
696 if (IS_ERR(child))
697 return PTR_ERR(child);
698
699 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
521d8ec3
GG
700 &usb_fixed, &usb1v8, 1,
701 features);
f8ebdff0
RQ
702 if (IS_ERR(child))
703 return PTR_ERR(child);
704
705 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
ab37813f 706 &usb_fixed, usb3v1, 2,
521d8ec3 707 features);
f8ebdff0
RQ
708 if (IS_ERR(child))
709 return PTR_ERR(child);
710
711 }
712
3c330279 713 child = add_child(TWL_MODULE_USB, "twl4030_usb",
2d86ad37 714 pdata->usb, sizeof(*pdata->usb), true,
5725d66b 715 /* irq0 = USB_PRES, irq1 = USB */
9e178620
FB
716 irq_base + USB_PRES_INTR_OFFSET,
717 irq_base + USB_INTR_OFFSET);
f8ebdff0 718
5725d66b
DB
719 if (IS_ERR(child))
720 return PTR_ERR(child);
dad759ff
DB
721
722 /* we need to connect regulators to this transceiver */
f78959cf 723 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) {
1b65fa84
MB
724 usb1v5.dev_name = dev_name(child);
725 usb1v8.dev_name = dev_name(child);
ab37813f 726 usb3v1[0].dev_name = dev_name(child);
f8ebdff0 727 }
dad759ff 728 }
f78959cf
TR
729 if (IS_ENABLED(CONFIG_TWL6030_USB) && pdata->usb &&
730 twl_class_is_6030()) {
e70357e3 731
521d8ec3
GG
732 static struct regulator_consumer_supply usb3v3;
733 int regulator;
e70357e3 734
f78959cf 735 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
e70357e3
HH
736 /* this is a template that gets copied */
737 struct regulator_init_data usb_fixed = {
738 .constraints.valid_modes_mask =
739 REGULATOR_MODE_NORMAL
740 | REGULATOR_MODE_STANDBY,
741 .constraints.valid_ops_mask =
742 REGULATOR_CHANGE_MODE
743 | REGULATOR_CHANGE_STATUS,
744 };
745
89ce43fb 746 if (features & TWL6032_SUBCLASS) {
521d8ec3 747 usb3v3.supply = "ldousb";
89ce43fb 748 regulator = TWL6032_REG_LDOUSB;
521d8ec3
GG
749 } else {
750 usb3v3.supply = "vusb";
751 regulator = TWL6030_REG_VUSB;
752 }
753 child = add_regulator_linked(regulator, &usb_fixed,
754 &usb3v3, 1,
755 features);
e70357e3
HH
756 if (IS_ERR(child))
757 return PTR_ERR(child);
758 }
759
521d8ec3
GG
760 pdata->usb->features = features;
761
3c330279 762 child = add_child(TWL_MODULE_USB, "twl6030_usb",
2d86ad37 763 pdata->usb, sizeof(*pdata->usb), true,
e70357e3 764 /* irq1 = VBUS_PRES, irq0 = USB ID */
9e178620
FB
765 irq_base + USBOTG_INTR_OFFSET,
766 irq_base + USB_PRES_INTR_OFFSET);
e70357e3
HH
767
768 if (IS_ERR(child))
769 return PTR_ERR(child);
770 /* we need to connect regulators to this transceiver */
f78959cf 771 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child)
1b65fa84 772 usb3v3.dev_name = dev_name(child);
f78959cf
TR
773 } else if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) &&
774 twl_class_is_6030()) {
89ce43fb
GG
775 if (features & TWL6032_SUBCLASS)
776 child = add_regulator(TWL6032_REG_LDOUSB,
521d8ec3
GG
777 pdata->ldousb, features);
778 else
779 child = add_regulator(TWL6030_REG_VUSB,
780 pdata->vusb, features);
e70357e3 781
521d8ec3
GG
782 if (IS_ERR(child))
783 return PTR_ERR(child);
e70357e3 784 }
dad759ff 785
f78959cf 786 if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) {
3c330279
PU
787 child = add_child(TWL_MODULE_PM_RECEIVER, "twl4030_wdt", NULL,
788 0, false, 0, 0);
80e45b1e 789 if (IS_ERR(child))
9c3664dd
FB
790 return PTR_ERR(child);
791 }
792
f78959cf 793 if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) {
3c330279
PU
794 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_pwrbutton",
795 NULL, 0, true, irq_base + 8 + 0, 0);
9c3664dd 796 if (IS_ERR(child))
80e45b1e
TK
797 return PTR_ERR(child);
798 }
799
f78959cf
TR
800 if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio &&
801 twl_class_is_4030()) {
3c330279 802 child = add_child(TWL4030_MODULE_AUDIO_VOICE, "twl4030-audio",
4ae6df5e 803 pdata->audio, sizeof(*pdata->audio),
d62abe56
MLC
804 false, 0, 0);
805 if (IS_ERR(child))
806 return PTR_ERR(child);
807 }
808
9da66539 809 /* twl4030 regulators */
f78959cf 810 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) {
521d8ec3
GG
811 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
812 features);
dad759ff
DB
813 if (IS_ERR(child))
814 return PTR_ERR(child);
ab4abe05 815
521d8ec3
GG
816 child = add_regulator(TWL4030_REG_VIO, pdata->vio,
817 features);
ab4abe05
JKS
818 if (IS_ERR(child))
819 return PTR_ERR(child);
820
521d8ec3
GG
821 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
822 features);
ab4abe05
JKS
823 if (IS_ERR(child))
824 return PTR_ERR(child);
825
521d8ec3
GG
826 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
827 features);
ab4abe05
JKS
828 if (IS_ERR(child))
829 return PTR_ERR(child);
dad759ff 830
521d8ec3
GG
831 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
832 features);
dad759ff
DB
833 if (IS_ERR(child))
834 return PTR_ERR(child);
835
521d8ec3
GG
836 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
837 features);
dad759ff
DB
838 if (IS_ERR(child))
839 return PTR_ERR(child);
840
841 child = add_regulator((features & TWL4030_VAUX2)
842 ? TWL4030_REG_VAUX2_4030
843 : TWL4030_REG_VAUX2,
521d8ec3 844 pdata->vaux2, features);
dad759ff
DB
845 if (IS_ERR(child))
846 return PTR_ERR(child);
ab4abe05 847
521d8ec3
GG
848 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
849 features);
ab4abe05
JKS
850 if (IS_ERR(child))
851 return PTR_ERR(child);
852
521d8ec3
GG
853 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
854 features);
ab4abe05
JKS
855 if (IS_ERR(child))
856 return PTR_ERR(child);
857
521d8ec3
GG
858 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
859 features);
ab4abe05
JKS
860 if (IS_ERR(child))
861 return PTR_ERR(child);
dad759ff
DB
862 }
863
dad759ff 864 /* maybe add LDOs that are omitted on cost-reduced parts */
f78959cf 865 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET)
9da66539 866 && twl_class_is_4030()) {
521d8ec3
GG
867 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
868 features);
dad759ff
DB
869 if (IS_ERR(child))
870 return PTR_ERR(child);
dad759ff 871
521d8ec3
GG
872 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
873 features);
dad759ff
DB
874 if (IS_ERR(child))
875 return PTR_ERR(child);
876
521d8ec3
GG
877 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
878 features);
dad759ff
DB
879 if (IS_ERR(child))
880 return PTR_ERR(child);
881
521d8ec3
GG
882 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
883 features);
dad759ff
DB
884 if (IS_ERR(child))
885 return PTR_ERR(child);
886
521d8ec3
GG
887 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
888 features);
dad759ff
DB
889 if (IS_ERR(child))
890 return PTR_ERR(child);
891
521d8ec3
GG
892 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
893 features);
dad759ff
DB
894 if (IS_ERR(child))
895 return PTR_ERR(child);
a603a7fa
DB
896 }
897
9da66539 898 /* twl6030 regulators */
f78959cf 899 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030() &&
89ce43fb 900 !(features & TWL6032_SUBCLASS)) {
34a38440
TK
901 child = add_regulator(TWL6030_REG_VDD1, pdata->vdd1,
902 features);
903 if (IS_ERR(child))
904 return PTR_ERR(child);
905
906 child = add_regulator(TWL6030_REG_VDD2, pdata->vdd2,
907 features);
908 if (IS_ERR(child))
909 return PTR_ERR(child);
910
911 child = add_regulator(TWL6030_REG_VDD3, pdata->vdd3,
912 features);
913 if (IS_ERR(child))
914 return PTR_ERR(child);
915
46eda3e9
PU
916 child = add_regulator(TWL6030_REG_V1V8, pdata->v1v8,
917 features);
918 if (IS_ERR(child))
919 return PTR_ERR(child);
920
921 child = add_regulator(TWL6030_REG_V2V1, pdata->v2v1,
922 features);
923 if (IS_ERR(child))
924 return PTR_ERR(child);
925
521d8ec3
GG
926 child = add_regulator(TWL6030_REG_VMMC, pdata->vmmc,
927 features);
928 if (IS_ERR(child))
929 return PTR_ERR(child);
930
931 child = add_regulator(TWL6030_REG_VPP, pdata->vpp,
932 features);
933 if (IS_ERR(child))
934 return PTR_ERR(child);
935
936 child = add_regulator(TWL6030_REG_VUSIM, pdata->vusim,
937 features);
938 if (IS_ERR(child))
939 return PTR_ERR(child);
940
941 child = add_regulator(TWL6030_REG_VCXIO, pdata->vcxio,
942 features);
943 if (IS_ERR(child))
944 return PTR_ERR(child);
945
946 child = add_regulator(TWL6030_REG_VDAC, pdata->vdac,
947 features);
948 if (IS_ERR(child))
949 return PTR_ERR(child);
950
951 child = add_regulator(TWL6030_REG_VAUX1_6030, pdata->vaux1,
952 features);
953 if (IS_ERR(child))
954 return PTR_ERR(child);
955
956 child = add_regulator(TWL6030_REG_VAUX2_6030, pdata->vaux2,
957 features);
958 if (IS_ERR(child))
959 return PTR_ERR(child);
960
961 child = add_regulator(TWL6030_REG_VAUX3_6030, pdata->vaux3,
962 features);
963 if (IS_ERR(child))
964 return PTR_ERR(child);
965
966 child = add_regulator(TWL6030_REG_CLK32KG, pdata->clk32kg,
967 features);
968 if (IS_ERR(child))
969 return PTR_ERR(child);
970 }
971
972 /* 6030 and 6025 share this regulator */
f78959cf 973 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030()) {
521d8ec3
GG
974 child = add_regulator(TWL6030_REG_VANA, pdata->vana,
975 features);
976 if (IS_ERR(child))
977 return PTR_ERR(child);
978 }
979
89ce43fb 980 /* twl6032 regulators */
f78959cf 981 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030() &&
89ce43fb
GG
982 (features & TWL6032_SUBCLASS)) {
983 child = add_regulator(TWL6032_REG_LDO5, pdata->ldo5,
521d8ec3 984 features);
9da66539
RN
985 if (IS_ERR(child))
986 return PTR_ERR(child);
987
89ce43fb 988 child = add_regulator(TWL6032_REG_LDO1, pdata->ldo1,
521d8ec3 989 features);
9da66539
RN
990 if (IS_ERR(child))
991 return PTR_ERR(child);
992
89ce43fb 993 child = add_regulator(TWL6032_REG_LDO7, pdata->ldo7,
521d8ec3 994 features);
9da66539
RN
995 if (IS_ERR(child))
996 return PTR_ERR(child);
997
89ce43fb 998 child = add_regulator(TWL6032_REG_LDO6, pdata->ldo6,
521d8ec3 999 features);
9da66539
RN
1000 if (IS_ERR(child))
1001 return PTR_ERR(child);
1002
89ce43fb 1003 child = add_regulator(TWL6032_REG_LDOLN, pdata->ldoln,
521d8ec3 1004 features);
9da66539
RN
1005 if (IS_ERR(child))
1006 return PTR_ERR(child);
1007
89ce43fb 1008 child = add_regulator(TWL6032_REG_LDO2, pdata->ldo2,
521d8ec3 1009 features);
9da66539
RN
1010 if (IS_ERR(child))
1011 return PTR_ERR(child);
1012
89ce43fb 1013 child = add_regulator(TWL6032_REG_LDO4, pdata->ldo4,
521d8ec3 1014 features);
9da66539
RN
1015 if (IS_ERR(child))
1016 return PTR_ERR(child);
1017
89ce43fb 1018 child = add_regulator(TWL6032_REG_LDO3, pdata->ldo3,
521d8ec3 1019 features);
9da66539
RN
1020 if (IS_ERR(child))
1021 return PTR_ERR(child);
1022
89ce43fb 1023 child = add_regulator(TWL6032_REG_SMPS3, pdata->smps3,
521d8ec3 1024 features);
9da66539
RN
1025 if (IS_ERR(child))
1026 return PTR_ERR(child);
8e6de4a3 1027
89ce43fb 1028 child = add_regulator(TWL6032_REG_SMPS4, pdata->smps4,
521d8ec3 1029 features);
8e6de4a3
B
1030 if (IS_ERR(child))
1031 return PTR_ERR(child);
521d8ec3 1032
89ce43fb 1033 child = add_regulator(TWL6032_REG_VIO, pdata->vio6025,
521d8ec3
GG
1034 features);
1035 if (IS_ERR(child))
1036 return PTR_ERR(child);
1037
9da66539
RN
1038 }
1039
f78959cf 1040 if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci &&
11c39c4b 1041 !(features & (TPS_SUBSET | TWL5031))) {
3c330279 1042 child = add_child(TWL_MODULE_MAIN_CHARGE, "twl4030_bci",
11c39c4b
GI
1043 pdata->bci, sizeof(*pdata->bci), false,
1044 /* irq0 = CHG_PRES, irq1 = BCI */
9e178620
FB
1045 irq_base + BCI_PRES_INTR_OFFSET,
1046 irq_base + BCI_INTR_OFFSET);
11c39c4b
GI
1047 if (IS_ERR(child))
1048 return PTR_ERR(child);
1049 }
1050
637d6895
FV
1051 if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power) {
1052 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_power",
1053 pdata->power, sizeof(*pdata->power), false,
1054 0, 0);
1055 if (IS_ERR(child))
1056 return PTR_ERR(child);
1057 }
1058
5725d66b 1059 return 0;
a603a7fa
DB
1060}
1061
1062/*----------------------------------------------------------------------*/
1063
1064/*
1065 * These three functions initialize the on-chip clock framework,
1066 * letting it generate the right frequencies for USB, MADC, and
1067 * other purposes.
1068 */
1069static inline int __init protect_pm_master(void)
1070{
1071 int e = 0;
1072
d640e757
PU
1073 e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
1074 TWL4030_PM_MASTER_PROTECT_KEY);
a603a7fa
DB
1075 return e;
1076}
1077
1078static inline int __init unprotect_pm_master(void)
1079{
1080 int e = 0;
1081
d640e757
PU
1082 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
1083 TWL4030_PM_MASTER_PROTECT_KEY);
1084 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
1085 TWL4030_PM_MASTER_PROTECT_KEY);
49e6f87e 1086
a603a7fa
DB
1087 return e;
1088}
1089
38a68496
IK
1090static void clocks_init(struct device *dev,
1091 struct twl4030_clock_init_data *clock)
a603a7fa
DB
1092{
1093 int e = 0;
1094 struct clk *osc;
1095 u32 rate;
1096 u8 ctrl = HFCLK_FREQ_26_MHZ;
1097
defa6be1 1098 osc = clk_get(dev, "fck");
a603a7fa 1099 if (IS_ERR(osc)) {
fc7b92fc 1100 printk(KERN_WARNING "Skipping twl internal clock init and "
a603a7fa
DB
1101 "using bootloader value (unknown osc rate)\n");
1102 return;
1103 }
1104
1105 rate = clk_get_rate(osc);
1106 clk_put(osc);
1107
1108 switch (rate) {
1109 case 19200000:
1110 ctrl = HFCLK_FREQ_19p2_MHZ;
1111 break;
1112 case 26000000:
1113 ctrl = HFCLK_FREQ_26_MHZ;
1114 break;
1115 case 38400000:
1116 ctrl = HFCLK_FREQ_38p4_MHZ;
1117 break;
1118 }
1119
1120 ctrl |= HIGH_PERF_SQ;
38a68496
IK
1121 if (clock && clock->ck32k_lowpwr_enable)
1122 ctrl |= CK32K_LOWPWR_EN;
1123
a603a7fa
DB
1124 e |= unprotect_pm_master();
1125 /* effect->MADC+USB ck en */
fc7b92fc 1126 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
a603a7fa
DB
1127 e |= protect_pm_master();
1128
1129 if (e < 0)
1130 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
1131}
1132
1133/*----------------------------------------------------------------------*/
1134
a603a7fa 1135
fc7b92fc 1136static int twl_remove(struct i2c_client *client)
a603a7fa 1137{
364cedb2 1138 unsigned i, num_slaves;
a30d46c0 1139 int status;
a603a7fa 1140
6dd810b5 1141 if (twl_class_is_4030())
e8deb28c 1142 status = twl4030_exit_irq();
6dd810b5 1143 else
e8deb28c
B
1144 status = twl6030_exit_irq();
1145
a30d46c0
DB
1146 if (status < 0)
1147 return status;
a603a7fa 1148
6dd810b5 1149 num_slaves = twl_get_num_slaves();
364cedb2 1150 for (i = 0; i < num_slaves; i++) {
80a97ccd 1151 struct twl_client *twl = &twl_priv->twl_modules[i];
a603a7fa
DB
1152
1153 if (twl->client && twl->client != client)
1154 i2c_unregister_device(twl->client);
80a97ccd 1155 twl->client = NULL;
a603a7fa 1156 }
80a97ccd 1157 twl_priv->ready = false;
a603a7fa
DB
1158 return 0;
1159}
1160
ec1a07b3 1161/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
f791be49 1162static int
fc7b92fc 1163twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
a603a7fa 1164{
334a41ce 1165 struct twl4030_platform_data *pdata = dev_get_platdata(&client->dev);
aeb5032b 1166 struct device_node *node = client->dev.of_node;
defa6be1 1167 struct platform_device *pdev;
2473d25a 1168 struct regmap_config *twl_regmap_config;
ec1a07b3
BC
1169 int irq_base = 0;
1170 int status;
364cedb2 1171 unsigned i, num_slaves;
aeb5032b 1172
7e2e6c57
PU
1173 if (!node && !pdata) {
1174 dev_err(&client->dev, "no platform data\n");
1175 return -EINVAL;
1176 }
1177
80a97ccd 1178 if (twl_priv) {
6382a061
PU
1179 dev_dbg(&client->dev, "only one instance of %s allowed\n",
1180 DRIVER_NAME);
1181 return -EBUSY;
1182 }
1183
defa6be1
TL
1184 pdev = platform_device_alloc(DRIVER_NAME, -1);
1185 if (!pdev) {
1186 dev_err(&client->dev, "can't alloc pdev\n");
1187 return -ENOMEM;
1188 }
1189
1190 status = platform_device_add(pdev);
1191 if (status) {
1192 platform_device_put(pdev);
1193 return status;
1194 }
1195
a603a7fa
DB
1196 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1197 dev_dbg(&client->dev, "can't talk I2C?\n");
defa6be1
TL
1198 status = -EIO;
1199 goto free;
a603a7fa
DB
1200 }
1201
80a97ccd
PU
1202 twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
1203 GFP_KERNEL);
1204 if (!twl_priv) {
1205 status = -ENOMEM;
1206 goto free;
1207 }
1208
364cedb2 1209 if ((id->driver_data) & TWL6030_CLASS) {
80a97ccd
PU
1210 twl_priv->twl_id = TWL6030_CLASS_ID;
1211 twl_priv->twl_map = &twl6030_map[0];
89ce43fb
GG
1212 /* The charger base address is different in twl6032 */
1213 if ((id->driver_data) & TWL6032_SUBCLASS)
80a97ccd 1214 twl_priv->twl_map[TWL_MODULE_MAIN_CHARGE].base =
89ce43fb 1215 TWL6032_BASEADD_CHARGER;
2473d25a 1216 twl_regmap_config = twl6030_regmap_config;
364cedb2 1217 } else {
80a97ccd
PU
1218 twl_priv->twl_id = TWL4030_CLASS_ID;
1219 twl_priv->twl_map = &twl4030_map[0];
2473d25a 1220 twl_regmap_config = twl4030_regmap_config;
6dd810b5
PU
1221 }
1222
1223 num_slaves = twl_get_num_slaves();
80a97ccd
PU
1224 twl_priv->twl_modules = devm_kzalloc(&client->dev,
1225 sizeof(struct twl_client) * num_slaves,
1226 GFP_KERNEL);
1227 if (!twl_priv->twl_modules) {
6dd810b5
PU
1228 status = -ENOMEM;
1229 goto free;
364cedb2
PU
1230 }
1231
1232 for (i = 0; i < num_slaves; i++) {
80a97ccd 1233 struct twl_client *twl = &twl_priv->twl_modules[i];
a603a7fa 1234
ec1a07b3 1235 if (i == 0) {
a603a7fa 1236 twl->client = client;
ec1a07b3 1237 } else {
a603a7fa 1238 twl->client = i2c_new_dummy(client->adapter,
2473d25a 1239 client->addr + i);
a603a7fa 1240 if (!twl->client) {
a8643430 1241 dev_err(&client->dev,
a603a7fa
DB
1242 "can't attach client %d\n", i);
1243 status = -ENOMEM;
1244 goto fail;
1245 }
a603a7fa 1246 }
2473d25a
PU
1247
1248 twl->regmap = devm_regmap_init_i2c(twl->client,
1249 &twl_regmap_config[i]);
1250 if (IS_ERR(twl->regmap)) {
1251 status = PTR_ERR(twl->regmap);
1252 dev_err(&client->dev,
1253 "Failed to allocate regmap %d, err: %d\n", i,
1254 status);
1255 goto fail;
1256 }
a603a7fa 1257 }
ec1a07b3 1258
80a97ccd 1259 twl_priv->ready = true;
a603a7fa
DB
1260
1261 /* setup clock framework */
7e2e6c57 1262 clocks_init(&pdev->dev, pdata ? pdata->clock : NULL);
a603a7fa 1263
ca972d13 1264 /* read TWL IDCODE Register */
80a97ccd 1265 if (twl_class_is_4030()) {
ec1a07b3
BC
1266 status = twl_read_idcode_register();
1267 WARN(status < 0, "Error: reading twl_idcode register value\n");
ca972d13
L
1268 }
1269
a603a7fa 1270 /* Maybe init the T2 Interrupt subsystem */
9e178620 1271 if (client->irq) {
e8deb28c
B
1272 if (twl_class_is_4030()) {
1273 twl4030_init_chip_irq(id->name);
78518ffa 1274 irq_base = twl4030_init_irq(&client->dev, client->irq);
e8deb28c 1275 } else {
78518ffa 1276 irq_base = twl6030_init_irq(&client->dev, client->irq);
e8deb28c
B
1277 }
1278
78518ffa
BC
1279 if (irq_base < 0) {
1280 status = irq_base;
a30d46c0 1281 goto fail;
78518ffa 1282 }
a603a7fa
DB
1283 }
1284
ec1a07b3
BC
1285 /*
1286 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
a29aaf55
MS
1287 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1288 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1289 */
a29aaf55 1290 if (twl_class_is_4030()) {
ec1a07b3
BC
1291 u8 temp;
1292
a29aaf55
MS
1293 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1294 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
ec1a07b3 1295 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
a29aaf55
MS
1296 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1297 }
1298
aeb5032b
BC
1299 if (node)
1300 status = of_platform_populate(node, NULL, NULL, &client->dev);
e581238f 1301 else
9e178620 1302 status = add_children(pdata, irq_base, id->driver_data);
aeb5032b 1303
a603a7fa
DB
1304fail:
1305 if (status < 0)
fc7b92fc 1306 twl_remove(client);
defa6be1
TL
1307free:
1308 if (status < 0)
1309 platform_device_unregister(pdev);
ec1a07b3 1310
a603a7fa
DB
1311 return status;
1312}
1313
fc7b92fc 1314static const struct i2c_device_id twl_ids[] = {
dad759ff
DB
1315 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1316 { "twl5030", 0 }, /* T2 updated */
1920a61e 1317 { "twl5031", TWL5031 }, /* TWL5030 updated */
dad759ff
DB
1318 { "tps65950", 0 }, /* catalog version of twl5030 */
1319 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1320 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
59dead5a
OD
1321 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1322 and vibrator. Charger in USB module*/
e8deb28c 1323 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
89ce43fb 1324 { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
a603a7fa
DB
1325 { /* end of list */ },
1326};
fc7b92fc 1327MODULE_DEVICE_TABLE(i2c, twl_ids);
a603a7fa
DB
1328
1329/* One Client Driver , 4 Clients */
fc7b92fc 1330static struct i2c_driver twl_driver = {
a603a7fa 1331 .driver.name = DRIVER_NAME,
fc7b92fc
B
1332 .id_table = twl_ids,
1333 .probe = twl_probe,
1334 .remove = twl_remove,
a603a7fa
DB
1335};
1336
032fa16d 1337module_i2c_driver(twl_driver);
a603a7fa
DB
1338
1339MODULE_AUTHOR("Texas Instruments, Inc.");
fc7b92fc 1340MODULE_DESCRIPTION("I2C Core interface for TWL");
a603a7fa 1341MODULE_LICENSE("GPL");
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