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mfd: twl6040: Check clk_prepare_enable() return value in twl6040_power()
[deliverable/linux.git] / drivers / mfd / twl6040.c
CommitLineData
f19b2823
MLC		 1/*
2 * MFD driver for TWL6040 audio device
3 *
4 * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
5 * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
6 * Peter Ujfalusi <peter.ujfalusi@ti.com>
7 *
8 * Copyright: (C) 2011 Texas Instruments, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/module.h>
27#include <linux/types.h>
28#include <linux/slab.h>
29#include <linux/kernel.h>
5af7df6b 30#include <linux/err.h>
f19b2823 31#include <linux/platform_device.h>
37e13cec
PU		 32#include <linux/of.h>
33#include <linux/of_irq.h>
34#include <linux/of_gpio.h>
35#include <linux/of_platform.h>
f19b2823
MLC		 36#include <linux/gpio.h>
37#include <linux/delay.h>
8eaeb939
PU		 38#include <linux/i2c.h>
39#include <linux/regmap.h>
f19b2823
MLC		 40#include <linux/mfd/core.h>
41#include <linux/mfd/twl6040.h>
5af7df6b 42#include <linux/regulator/consumer.h>
f19b2823 43
31b402e3 44#define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
5af7df6b 45#define TWL6040_NUM_SUPPLIES (2)
31b402e3 46
de1e23f8 47static const struct reg_default twl6040_defaults[] = {
c7f9129d
PU		 48 { 0x01, 0x4B }, /* REG_ASICID (ro) */
49 { 0x02, 0x00 }, /* REG_ASICREV (ro) */
50 { 0x03, 0x00 }, /* REG_INTID */
51 { 0x04, 0x00 }, /* REG_INTMR */
52 { 0x05, 0x00 }, /* REG_NCPCTRL */
53 { 0x06, 0x00 }, /* REG_LDOCTL */
54 { 0x07, 0x60 }, /* REG_HPPLLCTL */
55 { 0x08, 0x00 }, /* REG_LPPLLCTL */
56 { 0x09, 0x4A }, /* REG_LPPLLDIV */
57 { 0x0A, 0x00 }, /* REG_AMICBCTL */
58 { 0x0B, 0x00 }, /* REG_DMICBCTL */
59 { 0x0C, 0x00 }, /* REG_MICLCTL */
60 { 0x0D, 0x00 }, /* REG_MICRCTL */
61 { 0x0E, 0x00 }, /* REG_MICGAIN */
62 { 0x0F, 0x1B }, /* REG_LINEGAIN */
63 { 0x10, 0x00 }, /* REG_HSLCTL */
64 { 0x11, 0x00 }, /* REG_HSRCTL */
65 { 0x12, 0x00 }, /* REG_HSGAIN */
66 { 0x13, 0x00 }, /* REG_EARCTL */
67 { 0x14, 0x00 }, /* REG_HFLCTL */
68 { 0x15, 0x00 }, /* REG_HFLGAIN */
69 { 0x16, 0x00 }, /* REG_HFRCTL */
70 { 0x17, 0x00 }, /* REG_HFRGAIN */
71 { 0x18, 0x00 }, /* REG_VIBCTLL */
72 { 0x19, 0x00 }, /* REG_VIBDATL */
73 { 0x1A, 0x00 }, /* REG_VIBCTLR */
74 { 0x1B, 0x00 }, /* REG_VIBDATR */
75 { 0x1C, 0x00 }, /* REG_HKCTL1 */
76 { 0x1D, 0x00 }, /* REG_HKCTL2 */
77 { 0x1E, 0x00 }, /* REG_GPOCTL */
78 { 0x1F, 0x00 }, /* REG_ALB */
79 { 0x20, 0x00 }, /* REG_DLB */
80 /* 0x28, REG_TRIM1 */
81 /* 0x29, REG_TRIM2 */
82 /* 0x2A, REG_TRIM3 */
83 /* 0x2B, REG_HSOTRIM */
84 /* 0x2C, REG_HFOTRIM */
85 { 0x2D, 0x08 }, /* REG_ACCCTL */
86 { 0x2E, 0x00 }, /* REG_STATUS (ro) */
87};
88
8019ff6c 89static struct reg_sequence twl6040_patch[] = {
11e38e11
PU		 90 /*
91 * Select I2C bus access to dual access registers
92 * Interrupt register is cleared on read
93 * Select fast mode for i2c (400KHz)
94 */
95 { TWL6040_REG_ACCCTL,
96 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
c7f9129d
PU		 97};
98
99
df04b624 100static bool twl6040_has_vibra(struct device_node *node)
ca2cad6a 101{
ca2cad6a
SO		 102#ifdef CONFIG_OF
103 if (of_find_node_by_name(node, "vibra"))
104 return true;
105#endif
ca2cad6a
SO		 106 return false;
107}
108
f19b2823
MLC		 109int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
110{
111 int ret;
8eaeb939 112 unsigned int val;
f19b2823 113
c6f39257
MB		 114 ret = regmap_read(twl6040->regmap, reg, &val);
115 if (ret < 0)
116 return ret;
f19b2823
MLC		 117
118 return val;
119}
120EXPORT_SYMBOL(twl6040_reg_read);
121
122int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
123{
124 int ret;
125
8eaeb939 126 ret = regmap_write(twl6040->regmap, reg, val);
f19b2823
MLC		 127
128 return ret;
129}
130EXPORT_SYMBOL(twl6040_reg_write);
131
132int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
133{
c600040f 134 return regmap_update_bits(twl6040->regmap, reg, mask, mask);
f19b2823
MLC		 135}
136EXPORT_SYMBOL(twl6040_set_bits);
137
138int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
139{
c600040f 140 return regmap_update_bits(twl6040->regmap, reg, mask, 0);
f19b2823
MLC		 141}
142EXPORT_SYMBOL(twl6040_clear_bits);
143
144/* twl6040 codec manual power-up sequence */
f9be1343 145static int twl6040_power_up_manual(struct twl6040 *twl6040)
f19b2823
MLC		 146{
147 u8 ldoctl, ncpctl, lppllctl;
148 int ret;
149
150 /* enable high-side LDO, reference system and internal oscillator */
151 ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
152 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
153 if (ret)
154 return ret;
155 usleep_range(10000, 10500);
156
157 /* enable negative charge pump */
158 ncpctl = TWL6040_NCPENA;
159 ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
160 if (ret)
161 goto ncp_err;
162 usleep_range(1000, 1500);
163
164 /* enable low-side LDO */
165 ldoctl |= TWL6040_LSLDOENA;
166 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
167 if (ret)
168 goto lsldo_err;
169 usleep_range(1000, 1500);
170
171 /* enable low-power PLL */
172 lppllctl = TWL6040_LPLLENA;
173 ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
174 if (ret)
175 goto lppll_err;
176 usleep_range(5000, 5500);
177
178 /* disable internal oscillator */
179 ldoctl &= ~TWL6040_OSCENA;
180 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
181 if (ret)
182 goto osc_err;
183
184 return 0;
185
186osc_err:
187 lppllctl &= ~TWL6040_LPLLENA;
188 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
189lppll_err:
190 ldoctl &= ~TWL6040_LSLDOENA;
191 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
192lsldo_err:
193 ncpctl &= ~TWL6040_NCPENA;
194 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
195ncp_err:
196 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
197 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
198
f9be1343 199 dev_err(twl6040->dev, "manual power-up failed\n");
f19b2823
MLC		 200 return ret;
201}
202
203/* twl6040 manual power-down sequence */
f9be1343 204static void twl6040_power_down_manual(struct twl6040 *twl6040)
f19b2823
MLC		 205{
206 u8 ncpctl, ldoctl, lppllctl;
207
208 ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
209 ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
210 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
211
212 /* enable internal oscillator */
213 ldoctl |= TWL6040_OSCENA;
214 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
215 usleep_range(1000, 1500);
216
217 /* disable low-power PLL */
218 lppllctl &= ~TWL6040_LPLLENA;
219 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
220
221 /* disable low-side LDO */
222 ldoctl &= ~TWL6040_LSLDOENA;
223 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
224
225 /* disable negative charge pump */
226 ncpctl &= ~TWL6040_NCPENA;
227 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
228
229 /* disable high-side LDO, reference system and internal oscillator */
230 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
231 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
232}
233
1ac96265 234static irqreturn_t twl6040_readyint_handler(int irq, void *data)
f19b2823
MLC		 235{
236 struct twl6040 *twl6040 = data;
f19b2823 237
1ac96265 238 complete(&twl6040->ready);
f19b2823 239
1ac96265
PU		 240 return IRQ_HANDLED;
241}
f19b2823 242
1ac96265
PU		 243static irqreturn_t twl6040_thint_handler(int irq, void *data)
244{
245 struct twl6040 *twl6040 = data;
246 u8 status;
247
248 status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
249 if (status & TWL6040_TSHUTDET) {
250 dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
251 twl6040_power(twl6040, 0);
252 } else {
253 dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
254 twl6040_power(twl6040, 1);
f19b2823
MLC		 255 }
256
257 return IRQ_HANDLED;
258}
259
f9be1343 260static int twl6040_power_up_automatic(struct twl6040 *twl6040)
f19b2823
MLC		 261{
262 int time_left;
f9be1343
PU		 263
264 gpio_set_value(twl6040->audpwron, 1);
f19b2823
MLC		 265
266 time_left = wait_for_completion_timeout(&twl6040->ready,
267 msecs_to_jiffies(144));
268 if (!time_left) {
f9be1343
PU		 269 u8 intid;
270
271 dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
f19b2823
MLC		 272 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
273 if (!(intid & TWL6040_READYINT)) {
f9be1343
PU		 274 dev_err(twl6040->dev, "automatic power-up failed\n");
275 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 276 return -ETIMEDOUT;
277 }
278 }
279
280 return 0;
281}
282
283int twl6040_power(struct twl6040 *twl6040, int on)
284{
f19b2823
MLC		 285 int ret = 0;
286
287 mutex_lock(&twl6040->mutex);
288
289 if (on) {
290 /* already powered-up */
291 if (twl6040->power_count++)
292 goto out;
293
32852bca
JMC		 294 ret = clk_prepare_enable(twl6040->clk32k);
295 if (ret) {
296 twl6040->power_count = 0;
297 goto out;
298 }
68bab866 299
c7f9129d
PU		 300 /* Allow writes to the chip */
301 regcache_cache_only(twl6040->regmap, false);
302
f9be1343
PU		 303 if (gpio_is_valid(twl6040->audpwron)) {
304 /* use automatic power-up sequence */
305 ret = twl6040_power_up_automatic(twl6040);
f19b2823 306 if (ret) {
f19b2823
MLC		 307 twl6040->power_count = 0;
308 goto out;
309 }
310 } else {
311 /* use manual power-up sequence */
f9be1343 312 ret = twl6040_power_up_manual(twl6040);
f19b2823 313 if (ret) {
f19b2823
MLC		 314 twl6040->power_count = 0;
315 goto out;
316 }
317 }
c7f9129d
PU		 318
319 /* Sync with the HW */
320 regcache_sync(twl6040->regmap);
321
cfb7a33b
PU		 322 /* Default PLL configuration after power up */
323 twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
f19b2823 324 twl6040->sysclk = 19200000;
f8447d6c 325 twl6040->mclk = 32768;
f19b2823
MLC		 326 } else {
327 /* already powered-down */
328 if (!twl6040->power_count) {
2d7c957e 329 dev_err(twl6040->dev,
f19b2823
MLC		 330 "device is already powered-off\n");
331 ret = -EPERM;
332 goto out;
333 }
334
335 if (--twl6040->power_count)
336 goto out;
337
f9be1343 338 if (gpio_is_valid(twl6040->audpwron)) {
f19b2823 339 /* use AUDPWRON line */
f9be1343 340 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 341
342 /* power-down sequence latency */
343 usleep_range(500, 700);
344 } else {
345 /* use manual power-down sequence */
f9be1343 346 twl6040_power_down_manual(twl6040);
f19b2823 347 }
c7f9129d
PU		 348
349 /* Set regmap to cache only and mark it as dirty */
350 regcache_cache_only(twl6040->regmap, true);
351 regcache_mark_dirty(twl6040->regmap);
352
f19b2823 353 twl6040->sysclk = 0;
f8447d6c 354 twl6040->mclk = 0;
68bab866
PU		 355
356 clk_disable_unprepare(twl6040->clk32k);
f19b2823
MLC		 357 }
358
359out:
360 mutex_unlock(&twl6040->mutex);
361 return ret;
362}
363EXPORT_SYMBOL(twl6040_power);
364
cfb7a33b 365int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
f19b2823
MLC		 366 unsigned int freq_in, unsigned int freq_out)
367{
368 u8 hppllctl, lppllctl;
369 int ret = 0;
370
371 mutex_lock(&twl6040->mutex);
372
373 hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
374 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
375
2bd05db7
PU		 376 /* Force full reconfiguration when switching between PLL */
377 if (pll_id != twl6040->pll) {
378 twl6040->sysclk = 0;
379 twl6040->mclk = 0;
380 }
381
cfb7a33b
PU		 382 switch (pll_id) {
383 case TWL6040_SYSCLK_SEL_LPPLL:
f19b2823 384 /* low-power PLL divider */
2bd05db7
PU		 385 /* Change the sysclk configuration only if it has been canged */
386 if (twl6040->sysclk != freq_out) {
387 switch (freq_out) {
388 case 17640000:
389 lppllctl |= TWL6040_LPLLFIN;
390 break;
391 case 19200000:
392 lppllctl &= ~TWL6040_LPLLFIN;
393 break;
394 default:
395 dev_err(twl6040->dev,
396 "freq_out %d not supported\n",
397 freq_out);
398 ret = -EINVAL;
399 goto pll_out;
400 }
401 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
402 lppllctl);
f19b2823 403 }
2bd05db7
PU		 404
405 /* The PLL in use has not been change, we can exit */
406 if (twl6040->pll == pll_id)
407 break;
f19b2823
MLC		 408
409 switch (freq_in) {
410 case 32768:
411 lppllctl |= TWL6040_LPLLENA;
412 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
413 lppllctl);
414 mdelay(5);
415 lppllctl &= ~TWL6040_HPLLSEL;
416 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
417 lppllctl);
418 hppllctl &= ~TWL6040_HPLLENA;
419 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
420 hppllctl);
421 break;
422 default:
2d7c957e 423 dev_err(twl6040->dev,
f19b2823
MLC		 424 "freq_in %d not supported\n", freq_in);
425 ret = -EINVAL;
426 goto pll_out;
427 }
f19b2823 428 break;
cfb7a33b 429 case TWL6040_SYSCLK_SEL_HPPLL:
f19b2823
MLC		 430 /* high-performance PLL can provide only 19.2 MHz */
431 if (freq_out != 19200000) {
2d7c957e 432 dev_err(twl6040->dev,
f19b2823
MLC		 433 "freq_out %d not supported\n", freq_out);
434 ret = -EINVAL;
435 goto pll_out;
436 }
437
2bd05db7
PU		 438 if (twl6040->mclk != freq_in) {
439 hppllctl &= ~TWL6040_MCLK_MSK;
440
441 switch (freq_in) {
442 case 12000000:
443 /* PLL enabled, active mode */
444 hppllctl |= TWL6040_MCLK_12000KHZ |
445 TWL6040_HPLLENA;
446 break;
447 case 19200000:
ac8320c4
PU		 448 /* PLL enabled, bypass mode */
449 hppllctl |= TWL6040_MCLK_19200KHZ |
450 TWL6040_HPLLBP | TWL6040_HPLLENA;
2bd05db7
PU		 451 break;
452 case 26000000:
453 /* PLL enabled, active mode */
454 hppllctl |= TWL6040_MCLK_26000KHZ |
455 TWL6040_HPLLENA;
456 break;
457 case 38400000:
ac8320c4 458 /* PLL enabled, bypass mode */
2bd05db7 459 hppllctl |= TWL6040_MCLK_38400KHZ |
ac8320c4 460 TWL6040_HPLLBP | TWL6040_HPLLENA;
2bd05db7
PU		 461 break;
462 default:
463 dev_err(twl6040->dev,
464 "freq_in %d not supported\n", freq_in);
465 ret = -EINVAL;
466 goto pll_out;
467 }
f19b2823 468
f19b2823 469 /*
2bd05db7
PU		 470 * enable clock slicer to ensure input waveform is
471 * square
f19b2823 472 */
2bd05db7 473 hppllctl |= TWL6040_HPLLSQRENA;
f19b2823 474
2bd05db7
PU		 475 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
476 hppllctl);
477 usleep_range(500, 700);
478 lppllctl |= TWL6040_HPLLSEL;
479 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
480 lppllctl);
481 lppllctl &= ~TWL6040_LPLLENA;
482 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
483 lppllctl);
484 }
f19b2823
MLC		 485 break;
486 default:
2d7c957e 487 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
f19b2823
MLC		 488 ret = -EINVAL;
489 goto pll_out;
490 }
491
492 twl6040->sysclk = freq_out;
f8447d6c 493 twl6040->mclk = freq_in;
cfb7a33b 494 twl6040->pll = pll_id;
f19b2823
MLC		 495
496pll_out:
497 mutex_unlock(&twl6040->mutex);
498 return ret;
499}
500EXPORT_SYMBOL(twl6040_set_pll);
501
cfb7a33b 502int twl6040_get_pll(struct twl6040 *twl6040)
f19b2823 503{
cfb7a33b
PU		 504 if (twl6040->power_count)
505 return twl6040->pll;
506 else
507 return -ENODEV;
f19b2823
MLC		 508}
509EXPORT_SYMBOL(twl6040_get_pll);
510
511unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
512{
513 return twl6040->sysclk;
514}
515EXPORT_SYMBOL(twl6040_get_sysclk);
516
70601ec1
PU		 517/* Get the combined status of the vibra control register */
518int twl6040_get_vibralr_status(struct twl6040 *twl6040)
519{
c6f39257
MB		 520 unsigned int reg;
521 int ret;
70601ec1
PU		 522 u8 status;
523
c6f39257
MB		 524 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
525 if (ret != 0)
526 return ret;
527 status = reg;
528
529 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
530 if (ret != 0)
531 return ret;
532 status |= reg;
533
70601ec1
PU		 534 status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
535
536 return status;
537}
538EXPORT_SYMBOL(twl6040_get_vibralr_status);
539
0f962ae2
PU		 540static struct resource twl6040_vibra_rsrc[] = {
541 {
542 .flags = IORESOURCE_IRQ,
543 },
544};
545
546static struct resource twl6040_codec_rsrc[] = {
547 {
548 .flags = IORESOURCE_IRQ,
549 },
550};
551
8eaeb939 552static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
f19b2823 553{
8eaeb939
PU		 554 /* Register 0 is not readable */
555 if (!reg)
556 return false;
557 return true;
558}
559
c6f39257
MB		 560static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
561{
562 switch (reg) {
c7f9129d
PU		 563 case TWL6040_REG_ASICID:
564 case TWL6040_REG_ASICREV:
565 case TWL6040_REG_INTID:
566 case TWL6040_REG_LPPLLCTL:
567 case TWL6040_REG_HPPLLCTL:
568 case TWL6040_REG_STATUS:
569 return true;
570 default:
571 return false;
572 }
573}
574
575static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
576{
577 switch (reg) {
578 case TWL6040_REG_ASICID:
579 case TWL6040_REG_ASICREV:
580 case TWL6040_REG_STATUS:
c6f39257
MB		 581 return false;
582 default:
583 return true;
584 }
585}
586
de1e23f8 587static const struct regmap_config twl6040_regmap_config = {
8eaeb939
PU		 588 .reg_bits = 8,
589 .val_bits = 8,
c7f9129d
PU		 590
591 .reg_defaults = twl6040_defaults,
592 .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
593
8eaeb939
PU		 594 .max_register = TWL6040_REG_STATUS, /* 0x2e */
595
596 .readable_reg = twl6040_readable_reg,
c6f39257 597 .volatile_reg = twl6040_volatile_reg,
c7f9129d 598 .writeable_reg = twl6040_writeable_reg,
c6f39257
MB		 599
600 .cache_type = REGCACHE_RBTREE,
8eaeb939
PU		 601};
602
ab7edb14
PU		 603static const struct regmap_irq twl6040_irqs[] = {
604 { .reg_offset = 0, .mask = TWL6040_THINT, },
605 { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
606 { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
607 { .reg_offset = 0, .mask = TWL6040_HFINT, },
608 { .reg_offset = 0, .mask = TWL6040_VIBINT, },
609 { .reg_offset = 0, .mask = TWL6040_READYINT, },
610};
611
612static struct regmap_irq_chip twl6040_irq_chip = {
613 .name = "twl6040",
614 .irqs = twl6040_irqs,
615 .num_irqs = ARRAY_SIZE(twl6040_irqs),
616
617 .num_regs = 1,
618 .status_base = TWL6040_REG_INTID,
619 .mask_base = TWL6040_REG_INTMR,
620};
621
612b95cd
GKH		 622static int twl6040_probe(struct i2c_client *client,
623 const struct i2c_device_id *id)
8eaeb939 624{
37e13cec 625 struct device_node *node = client->dev.of_node;
f19b2823
MLC		 626 struct twl6040 *twl6040;
627 struct mfd_cell *cell = NULL;
1f01d60e 628 int irq, ret, children = 0;
f19b2823 629
df04b624
PU		 630 if (!node) {
631 dev_err(&client->dev, "of node is missing\n");
f19b2823
MLC		 632 return -EINVAL;
633 }
634
d20e1d21 635 /* In order to operate correctly we need valid interrupt config */
6712419d 636 if (!client->irq) {
8eaeb939 637 dev_err(&client->dev, "Invalid IRQ configuration\n");
d20e1d21
PU		 638 return -EINVAL;
639 }
640
8eaeb939
PU		 641 twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
642 GFP_KERNEL);
ecc8fa1c
PU		 643 if (!twl6040)
644 return -ENOMEM;
8eaeb939 645
bbf6adc1 646 twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
ecc8fa1c
PU		 647 if (IS_ERR(twl6040->regmap))
648 return PTR_ERR(twl6040->regmap);
f19b2823 649
8eaeb939 650 i2c_set_clientdata(client, twl6040);
f19b2823 651
68bab866
PU		 652 twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
653 if (IS_ERR(twl6040->clk32k)) {
75c08f17
TL		 654 if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
655 return -EPROBE_DEFER;
68bab866
PU		 656 dev_info(&client->dev, "clk32k is not handled\n");
657 twl6040->clk32k = NULL;
658 }
659
5af7df6b
PU		 660 twl6040->supplies[0].supply = "vio";
661 twl6040->supplies[1].supply = "v2v1";
990810b0 662 ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
37aefe9f 663 twl6040->supplies);
5af7df6b
PU		 664 if (ret != 0) {
665 dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
501d609a 666 return ret;
5af7df6b
PU		 667 }
668
669 ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
670 if (ret != 0) {
671 dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
501d609a 672 return ret;
5af7df6b
PU		 673 }
674
8eaeb939
PU		 675 twl6040->dev = &client->dev;
676 twl6040->irq = client->irq;
f19b2823
MLC		 677
678 mutex_init(&twl6040->mutex);
f19b2823
MLC		 679 init_completion(&twl6040->ready);
680
006cea3a
PU		 681 regmap_register_patch(twl6040->regmap, twl6040_patch,
682 ARRAY_SIZE(twl6040_patch));
683
f19b2823 684 twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
89d68998
FV		 685 if (twl6040->rev < 0) {
686 dev_err(&client->dev, "Failed to read revision register: %d\n",
687 twl6040->rev);
f2b86781 688 ret = twl6040->rev;
89d68998
FV		 689 goto gpio_err;
690 }
f19b2823 691
77f63e06 692 /* ERRATA: Automatic power-up is not possible in ES1.0 */
df04b624
PU		 693 if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
694 twl6040->audpwron = of_get_named_gpio(node,
695 "ti,audpwron-gpio", 0);
696 else
77f63e06
PU		 697 twl6040->audpwron = -EINVAL;
698
f19b2823 699 if (gpio_is_valid(twl6040->audpwron)) {
990810b0 700 ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
37aefe9f 701 GPIOF_OUT_INIT_LOW, "audpwron");
f19b2823 702 if (ret)
5af7df6b 703 goto gpio_err;
02d02728
PU		 704
705 /* Clear any pending interrupt */
706 twl6040_reg_read(twl6040, TWL6040_REG_INTID);
f19b2823
MLC		 707 }
708
37aefe9f 709 ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
c06f308a 710 0, &twl6040_irq_chip, &twl6040->irq_data);
ab7edb14 711 if (ret < 0)
990810b0 712 goto gpio_err;
d20e1d21 713
ab7edb14 714 twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 715 TWL6040_IRQ_READY);
ab7edb14 716 twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 717 TWL6040_IRQ_TH);
ab7edb14 718
990810b0 719 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
37aefe9f
PU		 720 twl6040_readyint_handler, IRQF_ONESHOT,
721 "twl6040_irq_ready", twl6040);
d20e1d21 722 if (ret) {
1ac96265
PU		 723 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
724 goto readyirq_err;
725 }
726
990810b0 727 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
37aefe9f
PU		 728 twl6040_thint_handler, IRQF_ONESHOT,
729 "twl6040_irq_th", twl6040);
1ac96265
PU		 730 if (ret) {
731 dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
fc5ee96f 732 goto readyirq_err;
f19b2823
MLC		 733 }
734
1f01d60e
PU		 735 /*
736 * The main functionality of twl6040 to provide audio on OMAP4+ systems.
737 * We can add the ASoC codec child whenever this driver has been loaded.
1f01d60e 738 */
ab7edb14 739 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
1f01d60e
PU		 740 cell = &twl6040->cells[children];
741 cell->name = "twl6040-codec";
742 twl6040_codec_rsrc[0].start = irq;
743 twl6040_codec_rsrc[0].end = irq;
744 cell->resources = twl6040_codec_rsrc;
745 cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
1f01d60e 746 children++;
f19b2823 747
df04b624
PU		 748 /* Vibra input driver support */
749 if (twl6040_has_vibra(node)) {
ab7edb14 750 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
0f962ae2 751
f19b2823
MLC		 752 cell = &twl6040->cells[children];
753 cell->name = "twl6040-vibra";
0f962ae2
PU		 754 twl6040_vibra_rsrc[0].start = irq;
755 twl6040_vibra_rsrc[0].end = irq;
756 cell->resources = twl6040_vibra_rsrc;
757 cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
f19b2823
MLC		 758 children++;
759 }
760
df04b624
PU		 761 /* GPO support */
762 cell = &twl6040->cells[children];
763 cell->name = "twl6040-gpo";
764 children++;
5cbe786a 765
c7f9129d
PU		 766 /* The chip is powered down so mark regmap to cache only and dirty */
767 regcache_cache_only(twl6040->regmap, true);
768 regcache_mark_dirty(twl6040->regmap);
769
1f01d60e 770 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
55692af5 771 NULL, 0, NULL);
1f01d60e 772 if (ret)
fc5ee96f 773 goto readyirq_err;
f19b2823
MLC		 774
775 return 0;
776
1ac96265 777readyirq_err:
ab7edb14 778 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
5af7df6b
PU		 779gpio_err:
780 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
f19b2823
MLC		 781 return ret;
782}
783
612b95cd 784static int twl6040_remove(struct i2c_client *client)
f19b2823 785{
8eaeb939 786 struct twl6040 *twl6040 = i2c_get_clientdata(client);
f19b2823
MLC		 787
788 if (twl6040->power_count)
789 twl6040_power(twl6040, 0);
790
ab7edb14 791 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
f19b2823 792
8eaeb939 793 mfd_remove_devices(&client->dev);
f19b2823 794
5af7df6b 795 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
5af7df6b 796
f19b2823
MLC		 797 return 0;
798}
799
8eaeb939
PU		 800static const struct i2c_device_id twl6040_i2c_id[] = {
801 { "twl6040", 0, },
1fc74aef 802 { "twl6041", 0, },
8eaeb939
PU		 803 { },
804};
805MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
806
807static struct i2c_driver twl6040_driver = {
808 .driver = {
809 .name = "twl6040",
8eaeb939 810 },
f19b2823 811 .probe = twl6040_probe,
612b95cd 812 .remove = twl6040_remove,
8eaeb939 813 .id_table = twl6040_i2c_id,
f19b2823
MLC		 814};
815
8eaeb939 816module_i2c_driver(twl6040_driver);
f19b2823
MLC		 817
818MODULE_DESCRIPTION("TWL6040 MFD");
819MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
820MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
821MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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