Commit | Line | Data |
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b587b13a DB |
1 | /* |
2 | * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models | |
3 | * | |
4 | * Copyright (C) 2006 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/sched.h> | |
19 | ||
20 | #include <linux/spi/spi.h> | |
21 | #include <linux/spi/eeprom.h> | |
22 | ||
23 | ||
3f86f14c DB |
24 | /* |
25 | * NOTE: this is an *EEPROM* driver. The vagaries of product naming | |
26 | * mean that some AT25 products are EEPROMs, and others are FLASH. | |
27 | * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver, | |
28 | * not this one! | |
29 | */ | |
30 | ||
b587b13a DB |
31 | struct at25_data { |
32 | struct spi_device *spi; | |
14dd1ff0 | 33 | struct memory_accessor mem; |
b587b13a DB |
34 | struct mutex lock; |
35 | struct spi_eeprom chip; | |
36 | struct bin_attribute bin; | |
37 | unsigned addrlen; | |
38 | }; | |
39 | ||
40 | #define AT25_WREN 0x06 /* latch the write enable */ | |
41 | #define AT25_WRDI 0x04 /* reset the write enable */ | |
42 | #define AT25_RDSR 0x05 /* read status register */ | |
43 | #define AT25_WRSR 0x01 /* write status register */ | |
44 | #define AT25_READ 0x03 /* read byte(s) */ | |
45 | #define AT25_WRITE 0x02 /* write byte(s)/sector */ | |
46 | ||
47 | #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */ | |
48 | #define AT25_SR_WEN 0x02 /* write enable (latched) */ | |
49 | #define AT25_SR_BP0 0x04 /* BP for software writeprotect */ | |
50 | #define AT25_SR_BP1 0x08 | |
51 | #define AT25_SR_WPEN 0x80 /* writeprotect enable */ | |
52 | ||
53 | ||
54 | #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */ | |
55 | ||
56 | /* Specs often allow 5 msec for a page write, sometimes 20 msec; | |
57 | * it's important to recover from write timeouts. | |
58 | */ | |
59 | #define EE_TIMEOUT 25 | |
60 | ||
61 | /*-------------------------------------------------------------------------*/ | |
62 | ||
63 | #define io_limit PAGE_SIZE /* bytes */ | |
64 | ||
65 | static ssize_t | |
66 | at25_ee_read( | |
67 | struct at25_data *at25, | |
68 | char *buf, | |
69 | unsigned offset, | |
70 | size_t count | |
71 | ) | |
72 | { | |
73 | u8 command[EE_MAXADDRLEN + 1]; | |
74 | u8 *cp; | |
75 | ssize_t status; | |
76 | struct spi_transfer t[2]; | |
77 | struct spi_message m; | |
78 | ||
14dd1ff0 DB |
79 | if (unlikely(offset >= at25->bin.size)) |
80 | return 0; | |
81 | if ((offset + count) > at25->bin.size) | |
82 | count = at25->bin.size - offset; | |
83 | if (unlikely(!count)) | |
84 | return count; | |
85 | ||
b587b13a DB |
86 | cp = command; |
87 | *cp++ = AT25_READ; | |
88 | ||
89 | /* 8/16/24-bit address is written MSB first */ | |
90 | switch (at25->addrlen) { | |
91 | default: /* case 3 */ | |
92 | *cp++ = offset >> 16; | |
93 | case 2: | |
94 | *cp++ = offset >> 8; | |
95 | case 1: | |
96 | case 0: /* can't happen: for better codegen */ | |
97 | *cp++ = offset >> 0; | |
98 | } | |
99 | ||
100 | spi_message_init(&m); | |
101 | memset(t, 0, sizeof t); | |
102 | ||
103 | t[0].tx_buf = command; | |
104 | t[0].len = at25->addrlen + 1; | |
105 | spi_message_add_tail(&t[0], &m); | |
106 | ||
107 | t[1].rx_buf = buf; | |
108 | t[1].len = count; | |
109 | spi_message_add_tail(&t[1], &m); | |
110 | ||
111 | mutex_lock(&at25->lock); | |
112 | ||
113 | /* Read it all at once. | |
114 | * | |
115 | * REVISIT that's potentially a problem with large chips, if | |
116 | * other devices on the bus need to be accessed regularly or | |
117 | * this chip is clocked very slowly | |
118 | */ | |
119 | status = spi_sync(at25->spi, &m); | |
120 | dev_dbg(&at25->spi->dev, | |
121 | "read %Zd bytes at %d --> %d\n", | |
122 | count, offset, (int) status); | |
123 | ||
124 | mutex_unlock(&at25->lock); | |
125 | return status ? status : count; | |
126 | } | |
127 | ||
128 | static ssize_t | |
91a69029 ZR |
129 | at25_bin_read(struct kobject *kobj, struct bin_attribute *bin_attr, |
130 | char *buf, loff_t off, size_t count) | |
b587b13a DB |
131 | { |
132 | struct device *dev; | |
133 | struct at25_data *at25; | |
134 | ||
135 | dev = container_of(kobj, struct device, kobj); | |
136 | at25 = dev_get_drvdata(dev); | |
137 | ||
b587b13a DB |
138 | return at25_ee_read(at25, buf, off, count); |
139 | } | |
140 | ||
141 | ||
142 | static ssize_t | |
4cafbd0b GU |
143 | at25_ee_write(struct at25_data *at25, const char *buf, loff_t off, |
144 | size_t count) | |
b587b13a DB |
145 | { |
146 | ssize_t status = 0; | |
147 | unsigned written = 0; | |
148 | unsigned buf_size; | |
149 | u8 *bounce; | |
150 | ||
14dd1ff0 DB |
151 | if (unlikely(off >= at25->bin.size)) |
152 | return -EFBIG; | |
153 | if ((off + count) > at25->bin.size) | |
154 | count = at25->bin.size - off; | |
155 | if (unlikely(!count)) | |
156 | return count; | |
157 | ||
b587b13a DB |
158 | /* Temp buffer starts with command and address */ |
159 | buf_size = at25->chip.page_size; | |
160 | if (buf_size > io_limit) | |
161 | buf_size = io_limit; | |
162 | bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL); | |
163 | if (!bounce) | |
164 | return -ENOMEM; | |
165 | ||
166 | /* For write, rollover is within the page ... so we write at | |
167 | * most one page, then manually roll over to the next page. | |
168 | */ | |
169 | bounce[0] = AT25_WRITE; | |
170 | mutex_lock(&at25->lock); | |
171 | do { | |
172 | unsigned long timeout, retries; | |
173 | unsigned segment; | |
174 | unsigned offset = (unsigned) off; | |
175 | u8 *cp = bounce + 1; | |
f0d83679 | 176 | int sr; |
b587b13a DB |
177 | |
178 | *cp = AT25_WREN; | |
179 | status = spi_write(at25->spi, cp, 1); | |
180 | if (status < 0) { | |
181 | dev_dbg(&at25->spi->dev, "WREN --> %d\n", | |
182 | (int) status); | |
183 | break; | |
184 | } | |
185 | ||
186 | /* 8/16/24-bit address is written MSB first */ | |
187 | switch (at25->addrlen) { | |
188 | default: /* case 3 */ | |
189 | *cp++ = offset >> 16; | |
190 | case 2: | |
191 | *cp++ = offset >> 8; | |
192 | case 1: | |
193 | case 0: /* can't happen: for better codegen */ | |
194 | *cp++ = offset >> 0; | |
195 | } | |
196 | ||
197 | /* Write as much of a page as we can */ | |
198 | segment = buf_size - (offset % buf_size); | |
199 | if (segment > count) | |
200 | segment = count; | |
201 | memcpy(cp, buf, segment); | |
202 | status = spi_write(at25->spi, bounce, | |
203 | segment + at25->addrlen + 1); | |
204 | dev_dbg(&at25->spi->dev, | |
205 | "write %u bytes at %u --> %d\n", | |
206 | segment, offset, (int) status); | |
207 | if (status < 0) | |
208 | break; | |
209 | ||
210 | /* REVISIT this should detect (or prevent) failed writes | |
211 | * to readonly sections of the EEPROM... | |
212 | */ | |
213 | ||
214 | /* Wait for non-busy status */ | |
215 | timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT); | |
216 | retries = 0; | |
217 | do { | |
b587b13a DB |
218 | |
219 | sr = spi_w8r8(at25->spi, AT25_RDSR); | |
220 | if (sr < 0 || (sr & AT25_SR_nRDY)) { | |
221 | dev_dbg(&at25->spi->dev, | |
222 | "rdsr --> %d (%02x)\n", sr, sr); | |
223 | /* at HZ=100, this is sloooow */ | |
224 | msleep(1); | |
225 | continue; | |
226 | } | |
227 | if (!(sr & AT25_SR_nRDY)) | |
228 | break; | |
229 | } while (retries++ < 3 || time_before_eq(jiffies, timeout)); | |
230 | ||
f0d83679 | 231 | if ((sr < 0) || (sr & AT25_SR_nRDY)) { |
b587b13a DB |
232 | dev_err(&at25->spi->dev, |
233 | "write %d bytes offset %d, " | |
234 | "timeout after %u msecs\n", | |
235 | segment, offset, | |
236 | jiffies_to_msecs(jiffies - | |
237 | (timeout - EE_TIMEOUT))); | |
238 | status = -ETIMEDOUT; | |
239 | break; | |
240 | } | |
241 | ||
242 | off += segment; | |
243 | buf += segment; | |
244 | count -= segment; | |
245 | written += segment; | |
246 | ||
247 | } while (count > 0); | |
248 | ||
249 | mutex_unlock(&at25->lock); | |
250 | ||
251 | kfree(bounce); | |
252 | return written ? written : status; | |
253 | } | |
254 | ||
255 | static ssize_t | |
91a69029 ZR |
256 | at25_bin_write(struct kobject *kobj, struct bin_attribute *bin_attr, |
257 | char *buf, loff_t off, size_t count) | |
b587b13a DB |
258 | { |
259 | struct device *dev; | |
260 | struct at25_data *at25; | |
261 | ||
262 | dev = container_of(kobj, struct device, kobj); | |
263 | at25 = dev_get_drvdata(dev); | |
264 | ||
b587b13a DB |
265 | return at25_ee_write(at25, buf, off, count); |
266 | } | |
267 | ||
268 | /*-------------------------------------------------------------------------*/ | |
269 | ||
14dd1ff0 DB |
270 | /* Let in-kernel code access the eeprom data. */ |
271 | ||
272 | static ssize_t at25_mem_read(struct memory_accessor *mem, char *buf, | |
273 | off_t offset, size_t count) | |
274 | { | |
275 | struct at25_data *at25 = container_of(mem, struct at25_data, mem); | |
276 | ||
277 | return at25_ee_read(at25, buf, offset, count); | |
278 | } | |
279 | ||
4cafbd0b | 280 | static ssize_t at25_mem_write(struct memory_accessor *mem, const char *buf, |
14dd1ff0 DB |
281 | off_t offset, size_t count) |
282 | { | |
283 | struct at25_data *at25 = container_of(mem, struct at25_data, mem); | |
284 | ||
285 | return at25_ee_write(at25, buf, offset, count); | |
286 | } | |
287 | ||
288 | /*-------------------------------------------------------------------------*/ | |
289 | ||
b587b13a DB |
290 | static int at25_probe(struct spi_device *spi) |
291 | { | |
292 | struct at25_data *at25 = NULL; | |
293 | const struct spi_eeprom *chip; | |
294 | int err; | |
295 | int sr; | |
296 | int addrlen; | |
297 | ||
298 | /* Chip description */ | |
299 | chip = spi->dev.platform_data; | |
300 | if (!chip) { | |
301 | dev_dbg(&spi->dev, "no chip description\n"); | |
302 | err = -ENODEV; | |
303 | goto fail; | |
304 | } | |
305 | ||
306 | /* For now we only support 8/16/24 bit addressing */ | |
307 | if (chip->flags & EE_ADDR1) | |
308 | addrlen = 1; | |
309 | else if (chip->flags & EE_ADDR2) | |
310 | addrlen = 2; | |
311 | else if (chip->flags & EE_ADDR3) | |
312 | addrlen = 3; | |
313 | else { | |
314 | dev_dbg(&spi->dev, "unsupported address type\n"); | |
315 | err = -EINVAL; | |
316 | goto fail; | |
317 | } | |
318 | ||
319 | /* Ping the chip ... the status register is pretty portable, | |
320 | * unlike probing manufacturer IDs. We do expect that system | |
321 | * firmware didn't write it in the past few milliseconds! | |
322 | */ | |
323 | sr = spi_w8r8(spi, AT25_RDSR); | |
324 | if (sr < 0 || sr & AT25_SR_nRDY) { | |
c6ca97d2 | 325 | dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr); |
b587b13a DB |
326 | err = -ENXIO; |
327 | goto fail; | |
328 | } | |
329 | ||
330 | if (!(at25 = kzalloc(sizeof *at25, GFP_KERNEL))) { | |
331 | err = -ENOMEM; | |
332 | goto fail; | |
333 | } | |
334 | ||
335 | mutex_init(&at25->lock); | |
336 | at25->chip = *chip; | |
337 | at25->spi = spi_dev_get(spi); | |
338 | dev_set_drvdata(&spi->dev, at25); | |
339 | at25->addrlen = addrlen; | |
340 | ||
341 | /* Export the EEPROM bytes through sysfs, since that's convenient. | |
14dd1ff0 DB |
342 | * And maybe to other kernel code; it might hold a board's Ethernet |
343 | * address, or board-specific calibration data generated on the | |
344 | * manufacturing floor. | |
345 | * | |
b587b13a DB |
346 | * Default to root-only access to the data; EEPROMs often hold data |
347 | * that's sensitive for read and/or write, like ethernet addresses, | |
348 | * security codes, board-specific manufacturing calibrations, etc. | |
349 | */ | |
350 | at25->bin.attr.name = "eeprom"; | |
351 | at25->bin.attr.mode = S_IRUSR; | |
b587b13a | 352 | at25->bin.read = at25_bin_read; |
14dd1ff0 | 353 | at25->mem.read = at25_mem_read; |
b587b13a DB |
354 | |
355 | at25->bin.size = at25->chip.byte_len; | |
356 | if (!(chip->flags & EE_READONLY)) { | |
357 | at25->bin.write = at25_bin_write; | |
358 | at25->bin.attr.mode |= S_IWUSR; | |
14dd1ff0 | 359 | at25->mem.write = at25_mem_write; |
b587b13a DB |
360 | } |
361 | ||
362 | err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin); | |
363 | if (err) | |
364 | goto fail; | |
365 | ||
14dd1ff0 DB |
366 | if (chip->setup) |
367 | chip->setup(&at25->mem, chip->context); | |
368 | ||
b587b13a DB |
369 | dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n", |
370 | (at25->bin.size < 1024) | |
371 | ? at25->bin.size | |
372 | : (at25->bin.size / 1024), | |
373 | (at25->bin.size < 1024) ? "Byte" : "KByte", | |
374 | at25->chip.name, | |
375 | (chip->flags & EE_READONLY) ? " (readonly)" : "", | |
376 | at25->chip.page_size); | |
377 | return 0; | |
378 | fail: | |
379 | dev_dbg(&spi->dev, "probe err %d\n", err); | |
380 | kfree(at25); | |
381 | return err; | |
382 | } | |
383 | ||
384 | static int __devexit at25_remove(struct spi_device *spi) | |
385 | { | |
386 | struct at25_data *at25; | |
387 | ||
388 | at25 = dev_get_drvdata(&spi->dev); | |
389 | sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin); | |
390 | kfree(at25); | |
391 | return 0; | |
392 | } | |
393 | ||
394 | /*-------------------------------------------------------------------------*/ | |
395 | ||
396 | static struct spi_driver at25_driver = { | |
397 | .driver = { | |
398 | .name = "at25", | |
399 | .owner = THIS_MODULE, | |
400 | }, | |
401 | .probe = at25_probe, | |
402 | .remove = __devexit_p(at25_remove), | |
403 | }; | |
404 | ||
405 | static int __init at25_init(void) | |
406 | { | |
407 | return spi_register_driver(&at25_driver); | |
408 | } | |
409 | module_init(at25_init); | |
410 | ||
411 | static void __exit at25_exit(void) | |
412 | { | |
413 | spi_unregister_driver(&at25_driver); | |
414 | } | |
415 | module_exit(at25_exit); | |
416 | ||
417 | MODULE_DESCRIPTION("Driver for most SPI EEPROMs"); | |
418 | MODULE_AUTHOR("David Brownell"); | |
419 | MODULE_LICENSE("GPL"); | |
420 |