[deliverable/linux.git] / drivers / misc / eeprom / eeprom_93xx46.c

/*
 * Driver for 93xx46 EEPROMs
 *
 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/delay.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include <linux/sysfs.h>
#include <linux/eeprom_93xx46.h>

#define OP_START	0x4
#define OP_WRITE	(OP_START | 0x1)
#define OP_READ		(OP_START | 0x2)
#define ADDR_EWDS	0x00
#define ADDR_ERAL	0x20
#define ADDR_EWEN	0x30

struct eeprom_93xx46_dev {
	struct spi_device *spi;
	struct eeprom_93xx46_platform_data *pdata;
	struct bin_attribute bin;
	struct mutex lock;
	int addrlen;
};

static ssize_t
eeprom_93xx46_bin_read(struct file *filp, struct kobject *kobj,
		       struct bin_attribute *bin_attr,
		       char *buf, loff_t off, size_t count)
{
	struct eeprom_93xx46_dev *edev;
	struct device *dev;
	struct spi_message m;
	struct spi_transfer t[2];
	int bits, ret;
	u16 cmd_addr;

	dev = kobj_to_dev(kobj);
	edev = dev_get_drvdata(dev);

	cmd_addr = OP_READ << edev->addrlen;

	if (edev->addrlen == 7) {
		cmd_addr |= off & 0x7f;
		bits = 10;
	} else {
		cmd_addr |= (off >> 1) & 0x3f;
		bits = 9;
	}

	dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
		cmd_addr, edev->spi->max_speed_hz);

	spi_message_init(&m);
	memset(t, 0, sizeof(t));

	t[0].tx_buf = (char *)&cmd_addr;
	t[0].len = 2;
	t[0].bits_per_word = bits;
	spi_message_add_tail(&t[0], &m);

	t[1].rx_buf = buf;
	t[1].len = count;
	t[1].bits_per_word = 8;
	spi_message_add_tail(&t[1], &m);

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	ret = spi_sync(edev->spi, &m);
	/* have to wait at least Tcsl ns */
	ndelay(250);
	if (ret) {
		dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
			count, (int)off, ret);
	}

	if (edev->pdata->finish)
		edev->pdata->finish(edev);

	mutex_unlock(&edev->lock);
	return ret ? : count;
}

static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
{
	struct spi_message m;
	struct spi_transfer t;
	int bits, ret;
	u16 cmd_addr;

	cmd_addr = OP_START << edev->addrlen;
	if (edev->addrlen == 7) {
		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
		bits = 10;
	} else {
		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
		bits = 9;
	}

	dev_dbg(&edev->spi->dev, "ew cmd 0x%04x\n", cmd_addr);

	spi_message_init(&m);
	memset(&t, 0, sizeof(t));

	t.tx_buf = &cmd_addr;
	t.len = 2;
	t.bits_per_word = bits;
	spi_message_add_tail(&t, &m);

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	ret = spi_sync(edev->spi, &m);
	/* have to wait at least Tcsl ns */
	ndelay(250);
	if (ret)
		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
			is_on ? "en" : "dis", ret);

	if (edev->pdata->finish)
		edev->pdata->finish(edev);

	mutex_unlock(&edev->lock);
	return ret;
}

static ssize_t
eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
			 const char *buf, unsigned off)
{
	struct spi_message m;
	struct spi_transfer t[2];
	int bits, data_len, ret;
	u16 cmd_addr;

	cmd_addr = OP_WRITE << edev->addrlen;

	if (edev->addrlen == 7) {
		cmd_addr |= off & 0x7f;
		bits = 10;
		data_len = 1;
	} else {
		cmd_addr |= (off >> 1) & 0x3f;
		bits = 9;
		data_len = 2;
	}

	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);

	spi_message_init(&m);
	memset(t, 0, sizeof(t));

	t[0].tx_buf = (char *)&cmd_addr;
	t[0].len = 2;
	t[0].bits_per_word = bits;
	spi_message_add_tail(&t[0], &m);

	t[1].tx_buf = buf;
	t[1].len = data_len;
	t[1].bits_per_word = 8;
	spi_message_add_tail(&t[1], &m);

	ret = spi_sync(edev->spi, &m);
	/* have to wait program cycle time Twc ms */
	mdelay(6);
	return ret;
}

static ssize_t
eeprom_93xx46_bin_write(struct file *filp, struct kobject *kobj,
			struct bin_attribute *bin_attr,
			char *buf, loff_t off, size_t count)
{
	struct eeprom_93xx46_dev *edev;
	struct device *dev;
	int i, ret, step = 1;

	dev = kobj_to_dev(kobj);
	edev = dev_get_drvdata(dev);

	/* only write even number of bytes on 16-bit devices */
	if (edev->addrlen == 6) {
		step = 2;
		count &= ~1;
	}

	/* erase/write enable */
	ret = eeprom_93xx46_ew(edev, 1);
	if (ret)
		return ret;

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	for (i = 0; i < count; i += step) {
		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
		if (ret) {
			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
				(int)off + i, ret);
			break;
		}
	}

	if (edev->pdata->finish)
		edev->pdata->finish(edev);

	mutex_unlock(&edev->lock);

	/* erase/write disable */
	eeprom_93xx46_ew(edev, 0);
	return ret ? : count;
}

static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
{
	struct eeprom_93xx46_platform_data *pd = edev->pdata;
	struct spi_message m;
	struct spi_transfer t;
	int bits, ret;
	u16 cmd_addr;

	cmd_addr = OP_START << edev->addrlen;
	if (edev->addrlen == 7) {
		cmd_addr |= ADDR_ERAL << 1;
		bits = 10;
	} else {
		cmd_addr |= ADDR_ERAL;
		bits = 9;
	}

	spi_message_init(&m);
	memset(&t, 0, sizeof(t));

	t.tx_buf = &cmd_addr;
	t.len = 2;
	t.bits_per_word = bits;
	spi_message_add_tail(&t, &m);

	mutex_lock(&edev->lock);

	if (edev->pdata->prepare)
		edev->pdata->prepare(edev);

	ret = spi_sync(edev->spi, &m);
	if (ret)
		dev_err(&edev->spi->dev, "erase error %d\n", ret);
	/* have to wait erase cycle time Tec ms */
	mdelay(6);

	if (pd->finish)
		pd->finish(edev);

	mutex_unlock(&edev->lock);
	return ret;
}

static ssize_t eeprom_93xx46_store_erase(struct device *dev,
					 struct device_attribute *attr,
					 const char *buf, size_t count)
{
	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
	int erase = 0, ret;

	sscanf(buf, "%d", &erase);
	if (erase) {
		ret = eeprom_93xx46_ew(edev, 1);
		if (ret)
			return ret;
		ret = eeprom_93xx46_eral(edev);
		if (ret)
			return ret;
		ret = eeprom_93xx46_ew(edev, 0);
		if (ret)
			return ret;
	}
	return count;
}
static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);

static int eeprom_93xx46_probe(struct spi_device *spi)
{
	struct eeprom_93xx46_platform_data *pd;
	struct eeprom_93xx46_dev *edev;
	int err;

	pd = spi->dev.platform_data;
	if (!pd) {
		dev_err(&spi->dev, "missing platform data\n");
		return -ENODEV;
	}

	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
	if (!edev)
		return -ENOMEM;

	if (pd->flags & EE_ADDR8)
		edev->addrlen = 7;
	else if (pd->flags & EE_ADDR16)
		edev->addrlen = 6;
	else {
		dev_err(&spi->dev, "unspecified address type\n");
		err = -EINVAL;
		goto fail;
	}

	mutex_init(&edev->lock);

	edev->spi = spi_dev_get(spi);
	edev->pdata = pd;

	sysfs_bin_attr_init(&edev->bin);
	edev->bin.attr.name = "eeprom";
	edev->bin.attr.mode = S_IRUSR;
	edev->bin.read = eeprom_93xx46_bin_read;
	edev->bin.size = 128;
	if (!(pd->flags & EE_READONLY)) {
		edev->bin.write = eeprom_93xx46_bin_write;
		edev->bin.attr.mode |= S_IWUSR;
	}

	err = sysfs_create_bin_file(&spi->dev.kobj, &edev->bin);
	if (err)
		goto fail;

	dev_info(&spi->dev, "%d-bit eeprom %s\n",
		(pd->flags & EE_ADDR8) ? 8 : 16,
		(pd->flags & EE_READONLY) ? "(readonly)" : "");

	if (!(pd->flags & EE_READONLY)) {
		if (device_create_file(&spi->dev, &dev_attr_erase))
			dev_err(&spi->dev, "can't create erase interface\n");
	}

	spi_set_drvdata(spi, edev);
	return 0;
fail:
	kfree(edev);
	return err;
}

static int eeprom_93xx46_remove(struct spi_device *spi)
{
	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);

	if (!(edev->pdata->flags & EE_READONLY))
		device_remove_file(&spi->dev, &dev_attr_erase);

	sysfs_remove_bin_file(&spi->dev.kobj, &edev->bin);
	kfree(edev);
	return 0;
}

static struct spi_driver eeprom_93xx46_driver = {
	.driver = {
		.name	= "93xx46",
	},
	.probe		= eeprom_93xx46_probe,
	.remove		= eeprom_93xx46_remove,
};

module_spi_driver(eeprom_93xx46_driver);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
MODULE_ALIAS("spi:93xx46");
Commit	Line	Data
06b4501e AG	1	/*
	2	* Driver for 93xx46 EEPROMs
	3	*
	4	* (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#include <linux/delay.h>
	12	#include <linux/device.h>
	13	#include <linux/kernel.h>
06b4501e AG	14	#include <linux/module.h>
	15	#include <linux/mutex.h>
	16	#include <linux/slab.h>
	17	#include <linux/spi/spi.h>
	18	#include <linux/sysfs.h>
	19	#include <linux/eeprom_93xx46.h>
	20
	21	#define OP_START 0x4
	22	#define OP_WRITE (OP_START \| 0x1)
	23	#define OP_READ (OP_START \| 0x2)
	24	#define ADDR_EWDS 0x00
	25	#define ADDR_ERAL 0x20
	26	#define ADDR_EWEN 0x30
	27
	28	struct eeprom_93xx46_dev {
	29	struct spi_device *spi;
	30	struct eeprom_93xx46_platform_data *pdata;
	31	struct bin_attribute bin;
	32	struct mutex lock;
	33	int addrlen;
	34	};
	35
	36	static ssize_t
	37	eeprom_93xx46_bin_read(struct file filp, struct kobject kobj,
	38	struct bin_attribute *bin_attr,
	39	char *buf, loff_t off, size_t count)
	40	{
	41	struct eeprom_93xx46_dev *edev;
	42	struct device *dev;
	43	struct spi_message m;
	44	struct spi_transfer t[2];
	45	int bits, ret;
	46	u16 cmd_addr;
	47
092462c2	48	dev = kobj_to_dev(kobj);
06b4501e AG	49	edev = dev_get_drvdata(dev);
06b4501e AG	50
06b4501e AG	51	cmd_addr = OP_READ << edev->addrlen;
	52
	53	if (edev->addrlen == 7) {
	54	cmd_addr \|= off & 0x7f;
	55	bits = 10;
	56	} else {
cb54ad6c	57	cmd_addr \|= (off >> 1) & 0x3f;
06b4501e AG	58	bits = 9;
	59	}
	60
	61	dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
	62	cmd_addr, edev->spi->max_speed_hz);
	63
	64	spi_message_init(&m);
	65	memset(t, 0, sizeof(t));
	66
	67	t[0].tx_buf = (char *)&cmd_addr;
	68	t[0].len = 2;
	69	t[0].bits_per_word = bits;
	70	spi_message_add_tail(&t[0], &m);
	71
	72	t[1].rx_buf = buf;
	73	t[1].len = count;
	74	t[1].bits_per_word = 8;
	75	spi_message_add_tail(&t[1], &m);
	76
	77	mutex_lock(&edev->lock);
	78
	79	if (edev->pdata->prepare)
	80	edev->pdata->prepare(edev);
	81
	82	ret = spi_sync(edev->spi, &m);
	83	/* have to wait at least Tcsl ns */
	84	ndelay(250);
	85	if (ret) {
	86	dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
	87	count, (int)off, ret);
	88	}
	89
	90	if (edev->pdata->finish)
	91	edev->pdata->finish(edev);
	92
	93	mutex_unlock(&edev->lock);
	94	return ret ? : count;
	95	}
	96
	97	static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
	98	{
	99	struct spi_message m;
	100	struct spi_transfer t;
	101	int bits, ret;
	102	u16 cmd_addr;
	103
	104	cmd_addr = OP_START << edev->addrlen;
	105	if (edev->addrlen == 7) {
	106	cmd_addr \|= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
	107	bits = 10;
	108	} else {
	109	cmd_addr \|= (is_on ? ADDR_EWEN : ADDR_EWDS);
	110	bits = 9;
	111	}
	112
	113	dev_dbg(&edev->spi->dev, "ew cmd 0x%04x\n", cmd_addr);
	114
	115	spi_message_init(&m);
	116	memset(&t, 0, sizeof(t));
	117
	118	t.tx_buf = &cmd_addr;
	119	t.len = 2;
	120	t.bits_per_word = bits;
	121	spi_message_add_tail(&t, &m);
122
123	mutex_lock(&edev->lock);
124
125	if (edev->pdata->prepare)
126	edev->pdata->prepare(edev);
127
128	ret = spi_sync(edev->spi, &m);
129	/* have to wait at least Tcsl ns */
130	ndelay(250);
131	if (ret)
132	dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
133	is_on ? "en" : "dis", ret);
134
135	if (edev->pdata->finish)
136	edev->pdata->finish(edev);
137
138	mutex_unlock(&edev->lock);
139	return ret;
140	}
141
142	static ssize_t
143	eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
144	const char *buf, unsigned off)
145	{
146	struct spi_message m;
147	struct spi_transfer t[2];
148	int bits, data_len, ret;
149	u16 cmd_addr;
150
151	cmd_addr = OP_WRITE << edev->addrlen;
152
153	if (edev->addrlen == 7) {
154	cmd_addr \|= off & 0x7f;
155	bits = 10;
156	data_len = 1;
157	} else {
cb54ad6c	158	cmd_addr \|= (off >> 1) & 0x3f;
06b4501e AG	159	bits = 9;
	160	data_len = 2;
	161	}
	162
	163	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
	164
	165	spi_message_init(&m);
	166	memset(t, 0, sizeof(t));
	167
	168	t[0].tx_buf = (char *)&cmd_addr;
	169	t[0].len = 2;
	170	t[0].bits_per_word = bits;
	171	spi_message_add_tail(&t[0], &m);
	172
	173	t[1].tx_buf = buf;
	174	t[1].len = data_len;
	175	t[1].bits_per_word = 8;
	176	spi_message_add_tail(&t[1], &m);
	177
	178	ret = spi_sync(edev->spi, &m);
	179	/* have to wait program cycle time Twc ms */
	180	mdelay(6);
	181	return ret;
	182	}
	183
	184	static ssize_t
	185	eeprom_93xx46_bin_write(struct file filp, struct kobject kobj,
	186	struct bin_attribute *bin_attr,
	187	char *buf, loff_t off, size_t count)
	188	{
	189	struct eeprom_93xx46_dev *edev;
	190	struct device *dev;
	191	int i, ret, step = 1;
	192
092462c2	193	dev = kobj_to_dev(kobj);
06b4501e AG	194	edev = dev_get_drvdata(dev);
06b4501e AG	195
06b4501e AG	196	/* only write even number of bytes on 16-bit devices */
	197	if (edev->addrlen == 6) {
	198	step = 2;
	199	count &= ~1;
	200	}
	201
	202	/* erase/write enable */
	203	ret = eeprom_93xx46_ew(edev, 1);
	204	if (ret)
	205	return ret;
	206
	207	mutex_lock(&edev->lock);
	208
	209	if (edev->pdata->prepare)
	210	edev->pdata->prepare(edev);
	211
	212	for (i = 0; i < count; i += step) {
	213	ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
	214	if (ret) {
	215	dev_err(&edev->spi->dev, "write failed at %d: %d\n",
	216	(int)off + i, ret);
	217	break;
	218	}
	219	}
	220
	221	if (edev->pdata->finish)
	222	edev->pdata->finish(edev);
	223
	224	mutex_unlock(&edev->lock);
	225
	226	/* erase/write disable */
	227	eeprom_93xx46_ew(edev, 0);
	228	return ret ? : count;
	229	}
	230
	231	static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
	232	{
	233	struct eeprom_93xx46_platform_data *pd = edev->pdata;
	234	struct spi_message m;
	235	struct spi_transfer t;
	236	int bits, ret;
	237	u16 cmd_addr;
	238
	239	cmd_addr = OP_START << edev->addrlen;
	240	if (edev->addrlen == 7) {
	241	cmd_addr \|= ADDR_ERAL << 1;
	242	bits = 10;
	243	} else {
	244	cmd_addr \|= ADDR_ERAL;
	245	bits = 9;
	246	}
	247
	248	spi_message_init(&m);
	249	memset(&t, 0, sizeof(t));
	250
	251	t.tx_buf = &cmd_addr;
	252	t.len = 2;
	253	t.bits_per_word = bits;
	254	spi_message_add_tail(&t, &m);
	255
	256	mutex_lock(&edev->lock);
	257
	258	if (edev->pdata->prepare)
	259	edev->pdata->prepare(edev);
260
261	ret = spi_sync(edev->spi, &m);
262	if (ret)
263	dev_err(&edev->spi->dev, "erase error %d\n", ret);
264	/* have to wait erase cycle time Tec ms */
265	mdelay(6);
266
267	if (pd->finish)
268	pd->finish(edev);
269
270	mutex_unlock(&edev->lock);
271	return ret;
272	}
273
274	static ssize_t eeprom_93xx46_store_erase(struct device *dev,
275	struct device_attribute *attr,
276	const char *buf, size_t count)
277	{
278	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
279	int erase = 0, ret;
280
281	sscanf(buf, "%d", &erase);
282	if (erase) {
283	ret = eeprom_93xx46_ew(edev, 1);
284	if (ret)
285	return ret;
286	ret = eeprom_93xx46_eral(edev);
287	if (ret)
288	return ret;
289	ret = eeprom_93xx46_ew(edev, 0);
290	if (ret)
291	return ret;
292	}
293	return count;
294	}
295	static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
296
80c8ae28	297	static int eeprom_93xx46_probe(struct spi_device *spi)
06b4501e AG	298	{
	299	struct eeprom_93xx46_platform_data *pd;
	300	struct eeprom_93xx46_dev *edev;
	301	int err;
	302
	303	pd = spi->dev.platform_data;
	304	if (!pd) {
	305	dev_err(&spi->dev, "missing platform data\n");
	306	return -ENODEV;
	307	}
	308
	309	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
	310	if (!edev)
	311	return -ENOMEM;
	312
	313	if (pd->flags & EE_ADDR8)
	314	edev->addrlen = 7;
	315	else if (pd->flags & EE_ADDR16)
	316	edev->addrlen = 6;
	317	else {
	318	dev_err(&spi->dev, "unspecified address type\n");
	319	err = -EINVAL;
	320	goto fail;
	321	}
	322
	323	mutex_init(&edev->lock);
	324
	325	edev->spi = spi_dev_get(spi);
	326	edev->pdata = pd;
	327
	328	sysfs_bin_attr_init(&edev->bin);
	329	edev->bin.attr.name = "eeprom";
	330	edev->bin.attr.mode = S_IRUSR;
	331	edev->bin.read = eeprom_93xx46_bin_read;
	332	edev->bin.size = 128;
	333	if (!(pd->flags & EE_READONLY)) {
	334	edev->bin.write = eeprom_93xx46_bin_write;
	335	edev->bin.attr.mode \|= S_IWUSR;
	336	}
	337
	338	err = sysfs_create_bin_file(&spi->dev.kobj, &edev->bin);
	339	if (err)
	340	goto fail;
	341
	342	dev_info(&spi->dev, "%d-bit eeprom %s\n",
	343	(pd->flags & EE_ADDR8) ? 8 : 16,
	344	(pd->flags & EE_READONLY) ? "(readonly)" : "");
	345
	346	if (!(pd->flags & EE_READONLY)) {
	347	if (device_create_file(&spi->dev, &dev_attr_erase))
	348	dev_err(&spi->dev, "can't create erase interface\n");
	349	}
	350
5ba75b55	351	spi_set_drvdata(spi, edev);
06b4501e AG	352	return 0;
	353	fail:
	354	kfree(edev);
	355	return err;
	356	}
	357
486a5c28	358	static int eeprom_93xx46_remove(struct spi_device *spi)
06b4501e	359	{
5ba75b55	360	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
06b4501e AG	361
	362	if (!(edev->pdata->flags & EE_READONLY))
	363	device_remove_file(&spi->dev, &dev_attr_erase);
	364
	365	sysfs_remove_bin_file(&spi->dev.kobj, &edev->bin);
06b4501e AG	366	kfree(edev);
	367	return 0;
	368	}
	369
	370	static struct spi_driver eeprom_93xx46_driver = {
	371	.driver = {
	372	.name = "93xx46",
06b4501e AG	373	},
06b4501e AG	374	.probe = eeprom_93xx46_probe,
2d6bed9c	375	.remove = eeprom_93xx46_remove,
06b4501e AG	376	};
06b4501e AG	377
a3dc3c9e	378	module_spi_driver(eeprom_93xx46_driver);
06b4501e AG	379
	380	MODULE_LICENSE("GPL");
	381	MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
	382	MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
	383	MODULE_ALIAS("spi:93xx46");