Commit | Line | Data |
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1da177e4 | 1 | /* |
aaac1b47 | 2 | * linux/drivers/mmc/core/core.c |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2003-2004 Russell King, All Rights Reserved. | |
5b4fd9ae | 5 | * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved. |
ad3868b2 | 6 | * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. |
bce40a36 | 7 | * MMCv4 support Copyright (C) 2006 Philip Langdale, All Rights Reserved. |
1da177e4 LT |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
1da177e4 LT |
13 | #include <linux/module.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/completion.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pagemap.h> | |
20 | #include <linux/err.h> | |
af8350c7 | 21 | #include <linux/leds.h> |
b57c43ad | 22 | #include <linux/scatterlist.h> |
86e8286a | 23 | #include <linux/log2.h> |
5c13941a | 24 | #include <linux/regulator/consumer.h> |
1da177e4 LT |
25 | |
26 | #include <linux/mmc/card.h> | |
27 | #include <linux/mmc/host.h> | |
da7fbe58 PO |
28 | #include <linux/mmc/mmc.h> |
29 | #include <linux/mmc/sd.h> | |
1da177e4 | 30 | |
aaac1b47 | 31 | #include "core.h" |
ffce2e7e PO |
32 | #include "bus.h" |
33 | #include "host.h" | |
e29a7d73 | 34 | #include "sdio_bus.h" |
da7fbe58 PO |
35 | |
36 | #include "mmc_ops.h" | |
37 | #include "sd_ops.h" | |
5c4e6f13 | 38 | #include "sdio_ops.h" |
1da177e4 | 39 | |
ffce2e7e PO |
40 | static struct workqueue_struct *workqueue; |
41 | ||
af517150 DB |
42 | /* |
43 | * Enabling software CRCs on the data blocks can be a significant (30%) | |
44 | * performance cost, and for other reasons may not always be desired. | |
45 | * So we allow it it to be disabled. | |
46 | */ | |
47 | int use_spi_crc = 1; | |
48 | module_param(use_spi_crc, bool, 0); | |
49 | ||
ffce2e7e PO |
50 | /* |
51 | * Internal function. Schedule delayed work in the MMC work queue. | |
52 | */ | |
53 | static int mmc_schedule_delayed_work(struct delayed_work *work, | |
54 | unsigned long delay) | |
55 | { | |
56 | return queue_delayed_work(workqueue, work, delay); | |
57 | } | |
58 | ||
59 | /* | |
60 | * Internal function. Flush all scheduled work from the MMC work queue. | |
61 | */ | |
62 | static void mmc_flush_scheduled_work(void) | |
63 | { | |
64 | flush_workqueue(workqueue); | |
65 | } | |
66 | ||
1da177e4 | 67 | /** |
fe10c6ab RK |
68 | * mmc_request_done - finish processing an MMC request |
69 | * @host: MMC host which completed request | |
70 | * @mrq: MMC request which request | |
1da177e4 LT |
71 | * |
72 | * MMC drivers should call this function when they have completed | |
fe10c6ab | 73 | * their processing of a request. |
1da177e4 LT |
74 | */ |
75 | void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |
76 | { | |
77 | struct mmc_command *cmd = mrq->cmd; | |
920e70c5 RK |
78 | int err = cmd->error; |
79 | ||
af517150 DB |
80 | if (err && cmd->retries && mmc_host_is_spi(host)) { |
81 | if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND) | |
82 | cmd->retries = 0; | |
83 | } | |
84 | ||
1da177e4 | 85 | if (err && cmd->retries) { |
e4d21708 PO |
86 | pr_debug("%s: req failed (CMD%u): %d, retrying...\n", |
87 | mmc_hostname(host), cmd->opcode, err); | |
88 | ||
1da177e4 LT |
89 | cmd->retries--; |
90 | cmd->error = 0; | |
91 | host->ops->request(host, mrq); | |
e4d21708 | 92 | } else { |
af8350c7 PO |
93 | led_trigger_event(host->led, LED_OFF); |
94 | ||
e4d21708 PO |
95 | pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n", |
96 | mmc_hostname(host), cmd->opcode, err, | |
97 | cmd->resp[0], cmd->resp[1], | |
98 | cmd->resp[2], cmd->resp[3]); | |
99 | ||
100 | if (mrq->data) { | |
101 | pr_debug("%s: %d bytes transferred: %d\n", | |
102 | mmc_hostname(host), | |
103 | mrq->data->bytes_xfered, mrq->data->error); | |
104 | } | |
105 | ||
106 | if (mrq->stop) { | |
107 | pr_debug("%s: (CMD%u): %d: %08x %08x %08x %08x\n", | |
108 | mmc_hostname(host), mrq->stop->opcode, | |
109 | mrq->stop->error, | |
110 | mrq->stop->resp[0], mrq->stop->resp[1], | |
111 | mrq->stop->resp[2], mrq->stop->resp[3]); | |
112 | } | |
113 | ||
114 | if (mrq->done) | |
115 | mrq->done(mrq); | |
1da177e4 LT |
116 | } |
117 | } | |
118 | ||
119 | EXPORT_SYMBOL(mmc_request_done); | |
120 | ||
39361851 | 121 | static void |
1da177e4 LT |
122 | mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) |
123 | { | |
976d9276 PO |
124 | #ifdef CONFIG_MMC_DEBUG |
125 | unsigned int i, sz; | |
a84756c5 | 126 | struct scatterlist *sg; |
976d9276 PO |
127 | #endif |
128 | ||
920e70c5 RK |
129 | pr_debug("%s: starting CMD%u arg %08x flags %08x\n", |
130 | mmc_hostname(host), mrq->cmd->opcode, | |
131 | mrq->cmd->arg, mrq->cmd->flags); | |
1da177e4 | 132 | |
e4d21708 PO |
133 | if (mrq->data) { |
134 | pr_debug("%s: blksz %d blocks %d flags %08x " | |
135 | "tsac %d ms nsac %d\n", | |
136 | mmc_hostname(host), mrq->data->blksz, | |
137 | mrq->data->blocks, mrq->data->flags, | |
ce252edd | 138 | mrq->data->timeout_ns / 1000000, |
e4d21708 PO |
139 | mrq->data->timeout_clks); |
140 | } | |
141 | ||
142 | if (mrq->stop) { | |
143 | pr_debug("%s: CMD%u arg %08x flags %08x\n", | |
144 | mmc_hostname(host), mrq->stop->opcode, | |
145 | mrq->stop->arg, mrq->stop->flags); | |
146 | } | |
147 | ||
f22ee4ed | 148 | WARN_ON(!host->claimed); |
1da177e4 | 149 | |
af8350c7 PO |
150 | led_trigger_event(host->led, LED_FULL); |
151 | ||
1da177e4 LT |
152 | mrq->cmd->error = 0; |
153 | mrq->cmd->mrq = mrq; | |
154 | if (mrq->data) { | |
fe4a3c7a | 155 | BUG_ON(mrq->data->blksz > host->max_blk_size); |
55db890a PO |
156 | BUG_ON(mrq->data->blocks > host->max_blk_count); |
157 | BUG_ON(mrq->data->blocks * mrq->data->blksz > | |
158 | host->max_req_size); | |
fe4a3c7a | 159 | |
976d9276 PO |
160 | #ifdef CONFIG_MMC_DEBUG |
161 | sz = 0; | |
a84756c5 PO |
162 | for_each_sg(mrq->data->sg, sg, mrq->data->sg_len, i) |
163 | sz += sg->length; | |
976d9276 PO |
164 | BUG_ON(sz != mrq->data->blocks * mrq->data->blksz); |
165 | #endif | |
166 | ||
1da177e4 LT |
167 | mrq->cmd->data = mrq->data; |
168 | mrq->data->error = 0; | |
169 | mrq->data->mrq = mrq; | |
170 | if (mrq->stop) { | |
171 | mrq->data->stop = mrq->stop; | |
172 | mrq->stop->error = 0; | |
173 | mrq->stop->mrq = mrq; | |
174 | } | |
175 | } | |
176 | host->ops->request(host, mrq); | |
177 | } | |
178 | ||
1da177e4 LT |
179 | static void mmc_wait_done(struct mmc_request *mrq) |
180 | { | |
181 | complete(mrq->done_data); | |
182 | } | |
183 | ||
67a61c48 PO |
184 | /** |
185 | * mmc_wait_for_req - start a request and wait for completion | |
186 | * @host: MMC host to start command | |
187 | * @mrq: MMC request to start | |
188 | * | |
189 | * Start a new MMC custom command request for a host, and wait | |
190 | * for the command to complete. Does not attempt to parse the | |
191 | * response. | |
192 | */ | |
193 | void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq) | |
1da177e4 | 194 | { |
0afffc72 | 195 | DECLARE_COMPLETION_ONSTACK(complete); |
1da177e4 LT |
196 | |
197 | mrq->done_data = &complete; | |
198 | mrq->done = mmc_wait_done; | |
199 | ||
200 | mmc_start_request(host, mrq); | |
201 | ||
202 | wait_for_completion(&complete); | |
1da177e4 LT |
203 | } |
204 | ||
205 | EXPORT_SYMBOL(mmc_wait_for_req); | |
206 | ||
207 | /** | |
208 | * mmc_wait_for_cmd - start a command and wait for completion | |
209 | * @host: MMC host to start command | |
210 | * @cmd: MMC command to start | |
211 | * @retries: maximum number of retries | |
212 | * | |
213 | * Start a new MMC command for a host, and wait for the command | |
214 | * to complete. Return any error that occurred while the command | |
215 | * was executing. Do not attempt to parse the response. | |
216 | */ | |
217 | int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries) | |
218 | { | |
219 | struct mmc_request mrq; | |
220 | ||
d84075c8 | 221 | WARN_ON(!host->claimed); |
1da177e4 LT |
222 | |
223 | memset(&mrq, 0, sizeof(struct mmc_request)); | |
224 | ||
225 | memset(cmd->resp, 0, sizeof(cmd->resp)); | |
226 | cmd->retries = retries; | |
227 | ||
228 | mrq.cmd = cmd; | |
229 | cmd->data = NULL; | |
230 | ||
231 | mmc_wait_for_req(host, &mrq); | |
232 | ||
233 | return cmd->error; | |
234 | } | |
235 | ||
236 | EXPORT_SYMBOL(mmc_wait_for_cmd); | |
237 | ||
d773d725 RK |
238 | /** |
239 | * mmc_set_data_timeout - set the timeout for a data command | |
240 | * @data: data phase for command | |
241 | * @card: the MMC card associated with the data transfer | |
67a61c48 PO |
242 | * |
243 | * Computes the data timeout parameters according to the | |
244 | * correct algorithm given the card type. | |
d773d725 | 245 | */ |
b146d26a | 246 | void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card) |
d773d725 RK |
247 | { |
248 | unsigned int mult; | |
249 | ||
e6f918bf PO |
250 | /* |
251 | * SDIO cards only define an upper 1 s limit on access. | |
252 | */ | |
253 | if (mmc_card_sdio(card)) { | |
254 | data->timeout_ns = 1000000000; | |
255 | data->timeout_clks = 0; | |
256 | return; | |
257 | } | |
258 | ||
d773d725 RK |
259 | /* |
260 | * SD cards use a 100 multiplier rather than 10 | |
261 | */ | |
262 | mult = mmc_card_sd(card) ? 100 : 10; | |
263 | ||
264 | /* | |
265 | * Scale up the multiplier (and therefore the timeout) by | |
266 | * the r2w factor for writes. | |
267 | */ | |
b146d26a | 268 | if (data->flags & MMC_DATA_WRITE) |
d773d725 RK |
269 | mult <<= card->csd.r2w_factor; |
270 | ||
271 | data->timeout_ns = card->csd.tacc_ns * mult; | |
272 | data->timeout_clks = card->csd.tacc_clks * mult; | |
273 | ||
274 | /* | |
275 | * SD cards also have an upper limit on the timeout. | |
276 | */ | |
277 | if (mmc_card_sd(card)) { | |
278 | unsigned int timeout_us, limit_us; | |
279 | ||
280 | timeout_us = data->timeout_ns / 1000; | |
281 | timeout_us += data->timeout_clks * 1000 / | |
282 | (card->host->ios.clock / 1000); | |
283 | ||
b146d26a | 284 | if (data->flags & MMC_DATA_WRITE) |
493890e7 PO |
285 | /* |
286 | * The limit is really 250 ms, but that is | |
287 | * insufficient for some crappy cards. | |
288 | */ | |
289 | limit_us = 300000; | |
d773d725 RK |
290 | else |
291 | limit_us = 100000; | |
292 | ||
fba68bd2 PL |
293 | /* |
294 | * SDHC cards always use these fixed values. | |
295 | */ | |
296 | if (timeout_us > limit_us || mmc_card_blockaddr(card)) { | |
d773d725 RK |
297 | data->timeout_ns = limit_us * 1000; |
298 | data->timeout_clks = 0; | |
299 | } | |
300 | } | |
c0c88871 WM |
301 | /* |
302 | * Some cards need very high timeouts if driven in SPI mode. | |
303 | * The worst observed timeout was 900ms after writing a | |
304 | * continuous stream of data until the internal logic | |
305 | * overflowed. | |
306 | */ | |
307 | if (mmc_host_is_spi(card->host)) { | |
308 | if (data->flags & MMC_DATA_WRITE) { | |
309 | if (data->timeout_ns < 1000000000) | |
310 | data->timeout_ns = 1000000000; /* 1s */ | |
311 | } else { | |
312 | if (data->timeout_ns < 100000000) | |
313 | data->timeout_ns = 100000000; /* 100ms */ | |
314 | } | |
315 | } | |
d773d725 RK |
316 | } |
317 | EXPORT_SYMBOL(mmc_set_data_timeout); | |
318 | ||
ad3868b2 PO |
319 | /** |
320 | * mmc_align_data_size - pads a transfer size to a more optimal value | |
321 | * @card: the MMC card associated with the data transfer | |
322 | * @sz: original transfer size | |
323 | * | |
324 | * Pads the original data size with a number of extra bytes in | |
325 | * order to avoid controller bugs and/or performance hits | |
326 | * (e.g. some controllers revert to PIO for certain sizes). | |
327 | * | |
328 | * Returns the improved size, which might be unmodified. | |
329 | * | |
330 | * Note that this function is only relevant when issuing a | |
331 | * single scatter gather entry. | |
332 | */ | |
333 | unsigned int mmc_align_data_size(struct mmc_card *card, unsigned int sz) | |
334 | { | |
335 | /* | |
336 | * FIXME: We don't have a system for the controller to tell | |
337 | * the core about its problems yet, so for now we just 32-bit | |
338 | * align the size. | |
339 | */ | |
340 | sz = ((sz + 3) / 4) * 4; | |
341 | ||
342 | return sz; | |
343 | } | |
344 | EXPORT_SYMBOL(mmc_align_data_size); | |
345 | ||
1da177e4 | 346 | /** |
2342f332 | 347 | * __mmc_claim_host - exclusively claim a host |
1da177e4 | 348 | * @host: mmc host to claim |
2342f332 | 349 | * @abort: whether or not the operation should be aborted |
1da177e4 | 350 | * |
2342f332 NP |
351 | * Claim a host for a set of operations. If @abort is non null and |
352 | * dereference a non-zero value then this will return prematurely with | |
353 | * that non-zero value without acquiring the lock. Returns zero | |
354 | * with the lock held otherwise. | |
1da177e4 | 355 | */ |
2342f332 | 356 | int __mmc_claim_host(struct mmc_host *host, atomic_t *abort) |
1da177e4 LT |
357 | { |
358 | DECLARE_WAITQUEUE(wait, current); | |
359 | unsigned long flags; | |
2342f332 | 360 | int stop; |
1da177e4 | 361 | |
cf795bfb PO |
362 | might_sleep(); |
363 | ||
1da177e4 LT |
364 | add_wait_queue(&host->wq, &wait); |
365 | spin_lock_irqsave(&host->lock, flags); | |
366 | while (1) { | |
367 | set_current_state(TASK_UNINTERRUPTIBLE); | |
2342f332 NP |
368 | stop = abort ? atomic_read(abort) : 0; |
369 | if (stop || !host->claimed) | |
1da177e4 LT |
370 | break; |
371 | spin_unlock_irqrestore(&host->lock, flags); | |
372 | schedule(); | |
373 | spin_lock_irqsave(&host->lock, flags); | |
374 | } | |
375 | set_current_state(TASK_RUNNING); | |
2342f332 NP |
376 | if (!stop) |
377 | host->claimed = 1; | |
378 | else | |
379 | wake_up(&host->wq); | |
1da177e4 LT |
380 | spin_unlock_irqrestore(&host->lock, flags); |
381 | remove_wait_queue(&host->wq, &wait); | |
2342f332 | 382 | return stop; |
1da177e4 LT |
383 | } |
384 | ||
2342f332 | 385 | EXPORT_SYMBOL(__mmc_claim_host); |
1da177e4 LT |
386 | |
387 | /** | |
388 | * mmc_release_host - release a host | |
389 | * @host: mmc host to release | |
390 | * | |
391 | * Release a MMC host, allowing others to claim the host | |
392 | * for their operations. | |
393 | */ | |
394 | void mmc_release_host(struct mmc_host *host) | |
395 | { | |
396 | unsigned long flags; | |
397 | ||
d84075c8 | 398 | WARN_ON(!host->claimed); |
1da177e4 LT |
399 | |
400 | spin_lock_irqsave(&host->lock, flags); | |
f22ee4ed | 401 | host->claimed = 0; |
1da177e4 LT |
402 | spin_unlock_irqrestore(&host->lock, flags); |
403 | ||
404 | wake_up(&host->wq); | |
405 | } | |
406 | ||
407 | EXPORT_SYMBOL(mmc_release_host); | |
408 | ||
7ea239d9 PO |
409 | /* |
410 | * Internal function that does the actual ios call to the host driver, | |
411 | * optionally printing some debug output. | |
412 | */ | |
920e70c5 RK |
413 | static inline void mmc_set_ios(struct mmc_host *host) |
414 | { | |
415 | struct mmc_ios *ios = &host->ios; | |
416 | ||
cd9277c0 PO |
417 | pr_debug("%s: clock %uHz busmode %u powermode %u cs %u Vdd %u " |
418 | "width %u timing %u\n", | |
920e70c5 RK |
419 | mmc_hostname(host), ios->clock, ios->bus_mode, |
420 | ios->power_mode, ios->chip_select, ios->vdd, | |
cd9277c0 | 421 | ios->bus_width, ios->timing); |
fba68bd2 | 422 | |
920e70c5 RK |
423 | host->ops->set_ios(host, ios); |
424 | } | |
425 | ||
7ea239d9 PO |
426 | /* |
427 | * Control chip select pin on a host. | |
428 | */ | |
da7fbe58 | 429 | void mmc_set_chip_select(struct mmc_host *host, int mode) |
1da177e4 | 430 | { |
da7fbe58 PO |
431 | host->ios.chip_select = mode; |
432 | mmc_set_ios(host); | |
1da177e4 LT |
433 | } |
434 | ||
7ea239d9 PO |
435 | /* |
436 | * Sets the host clock to the highest possible frequency that | |
437 | * is below "hz". | |
438 | */ | |
439 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | |
440 | { | |
441 | WARN_ON(hz < host->f_min); | |
442 | ||
443 | if (hz > host->f_max) | |
444 | hz = host->f_max; | |
445 | ||
446 | host->ios.clock = hz; | |
447 | mmc_set_ios(host); | |
448 | } | |
449 | ||
450 | /* | |
451 | * Change the bus mode (open drain/push-pull) of a host. | |
452 | */ | |
453 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | |
454 | { | |
455 | host->ios.bus_mode = mode; | |
456 | mmc_set_ios(host); | |
457 | } | |
458 | ||
459 | /* | |
460 | * Change data bus width of a host. | |
461 | */ | |
462 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) | |
463 | { | |
464 | host->ios.bus_width = width; | |
465 | mmc_set_ios(host); | |
466 | } | |
467 | ||
86e8286a AV |
468 | /** |
469 | * mmc_vdd_to_ocrbitnum - Convert a voltage to the OCR bit number | |
470 | * @vdd: voltage (mV) | |
471 | * @low_bits: prefer low bits in boundary cases | |
472 | * | |
473 | * This function returns the OCR bit number according to the provided @vdd | |
474 | * value. If conversion is not possible a negative errno value returned. | |
475 | * | |
476 | * Depending on the @low_bits flag the function prefers low or high OCR bits | |
477 | * on boundary voltages. For example, | |
478 | * with @low_bits = true, 3300 mV translates to ilog2(MMC_VDD_32_33); | |
479 | * with @low_bits = false, 3300 mV translates to ilog2(MMC_VDD_33_34); | |
480 | * | |
481 | * Any value in the [1951:1999] range translates to the ilog2(MMC_VDD_20_21). | |
482 | */ | |
483 | static int mmc_vdd_to_ocrbitnum(int vdd, bool low_bits) | |
484 | { | |
485 | const int max_bit = ilog2(MMC_VDD_35_36); | |
486 | int bit; | |
487 | ||
488 | if (vdd < 1650 || vdd > 3600) | |
489 | return -EINVAL; | |
490 | ||
491 | if (vdd >= 1650 && vdd <= 1950) | |
492 | return ilog2(MMC_VDD_165_195); | |
493 | ||
494 | if (low_bits) | |
495 | vdd -= 1; | |
496 | ||
497 | /* Base 2000 mV, step 100 mV, bit's base 8. */ | |
498 | bit = (vdd - 2000) / 100 + 8; | |
499 | if (bit > max_bit) | |
500 | return max_bit; | |
501 | return bit; | |
502 | } | |
503 | ||
504 | /** | |
505 | * mmc_vddrange_to_ocrmask - Convert a voltage range to the OCR mask | |
506 | * @vdd_min: minimum voltage value (mV) | |
507 | * @vdd_max: maximum voltage value (mV) | |
508 | * | |
509 | * This function returns the OCR mask bits according to the provided @vdd_min | |
510 | * and @vdd_max values. If conversion is not possible the function returns 0. | |
511 | * | |
512 | * Notes wrt boundary cases: | |
513 | * This function sets the OCR bits for all boundary voltages, for example | |
514 | * [3300:3400] range is translated to MMC_VDD_32_33 | MMC_VDD_33_34 | | |
515 | * MMC_VDD_34_35 mask. | |
516 | */ | |
517 | u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max) | |
518 | { | |
519 | u32 mask = 0; | |
520 | ||
521 | if (vdd_max < vdd_min) | |
522 | return 0; | |
523 | ||
524 | /* Prefer high bits for the boundary vdd_max values. */ | |
525 | vdd_max = mmc_vdd_to_ocrbitnum(vdd_max, false); | |
526 | if (vdd_max < 0) | |
527 | return 0; | |
528 | ||
529 | /* Prefer low bits for the boundary vdd_min values. */ | |
530 | vdd_min = mmc_vdd_to_ocrbitnum(vdd_min, true); | |
531 | if (vdd_min < 0) | |
532 | return 0; | |
533 | ||
534 | /* Fill the mask, from max bit to min bit. */ | |
535 | while (vdd_max >= vdd_min) | |
536 | mask |= 1 << vdd_max--; | |
537 | ||
538 | return mask; | |
539 | } | |
540 | EXPORT_SYMBOL(mmc_vddrange_to_ocrmask); | |
541 | ||
5c13941a DB |
542 | #ifdef CONFIG_REGULATOR |
543 | ||
544 | /** | |
545 | * mmc_regulator_get_ocrmask - return mask of supported voltages | |
546 | * @supply: regulator to use | |
547 | * | |
548 | * This returns either a negative errno, or a mask of voltages that | |
549 | * can be provided to MMC/SD/SDIO devices using the specified voltage | |
550 | * regulator. This would normally be called before registering the | |
551 | * MMC host adapter. | |
552 | */ | |
553 | int mmc_regulator_get_ocrmask(struct regulator *supply) | |
554 | { | |
555 | int result = 0; | |
556 | int count; | |
557 | int i; | |
558 | ||
559 | count = regulator_count_voltages(supply); | |
560 | if (count < 0) | |
561 | return count; | |
562 | ||
563 | for (i = 0; i < count; i++) { | |
564 | int vdd_uV; | |
565 | int vdd_mV; | |
566 | ||
567 | vdd_uV = regulator_list_voltage(supply, i); | |
568 | if (vdd_uV <= 0) | |
569 | continue; | |
570 | ||
571 | vdd_mV = vdd_uV / 1000; | |
572 | result |= mmc_vddrange_to_ocrmask(vdd_mV, vdd_mV); | |
573 | } | |
574 | ||
575 | return result; | |
576 | } | |
577 | EXPORT_SYMBOL(mmc_regulator_get_ocrmask); | |
578 | ||
579 | /** | |
580 | * mmc_regulator_set_ocr - set regulator to match host->ios voltage | |
581 | * @vdd_bit: zero for power off, else a bit number (host->ios.vdd) | |
582 | * @supply: regulator to use | |
583 | * | |
584 | * Returns zero on success, else negative errno. | |
585 | * | |
586 | * MMC host drivers may use this to enable or disable a regulator using | |
587 | * a particular supply voltage. This would normally be called from the | |
588 | * set_ios() method. | |
589 | */ | |
590 | int mmc_regulator_set_ocr(struct regulator *supply, unsigned short vdd_bit) | |
591 | { | |
592 | int result = 0; | |
593 | int min_uV, max_uV; | |
594 | int enabled; | |
595 | ||
596 | enabled = regulator_is_enabled(supply); | |
597 | if (enabled < 0) | |
598 | return enabled; | |
599 | ||
600 | if (vdd_bit) { | |
601 | int tmp; | |
602 | int voltage; | |
603 | ||
604 | /* REVISIT mmc_vddrange_to_ocrmask() may have set some | |
605 | * bits this regulator doesn't quite support ... don't | |
606 | * be too picky, most cards and regulators are OK with | |
607 | * a 0.1V range goof (it's a small error percentage). | |
608 | */ | |
609 | tmp = vdd_bit - ilog2(MMC_VDD_165_195); | |
610 | if (tmp == 0) { | |
611 | min_uV = 1650 * 1000; | |
612 | max_uV = 1950 * 1000; | |
613 | } else { | |
614 | min_uV = 1900 * 1000 + tmp * 100 * 1000; | |
615 | max_uV = min_uV + 100 * 1000; | |
616 | } | |
617 | ||
618 | /* avoid needless changes to this voltage; the regulator | |
619 | * might not allow this operation | |
620 | */ | |
621 | voltage = regulator_get_voltage(supply); | |
622 | if (voltage < 0) | |
623 | result = voltage; | |
624 | else if (voltage < min_uV || voltage > max_uV) | |
625 | result = regulator_set_voltage(supply, min_uV, max_uV); | |
626 | else | |
627 | result = 0; | |
628 | ||
629 | if (result == 0 && !enabled) | |
630 | result = regulator_enable(supply); | |
631 | } else if (enabled) { | |
632 | result = regulator_disable(supply); | |
633 | } | |
634 | ||
635 | return result; | |
636 | } | |
637 | EXPORT_SYMBOL(mmc_regulator_set_ocr); | |
638 | ||
639 | #endif | |
640 | ||
1da177e4 LT |
641 | /* |
642 | * Mask off any voltages we don't support and select | |
643 | * the lowest voltage | |
644 | */ | |
7ea239d9 | 645 | u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) |
1da177e4 LT |
646 | { |
647 | int bit; | |
648 | ||
649 | ocr &= host->ocr_avail; | |
650 | ||
651 | bit = ffs(ocr); | |
652 | if (bit) { | |
653 | bit -= 1; | |
654 | ||
63ef731a | 655 | ocr &= 3 << bit; |
1da177e4 LT |
656 | |
657 | host->ios.vdd = bit; | |
920e70c5 | 658 | mmc_set_ios(host); |
1da177e4 | 659 | } else { |
f6e10b86 DB |
660 | pr_warning("%s: host doesn't support card's voltages\n", |
661 | mmc_hostname(host)); | |
1da177e4 LT |
662 | ocr = 0; |
663 | } | |
664 | ||
665 | return ocr; | |
666 | } | |
667 | ||
b57c43ad | 668 | /* |
7ea239d9 | 669 | * Select timing parameters for host. |
b57c43ad | 670 | */ |
7ea239d9 | 671 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) |
b57c43ad | 672 | { |
7ea239d9 PO |
673 | host->ios.timing = timing; |
674 | mmc_set_ios(host); | |
b57c43ad PO |
675 | } |
676 | ||
1da177e4 | 677 | /* |
45f8245b RK |
678 | * Apply power to the MMC stack. This is a two-stage process. |
679 | * First, we enable power to the card without the clock running. | |
680 | * We then wait a bit for the power to stabilise. Finally, | |
681 | * enable the bus drivers and clock to the card. | |
682 | * | |
683 | * We must _NOT_ enable the clock prior to power stablising. | |
684 | * | |
685 | * If a host does all the power sequencing itself, ignore the | |
686 | * initial MMC_POWER_UP stage. | |
1da177e4 LT |
687 | */ |
688 | static void mmc_power_up(struct mmc_host *host) | |
689 | { | |
690 | int bit = fls(host->ocr_avail) - 1; | |
691 | ||
692 | host->ios.vdd = bit; | |
af517150 DB |
693 | if (mmc_host_is_spi(host)) { |
694 | host->ios.chip_select = MMC_CS_HIGH; | |
695 | host->ios.bus_mode = MMC_BUSMODE_PUSHPULL; | |
696 | } else { | |
697 | host->ios.chip_select = MMC_CS_DONTCARE; | |
698 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
699 | } | |
1da177e4 | 700 | host->ios.power_mode = MMC_POWER_UP; |
f218278a | 701 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 702 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 703 | mmc_set_ios(host); |
1da177e4 | 704 | |
f9996aee PO |
705 | /* |
706 | * This delay should be sufficient to allow the power supply | |
707 | * to reach the minimum voltage. | |
708 | */ | |
79bccc5a | 709 | mmc_delay(10); |
1da177e4 LT |
710 | |
711 | host->ios.clock = host->f_min; | |
712 | host->ios.power_mode = MMC_POWER_ON; | |
920e70c5 | 713 | mmc_set_ios(host); |
1da177e4 | 714 | |
f9996aee PO |
715 | /* |
716 | * This delay must be at least 74 clock sizes, or 1 ms, or the | |
717 | * time required to reach a stable voltage. | |
718 | */ | |
79bccc5a | 719 | mmc_delay(10); |
1da177e4 LT |
720 | } |
721 | ||
722 | static void mmc_power_off(struct mmc_host *host) | |
723 | { | |
724 | host->ios.clock = 0; | |
725 | host->ios.vdd = 0; | |
af517150 DB |
726 | if (!mmc_host_is_spi(host)) { |
727 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
728 | host->ios.chip_select = MMC_CS_DONTCARE; | |
729 | } | |
1da177e4 | 730 | host->ios.power_mode = MMC_POWER_OFF; |
f218278a | 731 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 732 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 733 | mmc_set_ios(host); |
1da177e4 LT |
734 | } |
735 | ||
39361851 AB |
736 | /* |
737 | * Cleanup when the last reference to the bus operator is dropped. | |
738 | */ | |
261172fd | 739 | static void __mmc_release_bus(struct mmc_host *host) |
39361851 AB |
740 | { |
741 | BUG_ON(!host); | |
742 | BUG_ON(host->bus_refs); | |
743 | BUG_ON(!host->bus_dead); | |
744 | ||
745 | host->bus_ops = NULL; | |
746 | } | |
747 | ||
748 | /* | |
749 | * Increase reference count of bus operator | |
750 | */ | |
751 | static inline void mmc_bus_get(struct mmc_host *host) | |
752 | { | |
753 | unsigned long flags; | |
754 | ||
755 | spin_lock_irqsave(&host->lock, flags); | |
756 | host->bus_refs++; | |
757 | spin_unlock_irqrestore(&host->lock, flags); | |
758 | } | |
759 | ||
760 | /* | |
761 | * Decrease reference count of bus operator and free it if | |
762 | * it is the last reference. | |
763 | */ | |
764 | static inline void mmc_bus_put(struct mmc_host *host) | |
765 | { | |
766 | unsigned long flags; | |
767 | ||
768 | spin_lock_irqsave(&host->lock, flags); | |
769 | host->bus_refs--; | |
770 | if ((host->bus_refs == 0) && host->bus_ops) | |
771 | __mmc_release_bus(host); | |
772 | spin_unlock_irqrestore(&host->lock, flags); | |
773 | } | |
774 | ||
1da177e4 | 775 | /* |
7ea239d9 PO |
776 | * Assign a mmc bus handler to a host. Only one bus handler may control a |
777 | * host at any given time. | |
1da177e4 | 778 | */ |
7ea239d9 | 779 | void mmc_attach_bus(struct mmc_host *host, const struct mmc_bus_ops *ops) |
1da177e4 | 780 | { |
7ea239d9 | 781 | unsigned long flags; |
e45a1bd2 | 782 | |
7ea239d9 PO |
783 | BUG_ON(!host); |
784 | BUG_ON(!ops); | |
b855885e | 785 | |
d84075c8 | 786 | WARN_ON(!host->claimed); |
bce40a36 | 787 | |
7ea239d9 | 788 | spin_lock_irqsave(&host->lock, flags); |
bce40a36 | 789 | |
7ea239d9 PO |
790 | BUG_ON(host->bus_ops); |
791 | BUG_ON(host->bus_refs); | |
b57c43ad | 792 | |
7ea239d9 PO |
793 | host->bus_ops = ops; |
794 | host->bus_refs = 1; | |
795 | host->bus_dead = 0; | |
b57c43ad | 796 | |
7ea239d9 | 797 | spin_unlock_irqrestore(&host->lock, flags); |
b57c43ad PO |
798 | } |
799 | ||
7ea239d9 PO |
800 | /* |
801 | * Remove the current bus handler from a host. Assumes that there are | |
802 | * no interesting cards left, so the bus is powered down. | |
803 | */ | |
804 | void mmc_detach_bus(struct mmc_host *host) | |
7ccd266e | 805 | { |
7ea239d9 | 806 | unsigned long flags; |
7ccd266e | 807 | |
7ea239d9 | 808 | BUG_ON(!host); |
7ccd266e | 809 | |
d84075c8 PO |
810 | WARN_ON(!host->claimed); |
811 | WARN_ON(!host->bus_ops); | |
cd9277c0 | 812 | |
7ea239d9 | 813 | spin_lock_irqsave(&host->lock, flags); |
7ccd266e | 814 | |
7ea239d9 | 815 | host->bus_dead = 1; |
7ccd266e | 816 | |
7ea239d9 | 817 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 | 818 | |
7ea239d9 | 819 | mmc_power_off(host); |
1da177e4 | 820 | |
7ea239d9 | 821 | mmc_bus_put(host); |
1da177e4 LT |
822 | } |
823 | ||
1da177e4 LT |
824 | /** |
825 | * mmc_detect_change - process change of state on a MMC socket | |
826 | * @host: host which changed state. | |
8dc00335 | 827 | * @delay: optional delay to wait before detection (jiffies) |
1da177e4 | 828 | * |
67a61c48 PO |
829 | * MMC drivers should call this when they detect a card has been |
830 | * inserted or removed. The MMC layer will confirm that any | |
831 | * present card is still functional, and initialize any newly | |
832 | * inserted. | |
1da177e4 | 833 | */ |
8dc00335 | 834 | void mmc_detect_change(struct mmc_host *host, unsigned long delay) |
1da177e4 | 835 | { |
3b91e550 | 836 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 | 837 | unsigned long flags; |
01f41ec7 | 838 | spin_lock_irqsave(&host->lock, flags); |
d84075c8 | 839 | WARN_ON(host->removed); |
01f41ec7 | 840 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
841 | #endif |
842 | ||
c4028958 | 843 | mmc_schedule_delayed_work(&host->detect, delay); |
1da177e4 LT |
844 | } |
845 | ||
846 | EXPORT_SYMBOL(mmc_detect_change); | |
847 | ||
848 | ||
b93931a6 | 849 | void mmc_rescan(struct work_struct *work) |
1da177e4 | 850 | { |
c4028958 DH |
851 | struct mmc_host *host = |
852 | container_of(work, struct mmc_host, detect.work); | |
7ea239d9 PO |
853 | u32 ocr; |
854 | int err; | |
1da177e4 | 855 | |
7ea239d9 | 856 | mmc_bus_get(host); |
b855885e | 857 | |
7ea239d9 | 858 | if (host->bus_ops == NULL) { |
1da177e4 | 859 | /* |
7ea239d9 PO |
860 | * Only we can add a new handler, so it's safe to |
861 | * release the lock here. | |
1da177e4 | 862 | */ |
7ea239d9 | 863 | mmc_bus_put(host); |
1da177e4 | 864 | |
28f52482 AV |
865 | if (host->ops->get_cd && host->ops->get_cd(host) == 0) |
866 | goto out; | |
867 | ||
7ea239d9 | 868 | mmc_claim_host(host); |
1da177e4 | 869 | |
7ea239d9 PO |
870 | mmc_power_up(host); |
871 | mmc_go_idle(host); | |
1da177e4 | 872 | |
7ea239d9 | 873 | mmc_send_if_cond(host, host->ocr_avail); |
1da177e4 | 874 | |
5c4e6f13 PO |
875 | /* |
876 | * First we search for SDIO... | |
877 | */ | |
878 | err = mmc_send_io_op_cond(host, 0, &ocr); | |
879 | if (!err) { | |
880 | if (mmc_attach_sdio(host, ocr)) | |
881 | mmc_power_off(host); | |
28f52482 | 882 | goto out; |
5c4e6f13 PO |
883 | } |
884 | ||
885 | /* | |
886 | * ...then normal SD... | |
887 | */ | |
7ea239d9 | 888 | err = mmc_send_app_op_cond(host, 0, &ocr); |
17b0429d | 889 | if (!err) { |
7ea239d9 PO |
890 | if (mmc_attach_sd(host, ocr)) |
891 | mmc_power_off(host); | |
28f52482 | 892 | goto out; |
5c4e6f13 PO |
893 | } |
894 | ||
895 | /* | |
896 | * ...and finally MMC. | |
897 | */ | |
898 | err = mmc_send_op_cond(host, 0, &ocr); | |
899 | if (!err) { | |
900 | if (mmc_attach_mmc(host, ocr)) | |
7ea239d9 | 901 | mmc_power_off(host); |
28f52482 | 902 | goto out; |
7ea239d9 | 903 | } |
5c4e6f13 PO |
904 | |
905 | mmc_release_host(host); | |
906 | mmc_power_off(host); | |
7ea239d9 PO |
907 | } else { |
908 | if (host->bus_ops->detect && !host->bus_dead) | |
909 | host->bus_ops->detect(host); | |
910 | ||
911 | mmc_bus_put(host); | |
912 | } | |
28f52482 AV |
913 | out: |
914 | if (host->caps & MMC_CAP_NEEDS_POLL) | |
915 | mmc_schedule_delayed_work(&host->detect, HZ); | |
1da177e4 LT |
916 | } |
917 | ||
b93931a6 | 918 | void mmc_start_host(struct mmc_host *host) |
1da177e4 | 919 | { |
b93931a6 PO |
920 | mmc_power_off(host); |
921 | mmc_detect_change(host, 0); | |
1da177e4 LT |
922 | } |
923 | ||
b93931a6 | 924 | void mmc_stop_host(struct mmc_host *host) |
1da177e4 | 925 | { |
3b91e550 | 926 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 PO |
927 | unsigned long flags; |
928 | spin_lock_irqsave(&host->lock, flags); | |
3b91e550 | 929 | host->removed = 1; |
1efd48b3 | 930 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
931 | #endif |
932 | ||
7de427d0 | 933 | cancel_delayed_work(&host->detect); |
3b91e550 PO |
934 | mmc_flush_scheduled_work(); |
935 | ||
7ea239d9 PO |
936 | mmc_bus_get(host); |
937 | if (host->bus_ops && !host->bus_dead) { | |
938 | if (host->bus_ops->remove) | |
939 | host->bus_ops->remove(host); | |
940 | ||
941 | mmc_claim_host(host); | |
942 | mmc_detach_bus(host); | |
943 | mmc_release_host(host); | |
1da177e4 | 944 | } |
7ea239d9 PO |
945 | mmc_bus_put(host); |
946 | ||
947 | BUG_ON(host->card); | |
1da177e4 LT |
948 | |
949 | mmc_power_off(host); | |
950 | } | |
951 | ||
1da177e4 LT |
952 | #ifdef CONFIG_PM |
953 | ||
954 | /** | |
955 | * mmc_suspend_host - suspend a host | |
956 | * @host: mmc host | |
957 | * @state: suspend mode (PM_SUSPEND_xxx) | |
958 | */ | |
e5378ca8 | 959 | int mmc_suspend_host(struct mmc_host *host, pm_message_t state) |
1da177e4 | 960 | { |
7de427d0 | 961 | cancel_delayed_work(&host->detect); |
b5af25be PO |
962 | mmc_flush_scheduled_work(); |
963 | ||
7ea239d9 PO |
964 | mmc_bus_get(host); |
965 | if (host->bus_ops && !host->bus_dead) { | |
6abaa0c9 PO |
966 | if (host->bus_ops->suspend) |
967 | host->bus_ops->suspend(host); | |
968 | if (!host->bus_ops->resume) { | |
969 | if (host->bus_ops->remove) | |
970 | host->bus_ops->remove(host); | |
971 | ||
972 | mmc_claim_host(host); | |
973 | mmc_detach_bus(host); | |
974 | mmc_release_host(host); | |
975 | } | |
b5af25be | 976 | } |
7ea239d9 PO |
977 | mmc_bus_put(host); |
978 | ||
1da177e4 | 979 | mmc_power_off(host); |
1da177e4 LT |
980 | |
981 | return 0; | |
982 | } | |
983 | ||
984 | EXPORT_SYMBOL(mmc_suspend_host); | |
985 | ||
986 | /** | |
987 | * mmc_resume_host - resume a previously suspended host | |
988 | * @host: mmc host | |
989 | */ | |
990 | int mmc_resume_host(struct mmc_host *host) | |
991 | { | |
6abaa0c9 PO |
992 | mmc_bus_get(host); |
993 | if (host->bus_ops && !host->bus_dead) { | |
994 | mmc_power_up(host); | |
d3096f88 | 995 | mmc_select_voltage(host, host->ocr); |
6abaa0c9 PO |
996 | BUG_ON(!host->bus_ops->resume); |
997 | host->bus_ops->resume(host); | |
998 | } | |
999 | mmc_bus_put(host); | |
1000 | ||
1001 | /* | |
1002 | * We add a slight delay here so that resume can progress | |
1003 | * in parallel. | |
1004 | */ | |
1005 | mmc_detect_change(host, 1); | |
1da177e4 LT |
1006 | |
1007 | return 0; | |
1008 | } | |
1009 | ||
1010 | EXPORT_SYMBOL(mmc_resume_host); | |
1011 | ||
1012 | #endif | |
1013 | ||
ffce2e7e PO |
1014 | static int __init mmc_init(void) |
1015 | { | |
1016 | int ret; | |
1017 | ||
1018 | workqueue = create_singlethread_workqueue("kmmcd"); | |
1019 | if (!workqueue) | |
1020 | return -ENOMEM; | |
1021 | ||
1022 | ret = mmc_register_bus(); | |
e29a7d73 PO |
1023 | if (ret) |
1024 | goto destroy_workqueue; | |
1025 | ||
1026 | ret = mmc_register_host_class(); | |
1027 | if (ret) | |
1028 | goto unregister_bus; | |
1029 | ||
1030 | ret = sdio_register_bus(); | |
1031 | if (ret) | |
1032 | goto unregister_host_class; | |
1033 | ||
1034 | return 0; | |
1035 | ||
1036 | unregister_host_class: | |
1037 | mmc_unregister_host_class(); | |
1038 | unregister_bus: | |
1039 | mmc_unregister_bus(); | |
1040 | destroy_workqueue: | |
1041 | destroy_workqueue(workqueue); | |
1042 | ||
ffce2e7e PO |
1043 | return ret; |
1044 | } | |
1045 | ||
1046 | static void __exit mmc_exit(void) | |
1047 | { | |
e29a7d73 | 1048 | sdio_unregister_bus(); |
ffce2e7e PO |
1049 | mmc_unregister_host_class(); |
1050 | mmc_unregister_bus(); | |
1051 | destroy_workqueue(workqueue); | |
1052 | } | |
1053 | ||
26074962 | 1054 | subsys_initcall(mmc_init); |
ffce2e7e PO |
1055 | module_exit(mmc_exit); |
1056 | ||
1da177e4 | 1057 | MODULE_LICENSE("GPL"); |