Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
aaac1b47 | 2 | * linux/drivers/mmc/core/core.c |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2003-2004 Russell King, All Rights Reserved. | |
5b4fd9ae | 5 | * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved. |
b855885e | 6 | * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved. |
bce40a36 | 7 | * MMCv4 support Copyright (C) 2006 Philip Langdale, All Rights Reserved. |
1da177e4 LT |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
1da177e4 LT |
13 | #include <linux/module.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/completion.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pagemap.h> | |
20 | #include <linux/err.h> | |
af8350c7 | 21 | #include <linux/leds.h> |
b57c43ad PO |
22 | #include <asm/scatterlist.h> |
23 | #include <linux/scatterlist.h> | |
1da177e4 LT |
24 | |
25 | #include <linux/mmc/card.h> | |
26 | #include <linux/mmc/host.h> | |
da7fbe58 PO |
27 | #include <linux/mmc/mmc.h> |
28 | #include <linux/mmc/sd.h> | |
1da177e4 | 29 | |
aaac1b47 | 30 | #include "core.h" |
ffce2e7e PO |
31 | #include "bus.h" |
32 | #include "host.h" | |
e29a7d73 | 33 | #include "sdio_bus.h" |
da7fbe58 PO |
34 | |
35 | #include "mmc_ops.h" | |
36 | #include "sd_ops.h" | |
5c4e6f13 | 37 | #include "sdio_ops.h" |
1da177e4 | 38 | |
7ea239d9 PO |
39 | extern int mmc_attach_mmc(struct mmc_host *host, u32 ocr); |
40 | extern int mmc_attach_sd(struct mmc_host *host, u32 ocr); | |
5c4e6f13 | 41 | extern int mmc_attach_sdio(struct mmc_host *host, u32 ocr); |
1da177e4 | 42 | |
ffce2e7e PO |
43 | static struct workqueue_struct *workqueue; |
44 | ||
af517150 DB |
45 | /* |
46 | * Enabling software CRCs on the data blocks can be a significant (30%) | |
47 | * performance cost, and for other reasons may not always be desired. | |
48 | * So we allow it it to be disabled. | |
49 | */ | |
50 | int use_spi_crc = 1; | |
51 | module_param(use_spi_crc, bool, 0); | |
52 | ||
ffce2e7e PO |
53 | /* |
54 | * Internal function. Schedule delayed work in the MMC work queue. | |
55 | */ | |
56 | static int mmc_schedule_delayed_work(struct delayed_work *work, | |
57 | unsigned long delay) | |
58 | { | |
59 | return queue_delayed_work(workqueue, work, delay); | |
60 | } | |
61 | ||
62 | /* | |
63 | * Internal function. Flush all scheduled work from the MMC work queue. | |
64 | */ | |
65 | static void mmc_flush_scheduled_work(void) | |
66 | { | |
67 | flush_workqueue(workqueue); | |
68 | } | |
69 | ||
1da177e4 | 70 | /** |
fe10c6ab RK |
71 | * mmc_request_done - finish processing an MMC request |
72 | * @host: MMC host which completed request | |
73 | * @mrq: MMC request which request | |
1da177e4 LT |
74 | * |
75 | * MMC drivers should call this function when they have completed | |
fe10c6ab | 76 | * their processing of a request. |
1da177e4 LT |
77 | */ |
78 | void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |
79 | { | |
80 | struct mmc_command *cmd = mrq->cmd; | |
920e70c5 RK |
81 | int err = cmd->error; |
82 | ||
af517150 DB |
83 | if (err && cmd->retries && mmc_host_is_spi(host)) { |
84 | if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND) | |
85 | cmd->retries = 0; | |
86 | } | |
87 | ||
1da177e4 | 88 | if (err && cmd->retries) { |
e4d21708 PO |
89 | pr_debug("%s: req failed (CMD%u): %d, retrying...\n", |
90 | mmc_hostname(host), cmd->opcode, err); | |
91 | ||
1da177e4 LT |
92 | cmd->retries--; |
93 | cmd->error = 0; | |
94 | host->ops->request(host, mrq); | |
e4d21708 | 95 | } else { |
af8350c7 PO |
96 | led_trigger_event(host->led, LED_OFF); |
97 | ||
e4d21708 PO |
98 | pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n", |
99 | mmc_hostname(host), cmd->opcode, err, | |
100 | cmd->resp[0], cmd->resp[1], | |
101 | cmd->resp[2], cmd->resp[3]); | |
102 | ||
103 | if (mrq->data) { | |
104 | pr_debug("%s: %d bytes transferred: %d\n", | |
105 | mmc_hostname(host), | |
106 | mrq->data->bytes_xfered, mrq->data->error); | |
107 | } | |
108 | ||
109 | if (mrq->stop) { | |
110 | pr_debug("%s: (CMD%u): %d: %08x %08x %08x %08x\n", | |
111 | mmc_hostname(host), mrq->stop->opcode, | |
112 | mrq->stop->error, | |
113 | mrq->stop->resp[0], mrq->stop->resp[1], | |
114 | mrq->stop->resp[2], mrq->stop->resp[3]); | |
115 | } | |
116 | ||
117 | if (mrq->done) | |
118 | mrq->done(mrq); | |
1da177e4 LT |
119 | } |
120 | } | |
121 | ||
122 | EXPORT_SYMBOL(mmc_request_done); | |
123 | ||
39361851 | 124 | static void |
1da177e4 LT |
125 | mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) |
126 | { | |
976d9276 PO |
127 | #ifdef CONFIG_MMC_DEBUG |
128 | unsigned int i, sz; | |
129 | #endif | |
130 | ||
920e70c5 RK |
131 | pr_debug("%s: starting CMD%u arg %08x flags %08x\n", |
132 | mmc_hostname(host), mrq->cmd->opcode, | |
133 | mrq->cmd->arg, mrq->cmd->flags); | |
1da177e4 | 134 | |
e4d21708 PO |
135 | if (mrq->data) { |
136 | pr_debug("%s: blksz %d blocks %d flags %08x " | |
137 | "tsac %d ms nsac %d\n", | |
138 | mmc_hostname(host), mrq->data->blksz, | |
139 | mrq->data->blocks, mrq->data->flags, | |
ce252edd | 140 | mrq->data->timeout_ns / 1000000, |
e4d21708 PO |
141 | mrq->data->timeout_clks); |
142 | } | |
143 | ||
144 | if (mrq->stop) { | |
145 | pr_debug("%s: CMD%u arg %08x flags %08x\n", | |
146 | mmc_hostname(host), mrq->stop->opcode, | |
147 | mrq->stop->arg, mrq->stop->flags); | |
148 | } | |
149 | ||
f22ee4ed | 150 | WARN_ON(!host->claimed); |
1da177e4 | 151 | |
af8350c7 PO |
152 | led_trigger_event(host->led, LED_FULL); |
153 | ||
1da177e4 LT |
154 | mrq->cmd->error = 0; |
155 | mrq->cmd->mrq = mrq; | |
156 | if (mrq->data) { | |
fe4a3c7a | 157 | BUG_ON(mrq->data->blksz > host->max_blk_size); |
55db890a PO |
158 | BUG_ON(mrq->data->blocks > host->max_blk_count); |
159 | BUG_ON(mrq->data->blocks * mrq->data->blksz > | |
160 | host->max_req_size); | |
fe4a3c7a | 161 | |
976d9276 PO |
162 | #ifdef CONFIG_MMC_DEBUG |
163 | sz = 0; | |
164 | for (i = 0;i < mrq->data->sg_len;i++) | |
165 | sz += mrq->data->sg[i].length; | |
166 | BUG_ON(sz != mrq->data->blocks * mrq->data->blksz); | |
167 | #endif | |
168 | ||
1da177e4 LT |
169 | mrq->cmd->data = mrq->data; |
170 | mrq->data->error = 0; | |
171 | mrq->data->mrq = mrq; | |
172 | if (mrq->stop) { | |
173 | mrq->data->stop = mrq->stop; | |
174 | mrq->stop->error = 0; | |
175 | mrq->stop->mrq = mrq; | |
176 | } | |
177 | } | |
178 | host->ops->request(host, mrq); | |
179 | } | |
180 | ||
1da177e4 LT |
181 | static void mmc_wait_done(struct mmc_request *mrq) |
182 | { | |
183 | complete(mrq->done_data); | |
184 | } | |
185 | ||
67a61c48 PO |
186 | /** |
187 | * mmc_wait_for_req - start a request and wait for completion | |
188 | * @host: MMC host to start command | |
189 | * @mrq: MMC request to start | |
190 | * | |
191 | * Start a new MMC custom command request for a host, and wait | |
192 | * for the command to complete. Does not attempt to parse the | |
193 | * response. | |
194 | */ | |
195 | void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq) | |
1da177e4 | 196 | { |
0afffc72 | 197 | DECLARE_COMPLETION_ONSTACK(complete); |
1da177e4 LT |
198 | |
199 | mrq->done_data = &complete; | |
200 | mrq->done = mmc_wait_done; | |
201 | ||
202 | mmc_start_request(host, mrq); | |
203 | ||
204 | wait_for_completion(&complete); | |
1da177e4 LT |
205 | } |
206 | ||
207 | EXPORT_SYMBOL(mmc_wait_for_req); | |
208 | ||
209 | /** | |
210 | * mmc_wait_for_cmd - start a command and wait for completion | |
211 | * @host: MMC host to start command | |
212 | * @cmd: MMC command to start | |
213 | * @retries: maximum number of retries | |
214 | * | |
215 | * Start a new MMC command for a host, and wait for the command | |
216 | * to complete. Return any error that occurred while the command | |
217 | * was executing. Do not attempt to parse the response. | |
218 | */ | |
219 | int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries) | |
220 | { | |
221 | struct mmc_request mrq; | |
222 | ||
d84075c8 | 223 | WARN_ON(!host->claimed); |
1da177e4 LT |
224 | |
225 | memset(&mrq, 0, sizeof(struct mmc_request)); | |
226 | ||
227 | memset(cmd->resp, 0, sizeof(cmd->resp)); | |
228 | cmd->retries = retries; | |
229 | ||
230 | mrq.cmd = cmd; | |
231 | cmd->data = NULL; | |
232 | ||
233 | mmc_wait_for_req(host, &mrq); | |
234 | ||
235 | return cmd->error; | |
236 | } | |
237 | ||
238 | EXPORT_SYMBOL(mmc_wait_for_cmd); | |
239 | ||
d773d725 RK |
240 | /** |
241 | * mmc_set_data_timeout - set the timeout for a data command | |
242 | * @data: data phase for command | |
243 | * @card: the MMC card associated with the data transfer | |
67a61c48 PO |
244 | * |
245 | * Computes the data timeout parameters according to the | |
246 | * correct algorithm given the card type. | |
d773d725 | 247 | */ |
b146d26a | 248 | void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card) |
d773d725 RK |
249 | { |
250 | unsigned int mult; | |
251 | ||
e6f918bf PO |
252 | /* |
253 | * SDIO cards only define an upper 1 s limit on access. | |
254 | */ | |
255 | if (mmc_card_sdio(card)) { | |
256 | data->timeout_ns = 1000000000; | |
257 | data->timeout_clks = 0; | |
258 | return; | |
259 | } | |
260 | ||
d773d725 RK |
261 | /* |
262 | * SD cards use a 100 multiplier rather than 10 | |
263 | */ | |
264 | mult = mmc_card_sd(card) ? 100 : 10; | |
265 | ||
266 | /* | |
267 | * Scale up the multiplier (and therefore the timeout) by | |
268 | * the r2w factor for writes. | |
269 | */ | |
b146d26a | 270 | if (data->flags & MMC_DATA_WRITE) |
d773d725 RK |
271 | mult <<= card->csd.r2w_factor; |
272 | ||
273 | data->timeout_ns = card->csd.tacc_ns * mult; | |
274 | data->timeout_clks = card->csd.tacc_clks * mult; | |
275 | ||
276 | /* | |
277 | * SD cards also have an upper limit on the timeout. | |
278 | */ | |
279 | if (mmc_card_sd(card)) { | |
280 | unsigned int timeout_us, limit_us; | |
281 | ||
282 | timeout_us = data->timeout_ns / 1000; | |
283 | timeout_us += data->timeout_clks * 1000 / | |
284 | (card->host->ios.clock / 1000); | |
285 | ||
b146d26a | 286 | if (data->flags & MMC_DATA_WRITE) |
d773d725 RK |
287 | limit_us = 250000; |
288 | else | |
289 | limit_us = 100000; | |
290 | ||
fba68bd2 PL |
291 | /* |
292 | * SDHC cards always use these fixed values. | |
293 | */ | |
294 | if (timeout_us > limit_us || mmc_card_blockaddr(card)) { | |
d773d725 RK |
295 | data->timeout_ns = limit_us * 1000; |
296 | data->timeout_clks = 0; | |
297 | } | |
298 | } | |
299 | } | |
300 | EXPORT_SYMBOL(mmc_set_data_timeout); | |
301 | ||
1da177e4 | 302 | /** |
2342f332 | 303 | * __mmc_claim_host - exclusively claim a host |
1da177e4 | 304 | * @host: mmc host to claim |
2342f332 | 305 | * @abort: whether or not the operation should be aborted |
1da177e4 | 306 | * |
2342f332 NP |
307 | * Claim a host for a set of operations. If @abort is non null and |
308 | * dereference a non-zero value then this will return prematurely with | |
309 | * that non-zero value without acquiring the lock. Returns zero | |
310 | * with the lock held otherwise. | |
1da177e4 | 311 | */ |
2342f332 | 312 | int __mmc_claim_host(struct mmc_host *host, atomic_t *abort) |
1da177e4 LT |
313 | { |
314 | DECLARE_WAITQUEUE(wait, current); | |
315 | unsigned long flags; | |
2342f332 | 316 | int stop; |
1da177e4 | 317 | |
cf795bfb PO |
318 | might_sleep(); |
319 | ||
1da177e4 LT |
320 | add_wait_queue(&host->wq, &wait); |
321 | spin_lock_irqsave(&host->lock, flags); | |
322 | while (1) { | |
323 | set_current_state(TASK_UNINTERRUPTIBLE); | |
2342f332 NP |
324 | stop = abort ? atomic_read(abort) : 0; |
325 | if (stop || !host->claimed) | |
1da177e4 LT |
326 | break; |
327 | spin_unlock_irqrestore(&host->lock, flags); | |
328 | schedule(); | |
329 | spin_lock_irqsave(&host->lock, flags); | |
330 | } | |
331 | set_current_state(TASK_RUNNING); | |
2342f332 NP |
332 | if (!stop) |
333 | host->claimed = 1; | |
334 | else | |
335 | wake_up(&host->wq); | |
1da177e4 LT |
336 | spin_unlock_irqrestore(&host->lock, flags); |
337 | remove_wait_queue(&host->wq, &wait); | |
2342f332 | 338 | return stop; |
1da177e4 LT |
339 | } |
340 | ||
2342f332 | 341 | EXPORT_SYMBOL(__mmc_claim_host); |
1da177e4 LT |
342 | |
343 | /** | |
344 | * mmc_release_host - release a host | |
345 | * @host: mmc host to release | |
346 | * | |
347 | * Release a MMC host, allowing others to claim the host | |
348 | * for their operations. | |
349 | */ | |
350 | void mmc_release_host(struct mmc_host *host) | |
351 | { | |
352 | unsigned long flags; | |
353 | ||
d84075c8 | 354 | WARN_ON(!host->claimed); |
1da177e4 LT |
355 | |
356 | spin_lock_irqsave(&host->lock, flags); | |
f22ee4ed | 357 | host->claimed = 0; |
1da177e4 LT |
358 | spin_unlock_irqrestore(&host->lock, flags); |
359 | ||
360 | wake_up(&host->wq); | |
361 | } | |
362 | ||
363 | EXPORT_SYMBOL(mmc_release_host); | |
364 | ||
7ea239d9 PO |
365 | /* |
366 | * Internal function that does the actual ios call to the host driver, | |
367 | * optionally printing some debug output. | |
368 | */ | |
920e70c5 RK |
369 | static inline void mmc_set_ios(struct mmc_host *host) |
370 | { | |
371 | struct mmc_ios *ios = &host->ios; | |
372 | ||
cd9277c0 PO |
373 | pr_debug("%s: clock %uHz busmode %u powermode %u cs %u Vdd %u " |
374 | "width %u timing %u\n", | |
920e70c5 RK |
375 | mmc_hostname(host), ios->clock, ios->bus_mode, |
376 | ios->power_mode, ios->chip_select, ios->vdd, | |
cd9277c0 | 377 | ios->bus_width, ios->timing); |
fba68bd2 | 378 | |
920e70c5 RK |
379 | host->ops->set_ios(host, ios); |
380 | } | |
381 | ||
7ea239d9 PO |
382 | /* |
383 | * Control chip select pin on a host. | |
384 | */ | |
da7fbe58 | 385 | void mmc_set_chip_select(struct mmc_host *host, int mode) |
1da177e4 | 386 | { |
da7fbe58 PO |
387 | host->ios.chip_select = mode; |
388 | mmc_set_ios(host); | |
1da177e4 LT |
389 | } |
390 | ||
7ea239d9 PO |
391 | /* |
392 | * Sets the host clock to the highest possible frequency that | |
393 | * is below "hz". | |
394 | */ | |
395 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | |
396 | { | |
397 | WARN_ON(hz < host->f_min); | |
398 | ||
399 | if (hz > host->f_max) | |
400 | hz = host->f_max; | |
401 | ||
402 | host->ios.clock = hz; | |
403 | mmc_set_ios(host); | |
404 | } | |
405 | ||
406 | /* | |
407 | * Change the bus mode (open drain/push-pull) of a host. | |
408 | */ | |
409 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | |
410 | { | |
411 | host->ios.bus_mode = mode; | |
412 | mmc_set_ios(host); | |
413 | } | |
414 | ||
415 | /* | |
416 | * Change data bus width of a host. | |
417 | */ | |
418 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) | |
419 | { | |
420 | host->ios.bus_width = width; | |
421 | mmc_set_ios(host); | |
422 | } | |
423 | ||
1da177e4 LT |
424 | /* |
425 | * Mask off any voltages we don't support and select | |
426 | * the lowest voltage | |
427 | */ | |
7ea239d9 | 428 | u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) |
1da177e4 LT |
429 | { |
430 | int bit; | |
431 | ||
432 | ocr &= host->ocr_avail; | |
433 | ||
434 | bit = ffs(ocr); | |
435 | if (bit) { | |
436 | bit -= 1; | |
437 | ||
63ef731a | 438 | ocr &= 3 << bit; |
1da177e4 LT |
439 | |
440 | host->ios.vdd = bit; | |
920e70c5 | 441 | mmc_set_ios(host); |
1da177e4 LT |
442 | } else { |
443 | ocr = 0; | |
444 | } | |
445 | ||
446 | return ocr; | |
447 | } | |
448 | ||
b57c43ad | 449 | /* |
7ea239d9 | 450 | * Select timing parameters for host. |
b57c43ad | 451 | */ |
7ea239d9 | 452 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) |
b57c43ad | 453 | { |
7ea239d9 PO |
454 | host->ios.timing = timing; |
455 | mmc_set_ios(host); | |
b57c43ad PO |
456 | } |
457 | ||
1da177e4 | 458 | /* |
45f8245b RK |
459 | * Apply power to the MMC stack. This is a two-stage process. |
460 | * First, we enable power to the card without the clock running. | |
461 | * We then wait a bit for the power to stabilise. Finally, | |
462 | * enable the bus drivers and clock to the card. | |
463 | * | |
464 | * We must _NOT_ enable the clock prior to power stablising. | |
465 | * | |
466 | * If a host does all the power sequencing itself, ignore the | |
467 | * initial MMC_POWER_UP stage. | |
1da177e4 LT |
468 | */ |
469 | static void mmc_power_up(struct mmc_host *host) | |
470 | { | |
471 | int bit = fls(host->ocr_avail) - 1; | |
472 | ||
473 | host->ios.vdd = bit; | |
af517150 DB |
474 | if (mmc_host_is_spi(host)) { |
475 | host->ios.chip_select = MMC_CS_HIGH; | |
476 | host->ios.bus_mode = MMC_BUSMODE_PUSHPULL; | |
477 | } else { | |
478 | host->ios.chip_select = MMC_CS_DONTCARE; | |
479 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
480 | } | |
1da177e4 | 481 | host->ios.power_mode = MMC_POWER_UP; |
f218278a | 482 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 483 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 484 | mmc_set_ios(host); |
1da177e4 | 485 | |
f9996aee PO |
486 | /* |
487 | * This delay should be sufficient to allow the power supply | |
488 | * to reach the minimum voltage. | |
489 | */ | |
490 | mmc_delay(2); | |
1da177e4 LT |
491 | |
492 | host->ios.clock = host->f_min; | |
493 | host->ios.power_mode = MMC_POWER_ON; | |
920e70c5 | 494 | mmc_set_ios(host); |
1da177e4 | 495 | |
f9996aee PO |
496 | /* |
497 | * This delay must be at least 74 clock sizes, or 1 ms, or the | |
498 | * time required to reach a stable voltage. | |
499 | */ | |
1da177e4 LT |
500 | mmc_delay(2); |
501 | } | |
502 | ||
503 | static void mmc_power_off(struct mmc_host *host) | |
504 | { | |
505 | host->ios.clock = 0; | |
506 | host->ios.vdd = 0; | |
af517150 DB |
507 | if (!mmc_host_is_spi(host)) { |
508 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
509 | host->ios.chip_select = MMC_CS_DONTCARE; | |
510 | } | |
1da177e4 | 511 | host->ios.power_mode = MMC_POWER_OFF; |
f218278a | 512 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 513 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 514 | mmc_set_ios(host); |
1da177e4 LT |
515 | } |
516 | ||
39361851 AB |
517 | /* |
518 | * Cleanup when the last reference to the bus operator is dropped. | |
519 | */ | |
520 | void __mmc_release_bus(struct mmc_host *host) | |
521 | { | |
522 | BUG_ON(!host); | |
523 | BUG_ON(host->bus_refs); | |
524 | BUG_ON(!host->bus_dead); | |
525 | ||
526 | host->bus_ops = NULL; | |
527 | } | |
528 | ||
529 | /* | |
530 | * Increase reference count of bus operator | |
531 | */ | |
532 | static inline void mmc_bus_get(struct mmc_host *host) | |
533 | { | |
534 | unsigned long flags; | |
535 | ||
536 | spin_lock_irqsave(&host->lock, flags); | |
537 | host->bus_refs++; | |
538 | spin_unlock_irqrestore(&host->lock, flags); | |
539 | } | |
540 | ||
541 | /* | |
542 | * Decrease reference count of bus operator and free it if | |
543 | * it is the last reference. | |
544 | */ | |
545 | static inline void mmc_bus_put(struct mmc_host *host) | |
546 | { | |
547 | unsigned long flags; | |
548 | ||
549 | spin_lock_irqsave(&host->lock, flags); | |
550 | host->bus_refs--; | |
551 | if ((host->bus_refs == 0) && host->bus_ops) | |
552 | __mmc_release_bus(host); | |
553 | spin_unlock_irqrestore(&host->lock, flags); | |
554 | } | |
555 | ||
1da177e4 | 556 | /* |
7ea239d9 PO |
557 | * Assign a mmc bus handler to a host. Only one bus handler may control a |
558 | * host at any given time. | |
1da177e4 | 559 | */ |
7ea239d9 | 560 | void mmc_attach_bus(struct mmc_host *host, const struct mmc_bus_ops *ops) |
1da177e4 | 561 | { |
7ea239d9 | 562 | unsigned long flags; |
e45a1bd2 | 563 | |
7ea239d9 PO |
564 | BUG_ON(!host); |
565 | BUG_ON(!ops); | |
b855885e | 566 | |
d84075c8 | 567 | WARN_ON(!host->claimed); |
bce40a36 | 568 | |
7ea239d9 | 569 | spin_lock_irqsave(&host->lock, flags); |
bce40a36 | 570 | |
7ea239d9 PO |
571 | BUG_ON(host->bus_ops); |
572 | BUG_ON(host->bus_refs); | |
b57c43ad | 573 | |
7ea239d9 PO |
574 | host->bus_ops = ops; |
575 | host->bus_refs = 1; | |
576 | host->bus_dead = 0; | |
b57c43ad | 577 | |
7ea239d9 | 578 | spin_unlock_irqrestore(&host->lock, flags); |
b57c43ad PO |
579 | } |
580 | ||
7ea239d9 PO |
581 | /* |
582 | * Remove the current bus handler from a host. Assumes that there are | |
583 | * no interesting cards left, so the bus is powered down. | |
584 | */ | |
585 | void mmc_detach_bus(struct mmc_host *host) | |
7ccd266e | 586 | { |
7ea239d9 | 587 | unsigned long flags; |
7ccd266e | 588 | |
7ea239d9 | 589 | BUG_ON(!host); |
7ccd266e | 590 | |
d84075c8 PO |
591 | WARN_ON(!host->claimed); |
592 | WARN_ON(!host->bus_ops); | |
cd9277c0 | 593 | |
7ea239d9 | 594 | spin_lock_irqsave(&host->lock, flags); |
7ccd266e | 595 | |
7ea239d9 | 596 | host->bus_dead = 1; |
7ccd266e | 597 | |
7ea239d9 | 598 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 | 599 | |
7ea239d9 | 600 | mmc_power_off(host); |
1da177e4 | 601 | |
7ea239d9 | 602 | mmc_bus_put(host); |
1da177e4 LT |
603 | } |
604 | ||
1da177e4 LT |
605 | /** |
606 | * mmc_detect_change - process change of state on a MMC socket | |
607 | * @host: host which changed state. | |
8dc00335 | 608 | * @delay: optional delay to wait before detection (jiffies) |
1da177e4 | 609 | * |
67a61c48 PO |
610 | * MMC drivers should call this when they detect a card has been |
611 | * inserted or removed. The MMC layer will confirm that any | |
612 | * present card is still functional, and initialize any newly | |
613 | * inserted. | |
1da177e4 | 614 | */ |
8dc00335 | 615 | void mmc_detect_change(struct mmc_host *host, unsigned long delay) |
1da177e4 | 616 | { |
3b91e550 | 617 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 | 618 | unsigned long flags; |
01f41ec7 | 619 | spin_lock_irqsave(&host->lock, flags); |
d84075c8 | 620 | WARN_ON(host->removed); |
01f41ec7 | 621 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
622 | #endif |
623 | ||
c4028958 | 624 | mmc_schedule_delayed_work(&host->detect, delay); |
1da177e4 LT |
625 | } |
626 | ||
627 | EXPORT_SYMBOL(mmc_detect_change); | |
628 | ||
629 | ||
b93931a6 | 630 | void mmc_rescan(struct work_struct *work) |
1da177e4 | 631 | { |
c4028958 DH |
632 | struct mmc_host *host = |
633 | container_of(work, struct mmc_host, detect.work); | |
7ea239d9 PO |
634 | u32 ocr; |
635 | int err; | |
1da177e4 | 636 | |
7ea239d9 | 637 | mmc_bus_get(host); |
b855885e | 638 | |
7ea239d9 | 639 | if (host->bus_ops == NULL) { |
1da177e4 | 640 | /* |
7ea239d9 PO |
641 | * Only we can add a new handler, so it's safe to |
642 | * release the lock here. | |
1da177e4 | 643 | */ |
7ea239d9 | 644 | mmc_bus_put(host); |
1da177e4 | 645 | |
7ea239d9 | 646 | mmc_claim_host(host); |
1da177e4 | 647 | |
7ea239d9 PO |
648 | mmc_power_up(host); |
649 | mmc_go_idle(host); | |
1da177e4 | 650 | |
7ea239d9 | 651 | mmc_send_if_cond(host, host->ocr_avail); |
1da177e4 | 652 | |
5c4e6f13 PO |
653 | /* |
654 | * First we search for SDIO... | |
655 | */ | |
656 | err = mmc_send_io_op_cond(host, 0, &ocr); | |
657 | if (!err) { | |
658 | if (mmc_attach_sdio(host, ocr)) | |
659 | mmc_power_off(host); | |
660 | return; | |
661 | } | |
662 | ||
663 | /* | |
664 | * ...then normal SD... | |
665 | */ | |
7ea239d9 | 666 | err = mmc_send_app_op_cond(host, 0, &ocr); |
17b0429d | 667 | if (!err) { |
7ea239d9 PO |
668 | if (mmc_attach_sd(host, ocr)) |
669 | mmc_power_off(host); | |
5c4e6f13 PO |
670 | return; |
671 | } | |
672 | ||
673 | /* | |
674 | * ...and finally MMC. | |
675 | */ | |
676 | err = mmc_send_op_cond(host, 0, &ocr); | |
677 | if (!err) { | |
678 | if (mmc_attach_mmc(host, ocr)) | |
7ea239d9 | 679 | mmc_power_off(host); |
5c4e6f13 | 680 | return; |
7ea239d9 | 681 | } |
5c4e6f13 PO |
682 | |
683 | mmc_release_host(host); | |
684 | mmc_power_off(host); | |
7ea239d9 PO |
685 | } else { |
686 | if (host->bus_ops->detect && !host->bus_dead) | |
687 | host->bus_ops->detect(host); | |
688 | ||
689 | mmc_bus_put(host); | |
690 | } | |
1da177e4 LT |
691 | } |
692 | ||
b93931a6 | 693 | void mmc_start_host(struct mmc_host *host) |
1da177e4 | 694 | { |
b93931a6 PO |
695 | mmc_power_off(host); |
696 | mmc_detect_change(host, 0); | |
1da177e4 LT |
697 | } |
698 | ||
b93931a6 | 699 | void mmc_stop_host(struct mmc_host *host) |
1da177e4 | 700 | { |
3b91e550 | 701 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 PO |
702 | unsigned long flags; |
703 | spin_lock_irqsave(&host->lock, flags); | |
3b91e550 | 704 | host->removed = 1; |
1efd48b3 | 705 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
706 | #endif |
707 | ||
708 | mmc_flush_scheduled_work(); | |
709 | ||
7ea239d9 PO |
710 | mmc_bus_get(host); |
711 | if (host->bus_ops && !host->bus_dead) { | |
712 | if (host->bus_ops->remove) | |
713 | host->bus_ops->remove(host); | |
714 | ||
715 | mmc_claim_host(host); | |
716 | mmc_detach_bus(host); | |
717 | mmc_release_host(host); | |
1da177e4 | 718 | } |
7ea239d9 PO |
719 | mmc_bus_put(host); |
720 | ||
721 | BUG_ON(host->card); | |
1da177e4 LT |
722 | |
723 | mmc_power_off(host); | |
724 | } | |
725 | ||
1da177e4 LT |
726 | #ifdef CONFIG_PM |
727 | ||
728 | /** | |
729 | * mmc_suspend_host - suspend a host | |
730 | * @host: mmc host | |
731 | * @state: suspend mode (PM_SUSPEND_xxx) | |
732 | */ | |
e5378ca8 | 733 | int mmc_suspend_host(struct mmc_host *host, pm_message_t state) |
1da177e4 | 734 | { |
b5af25be PO |
735 | mmc_flush_scheduled_work(); |
736 | ||
7ea239d9 PO |
737 | mmc_bus_get(host); |
738 | if (host->bus_ops && !host->bus_dead) { | |
6abaa0c9 PO |
739 | if (host->bus_ops->suspend) |
740 | host->bus_ops->suspend(host); | |
741 | if (!host->bus_ops->resume) { | |
742 | if (host->bus_ops->remove) | |
743 | host->bus_ops->remove(host); | |
744 | ||
745 | mmc_claim_host(host); | |
746 | mmc_detach_bus(host); | |
747 | mmc_release_host(host); | |
748 | } | |
b5af25be | 749 | } |
7ea239d9 PO |
750 | mmc_bus_put(host); |
751 | ||
1da177e4 | 752 | mmc_power_off(host); |
1da177e4 LT |
753 | |
754 | return 0; | |
755 | } | |
756 | ||
757 | EXPORT_SYMBOL(mmc_suspend_host); | |
758 | ||
759 | /** | |
760 | * mmc_resume_host - resume a previously suspended host | |
761 | * @host: mmc host | |
762 | */ | |
763 | int mmc_resume_host(struct mmc_host *host) | |
764 | { | |
6abaa0c9 PO |
765 | mmc_bus_get(host); |
766 | if (host->bus_ops && !host->bus_dead) { | |
767 | mmc_power_up(host); | |
768 | BUG_ON(!host->bus_ops->resume); | |
769 | host->bus_ops->resume(host); | |
770 | } | |
771 | mmc_bus_put(host); | |
772 | ||
773 | /* | |
774 | * We add a slight delay here so that resume can progress | |
775 | * in parallel. | |
776 | */ | |
777 | mmc_detect_change(host, 1); | |
1da177e4 LT |
778 | |
779 | return 0; | |
780 | } | |
781 | ||
782 | EXPORT_SYMBOL(mmc_resume_host); | |
783 | ||
784 | #endif | |
785 | ||
ffce2e7e PO |
786 | static int __init mmc_init(void) |
787 | { | |
788 | int ret; | |
789 | ||
790 | workqueue = create_singlethread_workqueue("kmmcd"); | |
791 | if (!workqueue) | |
792 | return -ENOMEM; | |
793 | ||
794 | ret = mmc_register_bus(); | |
e29a7d73 PO |
795 | if (ret) |
796 | goto destroy_workqueue; | |
797 | ||
798 | ret = mmc_register_host_class(); | |
799 | if (ret) | |
800 | goto unregister_bus; | |
801 | ||
802 | ret = sdio_register_bus(); | |
803 | if (ret) | |
804 | goto unregister_host_class; | |
805 | ||
806 | return 0; | |
807 | ||
808 | unregister_host_class: | |
809 | mmc_unregister_host_class(); | |
810 | unregister_bus: | |
811 | mmc_unregister_bus(); | |
812 | destroy_workqueue: | |
813 | destroy_workqueue(workqueue); | |
814 | ||
ffce2e7e PO |
815 | return ret; |
816 | } | |
817 | ||
818 | static void __exit mmc_exit(void) | |
819 | { | |
e29a7d73 | 820 | sdio_unregister_bus(); |
ffce2e7e PO |
821 | mmc_unregister_host_class(); |
822 | mmc_unregister_bus(); | |
823 | destroy_workqueue(workqueue); | |
824 | } | |
825 | ||
26074962 | 826 | subsys_initcall(mmc_init); |
ffce2e7e PO |
827 | module_exit(mmc_exit); |
828 | ||
1da177e4 | 829 | MODULE_LICENSE("GPL"); |