Commit | Line | Data |
---|---|---|
7d2be074 HS |
1 | /* |
2 | * Atmel MultiMedia Card Interface driver | |
3 | * | |
4 | * Copyright (C) 2004-2008 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/blkdev.h> | |
11 | #include <linux/clk.h> | |
deec9ae3 | 12 | #include <linux/debugfs.h> |
7d2be074 | 13 | #include <linux/device.h> |
fbfca4b8 | 14 | #include <linux/err.h> |
3c26e170 | 15 | #include <linux/gpio.h> |
7d2be074 HS |
16 | #include <linux/init.h> |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/ioport.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/scatterlist.h> | |
deec9ae3 HS |
22 | #include <linux/seq_file.h> |
23 | #include <linux/stat.h> | |
7d2be074 HS |
24 | |
25 | #include <linux/mmc/host.h> | |
26 | ||
27 | #include <asm/atmel-mci.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/unaligned.h> | |
30 | ||
3663b736 | 31 | #include <mach/board.h> |
7d2be074 HS |
32 | |
33 | #include "atmel-mci-regs.h" | |
34 | ||
35 | #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE) | |
36 | ||
37 | enum { | |
38 | EVENT_CMD_COMPLETE = 0, | |
39 | EVENT_DATA_ERROR, | |
40 | EVENT_DATA_COMPLETE, | |
41 | EVENT_STOP_SENT, | |
42 | EVENT_STOP_COMPLETE, | |
43 | EVENT_XFER_COMPLETE, | |
44 | }; | |
45 | ||
46 | struct atmel_mci { | |
47 | struct mmc_host *mmc; | |
48 | void __iomem *regs; | |
49 | ||
50 | struct scatterlist *sg; | |
51 | unsigned int pio_offset; | |
52 | ||
53 | struct mmc_request *mrq; | |
54 | struct mmc_command *cmd; | |
55 | struct mmc_data *data; | |
56 | ||
57 | u32 cmd_status; | |
58 | u32 data_status; | |
59 | u32 stop_status; | |
60 | u32 stop_cmdr; | |
61 | ||
62 | u32 mode_reg; | |
63 | u32 sdc_reg; | |
64 | ||
65 | struct tasklet_struct tasklet; | |
66 | unsigned long pending_events; | |
67 | unsigned long completed_events; | |
68 | ||
69 | int present; | |
70 | int detect_pin; | |
71 | int wp_pin; | |
72 | ||
73 | /* For detect pin debouncing */ | |
74 | struct timer_list detect_timer; | |
75 | ||
76 | unsigned long bus_hz; | |
77 | unsigned long mapbase; | |
78 | struct clk *mck; | |
79 | struct platform_device *pdev; | |
80 | }; | |
81 | ||
82 | #define atmci_is_completed(host, event) \ | |
83 | test_bit(event, &host->completed_events) | |
84 | #define atmci_test_and_clear_pending(host, event) \ | |
85 | test_and_clear_bit(event, &host->pending_events) | |
86 | #define atmci_test_and_set_completed(host, event) \ | |
87 | test_and_set_bit(event, &host->completed_events) | |
88 | #define atmci_set_completed(host, event) \ | |
89 | set_bit(event, &host->completed_events) | |
90 | #define atmci_set_pending(host, event) \ | |
91 | set_bit(event, &host->pending_events) | |
92 | #define atmci_clear_pending(host, event) \ | |
93 | clear_bit(event, &host->pending_events) | |
94 | ||
deec9ae3 HS |
95 | /* |
96 | * The debugfs stuff below is mostly optimized away when | |
97 | * CONFIG_DEBUG_FS is not set. | |
98 | */ | |
99 | static int atmci_req_show(struct seq_file *s, void *v) | |
100 | { | |
101 | struct atmel_mci *host = s->private; | |
102 | struct mmc_request *mrq = host->mrq; | |
103 | struct mmc_command *cmd; | |
104 | struct mmc_command *stop; | |
105 | struct mmc_data *data; | |
106 | ||
107 | /* Make sure we get a consistent snapshot */ | |
108 | spin_lock_irq(&host->mmc->lock); | |
109 | ||
110 | if (mrq) { | |
111 | cmd = mrq->cmd; | |
112 | data = mrq->data; | |
113 | stop = mrq->stop; | |
114 | ||
115 | if (cmd) | |
116 | seq_printf(s, | |
117 | "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", | |
118 | cmd->opcode, cmd->arg, cmd->flags, | |
119 | cmd->resp[0], cmd->resp[1], cmd->resp[2], | |
120 | cmd->resp[2], cmd->error); | |
121 | if (data) | |
122 | seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", | |
123 | data->bytes_xfered, data->blocks, | |
124 | data->blksz, data->flags, data->error); | |
125 | if (stop) | |
126 | seq_printf(s, | |
127 | "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", | |
128 | stop->opcode, stop->arg, stop->flags, | |
129 | stop->resp[0], stop->resp[1], stop->resp[2], | |
130 | stop->resp[2], stop->error); | |
131 | } | |
132 | ||
133 | spin_unlock_irq(&host->mmc->lock); | |
134 | ||
135 | return 0; | |
136 | } | |
137 | ||
138 | static int atmci_req_open(struct inode *inode, struct file *file) | |
139 | { | |
140 | return single_open(file, atmci_req_show, inode->i_private); | |
141 | } | |
142 | ||
143 | static const struct file_operations atmci_req_fops = { | |
144 | .owner = THIS_MODULE, | |
145 | .open = atmci_req_open, | |
146 | .read = seq_read, | |
147 | .llseek = seq_lseek, | |
148 | .release = single_release, | |
149 | }; | |
150 | ||
151 | static void atmci_show_status_reg(struct seq_file *s, | |
152 | const char *regname, u32 value) | |
153 | { | |
154 | static const char *sr_bit[] = { | |
155 | [0] = "CMDRDY", | |
156 | [1] = "RXRDY", | |
157 | [2] = "TXRDY", | |
158 | [3] = "BLKE", | |
159 | [4] = "DTIP", | |
160 | [5] = "NOTBUSY", | |
161 | [8] = "SDIOIRQA", | |
162 | [9] = "SDIOIRQB", | |
163 | [16] = "RINDE", | |
164 | [17] = "RDIRE", | |
165 | [18] = "RCRCE", | |
166 | [19] = "RENDE", | |
167 | [20] = "RTOE", | |
168 | [21] = "DCRCE", | |
169 | [22] = "DTOE", | |
170 | [30] = "OVRE", | |
171 | [31] = "UNRE", | |
172 | }; | |
173 | unsigned int i; | |
174 | ||
175 | seq_printf(s, "%s:\t0x%08x", regname, value); | |
176 | for (i = 0; i < ARRAY_SIZE(sr_bit); i++) { | |
177 | if (value & (1 << i)) { | |
178 | if (sr_bit[i]) | |
179 | seq_printf(s, " %s", sr_bit[i]); | |
180 | else | |
181 | seq_puts(s, " UNKNOWN"); | |
182 | } | |
183 | } | |
184 | seq_putc(s, '\n'); | |
185 | } | |
186 | ||
187 | static int atmci_regs_show(struct seq_file *s, void *v) | |
188 | { | |
189 | struct atmel_mci *host = s->private; | |
190 | u32 *buf; | |
191 | ||
192 | buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL); | |
193 | if (!buf) | |
194 | return -ENOMEM; | |
195 | ||
196 | /* Grab a more or less consistent snapshot */ | |
197 | spin_lock_irq(&host->mmc->lock); | |
87e60f2b | 198 | clk_enable(host->mck); |
deec9ae3 | 199 | memcpy_fromio(buf, host->regs, MCI_REGS_SIZE); |
87e60f2b | 200 | clk_disable(host->mck); |
deec9ae3 HS |
201 | spin_unlock_irq(&host->mmc->lock); |
202 | ||
203 | seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n", | |
204 | buf[MCI_MR / 4], | |
205 | buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "", | |
206 | buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "", | |
207 | buf[MCI_MR / 4] & 0xff); | |
208 | seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]); | |
209 | seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]); | |
210 | seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]); | |
211 | seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n", | |
212 | buf[MCI_BLKR / 4], | |
213 | buf[MCI_BLKR / 4] & 0xffff, | |
214 | (buf[MCI_BLKR / 4] >> 16) & 0xffff); | |
215 | ||
216 | /* Don't read RSPR and RDR; it will consume the data there */ | |
217 | ||
218 | atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]); | |
219 | atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]); | |
220 | ||
b17339a1 HS |
221 | kfree(buf); |
222 | ||
deec9ae3 HS |
223 | return 0; |
224 | } | |
225 | ||
226 | static int atmci_regs_open(struct inode *inode, struct file *file) | |
227 | { | |
228 | return single_open(file, atmci_regs_show, inode->i_private); | |
229 | } | |
230 | ||
231 | static const struct file_operations atmci_regs_fops = { | |
232 | .owner = THIS_MODULE, | |
233 | .open = atmci_regs_open, | |
234 | .read = seq_read, | |
235 | .llseek = seq_lseek, | |
236 | .release = single_release, | |
237 | }; | |
238 | ||
239 | static void atmci_init_debugfs(struct atmel_mci *host) | |
240 | { | |
241 | struct mmc_host *mmc; | |
242 | struct dentry *root; | |
243 | struct dentry *node; | |
deec9ae3 HS |
244 | |
245 | mmc = host->mmc; | |
246 | root = mmc->debugfs_root; | |
247 | if (!root) | |
248 | return; | |
249 | ||
250 | node = debugfs_create_file("regs", S_IRUSR, root, host, | |
251 | &atmci_regs_fops); | |
252 | if (IS_ERR(node)) | |
253 | return; | |
254 | if (!node) | |
255 | goto err; | |
256 | ||
deec9ae3 HS |
257 | node = debugfs_create_file("req", S_IRUSR, root, host, &atmci_req_fops); |
258 | if (!node) | |
259 | goto err; | |
260 | ||
261 | node = debugfs_create_x32("pending_events", S_IRUSR, root, | |
262 | (u32 *)&host->pending_events); | |
263 | if (!node) | |
264 | goto err; | |
265 | ||
266 | node = debugfs_create_x32("completed_events", S_IRUSR, root, | |
267 | (u32 *)&host->completed_events); | |
268 | if (!node) | |
269 | goto err; | |
270 | ||
271 | return; | |
272 | ||
273 | err: | |
274 | dev_err(&host->pdev->dev, | |
275 | "failed to initialize debugfs for controller\n"); | |
276 | } | |
7d2be074 HS |
277 | |
278 | static void atmci_enable(struct atmel_mci *host) | |
279 | { | |
280 | clk_enable(host->mck); | |
281 | mci_writel(host, CR, MCI_CR_MCIEN); | |
282 | mci_writel(host, MR, host->mode_reg); | |
283 | mci_writel(host, SDCR, host->sdc_reg); | |
284 | } | |
285 | ||
286 | static void atmci_disable(struct atmel_mci *host) | |
287 | { | |
288 | mci_writel(host, CR, MCI_CR_SWRST); | |
289 | ||
290 | /* Stall until write is complete, then disable the bus clock */ | |
291 | mci_readl(host, SR); | |
292 | clk_disable(host->mck); | |
293 | } | |
294 | ||
295 | static inline unsigned int ns_to_clocks(struct atmel_mci *host, | |
296 | unsigned int ns) | |
297 | { | |
298 | return (ns * (host->bus_hz / 1000000) + 999) / 1000; | |
299 | } | |
300 | ||
301 | static void atmci_set_timeout(struct atmel_mci *host, | |
302 | struct mmc_data *data) | |
303 | { | |
304 | static unsigned dtomul_to_shift[] = { | |
305 | 0, 4, 7, 8, 10, 12, 16, 20 | |
306 | }; | |
307 | unsigned timeout; | |
308 | unsigned dtocyc; | |
309 | unsigned dtomul; | |
310 | ||
311 | timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; | |
312 | ||
313 | for (dtomul = 0; dtomul < 8; dtomul++) { | |
314 | unsigned shift = dtomul_to_shift[dtomul]; | |
315 | dtocyc = (timeout + (1 << shift) - 1) >> shift; | |
316 | if (dtocyc < 15) | |
317 | break; | |
318 | } | |
319 | ||
320 | if (dtomul >= 8) { | |
321 | dtomul = 7; | |
322 | dtocyc = 15; | |
323 | } | |
324 | ||
325 | dev_vdbg(&host->mmc->class_dev, "setting timeout to %u cycles\n", | |
326 | dtocyc << dtomul_to_shift[dtomul]); | |
327 | mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc))); | |
328 | } | |
329 | ||
330 | /* | |
331 | * Return mask with command flags to be enabled for this command. | |
332 | */ | |
333 | static u32 atmci_prepare_command(struct mmc_host *mmc, | |
334 | struct mmc_command *cmd) | |
335 | { | |
336 | struct mmc_data *data; | |
337 | u32 cmdr; | |
338 | ||
339 | cmd->error = -EINPROGRESS; | |
340 | ||
341 | cmdr = MCI_CMDR_CMDNB(cmd->opcode); | |
342 | ||
343 | if (cmd->flags & MMC_RSP_PRESENT) { | |
344 | if (cmd->flags & MMC_RSP_136) | |
345 | cmdr |= MCI_CMDR_RSPTYP_136BIT; | |
346 | else | |
347 | cmdr |= MCI_CMDR_RSPTYP_48BIT; | |
348 | } | |
349 | ||
350 | /* | |
351 | * This should really be MAXLAT_5 for CMD2 and ACMD41, but | |
352 | * it's too difficult to determine whether this is an ACMD or | |
353 | * not. Better make it 64. | |
354 | */ | |
355 | cmdr |= MCI_CMDR_MAXLAT_64CYC; | |
356 | ||
357 | if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) | |
358 | cmdr |= MCI_CMDR_OPDCMD; | |
359 | ||
360 | data = cmd->data; | |
361 | if (data) { | |
362 | cmdr |= MCI_CMDR_START_XFER; | |
363 | if (data->flags & MMC_DATA_STREAM) | |
364 | cmdr |= MCI_CMDR_STREAM; | |
365 | else if (data->blocks > 1) | |
366 | cmdr |= MCI_CMDR_MULTI_BLOCK; | |
367 | else | |
368 | cmdr |= MCI_CMDR_BLOCK; | |
369 | ||
370 | if (data->flags & MMC_DATA_READ) | |
371 | cmdr |= MCI_CMDR_TRDIR_READ; | |
372 | } | |
373 | ||
374 | return cmdr; | |
375 | } | |
376 | ||
377 | static void atmci_start_command(struct atmel_mci *host, | |
378 | struct mmc_command *cmd, | |
379 | u32 cmd_flags) | |
380 | { | |
381 | /* Must read host->cmd after testing event flags */ | |
382 | smp_rmb(); | |
383 | WARN_ON(host->cmd); | |
384 | host->cmd = cmd; | |
385 | ||
386 | dev_vdbg(&host->mmc->class_dev, | |
387 | "start command: ARGR=0x%08x CMDR=0x%08x\n", | |
388 | cmd->arg, cmd_flags); | |
389 | ||
390 | mci_writel(host, ARGR, cmd->arg); | |
391 | mci_writel(host, CMDR, cmd_flags); | |
392 | } | |
393 | ||
394 | static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data) | |
395 | { | |
396 | struct atmel_mci *host = mmc_priv(mmc); | |
397 | ||
398 | atmci_start_command(host, data->stop, host->stop_cmdr); | |
399 | mci_writel(host, IER, MCI_CMDRDY); | |
400 | } | |
401 | ||
402 | static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq) | |
403 | { | |
404 | struct atmel_mci *host = mmc_priv(mmc); | |
405 | ||
406 | WARN_ON(host->cmd || host->data); | |
407 | host->mrq = NULL; | |
408 | ||
409 | atmci_disable(host); | |
410 | ||
411 | mmc_request_done(mmc, mrq); | |
412 | } | |
413 | ||
414 | /* | |
415 | * Returns a mask of interrupt flags to be enabled after the whole | |
416 | * request has been prepared. | |
417 | */ | |
418 | static u32 atmci_submit_data(struct mmc_host *mmc, struct mmc_data *data) | |
419 | { | |
420 | struct atmel_mci *host = mmc_priv(mmc); | |
421 | u32 iflags; | |
422 | ||
423 | data->error = -EINPROGRESS; | |
424 | ||
425 | WARN_ON(host->data); | |
426 | host->sg = NULL; | |
427 | host->data = data; | |
428 | ||
7d2be074 HS |
429 | dev_vdbg(&mmc->class_dev, "BLKR=0x%08x\n", |
430 | MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz)); | |
431 | ||
432 | iflags = ATMCI_DATA_ERROR_FLAGS; | |
433 | host->sg = data->sg; | |
434 | host->pio_offset = 0; | |
435 | if (data->flags & MMC_DATA_READ) | |
436 | iflags |= MCI_RXRDY; | |
437 | else | |
438 | iflags |= MCI_TXRDY; | |
439 | ||
440 | return iflags; | |
441 | } | |
442 | ||
443 | static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |
444 | { | |
445 | struct atmel_mci *host = mmc_priv(mmc); | |
446 | struct mmc_data *data; | |
447 | struct mmc_command *cmd; | |
448 | u32 iflags; | |
449 | u32 cmdflags = 0; | |
450 | ||
451 | iflags = mci_readl(host, IMR); | |
452 | if (iflags) | |
453 | dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n", | |
454 | mci_readl(host, IMR)); | |
455 | ||
456 | WARN_ON(host->mrq != NULL); | |
457 | ||
458 | /* | |
459 | * We may "know" the card is gone even though there's still an | |
460 | * electrical connection. If so, we really need to communicate | |
461 | * this to the MMC core since there won't be any more | |
462 | * interrupts as the card is completely removed. Otherwise, | |
463 | * the MMC core might believe the card is still there even | |
464 | * though the card was just removed very slowly. | |
465 | */ | |
466 | if (!host->present) { | |
467 | mrq->cmd->error = -ENOMEDIUM; | |
468 | mmc_request_done(mmc, mrq); | |
469 | return; | |
470 | } | |
471 | ||
472 | host->mrq = mrq; | |
473 | host->pending_events = 0; | |
474 | host->completed_events = 0; | |
475 | ||
476 | atmci_enable(host); | |
477 | ||
478 | /* We don't support multiple blocks of weird lengths. */ | |
479 | data = mrq->data; | |
480 | if (data) { | |
481 | if (data->blocks > 1 && data->blksz & 3) | |
482 | goto fail; | |
483 | atmci_set_timeout(host, data); | |
a252e3e3 HS |
484 | |
485 | /* Must set block count/size before sending command */ | |
486 | mci_writel(host, BLKR, MCI_BCNT(data->blocks) | |
487 | | MCI_BLKLEN(data->blksz)); | |
7d2be074 HS |
488 | } |
489 | ||
490 | iflags = MCI_CMDRDY; | |
491 | cmd = mrq->cmd; | |
492 | cmdflags = atmci_prepare_command(mmc, cmd); | |
493 | atmci_start_command(host, cmd, cmdflags); | |
494 | ||
495 | if (data) | |
496 | iflags |= atmci_submit_data(mmc, data); | |
497 | ||
498 | if (mrq->stop) { | |
499 | host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop); | |
500 | host->stop_cmdr |= MCI_CMDR_STOP_XFER; | |
501 | if (!(data->flags & MMC_DATA_WRITE)) | |
502 | host->stop_cmdr |= MCI_CMDR_TRDIR_READ; | |
503 | if (data->flags & MMC_DATA_STREAM) | |
504 | host->stop_cmdr |= MCI_CMDR_STREAM; | |
505 | else | |
506 | host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK; | |
507 | } | |
508 | ||
509 | /* | |
510 | * We could have enabled interrupts earlier, but I suspect | |
511 | * that would open up a nice can of interesting race | |
512 | * conditions (e.g. command and data complete, but stop not | |
513 | * prepared yet.) | |
514 | */ | |
515 | mci_writel(host, IER, iflags); | |
516 | ||
517 | return; | |
518 | ||
519 | fail: | |
520 | atmci_disable(host); | |
521 | host->mrq = NULL; | |
522 | mrq->cmd->error = -EINVAL; | |
523 | mmc_request_done(mmc, mrq); | |
524 | } | |
525 | ||
526 | static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |
527 | { | |
528 | struct atmel_mci *host = mmc_priv(mmc); | |
529 | ||
530 | if (ios->clock) { | |
531 | u32 clkdiv; | |
532 | ||
533 | /* Set clock rate */ | |
534 | clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * ios->clock) - 1; | |
535 | if (clkdiv > 255) { | |
536 | dev_warn(&mmc->class_dev, | |
537 | "clock %u too slow; using %lu\n", | |
538 | ios->clock, host->bus_hz / (2 * 256)); | |
539 | clkdiv = 255; | |
540 | } | |
541 | ||
542 | host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF | |
543 | | MCI_MR_RDPROOF; | |
544 | } | |
545 | ||
546 | switch (ios->bus_width) { | |
547 | case MMC_BUS_WIDTH_1: | |
548 | host->sdc_reg = 0; | |
549 | break; | |
550 | case MMC_BUS_WIDTH_4: | |
551 | host->sdc_reg = MCI_SDCBUS_4BIT; | |
552 | break; | |
553 | } | |
554 | ||
555 | switch (ios->power_mode) { | |
556 | case MMC_POWER_ON: | |
557 | /* Send init sequence (74 clock cycles) */ | |
558 | atmci_enable(host); | |
559 | mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT); | |
560 | while (!(mci_readl(host, SR) & MCI_CMDRDY)) | |
561 | cpu_relax(); | |
562 | atmci_disable(host); | |
563 | break; | |
564 | default: | |
565 | /* | |
566 | * TODO: None of the currently available AVR32-based | |
567 | * boards allow MMC power to be turned off. Implement | |
568 | * power control when this can be tested properly. | |
569 | */ | |
570 | break; | |
571 | } | |
572 | } | |
573 | ||
574 | static int atmci_get_ro(struct mmc_host *mmc) | |
575 | { | |
576 | int read_only = 0; | |
577 | struct atmel_mci *host = mmc_priv(mmc); | |
578 | ||
3c26e170 | 579 | if (gpio_is_valid(host->wp_pin)) { |
7d2be074 HS |
580 | read_only = gpio_get_value(host->wp_pin); |
581 | dev_dbg(&mmc->class_dev, "card is %s\n", | |
582 | read_only ? "read-only" : "read-write"); | |
583 | } else { | |
584 | dev_dbg(&mmc->class_dev, | |
585 | "no pin for checking read-only switch." | |
586 | " Assuming write-enable.\n"); | |
587 | } | |
588 | ||
589 | return read_only; | |
590 | } | |
591 | ||
592 | static struct mmc_host_ops atmci_ops = { | |
593 | .request = atmci_request, | |
594 | .set_ios = atmci_set_ios, | |
595 | .get_ro = atmci_get_ro, | |
596 | }; | |
597 | ||
598 | static void atmci_command_complete(struct atmel_mci *host, | |
599 | struct mmc_command *cmd, u32 status) | |
600 | { | |
601 | /* Read the response from the card (up to 16 bytes) */ | |
602 | cmd->resp[0] = mci_readl(host, RSPR); | |
603 | cmd->resp[1] = mci_readl(host, RSPR); | |
604 | cmd->resp[2] = mci_readl(host, RSPR); | |
605 | cmd->resp[3] = mci_readl(host, RSPR); | |
606 | ||
607 | if (status & MCI_RTOE) | |
608 | cmd->error = -ETIMEDOUT; | |
609 | else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE)) | |
610 | cmd->error = -EILSEQ; | |
611 | else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE)) | |
612 | cmd->error = -EIO; | |
613 | else | |
614 | cmd->error = 0; | |
615 | ||
616 | if (cmd->error) { | |
617 | dev_dbg(&host->mmc->class_dev, | |
618 | "command error: status=0x%08x\n", status); | |
619 | ||
620 | if (cmd->data) { | |
621 | host->data = NULL; | |
622 | mci_writel(host, IDR, MCI_NOTBUSY | |
623 | | MCI_TXRDY | MCI_RXRDY | |
624 | | ATMCI_DATA_ERROR_FLAGS); | |
625 | } | |
626 | } | |
627 | } | |
628 | ||
629 | static void atmci_detect_change(unsigned long data) | |
630 | { | |
631 | struct atmel_mci *host = (struct atmel_mci *)data; | |
632 | struct mmc_request *mrq = host->mrq; | |
633 | int present; | |
634 | ||
635 | /* | |
636 | * atmci_remove() sets detect_pin to -1 before freeing the | |
637 | * interrupt. We must not re-enable the interrupt if it has | |
638 | * been freed. | |
639 | */ | |
640 | smp_rmb(); | |
3c26e170 | 641 | if (!gpio_is_valid(host->detect_pin)) |
7d2be074 HS |
642 | return; |
643 | ||
644 | enable_irq(gpio_to_irq(host->detect_pin)); | |
645 | present = !gpio_get_value(host->detect_pin); | |
646 | ||
647 | dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n", | |
648 | present, host->present); | |
649 | ||
650 | if (present != host->present) { | |
651 | dev_dbg(&host->mmc->class_dev, "card %s\n", | |
652 | present ? "inserted" : "removed"); | |
653 | host->present = present; | |
654 | ||
655 | /* Reset controller if card is gone */ | |
656 | if (!present) { | |
657 | mci_writel(host, CR, MCI_CR_SWRST); | |
658 | mci_writel(host, IDR, ~0UL); | |
659 | mci_writel(host, CR, MCI_CR_MCIEN); | |
660 | } | |
661 | ||
662 | /* Clean up queue if present */ | |
663 | if (mrq) { | |
664 | /* | |
665 | * Reset controller to terminate any ongoing | |
666 | * commands or data transfers. | |
667 | */ | |
668 | mci_writel(host, CR, MCI_CR_SWRST); | |
669 | ||
670 | if (!atmci_is_completed(host, EVENT_CMD_COMPLETE)) | |
671 | mrq->cmd->error = -ENOMEDIUM; | |
672 | ||
673 | if (mrq->data && !atmci_is_completed(host, | |
674 | EVENT_DATA_COMPLETE)) { | |
675 | host->data = NULL; | |
676 | mrq->data->error = -ENOMEDIUM; | |
677 | } | |
678 | if (mrq->stop && !atmci_is_completed(host, | |
679 | EVENT_STOP_COMPLETE)) | |
680 | mrq->stop->error = -ENOMEDIUM; | |
681 | ||
682 | host->cmd = NULL; | |
683 | atmci_request_end(host->mmc, mrq); | |
684 | } | |
685 | ||
686 | mmc_detect_change(host->mmc, 0); | |
687 | } | |
688 | } | |
689 | ||
690 | static void atmci_tasklet_func(unsigned long priv) | |
691 | { | |
692 | struct mmc_host *mmc = (struct mmc_host *)priv; | |
693 | struct atmel_mci *host = mmc_priv(mmc); | |
694 | struct mmc_request *mrq = host->mrq; | |
695 | struct mmc_data *data = host->data; | |
696 | ||
697 | dev_vdbg(&mmc->class_dev, | |
698 | "tasklet: pending/completed/mask %lx/%lx/%x\n", | |
699 | host->pending_events, host->completed_events, | |
700 | mci_readl(host, IMR)); | |
701 | ||
702 | if (atmci_test_and_clear_pending(host, EVENT_CMD_COMPLETE)) { | |
703 | /* | |
704 | * host->cmd must be set to NULL before the interrupt | |
705 | * handler sees EVENT_CMD_COMPLETE | |
706 | */ | |
707 | host->cmd = NULL; | |
708 | smp_wmb(); | |
709 | atmci_set_completed(host, EVENT_CMD_COMPLETE); | |
710 | atmci_command_complete(host, mrq->cmd, host->cmd_status); | |
711 | ||
712 | if (!mrq->cmd->error && mrq->stop | |
713 | && atmci_is_completed(host, EVENT_XFER_COMPLETE) | |
714 | && !atmci_test_and_set_completed(host, | |
715 | EVENT_STOP_SENT)) | |
716 | send_stop_cmd(host->mmc, mrq->data); | |
717 | } | |
718 | if (atmci_test_and_clear_pending(host, EVENT_STOP_COMPLETE)) { | |
719 | /* | |
720 | * host->cmd must be set to NULL before the interrupt | |
721 | * handler sees EVENT_STOP_COMPLETE | |
722 | */ | |
723 | host->cmd = NULL; | |
724 | smp_wmb(); | |
725 | atmci_set_completed(host, EVENT_STOP_COMPLETE); | |
726 | atmci_command_complete(host, mrq->stop, host->stop_status); | |
727 | } | |
728 | if (atmci_test_and_clear_pending(host, EVENT_DATA_ERROR)) { | |
729 | u32 status = host->data_status; | |
730 | ||
731 | dev_vdbg(&mmc->class_dev, "data error: status=%08x\n", status); | |
732 | ||
733 | atmci_set_completed(host, EVENT_DATA_ERROR); | |
734 | atmci_set_completed(host, EVENT_DATA_COMPLETE); | |
735 | ||
736 | if (status & MCI_DTOE) { | |
737 | dev_dbg(&mmc->class_dev, | |
738 | "data timeout error\n"); | |
739 | data->error = -ETIMEDOUT; | |
740 | } else if (status & MCI_DCRCE) { | |
741 | dev_dbg(&mmc->class_dev, "data CRC error\n"); | |
742 | data->error = -EILSEQ; | |
743 | } else { | |
744 | dev_dbg(&mmc->class_dev, | |
745 | "data FIFO error (status=%08x)\n", | |
746 | status); | |
747 | data->error = -EIO; | |
748 | } | |
749 | ||
750 | if (host->present && data->stop | |
751 | && atmci_is_completed(host, EVENT_CMD_COMPLETE) | |
752 | && !atmci_test_and_set_completed( | |
753 | host, EVENT_STOP_SENT)) | |
754 | send_stop_cmd(host->mmc, data); | |
755 | ||
756 | host->data = NULL; | |
757 | } | |
758 | if (atmci_test_and_clear_pending(host, EVENT_DATA_COMPLETE)) { | |
759 | atmci_set_completed(host, EVENT_DATA_COMPLETE); | |
760 | ||
761 | if (!atmci_is_completed(host, EVENT_DATA_ERROR)) { | |
762 | data->bytes_xfered = data->blocks * data->blksz; | |
763 | data->error = 0; | |
764 | } | |
765 | ||
766 | host->data = NULL; | |
767 | } | |
768 | ||
769 | if (host->mrq && !host->cmd && !host->data) | |
770 | atmci_request_end(mmc, host->mrq); | |
771 | } | |
772 | ||
773 | static void atmci_read_data_pio(struct atmel_mci *host) | |
774 | { | |
775 | struct scatterlist *sg = host->sg; | |
776 | void *buf = sg_virt(sg); | |
777 | unsigned int offset = host->pio_offset; | |
778 | struct mmc_data *data = host->data; | |
779 | u32 value; | |
780 | u32 status; | |
781 | unsigned int nbytes = 0; | |
782 | ||
783 | do { | |
784 | value = mci_readl(host, RDR); | |
785 | if (likely(offset + 4 <= sg->length)) { | |
786 | put_unaligned(value, (u32 *)(buf + offset)); | |
787 | ||
788 | offset += 4; | |
789 | nbytes += 4; | |
790 | ||
791 | if (offset == sg->length) { | |
792 | host->sg = sg = sg_next(sg); | |
793 | if (!sg) | |
794 | goto done; | |
795 | ||
796 | offset = 0; | |
797 | buf = sg_virt(sg); | |
798 | } | |
799 | } else { | |
800 | unsigned int remaining = sg->length - offset; | |
801 | memcpy(buf + offset, &value, remaining); | |
802 | nbytes += remaining; | |
803 | ||
804 | flush_dcache_page(sg_page(sg)); | |
805 | host->sg = sg = sg_next(sg); | |
806 | if (!sg) | |
807 | goto done; | |
808 | ||
809 | offset = 4 - remaining; | |
810 | buf = sg_virt(sg); | |
811 | memcpy(buf, (u8 *)&value + remaining, offset); | |
812 | nbytes += offset; | |
813 | } | |
814 | ||
815 | status = mci_readl(host, SR); | |
816 | if (status & ATMCI_DATA_ERROR_FLAGS) { | |
817 | mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY | |
818 | | ATMCI_DATA_ERROR_FLAGS)); | |
819 | host->data_status = status; | |
820 | atmci_set_pending(host, EVENT_DATA_ERROR); | |
821 | tasklet_schedule(&host->tasklet); | |
822 | break; | |
823 | } | |
824 | } while (status & MCI_RXRDY); | |
825 | ||
826 | host->pio_offset = offset; | |
827 | data->bytes_xfered += nbytes; | |
828 | ||
829 | return; | |
830 | ||
831 | done: | |
832 | mci_writel(host, IDR, MCI_RXRDY); | |
833 | mci_writel(host, IER, MCI_NOTBUSY); | |
834 | data->bytes_xfered += nbytes; | |
835 | atmci_set_completed(host, EVENT_XFER_COMPLETE); | |
836 | if (data->stop && atmci_is_completed(host, EVENT_CMD_COMPLETE) | |
837 | && !atmci_test_and_set_completed(host, EVENT_STOP_SENT)) | |
838 | send_stop_cmd(host->mmc, data); | |
839 | } | |
840 | ||
841 | static void atmci_write_data_pio(struct atmel_mci *host) | |
842 | { | |
843 | struct scatterlist *sg = host->sg; | |
844 | void *buf = sg_virt(sg); | |
845 | unsigned int offset = host->pio_offset; | |
846 | struct mmc_data *data = host->data; | |
847 | u32 value; | |
848 | u32 status; | |
849 | unsigned int nbytes = 0; | |
850 | ||
851 | do { | |
852 | if (likely(offset + 4 <= sg->length)) { | |
853 | value = get_unaligned((u32 *)(buf + offset)); | |
854 | mci_writel(host, TDR, value); | |
855 | ||
856 | offset += 4; | |
857 | nbytes += 4; | |
858 | if (offset == sg->length) { | |
859 | host->sg = sg = sg_next(sg); | |
860 | if (!sg) | |
861 | goto done; | |
862 | ||
863 | offset = 0; | |
864 | buf = sg_virt(sg); | |
865 | } | |
866 | } else { | |
867 | unsigned int remaining = sg->length - offset; | |
868 | ||
869 | value = 0; | |
870 | memcpy(&value, buf + offset, remaining); | |
871 | nbytes += remaining; | |
872 | ||
873 | host->sg = sg = sg_next(sg); | |
874 | if (!sg) { | |
875 | mci_writel(host, TDR, value); | |
876 | goto done; | |
877 | } | |
878 | ||
879 | offset = 4 - remaining; | |
880 | buf = sg_virt(sg); | |
881 | memcpy((u8 *)&value + remaining, buf, offset); | |
882 | mci_writel(host, TDR, value); | |
883 | nbytes += offset; | |
884 | } | |
885 | ||
886 | status = mci_readl(host, SR); | |
887 | if (status & ATMCI_DATA_ERROR_FLAGS) { | |
888 | mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY | |
889 | | ATMCI_DATA_ERROR_FLAGS)); | |
890 | host->data_status = status; | |
891 | atmci_set_pending(host, EVENT_DATA_ERROR); | |
892 | tasklet_schedule(&host->tasklet); | |
893 | break; | |
894 | } | |
895 | } while (status & MCI_TXRDY); | |
896 | ||
897 | host->pio_offset = offset; | |
898 | data->bytes_xfered += nbytes; | |
899 | ||
900 | return; | |
901 | ||
902 | done: | |
903 | mci_writel(host, IDR, MCI_TXRDY); | |
904 | mci_writel(host, IER, MCI_NOTBUSY); | |
905 | data->bytes_xfered += nbytes; | |
906 | atmci_set_completed(host, EVENT_XFER_COMPLETE); | |
907 | if (data->stop && atmci_is_completed(host, EVENT_CMD_COMPLETE) | |
908 | && !atmci_test_and_set_completed(host, EVENT_STOP_SENT)) | |
909 | send_stop_cmd(host->mmc, data); | |
910 | } | |
911 | ||
912 | static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) | |
913 | { | |
914 | struct atmel_mci *host = mmc_priv(mmc); | |
915 | ||
916 | mci_writel(host, IDR, MCI_CMDRDY); | |
917 | ||
918 | if (atmci_is_completed(host, EVENT_STOP_SENT)) { | |
919 | host->stop_status = status; | |
920 | atmci_set_pending(host, EVENT_STOP_COMPLETE); | |
921 | } else { | |
922 | host->cmd_status = status; | |
923 | atmci_set_pending(host, EVENT_CMD_COMPLETE); | |
924 | } | |
925 | ||
926 | tasklet_schedule(&host->tasklet); | |
927 | } | |
928 | ||
929 | static irqreturn_t atmci_interrupt(int irq, void *dev_id) | |
930 | { | |
931 | struct mmc_host *mmc = dev_id; | |
932 | struct atmel_mci *host = mmc_priv(mmc); | |
933 | u32 status, mask, pending; | |
934 | unsigned int pass_count = 0; | |
935 | ||
936 | spin_lock(&mmc->lock); | |
937 | ||
938 | do { | |
939 | status = mci_readl(host, SR); | |
940 | mask = mci_readl(host, IMR); | |
941 | pending = status & mask; | |
942 | if (!pending) | |
943 | break; | |
944 | ||
945 | if (pending & ATMCI_DATA_ERROR_FLAGS) { | |
946 | mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS | |
947 | | MCI_RXRDY | MCI_TXRDY); | |
948 | pending &= mci_readl(host, IMR); | |
949 | host->data_status = status; | |
950 | atmci_set_pending(host, EVENT_DATA_ERROR); | |
951 | tasklet_schedule(&host->tasklet); | |
952 | } | |
953 | if (pending & MCI_NOTBUSY) { | |
954 | mci_writel(host, IDR, (MCI_NOTBUSY | |
955 | | ATMCI_DATA_ERROR_FLAGS)); | |
956 | atmci_set_pending(host, EVENT_DATA_COMPLETE); | |
957 | tasklet_schedule(&host->tasklet); | |
958 | } | |
959 | if (pending & MCI_RXRDY) | |
960 | atmci_read_data_pio(host); | |
961 | if (pending & MCI_TXRDY) | |
962 | atmci_write_data_pio(host); | |
963 | ||
964 | if (pending & MCI_CMDRDY) | |
965 | atmci_cmd_interrupt(mmc, status); | |
966 | } while (pass_count++ < 5); | |
967 | ||
968 | spin_unlock(&mmc->lock); | |
969 | ||
970 | return pass_count ? IRQ_HANDLED : IRQ_NONE; | |
971 | } | |
972 | ||
973 | static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) | |
974 | { | |
975 | struct mmc_host *mmc = dev_id; | |
976 | struct atmel_mci *host = mmc_priv(mmc); | |
977 | ||
978 | /* | |
979 | * Disable interrupts until the pin has stabilized and check | |
980 | * the state then. Use mod_timer() since we may be in the | |
981 | * middle of the timer routine when this interrupt triggers. | |
982 | */ | |
983 | disable_irq_nosync(irq); | |
984 | mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20)); | |
985 | ||
986 | return IRQ_HANDLED; | |
987 | } | |
988 | ||
989 | static int __init atmci_probe(struct platform_device *pdev) | |
990 | { | |
991 | struct mci_platform_data *pdata; | |
992 | struct atmel_mci *host; | |
993 | struct mmc_host *mmc; | |
994 | struct resource *regs; | |
995 | int irq; | |
996 | int ret; | |
997 | ||
998 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
999 | if (!regs) | |
1000 | return -ENXIO; | |
1001 | pdata = pdev->dev.platform_data; | |
1002 | if (!pdata) | |
1003 | return -ENXIO; | |
1004 | irq = platform_get_irq(pdev, 0); | |
1005 | if (irq < 0) | |
1006 | return irq; | |
1007 | ||
1008 | mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev); | |
1009 | if (!mmc) | |
1010 | return -ENOMEM; | |
1011 | ||
1012 | host = mmc_priv(mmc); | |
1013 | host->pdev = pdev; | |
1014 | host->mmc = mmc; | |
1015 | host->detect_pin = pdata->detect_pin; | |
1016 | host->wp_pin = pdata->wp_pin; | |
1017 | ||
1018 | host->mck = clk_get(&pdev->dev, "mci_clk"); | |
1019 | if (IS_ERR(host->mck)) { | |
1020 | ret = PTR_ERR(host->mck); | |
1021 | goto err_clk_get; | |
1022 | } | |
1023 | ||
1024 | ret = -ENOMEM; | |
1025 | host->regs = ioremap(regs->start, regs->end - regs->start + 1); | |
1026 | if (!host->regs) | |
1027 | goto err_ioremap; | |
1028 | ||
1029 | clk_enable(host->mck); | |
1030 | mci_writel(host, CR, MCI_CR_SWRST); | |
1031 | host->bus_hz = clk_get_rate(host->mck); | |
1032 | clk_disable(host->mck); | |
1033 | ||
1034 | host->mapbase = regs->start; | |
1035 | ||
1036 | mmc->ops = &atmci_ops; | |
1037 | mmc->f_min = (host->bus_hz + 511) / 512; | |
1038 | mmc->f_max = host->bus_hz / 2; | |
1039 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | |
23af6039 | 1040 | mmc->caps |= MMC_CAP_4_BIT_DATA; |
7d2be074 HS |
1041 | |
1042 | mmc->max_hw_segs = 64; | |
1043 | mmc->max_phys_segs = 64; | |
1044 | mmc->max_req_size = 32768 * 512; | |
1045 | mmc->max_blk_size = 32768; | |
1046 | mmc->max_blk_count = 512; | |
1047 | ||
1048 | tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); | |
1049 | ||
1050 | ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, mmc); | |
1051 | if (ret) | |
1052 | goto err_request_irq; | |
1053 | ||
1054 | /* Assume card is present if we don't have a detect pin */ | |
1055 | host->present = 1; | |
3c26e170 | 1056 | if (gpio_is_valid(host->detect_pin)) { |
7d2be074 HS |
1057 | if (gpio_request(host->detect_pin, "mmc_detect")) { |
1058 | dev_dbg(&mmc->class_dev, "no detect pin available\n"); | |
1059 | host->detect_pin = -1; | |
1060 | } else { | |
1061 | host->present = !gpio_get_value(host->detect_pin); | |
1062 | } | |
1063 | } | |
da45b66e HS |
1064 | |
1065 | if (!gpio_is_valid(host->detect_pin)) | |
1066 | mmc->caps |= MMC_CAP_NEEDS_POLL; | |
1067 | ||
3c26e170 | 1068 | if (gpio_is_valid(host->wp_pin)) { |
7d2be074 HS |
1069 | if (gpio_request(host->wp_pin, "mmc_wp")) { |
1070 | dev_dbg(&mmc->class_dev, "no WP pin available\n"); | |
1071 | host->wp_pin = -1; | |
1072 | } | |
1073 | } | |
1074 | ||
1075 | platform_set_drvdata(pdev, host); | |
1076 | ||
1077 | mmc_add_host(mmc); | |
1078 | ||
3c26e170 | 1079 | if (gpio_is_valid(host->detect_pin)) { |
7d2be074 HS |
1080 | setup_timer(&host->detect_timer, atmci_detect_change, |
1081 | (unsigned long)host); | |
1082 | ||
1083 | ret = request_irq(gpio_to_irq(host->detect_pin), | |
1084 | atmci_detect_interrupt, | |
1085 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | |
1086 | "mmc-detect", mmc); | |
1087 | if (ret) { | |
1088 | dev_dbg(&mmc->class_dev, | |
1089 | "could not request IRQ %d for detect pin\n", | |
1090 | gpio_to_irq(host->detect_pin)); | |
1091 | gpio_free(host->detect_pin); | |
1092 | host->detect_pin = -1; | |
1093 | } | |
1094 | } | |
1095 | ||
1096 | dev_info(&mmc->class_dev, | |
1097 | "Atmel MCI controller at 0x%08lx irq %d\n", | |
1098 | host->mapbase, irq); | |
1099 | ||
deec9ae3 HS |
1100 | atmci_init_debugfs(host); |
1101 | ||
7d2be074 HS |
1102 | return 0; |
1103 | ||
1104 | err_request_irq: | |
1105 | iounmap(host->regs); | |
1106 | err_ioremap: | |
1107 | clk_put(host->mck); | |
1108 | err_clk_get: | |
1109 | mmc_free_host(mmc); | |
1110 | return ret; | |
1111 | } | |
1112 | ||
1113 | static int __exit atmci_remove(struct platform_device *pdev) | |
1114 | { | |
1115 | struct atmel_mci *host = platform_get_drvdata(pdev); | |
1116 | ||
1117 | platform_set_drvdata(pdev, NULL); | |
1118 | ||
1119 | if (host) { | |
deec9ae3 HS |
1120 | /* Debugfs stuff is cleaned up by mmc core */ |
1121 | ||
3c26e170 | 1122 | if (gpio_is_valid(host->detect_pin)) { |
7d2be074 HS |
1123 | int pin = host->detect_pin; |
1124 | ||
1125 | /* Make sure the timer doesn't enable the interrupt */ | |
1126 | host->detect_pin = -1; | |
1127 | smp_wmb(); | |
1128 | ||
1129 | free_irq(gpio_to_irq(pin), host->mmc); | |
1130 | del_timer_sync(&host->detect_timer); | |
1131 | gpio_free(pin); | |
1132 | } | |
1133 | ||
1134 | mmc_remove_host(host->mmc); | |
1135 | ||
1136 | clk_enable(host->mck); | |
1137 | mci_writel(host, IDR, ~0UL); | |
1138 | mci_writel(host, CR, MCI_CR_MCIDIS); | |
1139 | mci_readl(host, SR); | |
1140 | clk_disable(host->mck); | |
1141 | ||
3c26e170 | 1142 | if (gpio_is_valid(host->wp_pin)) |
7d2be074 HS |
1143 | gpio_free(host->wp_pin); |
1144 | ||
1145 | free_irq(platform_get_irq(pdev, 0), host->mmc); | |
1146 | iounmap(host->regs); | |
1147 | ||
1148 | clk_put(host->mck); | |
1149 | ||
1150 | mmc_free_host(host->mmc); | |
1151 | } | |
1152 | return 0; | |
1153 | } | |
1154 | ||
1155 | static struct platform_driver atmci_driver = { | |
1156 | .remove = __exit_p(atmci_remove), | |
1157 | .driver = { | |
1158 | .name = "atmel_mci", | |
1159 | }, | |
1160 | }; | |
1161 | ||
1162 | static int __init atmci_init(void) | |
1163 | { | |
1164 | return platform_driver_probe(&atmci_driver, atmci_probe); | |
1165 | } | |
1166 | ||
1167 | static void __exit atmci_exit(void) | |
1168 | { | |
1169 | platform_driver_unregister(&atmci_driver); | |
1170 | } | |
1171 | ||
1172 | module_init(atmci_init); | |
1173 | module_exit(atmci_exit); | |
1174 | ||
1175 | MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); | |
1176 | MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>"); | |
1177 | MODULE_LICENSE("GPL v2"); |