mmc: sdhci-pci: Set MMC_CAP_AGGRESSIVE_PM for Broxton controllers
[deliverable/linux.git] / drivers / mmc / host / sdhci-acpi.c
CommitLineData
c4e05037
AH
1/*
2 * Secure Digital Host Controller Interface ACPI driver.
3 *
4 * Copyright (c) 2012, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 */
20
21#include <linux/init.h>
22#include <linux/export.h>
23#include <linux/module.h>
24#include <linux/device.h>
25#include <linux/platform_device.h>
26#include <linux/ioport.h>
27#include <linux/io.h>
28#include <linux/dma-mapping.h>
29#include <linux/compiler.h>
30#include <linux/stddef.h>
31#include <linux/bitops.h>
32#include <linux/types.h>
33#include <linux/err.h>
34#include <linux/interrupt.h>
35#include <linux/acpi.h>
36#include <linux/pm.h>
37#include <linux/pm_runtime.h>
b04fa064 38#include <linux/delay.h>
c4e05037
AH
39
40#include <linux/mmc/host.h>
41#include <linux/mmc/pm.h>
4fd4409c 42#include <linux/mmc/slot-gpio.h>
c4e05037 43
6e1c7d61
AH
44#ifdef CONFIG_X86
45#include <asm/cpu_device_id.h>
46#include <asm/iosf_mbi.h>
47#endif
48
c4e05037
AH
49#include "sdhci.h"
50
51enum {
4fd4409c
AH
52 SDHCI_ACPI_SD_CD = BIT(0),
53 SDHCI_ACPI_RUNTIME_PM = BIT(1),
54 SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
c4e05037
AH
55};
56
57struct sdhci_acpi_chip {
58 const struct sdhci_ops *ops;
59 unsigned int quirks;
60 unsigned int quirks2;
61 unsigned long caps;
62 unsigned int caps2;
63 mmc_pm_flag_t pm_caps;
64};
65
66struct sdhci_acpi_slot {
67 const struct sdhci_acpi_chip *chip;
68 unsigned int quirks;
69 unsigned int quirks2;
70 unsigned long caps;
71 unsigned int caps2;
72 mmc_pm_flag_t pm_caps;
73 unsigned int flags;
7dafca83 74 int (*probe_slot)(struct platform_device *, const char *, const char *);
578b36b6 75 int (*remove_slot)(struct platform_device *);
c4e05037
AH
76};
77
78struct sdhci_acpi_host {
79 struct sdhci_host *host;
80 const struct sdhci_acpi_slot *slot;
81 struct platform_device *pdev;
82 bool use_runtime_pm;
83};
84
85static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
86{
87 return c->slot && (c->slot->flags & flag);
88}
89
b04fa064
AH
90static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
91{
92 u8 reg;
93
94 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
95 reg |= 0x10;
96 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
97 /* For eMMC, minimum is 1us but give it 9us for good measure */
98 udelay(9);
99 reg &= ~0x10;
100 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
101 /* For eMMC, minimum is 200us but give it 300us for good measure */
102 usleep_range(300, 1000);
103}
104
c4e05037 105static const struct sdhci_ops sdhci_acpi_ops_dflt = {
1771059c 106 .set_clock = sdhci_set_clock,
2317f56c 107 .set_bus_width = sdhci_set_bus_width,
03231f9b 108 .reset = sdhci_reset,
96d7b78c 109 .set_uhs_signaling = sdhci_set_uhs_signaling,
c4e05037
AH
110};
111
b04fa064 112static const struct sdhci_ops sdhci_acpi_ops_int = {
1771059c 113 .set_clock = sdhci_set_clock,
2317f56c 114 .set_bus_width = sdhci_set_bus_width,
03231f9b 115 .reset = sdhci_reset,
96d7b78c 116 .set_uhs_signaling = sdhci_set_uhs_signaling,
b04fa064
AH
117 .hw_reset = sdhci_acpi_int_hw_reset,
118};
119
120static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
121 .ops = &sdhci_acpi_ops_int,
122};
123
6e1c7d61
AH
124#ifdef CONFIG_X86
125
126static bool sdhci_acpi_byt(void)
127{
128 static const struct x86_cpu_id byt[] = {
129 { X86_VENDOR_INTEL, 6, 0x37 },
130 {}
131 };
132
133 return x86_match_cpu(byt);
134}
135
136#define BYT_IOSF_SCCEP 0x63
137#define BYT_IOSF_OCP_NETCTRL0 0x1078
138#define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
139
140static void sdhci_acpi_byt_setting(struct device *dev)
141{
142 u32 val = 0;
143
144 if (!sdhci_acpi_byt())
145 return;
146
147 if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
148 &val)) {
149 dev_err(dev, "%s read error\n", __func__);
150 return;
151 }
152
153 if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
154 return;
155
156 val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
157
158 if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
159 val)) {
160 dev_err(dev, "%s write error\n", __func__);
161 return;
162 }
163
164 dev_dbg(dev, "%s completed\n", __func__);
165}
166
167static bool sdhci_acpi_byt_defer(struct device *dev)
168{
169 if (!sdhci_acpi_byt())
170 return false;
171
172 if (!iosf_mbi_available())
173 return true;
174
175 sdhci_acpi_byt_setting(dev);
176
177 return false;
178}
179
180#else
181
182static inline void sdhci_acpi_byt_setting(struct device *dev)
183{
184}
185
186static inline bool sdhci_acpi_byt_defer(struct device *dev)
187{
188 return false;
189}
190
191#endif
192
6a645dd8
AH
193static int bxt_get_cd(struct mmc_host *mmc)
194{
195 int gpio_cd = mmc_gpio_get_cd(mmc);
196 struct sdhci_host *host = mmc_priv(mmc);
197 unsigned long flags;
198 int ret = 0;
199
200 if (!gpio_cd)
201 return 0;
202
6a645dd8
AH
203 spin_lock_irqsave(&host->lock, flags);
204
205 if (host->flags & SDHCI_DEVICE_DEAD)
206 goto out;
207
208 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
209out:
210 spin_unlock_irqrestore(&host->lock, flags);
211
6a645dd8
AH
212 return ret;
213}
214
7dafca83
AH
215static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
216 const char *hid, const char *uid)
578b36b6
GY
217{
218 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
219 struct sdhci_host *host;
220
221 if (!c || !c->host)
222 return 0;
223
224 host = c->host;
225
94203042 226 /* Platform specific code during emmc probe slot goes here */
578b36b6 227
8024379e
AH
228 if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
229 sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
230 sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
231 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
232
578b36b6
GY
233 return 0;
234}
235
7dafca83
AH
236static int sdhci_acpi_sdio_probe_slot(struct platform_device *pdev,
237 const char *hid, const char *uid)
578b36b6
GY
238{
239 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
240 struct sdhci_host *host;
241
242 if (!c || !c->host)
243 return 0;
244
245 host = c->host;
246
94203042 247 /* Platform specific code during sdio probe slot goes here */
578b36b6
GY
248
249 return 0;
250}
251
7dafca83
AH
252static int sdhci_acpi_sd_probe_slot(struct platform_device *pdev,
253 const char *hid, const char *uid)
578b36b6
GY
254{
255 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
256 struct sdhci_host *host;
257
258 if (!c || !c->host || !c->slot)
259 return 0;
260
261 host = c->host;
262
94203042 263 /* Platform specific code during sd probe slot goes here */
578b36b6 264
6a645dd8
AH
265 if (hid && !strcmp(hid, "80865ACA"))
266 host->mmc_host_ops.get_cd = bxt_get_cd;
267
578b36b6
GY
268 return 0;
269}
270
07a58883 271static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
b04fa064 272 .chip = &sdhci_acpi_chip_int,
f25c3372 273 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
9d65cb88
AH
274 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
275 MMC_CAP_BUS_WIDTH_TEST | MMC_CAP_WAIT_WHILE_BUSY,
07a58883
AH
276 .caps2 = MMC_CAP2_HC_ERASE_SZ,
277 .flags = SDHCI_ACPI_RUNTIME_PM,
e1f5633a 278 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
e839b134
AH
279 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
280 SDHCI_QUIRK2_STOP_WITH_TC |
281 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
578b36b6 282 .probe_slot = sdhci_acpi_emmc_probe_slot,
07a58883
AH
283};
284
e5571397 285static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
e1f5633a
AH
286 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
287 SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
e5571397 288 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
9d65cb88
AH
289 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
290 MMC_CAP_BUS_WIDTH_TEST | MMC_CAP_WAIT_WHILE_BUSY,
e5571397
AH
291 .flags = SDHCI_ACPI_RUNTIME_PM,
292 .pm_caps = MMC_PM_KEEP_POWER,
578b36b6 293 .probe_slot = sdhci_acpi_sdio_probe_slot,
e5571397
AH
294};
295
07a58883 296static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
4fd4409c
AH
297 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
298 SDHCI_ACPI_RUNTIME_PM,
e1f5633a 299 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
934e31b9
AH
300 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
301 SDHCI_QUIRK2_STOP_WITH_TC,
9d65cb88 302 .caps = MMC_CAP_BUS_WIDTH_TEST | MMC_CAP_WAIT_WHILE_BUSY,
578b36b6 303 .probe_slot = sdhci_acpi_sd_probe_slot,
07a58883
AH
304};
305
70cce2af
PE
306static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
307 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
308 .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
309 .caps = MMC_CAP_NONREMOVABLE,
310};
311
312static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
313 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
314 .caps = MMC_CAP_NONREMOVABLE,
315};
316
07a58883
AH
317struct sdhci_acpi_uid_slot {
318 const char *hid;
319 const char *uid;
320 const struct sdhci_acpi_slot *slot;
321};
322
323static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
e839b134
AH
324 { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
325 { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
326 { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
07a58883
AH
327 { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
328 { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
aad95dc4 329 { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
07a58883 330 { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
7147eaf3 331 { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
07a58883 332 { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
07c001c1 333 { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
d0ed8e6b 334 { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
0cd2f044 335 { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
07a58883 336 { "PNP0D40" },
70cce2af
PE
337 { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
338 { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
07a58883
AH
339 { },
340};
341
c4e05037 342static const struct acpi_device_id sdhci_acpi_ids[] = {
e839b134
AH
343 { "80865ACA" },
344 { "80865ACC" },
345 { "80865AD0" },
07a58883 346 { "80860F14" },
aad95dc4 347 { "80860F16" },
07a58883
AH
348 { "INT33BB" },
349 { "INT33C6" },
07c001c1 350 { "INT3436" },
d0ed8e6b 351 { "INT344D" },
07a58883 352 { "PNP0D40" },
70cce2af
PE
353 { "QCOM8051" },
354 { "QCOM8052" },
c4e05037
AH
355 { },
356};
357MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
358
3db35251
AH
359static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
360 const char *uid)
c4e05037 361{
07a58883
AH
362 const struct sdhci_acpi_uid_slot *u;
363
364 for (u = sdhci_acpi_uids; u->hid; u++) {
365 if (strcmp(u->hid, hid))
366 continue;
367 if (!u->uid)
368 return u->slot;
369 if (uid && !strcmp(u->uid, uid))
370 return u->slot;
371 }
c4e05037
AH
372 return NULL;
373}
374
4e608e4e 375static int sdhci_acpi_probe(struct platform_device *pdev)
c4e05037
AH
376{
377 struct device *dev = &pdev->dev;
378 acpi_handle handle = ACPI_HANDLE(dev);
379 struct acpi_device *device;
380 struct sdhci_acpi_host *c;
381 struct sdhci_host *host;
382 struct resource *iomem;
383 resource_size_t len;
384 const char *hid;
3db35251 385 const char *uid;
87875655 386 int err;
c4e05037
AH
387
388 if (acpi_bus_get_device(handle, &device))
389 return -ENODEV;
390
391 if (acpi_bus_get_status(device) || !device->status.present)
392 return -ENODEV;
393
6e1c7d61
AH
394 if (sdhci_acpi_byt_defer(dev))
395 return -EPROBE_DEFER;
396
c4e05037 397 hid = acpi_device_hid(device);
3db35251 398 uid = device->pnp.unique_id;
c4e05037
AH
399
400 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
401 if (!iomem)
402 return -ENOMEM;
403
404 len = resource_size(iomem);
405 if (len < 0x100)
406 dev_err(dev, "Invalid iomem size!\n");
407
408 if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
409 return -ENOMEM;
410
411 host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host));
412 if (IS_ERR(host))
413 return PTR_ERR(host);
414
415 c = sdhci_priv(host);
416 c->host = host;
3db35251 417 c->slot = sdhci_acpi_get_slot(hid, uid);
c4e05037
AH
418 c->pdev = pdev;
419 c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
420
421 platform_set_drvdata(pdev, c);
422
423 host->hw_name = "ACPI";
424 host->ops = &sdhci_acpi_ops_dflt;
425 host->irq = platform_get_irq(pdev, 0);
426
427 host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
428 resource_size(iomem));
429 if (host->ioaddr == NULL) {
430 err = -ENOMEM;
431 goto err_free;
432 }
433
c4e05037 434 if (c->slot) {
578b36b6 435 if (c->slot->probe_slot) {
7dafca83 436 err = c->slot->probe_slot(pdev, hid, uid);
578b36b6
GY
437 if (err)
438 goto err_free;
439 }
c4e05037
AH
440 if (c->slot->chip) {
441 host->ops = c->slot->chip->ops;
442 host->quirks |= c->slot->chip->quirks;
443 host->quirks2 |= c->slot->chip->quirks2;
444 host->mmc->caps |= c->slot->chip->caps;
445 host->mmc->caps2 |= c->slot->chip->caps2;
446 host->mmc->pm_caps |= c->slot->chip->pm_caps;
447 }
448 host->quirks |= c->slot->quirks;
449 host->quirks2 |= c->slot->quirks2;
450 host->mmc->caps |= c->slot->caps;
451 host->mmc->caps2 |= c->slot->caps2;
452 host->mmc->pm_caps |= c->slot->pm_caps;
453 }
454
0d3e3350
AH
455 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
456
a61abe6e 457 if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
4fd4409c
AH
458 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
459
89168b48 460 if (mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL)) {
4fd4409c 461 dev_warn(dev, "failed to setup card detect gpio\n");
a61abe6e 462 c->use_runtime_pm = false;
4fd4409c 463 }
a61abe6e
AH
464 }
465
4fd4409c
AH
466 err = sdhci_add_host(host);
467 if (err)
468 goto err_free;
469
c4e05037 470 if (c->use_runtime_pm) {
1d1ff458 471 pm_runtime_set_active(dev);
c4e05037
AH
472 pm_suspend_ignore_children(dev, 1);
473 pm_runtime_set_autosuspend_delay(dev, 50);
474 pm_runtime_use_autosuspend(dev);
475 pm_runtime_enable(dev);
476 }
477
4e6a2ef9
FZ
478 device_enable_async_suspend(dev);
479
c4e05037
AH
480 return 0;
481
482err_free:
c4e05037
AH
483 sdhci_free_host(c->host);
484 return err;
485}
486
4e608e4e 487static int sdhci_acpi_remove(struct platform_device *pdev)
c4e05037
AH
488{
489 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
490 struct device *dev = &pdev->dev;
491 int dead;
492
493 if (c->use_runtime_pm) {
494 pm_runtime_get_sync(dev);
495 pm_runtime_disable(dev);
496 pm_runtime_put_noidle(dev);
497 }
498
578b36b6
GY
499 if (c->slot && c->slot->remove_slot)
500 c->slot->remove_slot(pdev);
501
c4e05037
AH
502 dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
503 sdhci_remove_host(c->host, dead);
c4e05037
AH
504 sdhci_free_host(c->host);
505
506 return 0;
507}
508
509#ifdef CONFIG_PM_SLEEP
510
511static int sdhci_acpi_suspend(struct device *dev)
512{
513 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
514
515 return sdhci_suspend_host(c->host);
516}
517
518static int sdhci_acpi_resume(struct device *dev)
519{
520 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
521
6e1c7d61
AH
522 sdhci_acpi_byt_setting(&c->pdev->dev);
523
c4e05037
AH
524 return sdhci_resume_host(c->host);
525}
526
527#else
528
529#define sdhci_acpi_suspend NULL
530#define sdhci_acpi_resume NULL
531
532#endif
533
162d6f98 534#ifdef CONFIG_PM
c4e05037
AH
535
536static int sdhci_acpi_runtime_suspend(struct device *dev)
537{
538 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
539
540 return sdhci_runtime_suspend_host(c->host);
541}
542
543static int sdhci_acpi_runtime_resume(struct device *dev)
544{
545 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
546
6e1c7d61
AH
547 sdhci_acpi_byt_setting(&c->pdev->dev);
548
c4e05037
AH
549 return sdhci_runtime_resume_host(c->host);
550}
551
c4e05037
AH
552#endif
553
554static const struct dev_pm_ops sdhci_acpi_pm_ops = {
555 .suspend = sdhci_acpi_suspend,
556 .resume = sdhci_acpi_resume,
1d75f74b 557 SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
9b449e99 558 sdhci_acpi_runtime_resume, NULL)
c4e05037
AH
559};
560
561static struct platform_driver sdhci_acpi_driver = {
562 .driver = {
563 .name = "sdhci-acpi",
c4e05037
AH
564 .acpi_match_table = sdhci_acpi_ids,
565 .pm = &sdhci_acpi_pm_ops,
566 },
567 .probe = sdhci_acpi_probe,
4e608e4e 568 .remove = sdhci_acpi_remove,
c4e05037
AH
569};
570
571module_platform_driver(sdhci_acpi_driver);
572
573MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
574MODULE_AUTHOR("Adrian Hunter");
575MODULE_LICENSE("GPL v2");
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