[deliverable/linux.git] / drivers / mmc / host / sdhci-of-arasan.c

/*
 * Arasan Secure Digital Host Controller Interface.
 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
 * Copyright (c) 2012 Wind River Systems, Inc.
 * Copyright (C) 2013 Pengutronix e.K.
 * Copyright (C) 2013 Xilinx Inc.
 *
 * Based on sdhci-of-esdhc.c
 *
 * Copyright (c) 2007 Freescale Semiconductor, Inc.
 * Copyright (c) 2009 MontaVista Software, Inc.
 *
 * Authors: Xiaobo Xie <X.Xie@freescale.com>
 *	    Anton Vorontsov <avorontsov@ru.mvista.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 */

#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/phy/phy.h>
#include "sdhci-pltfm.h"

#define SDHCI_ARASAN_CLK_CTRL_OFFSET	0x2c

#define CLK_CTRL_TIMEOUT_SHIFT		16
#define CLK_CTRL_TIMEOUT_MASK		(0xf << CLK_CTRL_TIMEOUT_SHIFT)
#define CLK_CTRL_TIMEOUT_MIN_EXP	13

/**
 * struct sdhci_arasan_data
 * @clk_ahb:	Pointer to the AHB clock
 * @phy: Pointer to the generic phy
 */
struct sdhci_arasan_data {
	struct clk	*clk_ahb;
	struct phy	*phy;
};

static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
{
	u32 div;
	unsigned long freq;
	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);

	div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
	div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;

	freq = clk_get_rate(pltfm_host->clk);
	freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);

	return freq;
}

static struct sdhci_ops sdhci_arasan_ops = {
	.set_clock = sdhci_set_clock,
	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
	.get_timeout_clock = sdhci_arasan_get_timeout_clock,
	.set_bus_width = sdhci_set_bus_width,
	.reset = sdhci_reset,
	.set_uhs_signaling = sdhci_set_uhs_signaling,
};

static struct sdhci_pltfm_data sdhci_arasan_pdata = {
	.ops = &sdhci_arasan_ops,
	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
};

#ifdef CONFIG_PM_SLEEP
/**
 * sdhci_arasan_suspend - Suspend method for the driver
 * @dev:	Address of the device structure
 * Returns 0 on success and error value on error
 *
 * Put the device in a low power state.
 */
static int sdhci_arasan_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct sdhci_host *host = platform_get_drvdata(pdev);
	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
	int ret;

	ret = sdhci_suspend_host(host);
	if (ret)
		return ret;

	if (!IS_ERR(sdhci_arasan->phy)) {
		ret = phy_power_off(sdhci_arasan->phy);
		if (ret) {
			dev_err(dev, "Cannot power off phy.\n");
			sdhci_resume_host(host);
			return ret;
		}
	}

	clk_disable(pltfm_host->clk);
	clk_disable(sdhci_arasan->clk_ahb);

	return 0;
}

/**
 * sdhci_arasan_resume - Resume method for the driver
 * @dev:	Address of the device structure
 * Returns 0 on success and error value on error
 *
 * Resume operation after suspend
 */
static int sdhci_arasan_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct sdhci_host *host = platform_get_drvdata(pdev);
	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
	int ret;

	ret = clk_enable(sdhci_arasan->clk_ahb);
	if (ret) {
		dev_err(dev, "Cannot enable AHB clock.\n");
		return ret;
	}

	ret = clk_enable(pltfm_host->clk);
	if (ret) {
		dev_err(dev, "Cannot enable SD clock.\n");
		return ret;
	}

	if (!IS_ERR(sdhci_arasan->phy)) {
		ret = phy_power_on(sdhci_arasan->phy);
		if (ret) {
			dev_err(dev, "Cannot power on phy.\n");
			return ret;
		}
	}

	return sdhci_resume_host(host);
}
#endif /* ! CONFIG_PM_SLEEP */

static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
			 sdhci_arasan_resume);

static int sdhci_arasan_probe(struct platform_device *pdev)
{
	int ret;
	struct clk *clk_xin;
	struct sdhci_host *host;
	struct sdhci_pltfm_host *pltfm_host;
	struct sdhci_arasan_data *sdhci_arasan;

	host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata,
				sizeof(*sdhci_arasan));
	if (IS_ERR(host))
		return PTR_ERR(host);

	pltfm_host = sdhci_priv(host);
	sdhci_arasan = sdhci_pltfm_priv(pltfm_host);

	sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
	if (IS_ERR(sdhci_arasan->clk_ahb)) {
		dev_err(&pdev->dev, "clk_ahb clock not found.\n");
		ret = PTR_ERR(sdhci_arasan->clk_ahb);
		goto err_pltfm_free;
	}

	clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
	if (IS_ERR(clk_xin)) {
		dev_err(&pdev->dev, "clk_xin clock not found.\n");
		ret = PTR_ERR(clk_xin);
		goto err_pltfm_free;
	}

	ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
	if (ret) {
		dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
		goto err_pltfm_free;
	}

	ret = clk_prepare_enable(clk_xin);
	if (ret) {
		dev_err(&pdev->dev, "Unable to enable SD clock.\n");
		goto clk_dis_ahb;
	}

	sdhci_get_of_property(pdev);
	pltfm_host->clk = clk_xin;

	ret = mmc_of_parse(host->mmc);
	if (ret) {
		dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
		goto clk_disable_all;
	}

	sdhci_arasan->phy = ERR_PTR(-ENODEV);
	if (of_device_is_compatible(pdev->dev.of_node,
				    "arasan,sdhci-5.1")) {
		sdhci_arasan->phy = devm_phy_get(&pdev->dev,
						 "phy_arasan");
		if (IS_ERR(sdhci_arasan->phy)) {
			ret = PTR_ERR(sdhci_arasan->phy);
			dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
			goto clk_disable_all;
		}

		ret = phy_init(sdhci_arasan->phy);
		if (ret < 0) {
			dev_err(&pdev->dev, "phy_init err.\n");
			goto clk_disable_all;
		}

		ret = phy_power_on(sdhci_arasan->phy);
		if (ret < 0) {
			dev_err(&pdev->dev, "phy_power_on err.\n");
			goto err_phy_power;
		}
	}

	ret = sdhci_add_host(host);
	if (ret)
		goto err_add_host;

	return 0;

err_add_host:
	if (!IS_ERR(sdhci_arasan->phy))
		phy_power_off(sdhci_arasan->phy);
err_phy_power:
	if (!IS_ERR(sdhci_arasan->phy))
		phy_exit(sdhci_arasan->phy);
clk_disable_all:
	clk_disable_unprepare(clk_xin);
clk_dis_ahb:
	clk_disable_unprepare(sdhci_arasan->clk_ahb);
err_pltfm_free:
	sdhci_pltfm_free(pdev);
	return ret;
}

static int sdhci_arasan_remove(struct platform_device *pdev)
{
	int ret;
	struct sdhci_host *host = platform_get_drvdata(pdev);
	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
	struct clk *clk_ahb = sdhci_arasan->clk_ahb;

	if (!IS_ERR(sdhci_arasan->phy)) {
		phy_power_off(sdhci_arasan->phy);
		phy_exit(sdhci_arasan->phy);
	}

	ret = sdhci_pltfm_unregister(pdev);

	clk_disable_unprepare(clk_ahb);

	return ret;
}

static const struct of_device_id sdhci_arasan_of_match[] = {
	{ .compatible = "arasan,sdhci-8.9a" },
	{ .compatible = "arasan,sdhci-5.1" },
	{ .compatible = "arasan,sdhci-4.9a" },
	{ }
};
MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);

static struct platform_driver sdhci_arasan_driver = {
	.driver = {
		.name = "sdhci-arasan",
		.of_match_table = sdhci_arasan_of_match,
		.pm = &sdhci_arasan_dev_pm_ops,
	},
	.probe = sdhci_arasan_probe,
	.remove = sdhci_arasan_remove,
};

module_platform_driver(sdhci_arasan_driver);

MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
e3ec3a3d SB	1	/*
	2	* Arasan Secure Digital Host Controller Interface.
	3	* Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
	4	* Copyright (c) 2012 Wind River Systems, Inc.
	5	* Copyright (C) 2013 Pengutronix e.K.
	6	* Copyright (C) 2013 Xilinx Inc.
	7	*
	8	* Based on sdhci-of-esdhc.c
	9	*
	10	* Copyright (c) 2007 Freescale Semiconductor, Inc.
	11	* Copyright (c) 2009 MontaVista Software, Inc.
	12	*
	13	* Authors: Xiaobo Xie <X.Xie@freescale.com>
	14	* Anton Vorontsov <avorontsov@ru.mvista.com>
	15	*
	16	* This program is free software; you can redistribute it and/or modify
	17	* it under the terms of the GNU General Public License as published by
	18	* the Free Software Foundation; either version 2 of the License, or (at
	19	* your option) any later version.
	20	*/
	21
	22	#include <linux/module.h>
308f3f8d	23	#include <linux/of_device.h>
91aa3661	24	#include <linux/phy/phy.h>
e3ec3a3d SB	25	#include "sdhci-pltfm.h"
	26
	27	#define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c
	28
	29	#define CLK_CTRL_TIMEOUT_SHIFT 16
	30	#define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT)
	31	#define CLK_CTRL_TIMEOUT_MIN_EXP 13
	32
	33	/**
	34	* struct sdhci_arasan_data
	35	* @clk_ahb: Pointer to the AHB clock
91aa3661	36	* @phy: Pointer to the generic phy
e3ec3a3d SB	37	*/
	38	struct sdhci_arasan_data {
	39	struct clk *clk_ahb;
91aa3661	40	struct phy *phy;
e3ec3a3d SB	41	};
	42
	43	static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
	44	{
	45	u32 div;
	46	unsigned long freq;
	47	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
	48
	49	div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
	50	div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
	51
	52	freq = clk_get_rate(pltfm_host->clk);
	53	freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
	54
	55	return freq;
	56	}
	57
	58	static struct sdhci_ops sdhci_arasan_ops = {
1771059c	59	.set_clock = sdhci_set_clock,
e3ec3a3d SB	60	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
e3ec3a3d SB	61	.get_timeout_clock = sdhci_arasan_get_timeout_clock,
2317f56c	62	.set_bus_width = sdhci_set_bus_width,
03231f9b	63	.reset = sdhci_reset,
96d7b78c	64	.set_uhs_signaling = sdhci_set_uhs_signaling,
e3ec3a3d SB	65	};
	66
	67	static struct sdhci_pltfm_data sdhci_arasan_pdata = {
	68	.ops = &sdhci_arasan_ops,
2d532d45 SG	69	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
	70	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN \|
	71	SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
e3ec3a3d SB	72	};
	73
	74	#ifdef CONFIG_PM_SLEEP
	75	/**
	76	* sdhci_arasan_suspend - Suspend method for the driver
	77	* @dev: Address of the device structure
	78	* Returns 0 on success and error value on error
	79	*
	80	* Put the device in a low power state.
	81	*/
	82	static int sdhci_arasan_suspend(struct device *dev)
	83	{
	84	struct platform_device *pdev = to_platform_device(dev);
	85	struct sdhci_host *host = platform_get_drvdata(pdev);
	86	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
89211418	87	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
e3ec3a3d SB	88	int ret;
	89
	90	ret = sdhci_suspend_host(host);
	91	if (ret)
	92	return ret;
	93
91aa3661 SL	94	if (!IS_ERR(sdhci_arasan->phy)) {
	95	ret = phy_power_off(sdhci_arasan->phy);
	96	if (ret) {
	97	dev_err(dev, "Cannot power off phy.\n");
	98	sdhci_resume_host(host);
	99	return ret;
	100	}
	101	}
	102
e3ec3a3d SB	103	clk_disable(pltfm_host->clk);
	104	clk_disable(sdhci_arasan->clk_ahb);
	105
	106	return 0;
	107	}
	108
	109	/**
	110	* sdhci_arasan_resume - Resume method for the driver
	111	* @dev: Address of the device structure
	112	* Returns 0 on success and error value on error
	113	*
	114	* Resume operation after suspend
	115	*/
	116	static int sdhci_arasan_resume(struct device *dev)
	117	{
	118	struct platform_device *pdev = to_platform_device(dev);
	119	struct sdhci_host *host = platform_get_drvdata(pdev);
	120	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
89211418	121	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
e3ec3a3d SB	122	int ret;
	123
	124	ret = clk_enable(sdhci_arasan->clk_ahb);
	125	if (ret) {
	126	dev_err(dev, "Cannot enable AHB clock.\n");
	127	return ret;
	128	}
	129
	130	ret = clk_enable(pltfm_host->clk);
	131	if (ret) {
	132	dev_err(dev, "Cannot enable SD clock.\n");
e3ec3a3d SB	133	return ret;
	134	}
	135
91aa3661 SL	136	if (!IS_ERR(sdhci_arasan->phy)) {
	137	ret = phy_power_on(sdhci_arasan->phy);
	138	if (ret) {
	139	dev_err(dev, "Cannot power on phy.\n");
	140	return ret;
	141	}
	142	}
	143
e3ec3a3d SB	144	return sdhci_resume_host(host);
	145	}
	146	#endif /* ! CONFIG_PM_SLEEP */
	147
	148	static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
	149	sdhci_arasan_resume);
	150
	151	static int sdhci_arasan_probe(struct platform_device *pdev)
	152	{
	153	int ret;
	154	struct clk *clk_xin;
	155	struct sdhci_host *host;
	156	struct sdhci_pltfm_host *pltfm_host;
	157	struct sdhci_arasan_data *sdhci_arasan;
	158
89211418 JZ	159	host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata,
	160	sizeof(*sdhci_arasan));
	161	if (IS_ERR(host))
	162	return PTR_ERR(host);
	163
	164	pltfm_host = sdhci_priv(host);
	165	sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
e3ec3a3d SB	166
	167	sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
	168	if (IS_ERR(sdhci_arasan->clk_ahb)) {
	169	dev_err(&pdev->dev, "clk_ahb clock not found.\n");
278d0962 SL	170	ret = PTR_ERR(sdhci_arasan->clk_ahb);
278d0962 SL	171	goto err_pltfm_free;
e3ec3a3d SB	172	}
	173
	174	clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
	175	if (IS_ERR(clk_xin)) {
	176	dev_err(&pdev->dev, "clk_xin clock not found.\n");
278d0962 SL	177	ret = PTR_ERR(clk_xin);
278d0962 SL	178	goto err_pltfm_free;
e3ec3a3d SB	179	}
	180
	181	ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
	182	if (ret) {
	183	dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
278d0962	184	goto err_pltfm_free;
e3ec3a3d SB	185	}
	186
	187	ret = clk_prepare_enable(clk_xin);
	188	if (ret) {
	189	dev_err(&pdev->dev, "Unable to enable SD clock.\n");
	190	goto clk_dis_ahb;
	191	}
	192
e3ec3a3d	193	sdhci_get_of_property(pdev);
e3ec3a3d SB	194	pltfm_host->clk = clk_xin;
e3ec3a3d SB	195
16b23787 MS	196	ret = mmc_of_parse(host->mmc);
	197	if (ret) {
	198	dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
	199	goto clk_disable_all;
	200	}
	201
91aa3661 SL	202	sdhci_arasan->phy = ERR_PTR(-ENODEV);
	203	if (of_device_is_compatible(pdev->dev.of_node,
	204	"arasan,sdhci-5.1")) {
	205	sdhci_arasan->phy = devm_phy_get(&pdev->dev,
	206	"phy_arasan");
	207	if (IS_ERR(sdhci_arasan->phy)) {
	208	ret = PTR_ERR(sdhci_arasan->phy);
	209	dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
	210	goto clk_disable_all;
	211	}
	212
	213	ret = phy_init(sdhci_arasan->phy);
	214	if (ret < 0) {
	215	dev_err(&pdev->dev, "phy_init err.\n");
	216	goto clk_disable_all;
	217	}
	218
	219	ret = phy_power_on(sdhci_arasan->phy);
	220	if (ret < 0) {
	221	dev_err(&pdev->dev, "phy_power_on err.\n");
	222	goto err_phy_power;
	223	}
	224	}
	225
e3ec3a3d	226	ret = sdhci_add_host(host);
b1df9de7	227	if (ret)
91aa3661	228	goto err_add_host;
e3ec3a3d SB	229
	230	return 0;
	231
91aa3661 SL	232	err_add_host:
	233	if (!IS_ERR(sdhci_arasan->phy))
	234	phy_power_off(sdhci_arasan->phy);
	235	err_phy_power:
	236	if (!IS_ERR(sdhci_arasan->phy))
	237	phy_exit(sdhci_arasan->phy);
e3ec3a3d SB	238	clk_disable_all:
	239	clk_disable_unprepare(clk_xin);
	240	clk_dis_ahb:
	241	clk_disable_unprepare(sdhci_arasan->clk_ahb);
278d0962 SL	242	err_pltfm_free:
278d0962 SL	243	sdhci_pltfm_free(pdev);
e3ec3a3d SB	244	return ret;
	245	}
	246
	247	static int sdhci_arasan_remove(struct platform_device *pdev)
	248	{
0c7fe32e	249	int ret;
e3ec3a3d SB	250	struct sdhci_host *host = platform_get_drvdata(pdev);
e3ec3a3d SB	251	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
89211418 JZ	252	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
89211418 JZ	253	struct clk *clk_ahb = sdhci_arasan->clk_ahb;
e3ec3a3d	254
91aa3661 SL	255	if (!IS_ERR(sdhci_arasan->phy)) {
	256	phy_power_off(sdhci_arasan->phy);
	257	phy_exit(sdhci_arasan->phy);
	258	}
	259
0c7fe32e JZ	260	ret = sdhci_pltfm_unregister(pdev);
0c7fe32e JZ	261
89211418	262	clk_disable_unprepare(clk_ahb);
e3ec3a3d	263
0c7fe32e	264	return ret;
e3ec3a3d SB	265	}
	266
	267	static const struct of_device_id sdhci_arasan_of_match[] = {
	268	{ .compatible = "arasan,sdhci-8.9a" },
da795ec2	269	{ .compatible = "arasan,sdhci-5.1" },
308f3f8d	270	{ .compatible = "arasan,sdhci-4.9a" },
e3ec3a3d SB	271	{ }
	272	};
	273	MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
	274
	275	static struct platform_driver sdhci_arasan_driver = {
	276	.driver = {
	277	.name = "sdhci-arasan",
e3ec3a3d SB	278	.of_match_table = sdhci_arasan_of_match,
	279	.pm = &sdhci_arasan_dev_pm_ops,
	280	},
	281	.probe = sdhci_arasan_probe,
	282	.remove = sdhci_arasan_remove,
	283	};
	284
	285	module_platform_driver(sdhci_arasan_driver);
	286
	287	MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
	288	MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
	289	MODULE_LICENSE("GPL");