Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver | |
3 | * | |
4 | * Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
643f720c PO |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or (at | |
9 | * your option) any later version. | |
1da177e4 LT |
10 | * |
11 | * | |
12 | * Warning! | |
13 | * | |
14 | * Changes to the FIFO system should be done with extreme care since | |
15 | * the hardware is full of bugs related to the FIFO. Known issues are: | |
16 | * | |
17 | * - FIFO size field in FSR is always zero. | |
18 | * | |
19 | * - FIFO interrupts tend not to work as they should. Interrupts are | |
20 | * triggered only for full/empty events, not for threshold values. | |
21 | * | |
22 | * - On APIC systems the FIFO empty interrupt is sometimes lost. | |
23 | */ | |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/ioport.h> | |
d052d1be | 29 | #include <linux/platform_device.h> |
1da177e4 | 30 | #include <linux/interrupt.h> |
85bcc130 | 31 | #include <linux/dma-mapping.h> |
1da177e4 | 32 | #include <linux/delay.h> |
85bcc130 | 33 | #include <linux/pnp.h> |
1da177e4 LT |
34 | #include <linux/highmem.h> |
35 | #include <linux/mmc/host.h> | |
36 | #include <linux/mmc/protocol.h> | |
37 | ||
38 | #include <asm/io.h> | |
39 | #include <asm/dma.h> | |
40 | #include <asm/scatterlist.h> | |
41 | ||
42 | #include "wbsd.h" | |
43 | ||
44 | #define DRIVER_NAME "wbsd" | |
916f3ac6 | 45 | #define DRIVER_VERSION "1.6" |
1da177e4 | 46 | |
1da177e4 | 47 | #define DBG(x...) \ |
c6563178 | 48 | pr_debug(DRIVER_NAME ": " x) |
1da177e4 | 49 | #define DBGF(f, x...) \ |
c6563178 | 50 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x) |
1da177e4 | 51 | |
85bcc130 PO |
52 | /* |
53 | * Device resources | |
54 | */ | |
55 | ||
56 | #ifdef CONFIG_PNP | |
57 | ||
58 | static const struct pnp_device_id pnp_dev_table[] = { | |
59 | { "WEC0517", 0 }, | |
60 | { "WEC0518", 0 }, | |
61 | { "", 0 }, | |
62 | }; | |
63 | ||
64 | MODULE_DEVICE_TABLE(pnp, pnp_dev_table); | |
65 | ||
66 | #endif /* CONFIG_PNP */ | |
67 | ||
3eee0d03 AB |
68 | static const int config_ports[] = { 0x2E, 0x4E }; |
69 | static const int unlock_codes[] = { 0x83, 0x87 }; | |
70 | ||
71 | static const int valid_ids[] = { | |
72 | 0x7112, | |
73 | }; | |
74 | ||
85bcc130 PO |
75 | #ifdef CONFIG_PNP |
76 | static unsigned int nopnp = 0; | |
77 | #else | |
78 | static const unsigned int nopnp = 1; | |
79 | #endif | |
80 | static unsigned int io = 0x248; | |
81 | static unsigned int irq = 6; | |
82 | static int dma = 2; | |
83 | ||
1da177e4 LT |
84 | /* |
85 | * Basic functions | |
86 | */ | |
87 | ||
cfa7f521 | 88 | static inline void wbsd_unlock_config(struct wbsd_host *host) |
1da177e4 | 89 | { |
85bcc130 | 90 | BUG_ON(host->config == 0); |
fecf92ba | 91 | |
1da177e4 LT |
92 | outb(host->unlock_code, host->config); |
93 | outb(host->unlock_code, host->config); | |
94 | } | |
95 | ||
cfa7f521 | 96 | static inline void wbsd_lock_config(struct wbsd_host *host) |
1da177e4 | 97 | { |
85bcc130 | 98 | BUG_ON(host->config == 0); |
fecf92ba | 99 | |
1da177e4 LT |
100 | outb(LOCK_CODE, host->config); |
101 | } | |
102 | ||
cfa7f521 | 103 | static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value) |
1da177e4 | 104 | { |
85bcc130 | 105 | BUG_ON(host->config == 0); |
fecf92ba | 106 | |
1da177e4 LT |
107 | outb(reg, host->config); |
108 | outb(value, host->config + 1); | |
109 | } | |
110 | ||
cfa7f521 | 111 | static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg) |
1da177e4 | 112 | { |
85bcc130 | 113 | BUG_ON(host->config == 0); |
fecf92ba | 114 | |
1da177e4 LT |
115 | outb(reg, host->config); |
116 | return inb(host->config + 1); | |
117 | } | |
118 | ||
cfa7f521 | 119 | static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value) |
1da177e4 LT |
120 | { |
121 | outb(index, host->base + WBSD_IDXR); | |
122 | outb(value, host->base + WBSD_DATAR); | |
123 | } | |
124 | ||
cfa7f521 | 125 | static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index) |
1da177e4 LT |
126 | { |
127 | outb(index, host->base + WBSD_IDXR); | |
128 | return inb(host->base + WBSD_DATAR); | |
129 | } | |
130 | ||
131 | /* | |
132 | * Common routines | |
133 | */ | |
134 | ||
cfa7f521 | 135 | static void wbsd_init_device(struct wbsd_host *host) |
1da177e4 LT |
136 | { |
137 | u8 setup, ier; | |
fecf92ba | 138 | |
1da177e4 LT |
139 | /* |
140 | * Reset chip (SD/MMC part) and fifo. | |
141 | */ | |
142 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
143 | setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; | |
144 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 145 | |
85bcc130 PO |
146 | /* |
147 | * Set DAT3 to input | |
148 | */ | |
149 | setup &= ~WBSD_DAT3_H; | |
150 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
151 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
fecf92ba | 152 | |
1da177e4 LT |
153 | /* |
154 | * Read back default clock. | |
155 | */ | |
156 | host->clk = wbsd_read_index(host, WBSD_IDX_CLK); | |
157 | ||
158 | /* | |
159 | * Power down port. | |
160 | */ | |
161 | outb(WBSD_POWER_N, host->base + WBSD_CSR); | |
fecf92ba | 162 | |
1da177e4 LT |
163 | /* |
164 | * Set maximum timeout. | |
165 | */ | |
166 | wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); | |
fecf92ba | 167 | |
85bcc130 PO |
168 | /* |
169 | * Test for card presence | |
170 | */ | |
171 | if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) | |
172 | host->flags |= WBSD_FCARD_PRESENT; | |
173 | else | |
174 | host->flags &= ~WBSD_FCARD_PRESENT; | |
fecf92ba | 175 | |
1da177e4 LT |
176 | /* |
177 | * Enable interesting interrupts. | |
178 | */ | |
179 | ier = 0; | |
180 | ier |= WBSD_EINT_CARD; | |
181 | ier |= WBSD_EINT_FIFO_THRE; | |
182 | ier |= WBSD_EINT_CCRC; | |
183 | ier |= WBSD_EINT_TIMEOUT; | |
184 | ier |= WBSD_EINT_CRC; | |
185 | ier |= WBSD_EINT_TC; | |
186 | ||
187 | outb(ier, host->base + WBSD_EIR); | |
188 | ||
189 | /* | |
190 | * Clear interrupts. | |
191 | */ | |
192 | inb(host->base + WBSD_ISR); | |
193 | } | |
194 | ||
cfa7f521 | 195 | static void wbsd_reset(struct wbsd_host *host) |
1da177e4 LT |
196 | { |
197 | u8 setup; | |
fecf92ba | 198 | |
d191634f | 199 | printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc)); |
fecf92ba | 200 | |
1da177e4 LT |
201 | /* |
202 | * Soft reset of chip (SD/MMC part). | |
203 | */ | |
204 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
205 | setup |= WBSD_SOFT_RESET; | |
206 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
207 | } | |
208 | ||
cfa7f521 | 209 | static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq) |
1da177e4 LT |
210 | { |
211 | unsigned long dmaflags; | |
fecf92ba | 212 | |
1da177e4 | 213 | DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode); |
fecf92ba | 214 | |
cfa7f521 | 215 | if (host->dma >= 0) { |
1da177e4 LT |
216 | /* |
217 | * Release ISA DMA controller. | |
218 | */ | |
219 | dmaflags = claim_dma_lock(); | |
220 | disable_dma(host->dma); | |
221 | clear_dma_ff(host->dma); | |
222 | release_dma_lock(dmaflags); | |
223 | ||
224 | /* | |
225 | * Disable DMA on host. | |
226 | */ | |
227 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
228 | } | |
fecf92ba | 229 | |
1da177e4 LT |
230 | host->mrq = NULL; |
231 | ||
232 | /* | |
233 | * MMC layer might call back into the driver so first unlock. | |
234 | */ | |
235 | spin_unlock(&host->lock); | |
236 | mmc_request_done(host->mmc, mrq); | |
237 | spin_lock(&host->lock); | |
238 | } | |
239 | ||
240 | /* | |
241 | * Scatter/gather functions | |
242 | */ | |
243 | ||
cfa7f521 | 244 | static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
245 | { |
246 | /* | |
247 | * Get info. about SG list from data structure. | |
248 | */ | |
249 | host->cur_sg = data->sg; | |
250 | host->num_sg = data->sg_len; | |
251 | ||
252 | host->offset = 0; | |
253 | host->remain = host->cur_sg->length; | |
254 | } | |
255 | ||
cfa7f521 | 256 | static inline int wbsd_next_sg(struct wbsd_host *host) |
1da177e4 LT |
257 | { |
258 | /* | |
259 | * Skip to next SG entry. | |
260 | */ | |
261 | host->cur_sg++; | |
262 | host->num_sg--; | |
263 | ||
264 | /* | |
265 | * Any entries left? | |
266 | */ | |
cfa7f521 PO |
267 | if (host->num_sg > 0) { |
268 | host->offset = 0; | |
269 | host->remain = host->cur_sg->length; | |
270 | } | |
fecf92ba | 271 | |
1da177e4 LT |
272 | return host->num_sg; |
273 | } | |
274 | ||
cfa7f521 | 275 | static inline char *wbsd_kmap_sg(struct wbsd_host *host) |
1da177e4 LT |
276 | { |
277 | host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) + | |
278 | host->cur_sg->offset; | |
279 | return host->mapped_sg; | |
280 | } | |
281 | ||
cfa7f521 | 282 | static inline void wbsd_kunmap_sg(struct wbsd_host *host) |
1da177e4 LT |
283 | { |
284 | kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ); | |
285 | } | |
286 | ||
cfa7f521 | 287 | static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
288 | { |
289 | unsigned int len, i, size; | |
cfa7f521 PO |
290 | struct scatterlist *sg; |
291 | char *dmabuf = host->dma_buffer; | |
292 | char *sgbuf; | |
fecf92ba | 293 | |
1da177e4 | 294 | size = host->size; |
fecf92ba | 295 | |
1da177e4 LT |
296 | sg = data->sg; |
297 | len = data->sg_len; | |
fecf92ba | 298 | |
1da177e4 LT |
299 | /* |
300 | * Just loop through all entries. Size might not | |
301 | * be the entire list though so make sure that | |
302 | * we do not transfer too much. | |
303 | */ | |
cfa7f521 | 304 | for (i = 0; i < len; i++) { |
1da177e4 LT |
305 | sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset; |
306 | if (size < sg[i].length) | |
307 | memcpy(dmabuf, sgbuf, size); | |
308 | else | |
309 | memcpy(dmabuf, sgbuf, sg[i].length); | |
310 | kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); | |
311 | dmabuf += sg[i].length; | |
fecf92ba | 312 | |
1da177e4 LT |
313 | if (size < sg[i].length) |
314 | size = 0; | |
315 | else | |
316 | size -= sg[i].length; | |
fecf92ba | 317 | |
1da177e4 LT |
318 | if (size == 0) |
319 | break; | |
320 | } | |
fecf92ba | 321 | |
1da177e4 LT |
322 | /* |
323 | * Check that we didn't get a request to transfer | |
324 | * more data than can fit into the SG list. | |
325 | */ | |
fecf92ba | 326 | |
1da177e4 | 327 | BUG_ON(size != 0); |
fecf92ba | 328 | |
1da177e4 LT |
329 | host->size -= size; |
330 | } | |
331 | ||
cfa7f521 | 332 | static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
333 | { |
334 | unsigned int len, i, size; | |
cfa7f521 PO |
335 | struct scatterlist *sg; |
336 | char *dmabuf = host->dma_buffer; | |
337 | char *sgbuf; | |
fecf92ba | 338 | |
1da177e4 | 339 | size = host->size; |
fecf92ba | 340 | |
1da177e4 LT |
341 | sg = data->sg; |
342 | len = data->sg_len; | |
fecf92ba | 343 | |
1da177e4 LT |
344 | /* |
345 | * Just loop through all entries. Size might not | |
346 | * be the entire list though so make sure that | |
347 | * we do not transfer too much. | |
348 | */ | |
cfa7f521 | 349 | for (i = 0; i < len; i++) { |
1da177e4 LT |
350 | sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset; |
351 | if (size < sg[i].length) | |
352 | memcpy(sgbuf, dmabuf, size); | |
353 | else | |
354 | memcpy(sgbuf, dmabuf, sg[i].length); | |
355 | kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); | |
356 | dmabuf += sg[i].length; | |
fecf92ba | 357 | |
1da177e4 LT |
358 | if (size < sg[i].length) |
359 | size = 0; | |
360 | else | |
361 | size -= sg[i].length; | |
fecf92ba | 362 | |
1da177e4 LT |
363 | if (size == 0) |
364 | break; | |
365 | } | |
fecf92ba | 366 | |
1da177e4 LT |
367 | /* |
368 | * Check that we didn't get a request to transfer | |
369 | * more data than can fit into the SG list. | |
370 | */ | |
fecf92ba | 371 | |
1da177e4 | 372 | BUG_ON(size != 0); |
fecf92ba | 373 | |
1da177e4 LT |
374 | host->size -= size; |
375 | } | |
376 | ||
377 | /* | |
378 | * Command handling | |
379 | */ | |
fecf92ba | 380 | |
cfa7f521 PO |
381 | static inline void wbsd_get_short_reply(struct wbsd_host *host, |
382 | struct mmc_command *cmd) | |
1da177e4 LT |
383 | { |
384 | /* | |
385 | * Correct response type? | |
386 | */ | |
cfa7f521 | 387 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) { |
1da177e4 LT |
388 | cmd->error = MMC_ERR_INVALID; |
389 | return; | |
390 | } | |
fecf92ba | 391 | |
cfa7f521 PO |
392 | cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24; |
393 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16; | |
394 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8; | |
395 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0; | |
396 | cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24; | |
1da177e4 LT |
397 | } |
398 | ||
cfa7f521 PO |
399 | static inline void wbsd_get_long_reply(struct wbsd_host *host, |
400 | struct mmc_command *cmd) | |
1da177e4 LT |
401 | { |
402 | int i; | |
fecf92ba | 403 | |
1da177e4 LT |
404 | /* |
405 | * Correct response type? | |
406 | */ | |
cfa7f521 | 407 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) { |
1da177e4 LT |
408 | cmd->error = MMC_ERR_INVALID; |
409 | return; | |
410 | } | |
fecf92ba | 411 | |
cfa7f521 | 412 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
413 | cmd->resp[i] = |
414 | wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24; | |
415 | cmd->resp[i] |= | |
416 | wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16; | |
417 | cmd->resp[i] |= | |
418 | wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8; | |
419 | cmd->resp[i] |= | |
420 | wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0; | |
421 | } | |
422 | } | |
423 | ||
cfa7f521 | 424 | static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd) |
1da177e4 LT |
425 | { |
426 | int i; | |
427 | u8 status, isr; | |
fecf92ba | 428 | |
1da177e4 LT |
429 | DBGF("Sending cmd (%x)\n", cmd->opcode); |
430 | ||
431 | /* | |
432 | * Clear accumulated ISR. The interrupt routine | |
433 | * will fill this one with events that occur during | |
434 | * transfer. | |
435 | */ | |
436 | host->isr = 0; | |
fecf92ba | 437 | |
1da177e4 LT |
438 | /* |
439 | * Send the command (CRC calculated by host). | |
440 | */ | |
441 | outb(cmd->opcode, host->base + WBSD_CMDR); | |
cfa7f521 | 442 | for (i = 3; i >= 0; i--) |
1da177e4 | 443 | outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); |
fecf92ba | 444 | |
1da177e4 | 445 | cmd->error = MMC_ERR_NONE; |
fecf92ba | 446 | |
1da177e4 LT |
447 | /* |
448 | * Wait for the request to complete. | |
449 | */ | |
450 | do { | |
451 | status = wbsd_read_index(host, WBSD_IDX_STATUS); | |
452 | } while (status & WBSD_CARDTRAFFIC); | |
453 | ||
454 | /* | |
455 | * Do we expect a reply? | |
456 | */ | |
e9225176 | 457 | if (cmd->flags & MMC_RSP_PRESENT) { |
1da177e4 LT |
458 | /* |
459 | * Read back status. | |
460 | */ | |
461 | isr = host->isr; | |
fecf92ba | 462 | |
1da177e4 LT |
463 | /* Card removed? */ |
464 | if (isr & WBSD_INT_CARD) | |
465 | cmd->error = MMC_ERR_TIMEOUT; | |
466 | /* Timeout? */ | |
467 | else if (isr & WBSD_INT_TIMEOUT) | |
468 | cmd->error = MMC_ERR_TIMEOUT; | |
469 | /* CRC? */ | |
470 | else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) | |
471 | cmd->error = MMC_ERR_BADCRC; | |
472 | /* All ok */ | |
cfa7f521 | 473 | else { |
e9225176 | 474 | if (cmd->flags & MMC_RSP_136) |
1da177e4 | 475 | wbsd_get_long_reply(host, cmd); |
e9225176 RK |
476 | else |
477 | wbsd_get_short_reply(host, cmd); | |
1da177e4 LT |
478 | } |
479 | } | |
480 | ||
481 | DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error); | |
482 | } | |
483 | ||
484 | /* | |
485 | * Data functions | |
486 | */ | |
487 | ||
cfa7f521 | 488 | static void wbsd_empty_fifo(struct wbsd_host *host) |
1da177e4 | 489 | { |
cfa7f521 PO |
490 | struct mmc_data *data = host->mrq->cmd->data; |
491 | char *buffer; | |
1da177e4 | 492 | int i, fsr, fifo; |
fecf92ba | 493 | |
1da177e4 LT |
494 | /* |
495 | * Handle excessive data. | |
496 | */ | |
497 | if (data->bytes_xfered == host->size) | |
498 | return; | |
fecf92ba | 499 | |
1da177e4 LT |
500 | buffer = wbsd_kmap_sg(host) + host->offset; |
501 | ||
502 | /* | |
503 | * Drain the fifo. This has a tendency to loop longer | |
504 | * than the FIFO length (usually one block). | |
505 | */ | |
cfa7f521 | 506 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) { |
1da177e4 LT |
507 | /* |
508 | * The size field in the FSR is broken so we have to | |
509 | * do some guessing. | |
fecf92ba | 510 | */ |
1da177e4 LT |
511 | if (fsr & WBSD_FIFO_FULL) |
512 | fifo = 16; | |
513 | else if (fsr & WBSD_FIFO_FUTHRE) | |
514 | fifo = 8; | |
515 | else | |
516 | fifo = 1; | |
fecf92ba | 517 | |
cfa7f521 | 518 | for (i = 0; i < fifo; i++) { |
1da177e4 LT |
519 | *buffer = inb(host->base + WBSD_DFR); |
520 | buffer++; | |
521 | host->offset++; | |
522 | host->remain--; | |
523 | ||
524 | data->bytes_xfered++; | |
fecf92ba | 525 | |
1da177e4 LT |
526 | /* |
527 | * Transfer done? | |
528 | */ | |
cfa7f521 | 529 | if (data->bytes_xfered == host->size) { |
fecf92ba | 530 | wbsd_kunmap_sg(host); |
1da177e4 LT |
531 | return; |
532 | } | |
fecf92ba | 533 | |
1da177e4 LT |
534 | /* |
535 | * End of scatter list entry? | |
536 | */ | |
cfa7f521 | 537 | if (host->remain == 0) { |
1da177e4 | 538 | wbsd_kunmap_sg(host); |
fecf92ba | 539 | |
1da177e4 LT |
540 | /* |
541 | * Get next entry. Check if last. | |
542 | */ | |
cfa7f521 | 543 | if (!wbsd_next_sg(host)) { |
1da177e4 LT |
544 | /* |
545 | * We should never reach this point. | |
546 | * It means that we're trying to | |
547 | * transfer more blocks than can fit | |
548 | * into the scatter list. | |
549 | */ | |
550 | BUG_ON(1); | |
fecf92ba | 551 | |
1da177e4 | 552 | host->size = data->bytes_xfered; |
fecf92ba | 553 | |
1da177e4 LT |
554 | return; |
555 | } | |
fecf92ba | 556 | |
1da177e4 LT |
557 | buffer = wbsd_kmap_sg(host); |
558 | } | |
559 | } | |
560 | } | |
fecf92ba | 561 | |
1da177e4 LT |
562 | wbsd_kunmap_sg(host); |
563 | ||
564 | /* | |
565 | * This is a very dirty hack to solve a | |
566 | * hardware problem. The chip doesn't trigger | |
567 | * FIFO threshold interrupts properly. | |
568 | */ | |
569 | if ((host->size - data->bytes_xfered) < 16) | |
570 | tasklet_schedule(&host->fifo_tasklet); | |
571 | } | |
572 | ||
cfa7f521 | 573 | static void wbsd_fill_fifo(struct wbsd_host *host) |
1da177e4 | 574 | { |
cfa7f521 PO |
575 | struct mmc_data *data = host->mrq->cmd->data; |
576 | char *buffer; | |
1da177e4 | 577 | int i, fsr, fifo; |
fecf92ba | 578 | |
1da177e4 LT |
579 | /* |
580 | * Check that we aren't being called after the | |
581 | * entire buffer has been transfered. | |
582 | */ | |
583 | if (data->bytes_xfered == host->size) | |
584 | return; | |
585 | ||
586 | buffer = wbsd_kmap_sg(host) + host->offset; | |
587 | ||
588 | /* | |
589 | * Fill the fifo. This has a tendency to loop longer | |
590 | * than the FIFO length (usually one block). | |
591 | */ | |
cfa7f521 | 592 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) { |
1da177e4 LT |
593 | /* |
594 | * The size field in the FSR is broken so we have to | |
595 | * do some guessing. | |
fecf92ba | 596 | */ |
1da177e4 LT |
597 | if (fsr & WBSD_FIFO_EMPTY) |
598 | fifo = 0; | |
599 | else if (fsr & WBSD_FIFO_EMTHRE) | |
600 | fifo = 8; | |
601 | else | |
602 | fifo = 15; | |
603 | ||
cfa7f521 | 604 | for (i = 16; i > fifo; i--) { |
1da177e4 LT |
605 | outb(*buffer, host->base + WBSD_DFR); |
606 | buffer++; | |
607 | host->offset++; | |
608 | host->remain--; | |
fecf92ba | 609 | |
1da177e4 | 610 | data->bytes_xfered++; |
fecf92ba | 611 | |
1da177e4 LT |
612 | /* |
613 | * Transfer done? | |
614 | */ | |
cfa7f521 | 615 | if (data->bytes_xfered == host->size) { |
1da177e4 LT |
616 | wbsd_kunmap_sg(host); |
617 | return; | |
618 | } | |
619 | ||
620 | /* | |
621 | * End of scatter list entry? | |
622 | */ | |
cfa7f521 | 623 | if (host->remain == 0) { |
1da177e4 | 624 | wbsd_kunmap_sg(host); |
fecf92ba | 625 | |
1da177e4 LT |
626 | /* |
627 | * Get next entry. Check if last. | |
628 | */ | |
cfa7f521 | 629 | if (!wbsd_next_sg(host)) { |
1da177e4 LT |
630 | /* |
631 | * We should never reach this point. | |
632 | * It means that we're trying to | |
633 | * transfer more blocks than can fit | |
634 | * into the scatter list. | |
635 | */ | |
636 | BUG_ON(1); | |
fecf92ba | 637 | |
1da177e4 | 638 | host->size = data->bytes_xfered; |
fecf92ba | 639 | |
1da177e4 LT |
640 | return; |
641 | } | |
fecf92ba | 642 | |
1da177e4 LT |
643 | buffer = wbsd_kmap_sg(host); |
644 | } | |
645 | } | |
646 | } | |
fecf92ba | 647 | |
1da177e4 | 648 | wbsd_kunmap_sg(host); |
fecf92ba | 649 | |
85bcc130 PO |
650 | /* |
651 | * The controller stops sending interrupts for | |
652 | * 'FIFO empty' under certain conditions. So we | |
653 | * need to be a bit more pro-active. | |
654 | */ | |
655 | tasklet_schedule(&host->fifo_tasklet); | |
1da177e4 LT |
656 | } |
657 | ||
cfa7f521 | 658 | static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
659 | { |
660 | u16 blksize; | |
661 | u8 setup; | |
662 | unsigned long dmaflags; | |
663 | ||
664 | DBGF("blksz %04x blks %04x flags %08x\n", | |
2c171bf1 | 665 | data->blksz, data->blocks, data->flags); |
1da177e4 LT |
666 | DBGF("tsac %d ms nsac %d clk\n", |
667 | data->timeout_ns / 1000000, data->timeout_clks); | |
fecf92ba | 668 | |
1da177e4 LT |
669 | /* |
670 | * Calculate size. | |
671 | */ | |
2c171bf1 | 672 | host->size = data->blocks * data->blksz; |
1da177e4 LT |
673 | |
674 | /* | |
675 | * Check timeout values for overflow. | |
676 | * (Yes, some cards cause this value to overflow). | |
677 | */ | |
678 | if (data->timeout_ns > 127000000) | |
679 | wbsd_write_index(host, WBSD_IDX_TAAC, 127); | |
cfa7f521 PO |
680 | else { |
681 | wbsd_write_index(host, WBSD_IDX_TAAC, | |
682 | data->timeout_ns / 1000000); | |
683 | } | |
fecf92ba | 684 | |
1da177e4 LT |
685 | if (data->timeout_clks > 255) |
686 | wbsd_write_index(host, WBSD_IDX_NSAC, 255); | |
687 | else | |
688 | wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); | |
fecf92ba | 689 | |
1da177e4 LT |
690 | /* |
691 | * Inform the chip of how large blocks will be | |
692 | * sent. It needs this to determine when to | |
693 | * calculate CRC. | |
694 | * | |
695 | * Space for CRC must be included in the size. | |
65ae2118 | 696 | * Two bytes are needed for each data line. |
1da177e4 | 697 | */ |
cfa7f521 | 698 | if (host->bus_width == MMC_BUS_WIDTH_1) { |
2c171bf1 | 699 | blksize = data->blksz + 2; |
65ae2118 PO |
700 | |
701 | wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); | |
702 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); | |
cfa7f521 | 703 | } else if (host->bus_width == MMC_BUS_WIDTH_4) { |
2c171bf1 | 704 | blksize = data->blksz + 2 * 4; |
fecf92ba | 705 | |
cfa7f521 PO |
706 | wbsd_write_index(host, WBSD_IDX_PBSMSB, |
707 | ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH); | |
65ae2118 | 708 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); |
cfa7f521 | 709 | } else { |
65ae2118 PO |
710 | data->error = MMC_ERR_INVALID; |
711 | return; | |
712 | } | |
1da177e4 LT |
713 | |
714 | /* | |
715 | * Clear the FIFO. This is needed even for DMA | |
716 | * transfers since the chip still uses the FIFO | |
717 | * internally. | |
718 | */ | |
719 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
720 | setup |= WBSD_FIFO_RESET; | |
721 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 722 | |
1da177e4 LT |
723 | /* |
724 | * DMA transfer? | |
725 | */ | |
cfa7f521 | 726 | if (host->dma >= 0) { |
1da177e4 LT |
727 | /* |
728 | * The buffer for DMA is only 64 kB. | |
729 | */ | |
730 | BUG_ON(host->size > 0x10000); | |
cfa7f521 | 731 | if (host->size > 0x10000) { |
1da177e4 LT |
732 | data->error = MMC_ERR_INVALID; |
733 | return; | |
734 | } | |
fecf92ba | 735 | |
1da177e4 LT |
736 | /* |
737 | * Transfer data from the SG list to | |
738 | * the DMA buffer. | |
739 | */ | |
740 | if (data->flags & MMC_DATA_WRITE) | |
741 | wbsd_sg_to_dma(host, data); | |
fecf92ba | 742 | |
1da177e4 LT |
743 | /* |
744 | * Initialise the ISA DMA controller. | |
fecf92ba | 745 | */ |
1da177e4 LT |
746 | dmaflags = claim_dma_lock(); |
747 | disable_dma(host->dma); | |
748 | clear_dma_ff(host->dma); | |
749 | if (data->flags & MMC_DATA_READ) | |
750 | set_dma_mode(host->dma, DMA_MODE_READ & ~0x40); | |
751 | else | |
752 | set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40); | |
753 | set_dma_addr(host->dma, host->dma_addr); | |
754 | set_dma_count(host->dma, host->size); | |
755 | ||
756 | enable_dma(host->dma); | |
757 | release_dma_lock(dmaflags); | |
758 | ||
759 | /* | |
760 | * Enable DMA on the host. | |
761 | */ | |
762 | wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE); | |
cfa7f521 | 763 | } else { |
1da177e4 LT |
764 | /* |
765 | * This flag is used to keep printk | |
766 | * output to a minimum. | |
767 | */ | |
768 | host->firsterr = 1; | |
fecf92ba | 769 | |
1da177e4 LT |
770 | /* |
771 | * Initialise the SG list. | |
772 | */ | |
773 | wbsd_init_sg(host, data); | |
fecf92ba | 774 | |
1da177e4 LT |
775 | /* |
776 | * Turn off DMA. | |
777 | */ | |
778 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 779 | |
1da177e4 LT |
780 | /* |
781 | * Set up FIFO threshold levels (and fill | |
782 | * buffer if doing a write). | |
783 | */ | |
cfa7f521 | 784 | if (data->flags & MMC_DATA_READ) { |
1da177e4 LT |
785 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
786 | WBSD_FIFOEN_FULL | 8); | |
cfa7f521 | 787 | } else { |
1da177e4 LT |
788 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
789 | WBSD_FIFOEN_EMPTY | 8); | |
790 | wbsd_fill_fifo(host); | |
791 | } | |
fecf92ba PO |
792 | } |
793 | ||
1da177e4 LT |
794 | data->error = MMC_ERR_NONE; |
795 | } | |
796 | ||
cfa7f521 | 797 | static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
798 | { |
799 | unsigned long dmaflags; | |
800 | int count; | |
801 | u8 status; | |
fecf92ba | 802 | |
1da177e4 LT |
803 | WARN_ON(host->mrq == NULL); |
804 | ||
805 | /* | |
806 | * Send a stop command if needed. | |
807 | */ | |
808 | if (data->stop) | |
809 | wbsd_send_command(host, data->stop); | |
810 | ||
811 | /* | |
812 | * Wait for the controller to leave data | |
813 | * transfer state. | |
814 | */ | |
cfa7f521 | 815 | do { |
1da177e4 LT |
816 | status = wbsd_read_index(host, WBSD_IDX_STATUS); |
817 | } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); | |
fecf92ba | 818 | |
1da177e4 LT |
819 | /* |
820 | * DMA transfer? | |
821 | */ | |
cfa7f521 | 822 | if (host->dma >= 0) { |
1da177e4 LT |
823 | /* |
824 | * Disable DMA on the host. | |
825 | */ | |
826 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 827 | |
1da177e4 LT |
828 | /* |
829 | * Turn of ISA DMA controller. | |
830 | */ | |
831 | dmaflags = claim_dma_lock(); | |
832 | disable_dma(host->dma); | |
833 | clear_dma_ff(host->dma); | |
834 | count = get_dma_residue(host->dma); | |
835 | release_dma_lock(dmaflags); | |
fecf92ba | 836 | |
1da177e4 LT |
837 | /* |
838 | * Any leftover data? | |
839 | */ | |
cfa7f521 | 840 | if (count) { |
d191634f PO |
841 | printk(KERN_ERR "%s: Incomplete DMA transfer. " |
842 | "%d bytes left.\n", | |
843 | mmc_hostname(host->mmc), count); | |
fecf92ba | 844 | |
1da177e4 | 845 | data->error = MMC_ERR_FAILED; |
cfa7f521 | 846 | } else { |
1da177e4 LT |
847 | /* |
848 | * Transfer data from DMA buffer to | |
849 | * SG list. | |
850 | */ | |
851 | if (data->flags & MMC_DATA_READ) | |
852 | wbsd_dma_to_sg(host, data); | |
fecf92ba | 853 | |
1da177e4 LT |
854 | data->bytes_xfered = host->size; |
855 | } | |
856 | } | |
fecf92ba | 857 | |
1da177e4 | 858 | DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered); |
fecf92ba | 859 | |
1da177e4 LT |
860 | wbsd_request_end(host, host->mrq); |
861 | } | |
862 | ||
85bcc130 PO |
863 | /*****************************************************************************\ |
864 | * * | |
865 | * MMC layer callbacks * | |
866 | * * | |
867 | \*****************************************************************************/ | |
1da177e4 | 868 | |
cfa7f521 | 869 | static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq) |
1da177e4 | 870 | { |
cfa7f521 PO |
871 | struct wbsd_host *host = mmc_priv(mmc); |
872 | struct mmc_command *cmd; | |
1da177e4 LT |
873 | |
874 | /* | |
875 | * Disable tasklets to avoid a deadlock. | |
876 | */ | |
877 | spin_lock_bh(&host->lock); | |
878 | ||
879 | BUG_ON(host->mrq != NULL); | |
880 | ||
881 | cmd = mrq->cmd; | |
882 | ||
883 | host->mrq = mrq; | |
fecf92ba | 884 | |
1da177e4 LT |
885 | /* |
886 | * If there is no card in the slot then | |
887 | * timeout immediatly. | |
888 | */ | |
cfa7f521 | 889 | if (!(host->flags & WBSD_FCARD_PRESENT)) { |
1da177e4 LT |
890 | cmd->error = MMC_ERR_TIMEOUT; |
891 | goto done; | |
892 | } | |
893 | ||
894 | /* | |
895 | * Does the request include data? | |
896 | */ | |
cfa7f521 | 897 | if (cmd->data) { |
1da177e4 | 898 | wbsd_prepare_data(host, cmd->data); |
fecf92ba | 899 | |
1da177e4 LT |
900 | if (cmd->data->error != MMC_ERR_NONE) |
901 | goto done; | |
902 | } | |
fecf92ba | 903 | |
1da177e4 LT |
904 | wbsd_send_command(host, cmd); |
905 | ||
906 | /* | |
907 | * If this is a data transfer the request | |
908 | * will be finished after the data has | |
909 | * transfered. | |
fecf92ba | 910 | */ |
cfa7f521 | 911 | if (cmd->data && (cmd->error == MMC_ERR_NONE)) { |
1da177e4 LT |
912 | /* |
913 | * Dirty fix for hardware bug. | |
914 | */ | |
915 | if (host->dma == -1) | |
916 | tasklet_schedule(&host->fifo_tasklet); | |
917 | ||
918 | spin_unlock_bh(&host->lock); | |
919 | ||
920 | return; | |
921 | } | |
fecf92ba | 922 | |
1da177e4 LT |
923 | done: |
924 | wbsd_request_end(host, mrq); | |
925 | ||
926 | spin_unlock_bh(&host->lock); | |
927 | } | |
928 | ||
cfa7f521 | 929 | static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
1da177e4 | 930 | { |
cfa7f521 | 931 | struct wbsd_host *host = mmc_priv(mmc); |
1da177e4 | 932 | u8 clk, setup, pwr; |
fecf92ba | 933 | |
1da177e4 LT |
934 | spin_lock_bh(&host->lock); |
935 | ||
936 | /* | |
937 | * Reset the chip on each power off. | |
938 | * Should clear out any weird states. | |
939 | */ | |
940 | if (ios->power_mode == MMC_POWER_OFF) | |
941 | wbsd_init_device(host); | |
fecf92ba | 942 | |
1da177e4 LT |
943 | if (ios->clock >= 24000000) |
944 | clk = WBSD_CLK_24M; | |
945 | else if (ios->clock >= 16000000) | |
946 | clk = WBSD_CLK_16M; | |
947 | else if (ios->clock >= 12000000) | |
948 | clk = WBSD_CLK_12M; | |
949 | else | |
950 | clk = WBSD_CLK_375K; | |
951 | ||
952 | /* | |
953 | * Only write to the clock register when | |
954 | * there is an actual change. | |
955 | */ | |
cfa7f521 | 956 | if (clk != host->clk) { |
1da177e4 LT |
957 | wbsd_write_index(host, WBSD_IDX_CLK, clk); |
958 | host->clk = clk; | |
959 | } | |
960 | ||
85bcc130 PO |
961 | /* |
962 | * Power up card. | |
963 | */ | |
cfa7f521 | 964 | if (ios->power_mode != MMC_POWER_OFF) { |
1da177e4 LT |
965 | pwr = inb(host->base + WBSD_CSR); |
966 | pwr &= ~WBSD_POWER_N; | |
967 | outb(pwr, host->base + WBSD_CSR); | |
1da177e4 LT |
968 | } |
969 | ||
85bcc130 PO |
970 | /* |
971 | * MMC cards need to have pin 1 high during init. | |
85bcc130 | 972 | * It wreaks havoc with the card detection though so |
1656fa57 | 973 | * that needs to be disabled. |
85bcc130 PO |
974 | */ |
975 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
cfa7f521 | 976 | if (ios->chip_select == MMC_CS_HIGH) { |
65ae2118 | 977 | BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1); |
85bcc130 PO |
978 | setup |= WBSD_DAT3_H; |
979 | host->flags |= WBSD_FIGNORE_DETECT; | |
cfa7f521 PO |
980 | } else { |
981 | if (setup & WBSD_DAT3_H) { | |
19c1f3ca | 982 | setup &= ~WBSD_DAT3_H; |
1656fa57 | 983 | |
19c1f3ca PO |
984 | /* |
985 | * We cannot resume card detection immediatly | |
986 | * because of capacitance and delays in the chip. | |
987 | */ | |
cfa7f521 | 988 | mod_timer(&host->ignore_timer, jiffies + HZ / 100); |
19c1f3ca | 989 | } |
85bcc130 PO |
990 | } |
991 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 992 | |
65ae2118 PO |
993 | /* |
994 | * Store bus width for later. Will be used when | |
995 | * setting up the data transfer. | |
996 | */ | |
997 | host->bus_width = ios->bus_width; | |
998 | ||
1da177e4 LT |
999 | spin_unlock_bh(&host->lock); |
1000 | } | |
1001 | ||
cfa7f521 | 1002 | static int wbsd_get_ro(struct mmc_host *mmc) |
65ae2118 | 1003 | { |
cfa7f521 | 1004 | struct wbsd_host *host = mmc_priv(mmc); |
65ae2118 PO |
1005 | u8 csr; |
1006 | ||
1007 | spin_lock_bh(&host->lock); | |
1008 | ||
1009 | csr = inb(host->base + WBSD_CSR); | |
1010 | csr |= WBSD_MSLED; | |
1011 | outb(csr, host->base + WBSD_CSR); | |
1012 | ||
1013 | mdelay(1); | |
1014 | ||
1015 | csr = inb(host->base + WBSD_CSR); | |
1016 | csr &= ~WBSD_MSLED; | |
1017 | outb(csr, host->base + WBSD_CSR); | |
1018 | ||
1019 | spin_unlock_bh(&host->lock); | |
1020 | ||
1021 | return csr & WBSD_WRPT; | |
1022 | } | |
1023 | ||
85bcc130 PO |
1024 | static struct mmc_host_ops wbsd_ops = { |
1025 | .request = wbsd_request, | |
1026 | .set_ios = wbsd_set_ios, | |
65ae2118 | 1027 | .get_ro = wbsd_get_ro, |
85bcc130 PO |
1028 | }; |
1029 | ||
1030 | /*****************************************************************************\ | |
1031 | * * | |
1032 | * Interrupt handling * | |
1033 | * * | |
1034 | \*****************************************************************************/ | |
1035 | ||
1656fa57 PO |
1036 | /* |
1037 | * Helper function to reset detection ignore | |
1038 | */ | |
1039 | ||
1040 | static void wbsd_reset_ignore(unsigned long data) | |
1041 | { | |
cfa7f521 | 1042 | struct wbsd_host *host = (struct wbsd_host *)data; |
1656fa57 PO |
1043 | |
1044 | BUG_ON(host == NULL); | |
1045 | ||
1046 | DBG("Resetting card detection ignore\n"); | |
1047 | ||
1048 | spin_lock_bh(&host->lock); | |
1049 | ||
1050 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
1051 | ||
1052 | /* | |
1053 | * Card status might have changed during the | |
1054 | * blackout. | |
1055 | */ | |
1056 | tasklet_schedule(&host->card_tasklet); | |
1057 | ||
1058 | spin_unlock_bh(&host->lock); | |
1059 | } | |
1060 | ||
1da177e4 LT |
1061 | /* |
1062 | * Tasklets | |
1063 | */ | |
1064 | ||
cfa7f521 | 1065 | static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host) |
1da177e4 LT |
1066 | { |
1067 | WARN_ON(!host->mrq); | |
1068 | if (!host->mrq) | |
1069 | return NULL; | |
1070 | ||
1071 | WARN_ON(!host->mrq->cmd); | |
1072 | if (!host->mrq->cmd) | |
1073 | return NULL; | |
1074 | ||
1075 | WARN_ON(!host->mrq->cmd->data); | |
1076 | if (!host->mrq->cmd->data) | |
1077 | return NULL; | |
fecf92ba | 1078 | |
1da177e4 LT |
1079 | return host->mrq->cmd->data; |
1080 | } | |
1081 | ||
1082 | static void wbsd_tasklet_card(unsigned long param) | |
1083 | { | |
cfa7f521 | 1084 | struct wbsd_host *host = (struct wbsd_host *)param; |
1da177e4 | 1085 | u8 csr; |
210ce2a7 | 1086 | int delay = -1; |
fecf92ba | 1087 | |
1da177e4 | 1088 | spin_lock(&host->lock); |
fecf92ba | 1089 | |
cfa7f521 | 1090 | if (host->flags & WBSD_FIGNORE_DETECT) { |
85bcc130 PO |
1091 | spin_unlock(&host->lock); |
1092 | return; | |
1093 | } | |
fecf92ba | 1094 | |
1da177e4 LT |
1095 | csr = inb(host->base + WBSD_CSR); |
1096 | WARN_ON(csr == 0xff); | |
fecf92ba | 1097 | |
cfa7f521 PO |
1098 | if (csr & WBSD_CARDPRESENT) { |
1099 | if (!(host->flags & WBSD_FCARD_PRESENT)) { | |
85bcc130 PO |
1100 | DBG("Card inserted\n"); |
1101 | host->flags |= WBSD_FCARD_PRESENT; | |
fecf92ba | 1102 | |
210ce2a7 | 1103 | delay = 500; |
85bcc130 | 1104 | } |
cfa7f521 | 1105 | } else if (host->flags & WBSD_FCARD_PRESENT) { |
1da177e4 | 1106 | DBG("Card removed\n"); |
85bcc130 | 1107 | host->flags &= ~WBSD_FCARD_PRESENT; |
fecf92ba | 1108 | |
cfa7f521 | 1109 | if (host->mrq) { |
d191634f PO |
1110 | printk(KERN_ERR "%s: Card removed during transfer!\n", |
1111 | mmc_hostname(host->mmc)); | |
1da177e4 | 1112 | wbsd_reset(host); |
fecf92ba | 1113 | |
1da177e4 LT |
1114 | host->mrq->cmd->error = MMC_ERR_FAILED; |
1115 | tasklet_schedule(&host->finish_tasklet); | |
1116 | } | |
fecf92ba | 1117 | |
210ce2a7 | 1118 | delay = 0; |
6e6293dd | 1119 | } |
210ce2a7 PO |
1120 | |
1121 | /* | |
1122 | * Unlock first since we might get a call back. | |
1123 | */ | |
1124 | ||
1125 | spin_unlock(&host->lock); | |
1126 | ||
1127 | if (delay != -1) | |
1128 | mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); | |
1da177e4 LT |
1129 | } |
1130 | ||
1131 | static void wbsd_tasklet_fifo(unsigned long param) | |
1132 | { | |
cfa7f521 PO |
1133 | struct wbsd_host *host = (struct wbsd_host *)param; |
1134 | struct mmc_data *data; | |
fecf92ba | 1135 | |
1da177e4 | 1136 | spin_lock(&host->lock); |
fecf92ba | 1137 | |
1da177e4 LT |
1138 | if (!host->mrq) |
1139 | goto end; | |
fecf92ba | 1140 | |
1da177e4 LT |
1141 | data = wbsd_get_data(host); |
1142 | if (!data) | |
1143 | goto end; | |
1144 | ||
1145 | if (data->flags & MMC_DATA_WRITE) | |
1146 | wbsd_fill_fifo(host); | |
1147 | else | |
1148 | wbsd_empty_fifo(host); | |
1149 | ||
1150 | /* | |
1151 | * Done? | |
1152 | */ | |
cfa7f521 | 1153 | if (host->size == data->bytes_xfered) { |
1da177e4 LT |
1154 | wbsd_write_index(host, WBSD_IDX_FIFOEN, 0); |
1155 | tasklet_schedule(&host->finish_tasklet); | |
1156 | } | |
1157 | ||
fecf92ba | 1158 | end: |
1da177e4 LT |
1159 | spin_unlock(&host->lock); |
1160 | } | |
1161 | ||
1162 | static void wbsd_tasklet_crc(unsigned long param) | |
1163 | { | |
cfa7f521 PO |
1164 | struct wbsd_host *host = (struct wbsd_host *)param; |
1165 | struct mmc_data *data; | |
fecf92ba | 1166 | |
1da177e4 | 1167 | spin_lock(&host->lock); |
fecf92ba | 1168 | |
1da177e4 LT |
1169 | if (!host->mrq) |
1170 | goto end; | |
fecf92ba | 1171 | |
1da177e4 LT |
1172 | data = wbsd_get_data(host); |
1173 | if (!data) | |
1174 | goto end; | |
fecf92ba | 1175 | |
1da177e4 LT |
1176 | DBGF("CRC error\n"); |
1177 | ||
1178 | data->error = MMC_ERR_BADCRC; | |
fecf92ba | 1179 | |
1da177e4 LT |
1180 | tasklet_schedule(&host->finish_tasklet); |
1181 | ||
fecf92ba | 1182 | end: |
1da177e4 LT |
1183 | spin_unlock(&host->lock); |
1184 | } | |
1185 | ||
1186 | static void wbsd_tasklet_timeout(unsigned long param) | |
1187 | { | |
cfa7f521 PO |
1188 | struct wbsd_host *host = (struct wbsd_host *)param; |
1189 | struct mmc_data *data; | |
fecf92ba | 1190 | |
1da177e4 | 1191 | spin_lock(&host->lock); |
fecf92ba | 1192 | |
1da177e4 LT |
1193 | if (!host->mrq) |
1194 | goto end; | |
fecf92ba | 1195 | |
1da177e4 LT |
1196 | data = wbsd_get_data(host); |
1197 | if (!data) | |
1198 | goto end; | |
fecf92ba | 1199 | |
1da177e4 LT |
1200 | DBGF("Timeout\n"); |
1201 | ||
1202 | data->error = MMC_ERR_TIMEOUT; | |
fecf92ba | 1203 | |
1da177e4 LT |
1204 | tasklet_schedule(&host->finish_tasklet); |
1205 | ||
fecf92ba | 1206 | end: |
1da177e4 LT |
1207 | spin_unlock(&host->lock); |
1208 | } | |
1209 | ||
1210 | static void wbsd_tasklet_finish(unsigned long param) | |
1211 | { | |
cfa7f521 PO |
1212 | struct wbsd_host *host = (struct wbsd_host *)param; |
1213 | struct mmc_data *data; | |
fecf92ba | 1214 | |
1da177e4 | 1215 | spin_lock(&host->lock); |
fecf92ba | 1216 | |
1da177e4 LT |
1217 | WARN_ON(!host->mrq); |
1218 | if (!host->mrq) | |
1219 | goto end; | |
fecf92ba | 1220 | |
1da177e4 LT |
1221 | data = wbsd_get_data(host); |
1222 | if (!data) | |
1223 | goto end; | |
1224 | ||
1225 | wbsd_finish_data(host, data); | |
fecf92ba PO |
1226 | |
1227 | end: | |
1da177e4 LT |
1228 | spin_unlock(&host->lock); |
1229 | } | |
1230 | ||
1231 | static void wbsd_tasklet_block(unsigned long param) | |
1232 | { | |
cfa7f521 PO |
1233 | struct wbsd_host *host = (struct wbsd_host *)param; |
1234 | struct mmc_data *data; | |
fecf92ba | 1235 | |
1da177e4 LT |
1236 | spin_lock(&host->lock); |
1237 | ||
1238 | if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) != | |
cfa7f521 | 1239 | WBSD_CRC_OK) { |
1da177e4 LT |
1240 | data = wbsd_get_data(host); |
1241 | if (!data) | |
1242 | goto end; | |
fecf92ba | 1243 | |
1da177e4 LT |
1244 | DBGF("CRC error\n"); |
1245 | ||
1246 | data->error = MMC_ERR_BADCRC; | |
fecf92ba | 1247 | |
1da177e4 LT |
1248 | tasklet_schedule(&host->finish_tasklet); |
1249 | } | |
1250 | ||
fecf92ba | 1251 | end: |
1da177e4 LT |
1252 | spin_unlock(&host->lock); |
1253 | } | |
1254 | ||
1255 | /* | |
1256 | * Interrupt handling | |
1257 | */ | |
1258 | ||
1259 | static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs) | |
1260 | { | |
cfa7f521 | 1261 | struct wbsd_host *host = dev_id; |
1da177e4 | 1262 | int isr; |
fecf92ba | 1263 | |
1da177e4 LT |
1264 | isr = inb(host->base + WBSD_ISR); |
1265 | ||
1266 | /* | |
1267 | * Was it actually our hardware that caused the interrupt? | |
1268 | */ | |
1269 | if (isr == 0xff || isr == 0x00) | |
1270 | return IRQ_NONE; | |
fecf92ba | 1271 | |
1da177e4 LT |
1272 | host->isr |= isr; |
1273 | ||
1274 | /* | |
1275 | * Schedule tasklets as needed. | |
1276 | */ | |
1277 | if (isr & WBSD_INT_CARD) | |
1278 | tasklet_schedule(&host->card_tasklet); | |
1279 | if (isr & WBSD_INT_FIFO_THRE) | |
1280 | tasklet_schedule(&host->fifo_tasklet); | |
1281 | if (isr & WBSD_INT_CRC) | |
1282 | tasklet_hi_schedule(&host->crc_tasklet); | |
1283 | if (isr & WBSD_INT_TIMEOUT) | |
1284 | tasklet_hi_schedule(&host->timeout_tasklet); | |
1285 | if (isr & WBSD_INT_BUSYEND) | |
1286 | tasklet_hi_schedule(&host->block_tasklet); | |
1287 | if (isr & WBSD_INT_TC) | |
1288 | tasklet_schedule(&host->finish_tasklet); | |
fecf92ba | 1289 | |
1da177e4 LT |
1290 | return IRQ_HANDLED; |
1291 | } | |
1292 | ||
85bcc130 PO |
1293 | /*****************************************************************************\ |
1294 | * * | |
1295 | * Device initialisation and shutdown * | |
1296 | * * | |
1297 | \*****************************************************************************/ | |
1298 | ||
1da177e4 | 1299 | /* |
85bcc130 | 1300 | * Allocate/free MMC structure. |
1da177e4 LT |
1301 | */ |
1302 | ||
cfa7f521 | 1303 | static int __devinit wbsd_alloc_mmc(struct device *dev) |
85bcc130 | 1304 | { |
cfa7f521 PO |
1305 | struct mmc_host *mmc; |
1306 | struct wbsd_host *host; | |
fecf92ba | 1307 | |
85bcc130 PO |
1308 | /* |
1309 | * Allocate MMC structure. | |
1310 | */ | |
1311 | mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); | |
1312 | if (!mmc) | |
1313 | return -ENOMEM; | |
fecf92ba | 1314 | |
85bcc130 PO |
1315 | host = mmc_priv(mmc); |
1316 | host->mmc = mmc; | |
1317 | ||
1318 | host->dma = -1; | |
1319 | ||
1320 | /* | |
1321 | * Set host parameters. | |
1322 | */ | |
1323 | mmc->ops = &wbsd_ops; | |
1324 | mmc->f_min = 375000; | |
1325 | mmc->f_max = 24000000; | |
cfa7f521 | 1326 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
42431acb | 1327 | mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK; |
fecf92ba | 1328 | |
85bcc130 | 1329 | spin_lock_init(&host->lock); |
fecf92ba | 1330 | |
6e6293dd | 1331 | /* |
1656fa57 | 1332 | * Set up timers |
6e6293dd | 1333 | */ |
1656fa57 PO |
1334 | init_timer(&host->ignore_timer); |
1335 | host->ignore_timer.data = (unsigned long)host; | |
1336 | host->ignore_timer.function = wbsd_reset_ignore; | |
fecf92ba | 1337 | |
85bcc130 PO |
1338 | /* |
1339 | * Maximum number of segments. Worst case is one sector per segment | |
1340 | * so this will be 64kB/512. | |
1341 | */ | |
1342 | mmc->max_hw_segs = 128; | |
1343 | mmc->max_phys_segs = 128; | |
fecf92ba | 1344 | |
85bcc130 PO |
1345 | /* |
1346 | * Maximum number of sectors in one transfer. Also limited by 64kB | |
1347 | * buffer. | |
1348 | */ | |
1349 | mmc->max_sectors = 128; | |
fecf92ba | 1350 | |
85bcc130 PO |
1351 | /* |
1352 | * Maximum segment size. Could be one segment with the maximum number | |
1353 | * of segments. | |
1354 | */ | |
1355 | mmc->max_seg_size = mmc->max_sectors * 512; | |
fecf92ba | 1356 | |
85bcc130 | 1357 | dev_set_drvdata(dev, mmc); |
fecf92ba | 1358 | |
85bcc130 PO |
1359 | return 0; |
1360 | } | |
1361 | ||
cfa7f521 | 1362 | static void __devexit wbsd_free_mmc(struct device *dev) |
85bcc130 | 1363 | { |
cfa7f521 PO |
1364 | struct mmc_host *mmc; |
1365 | struct wbsd_host *host; | |
fecf92ba | 1366 | |
85bcc130 PO |
1367 | mmc = dev_get_drvdata(dev); |
1368 | if (!mmc) | |
1369 | return; | |
fecf92ba | 1370 | |
6e6293dd PO |
1371 | host = mmc_priv(mmc); |
1372 | BUG_ON(host == NULL); | |
fecf92ba | 1373 | |
1656fa57 | 1374 | del_timer_sync(&host->ignore_timer); |
fecf92ba | 1375 | |
85bcc130 | 1376 | mmc_free_host(mmc); |
fecf92ba | 1377 | |
85bcc130 PO |
1378 | dev_set_drvdata(dev, NULL); |
1379 | } | |
1380 | ||
1381 | /* | |
1382 | * Scan for known chip id:s | |
1383 | */ | |
1384 | ||
cfa7f521 | 1385 | static int __devinit wbsd_scan(struct wbsd_host *host) |
1da177e4 LT |
1386 | { |
1387 | int i, j, k; | |
1388 | int id; | |
fecf92ba | 1389 | |
1da177e4 LT |
1390 | /* |
1391 | * Iterate through all ports, all codes to | |
1392 | * find hardware that is in our known list. | |
1393 | */ | |
63648fb5 | 1394 | for (i = 0; i < ARRAY_SIZE(config_ports); i++) { |
1da177e4 LT |
1395 | if (!request_region(config_ports[i], 2, DRIVER_NAME)) |
1396 | continue; | |
fecf92ba | 1397 | |
63648fb5 | 1398 | for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) { |
1da177e4 | 1399 | id = 0xFFFF; |
fecf92ba | 1400 | |
19c1f3ca PO |
1401 | host->config = config_ports[i]; |
1402 | host->unlock_code = unlock_codes[j]; | |
1403 | ||
1404 | wbsd_unlock_config(host); | |
fecf92ba | 1405 | |
1da177e4 LT |
1406 | outb(WBSD_CONF_ID_HI, config_ports[i]); |
1407 | id = inb(config_ports[i] + 1) << 8; | |
1408 | ||
1409 | outb(WBSD_CONF_ID_LO, config_ports[i]); | |
1410 | id |= inb(config_ports[i] + 1); | |
fecf92ba | 1411 | |
19c1f3ca PO |
1412 | wbsd_lock_config(host); |
1413 | ||
63648fb5 | 1414 | for (k = 0; k < ARRAY_SIZE(valid_ids); k++) { |
cfa7f521 | 1415 | if (id == valid_ids[k]) { |
1da177e4 | 1416 | host->chip_id = id; |
fecf92ba | 1417 | |
1da177e4 LT |
1418 | return 0; |
1419 | } | |
1420 | } | |
fecf92ba | 1421 | |
cfa7f521 | 1422 | if (id != 0xFFFF) { |
1da177e4 LT |
1423 | DBG("Unknown hardware (id %x) found at %x\n", |
1424 | id, config_ports[i]); | |
1425 | } | |
1da177e4 | 1426 | } |
fecf92ba | 1427 | |
1da177e4 LT |
1428 | release_region(config_ports[i], 2); |
1429 | } | |
fecf92ba | 1430 | |
19c1f3ca PO |
1431 | host->config = 0; |
1432 | host->unlock_code = 0; | |
1433 | ||
1da177e4 LT |
1434 | return -ENODEV; |
1435 | } | |
1436 | ||
85bcc130 PO |
1437 | /* |
1438 | * Allocate/free io port ranges | |
1439 | */ | |
1440 | ||
cfa7f521 | 1441 | static int __devinit wbsd_request_region(struct wbsd_host *host, int base) |
1da177e4 | 1442 | { |
916f3ac6 | 1443 | if (base & 0x7) |
1da177e4 | 1444 | return -EINVAL; |
fecf92ba | 1445 | |
85bcc130 | 1446 | if (!request_region(base, 8, DRIVER_NAME)) |
1da177e4 | 1447 | return -EIO; |
fecf92ba | 1448 | |
916f3ac6 | 1449 | host->base = base; |
fecf92ba | 1450 | |
1da177e4 LT |
1451 | return 0; |
1452 | } | |
1453 | ||
cfa7f521 | 1454 | static void __devexit wbsd_release_regions(struct wbsd_host *host) |
1da177e4 LT |
1455 | { |
1456 | if (host->base) | |
1457 | release_region(host->base, 8); | |
fecf92ba | 1458 | |
85bcc130 | 1459 | host->base = 0; |
1da177e4 LT |
1460 | |
1461 | if (host->config) | |
1462 | release_region(host->config, 2); | |
fecf92ba | 1463 | |
85bcc130 | 1464 | host->config = 0; |
1da177e4 LT |
1465 | } |
1466 | ||
85bcc130 PO |
1467 | /* |
1468 | * Allocate/free DMA port and buffer | |
1469 | */ | |
1470 | ||
cfa7f521 | 1471 | static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma) |
1da177e4 | 1472 | { |
1da177e4 LT |
1473 | if (dma < 0) |
1474 | return; | |
fecf92ba | 1475 | |
1da177e4 LT |
1476 | if (request_dma(dma, DRIVER_NAME)) |
1477 | goto err; | |
fecf92ba | 1478 | |
1da177e4 LT |
1479 | /* |
1480 | * We need to allocate a special buffer in | |
1481 | * order for ISA to be able to DMA to it. | |
1482 | */ | |
85bcc130 | 1483 | host->dma_buffer = kmalloc(WBSD_DMA_SIZE, |
1da177e4 LT |
1484 | GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN); |
1485 | if (!host->dma_buffer) | |
1486 | goto free; | |
1487 | ||
1488 | /* | |
1489 | * Translate the address to a physical address. | |
1490 | */ | |
85bcc130 PO |
1491 | host->dma_addr = dma_map_single(host->mmc->dev, host->dma_buffer, |
1492 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); | |
fecf92ba | 1493 | |
1da177e4 LT |
1494 | /* |
1495 | * ISA DMA must be aligned on a 64k basis. | |
1496 | */ | |
1497 | if ((host->dma_addr & 0xffff) != 0) | |
1498 | goto kfree; | |
1499 | /* | |
1500 | * ISA cannot access memory above 16 MB. | |
1501 | */ | |
1502 | else if (host->dma_addr >= 0x1000000) | |
1503 | goto kfree; | |
1504 | ||
1505 | host->dma = dma; | |
fecf92ba | 1506 | |
1da177e4 | 1507 | return; |
fecf92ba | 1508 | |
1da177e4 LT |
1509 | kfree: |
1510 | /* | |
1511 | * If we've gotten here then there is some kind of alignment bug | |
1512 | */ | |
1513 | BUG_ON(1); | |
fecf92ba | 1514 | |
cfa7f521 PO |
1515 | dma_unmap_single(host->mmc->dev, host->dma_addr, |
1516 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); | |
85bcc130 | 1517 | host->dma_addr = (dma_addr_t)NULL; |
fecf92ba | 1518 | |
1da177e4 LT |
1519 | kfree(host->dma_buffer); |
1520 | host->dma_buffer = NULL; | |
1521 | ||
1522 | free: | |
1523 | free_dma(dma); | |
1524 | ||
1525 | err: | |
1526 | printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. " | |
1527 | "Falling back on FIFO.\n", dma); | |
1528 | } | |
1529 | ||
cfa7f521 | 1530 | static void __devexit wbsd_release_dma(struct wbsd_host *host) |
85bcc130 | 1531 | { |
cfa7f521 PO |
1532 | if (host->dma_addr) { |
1533 | dma_unmap_single(host->mmc->dev, host->dma_addr, | |
1534 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); | |
1535 | } | |
6044ec88 | 1536 | kfree(host->dma_buffer); |
85bcc130 PO |
1537 | if (host->dma >= 0) |
1538 | free_dma(host->dma); | |
fecf92ba | 1539 | |
85bcc130 PO |
1540 | host->dma = -1; |
1541 | host->dma_buffer = NULL; | |
1542 | host->dma_addr = (dma_addr_t)NULL; | |
1543 | } | |
1da177e4 LT |
1544 | |
1545 | /* | |
85bcc130 | 1546 | * Allocate/free IRQ. |
1da177e4 LT |
1547 | */ |
1548 | ||
cfa7f521 | 1549 | static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq) |
1da177e4 | 1550 | { |
1da177e4 | 1551 | int ret; |
fecf92ba | 1552 | |
1da177e4 | 1553 | /* |
85bcc130 | 1554 | * Allocate interrupt. |
1da177e4 | 1555 | */ |
85bcc130 | 1556 | |
dace1453 | 1557 | ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host); |
85bcc130 PO |
1558 | if (ret) |
1559 | return ret; | |
fecf92ba | 1560 | |
85bcc130 PO |
1561 | host->irq = irq; |
1562 | ||
1da177e4 | 1563 | /* |
85bcc130 | 1564 | * Set up tasklets. |
1da177e4 | 1565 | */ |
cfa7f521 PO |
1566 | tasklet_init(&host->card_tasklet, wbsd_tasklet_card, |
1567 | (unsigned long)host); | |
1568 | tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, | |
1569 | (unsigned long)host); | |
1570 | tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, | |
1571 | (unsigned long)host); | |
1572 | tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, | |
1573 | (unsigned long)host); | |
1574 | tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, | |
1575 | (unsigned long)host); | |
1576 | tasklet_init(&host->block_tasklet, wbsd_tasklet_block, | |
1577 | (unsigned long)host); | |
fecf92ba | 1578 | |
85bcc130 PO |
1579 | return 0; |
1580 | } | |
1da177e4 | 1581 | |
cfa7f521 | 1582 | static void __devexit wbsd_release_irq(struct wbsd_host *host) |
85bcc130 PO |
1583 | { |
1584 | if (!host->irq) | |
1585 | return; | |
1da177e4 | 1586 | |
85bcc130 | 1587 | free_irq(host->irq, host); |
fecf92ba | 1588 | |
85bcc130 | 1589 | host->irq = 0; |
fecf92ba | 1590 | |
85bcc130 PO |
1591 | tasklet_kill(&host->card_tasklet); |
1592 | tasklet_kill(&host->fifo_tasklet); | |
1593 | tasklet_kill(&host->crc_tasklet); | |
1594 | tasklet_kill(&host->timeout_tasklet); | |
1595 | tasklet_kill(&host->finish_tasklet); | |
1596 | tasklet_kill(&host->block_tasklet); | |
1597 | } | |
1598 | ||
1599 | /* | |
1600 | * Allocate all resources for the host. | |
1601 | */ | |
1602 | ||
cfa7f521 | 1603 | static int __devinit wbsd_request_resources(struct wbsd_host *host, |
85bcc130 PO |
1604 | int base, int irq, int dma) |
1605 | { | |
1606 | int ret; | |
fecf92ba | 1607 | |
1da177e4 LT |
1608 | /* |
1609 | * Allocate I/O ports. | |
1610 | */ | |
85bcc130 | 1611 | ret = wbsd_request_region(host, base); |
1da177e4 | 1612 | if (ret) |
85bcc130 | 1613 | return ret; |
1da177e4 LT |
1614 | |
1615 | /* | |
85bcc130 | 1616 | * Allocate interrupt. |
1da177e4 | 1617 | */ |
85bcc130 PO |
1618 | ret = wbsd_request_irq(host, irq); |
1619 | if (ret) | |
1620 | return ret; | |
1621 | ||
1622 | /* | |
1623 | * Allocate DMA. | |
1624 | */ | |
1625 | wbsd_request_dma(host, dma); | |
fecf92ba | 1626 | |
85bcc130 PO |
1627 | return 0; |
1628 | } | |
1629 | ||
1630 | /* | |
1631 | * Release all resources for the host. | |
1632 | */ | |
1633 | ||
cfa7f521 | 1634 | static void __devexit wbsd_release_resources(struct wbsd_host *host) |
85bcc130 PO |
1635 | { |
1636 | wbsd_release_dma(host); | |
1637 | wbsd_release_irq(host); | |
1638 | wbsd_release_regions(host); | |
1639 | } | |
1640 | ||
1641 | /* | |
1642 | * Configure the resources the chip should use. | |
1643 | */ | |
1644 | ||
cfa7f521 | 1645 | static void wbsd_chip_config(struct wbsd_host *host) |
85bcc130 | 1646 | { |
19c1f3ca PO |
1647 | wbsd_unlock_config(host); |
1648 | ||
85bcc130 PO |
1649 | /* |
1650 | * Reset the chip. | |
fecf92ba | 1651 | */ |
85bcc130 PO |
1652 | wbsd_write_config(host, WBSD_CONF_SWRST, 1); |
1653 | wbsd_write_config(host, WBSD_CONF_SWRST, 0); | |
1da177e4 LT |
1654 | |
1655 | /* | |
1656 | * Select SD/MMC function. | |
1657 | */ | |
1658 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
fecf92ba | 1659 | |
1da177e4 LT |
1660 | /* |
1661 | * Set up card detection. | |
1662 | */ | |
85bcc130 | 1663 | wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); |
fecf92ba | 1664 | |
1da177e4 | 1665 | /* |
85bcc130 | 1666 | * Configure chip |
1da177e4 LT |
1667 | */ |
1668 | wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); | |
1669 | wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); | |
fecf92ba | 1670 | |
85bcc130 | 1671 | wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); |
fecf92ba | 1672 | |
85bcc130 PO |
1673 | if (host->dma >= 0) |
1674 | wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); | |
fecf92ba | 1675 | |
1da177e4 | 1676 | /* |
85bcc130 | 1677 | * Enable and power up chip. |
1da177e4 | 1678 | */ |
85bcc130 PO |
1679 | wbsd_write_config(host, WBSD_CONF_ENABLE, 1); |
1680 | wbsd_write_config(host, WBSD_CONF_POWER, 0x20); | |
19c1f3ca PO |
1681 | |
1682 | wbsd_lock_config(host); | |
85bcc130 PO |
1683 | } |
1684 | ||
1685 | /* | |
1686 | * Check that configured resources are correct. | |
1687 | */ | |
fecf92ba | 1688 | |
cfa7f521 | 1689 | static int wbsd_chip_validate(struct wbsd_host *host) |
85bcc130 PO |
1690 | { |
1691 | int base, irq, dma; | |
fecf92ba | 1692 | |
19c1f3ca PO |
1693 | wbsd_unlock_config(host); |
1694 | ||
1da177e4 | 1695 | /* |
85bcc130 | 1696 | * Select SD/MMC function. |
1da177e4 | 1697 | */ |
85bcc130 | 1698 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); |
fecf92ba | 1699 | |
1da177e4 | 1700 | /* |
85bcc130 | 1701 | * Read configuration. |
1da177e4 | 1702 | */ |
85bcc130 PO |
1703 | base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; |
1704 | base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); | |
fecf92ba | 1705 | |
85bcc130 | 1706 | irq = wbsd_read_config(host, WBSD_CONF_IRQ); |
fecf92ba | 1707 | |
85bcc130 | 1708 | dma = wbsd_read_config(host, WBSD_CONF_DRQ); |
fecf92ba | 1709 | |
19c1f3ca PO |
1710 | wbsd_lock_config(host); |
1711 | ||
1da177e4 | 1712 | /* |
85bcc130 | 1713 | * Validate against given configuration. |
1da177e4 | 1714 | */ |
85bcc130 PO |
1715 | if (base != host->base) |
1716 | return 0; | |
1717 | if (irq != host->irq) | |
1718 | return 0; | |
1719 | if ((dma != host->dma) && (host->dma != -1)) | |
1720 | return 0; | |
fecf92ba | 1721 | |
85bcc130 PO |
1722 | return 1; |
1723 | } | |
1724 | ||
19c1f3ca PO |
1725 | /* |
1726 | * Powers down the SD function | |
1727 | */ | |
1728 | ||
cfa7f521 | 1729 | static void wbsd_chip_poweroff(struct wbsd_host *host) |
19c1f3ca PO |
1730 | { |
1731 | wbsd_unlock_config(host); | |
1732 | ||
1733 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
1734 | wbsd_write_config(host, WBSD_CONF_ENABLE, 0); | |
1735 | ||
1736 | wbsd_lock_config(host); | |
1737 | } | |
1738 | ||
85bcc130 PO |
1739 | /*****************************************************************************\ |
1740 | * * | |
1741 | * Devices setup and shutdown * | |
1742 | * * | |
1743 | \*****************************************************************************/ | |
1744 | ||
cfa7f521 | 1745 | static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma, |
85bcc130 PO |
1746 | int pnp) |
1747 | { | |
cfa7f521 PO |
1748 | struct wbsd_host *host = NULL; |
1749 | struct mmc_host *mmc = NULL; | |
85bcc130 | 1750 | int ret; |
fecf92ba | 1751 | |
85bcc130 PO |
1752 | ret = wbsd_alloc_mmc(dev); |
1753 | if (ret) | |
1754 | return ret; | |
fecf92ba | 1755 | |
85bcc130 PO |
1756 | mmc = dev_get_drvdata(dev); |
1757 | host = mmc_priv(mmc); | |
fecf92ba | 1758 | |
1da177e4 | 1759 | /* |
85bcc130 | 1760 | * Scan for hardware. |
1da177e4 | 1761 | */ |
85bcc130 | 1762 | ret = wbsd_scan(host); |
cfa7f521 PO |
1763 | if (ret) { |
1764 | if (pnp && (ret == -ENODEV)) { | |
85bcc130 PO |
1765 | printk(KERN_WARNING DRIVER_NAME |
1766 | ": Unable to confirm device presence. You may " | |
1767 | "experience lock-ups.\n"); | |
cfa7f521 | 1768 | } else { |
85bcc130 PO |
1769 | wbsd_free_mmc(dev); |
1770 | return ret; | |
1771 | } | |
1772 | } | |
fecf92ba | 1773 | |
1da177e4 | 1774 | /* |
85bcc130 | 1775 | * Request resources. |
1da177e4 | 1776 | */ |
dd2c609c | 1777 | ret = wbsd_request_resources(host, base, irq, dma); |
cfa7f521 | 1778 | if (ret) { |
85bcc130 PO |
1779 | wbsd_release_resources(host); |
1780 | wbsd_free_mmc(dev); | |
1781 | return ret; | |
1782 | } | |
fecf92ba | 1783 | |
1da177e4 | 1784 | /* |
85bcc130 | 1785 | * See if chip needs to be configured. |
1da177e4 | 1786 | */ |
cfa7f521 PO |
1787 | if (pnp) { |
1788 | if ((host->config != 0) && !wbsd_chip_validate(host)) { | |
85bcc130 PO |
1789 | printk(KERN_WARNING DRIVER_NAME |
1790 | ": PnP active but chip not configured! " | |
1791 | "You probably have a buggy BIOS. " | |
1792 | "Configuring chip manually.\n"); | |
1793 | wbsd_chip_config(host); | |
1794 | } | |
cfa7f521 | 1795 | } else |
85bcc130 | 1796 | wbsd_chip_config(host); |
fecf92ba | 1797 | |
1da177e4 LT |
1798 | /* |
1799 | * Power Management stuff. No idea how this works. | |
1800 | * Not tested. | |
1801 | */ | |
1802 | #ifdef CONFIG_PM | |
cfa7f521 | 1803 | if (host->config) { |
19c1f3ca | 1804 | wbsd_unlock_config(host); |
85bcc130 | 1805 | wbsd_write_config(host, WBSD_CONF_PME, 0xA0); |
19c1f3ca PO |
1806 | wbsd_lock_config(host); |
1807 | } | |
1da177e4 | 1808 | #endif |
85bcc130 PO |
1809 | /* |
1810 | * Allow device to initialise itself properly. | |
1811 | */ | |
1812 | mdelay(5); | |
1da177e4 LT |
1813 | |
1814 | /* | |
1815 | * Reset the chip into a known state. | |
1816 | */ | |
1817 | wbsd_init_device(host); | |
fecf92ba | 1818 | |
1da177e4 LT |
1819 | mmc_add_host(mmc); |
1820 | ||
d366b643 | 1821 | printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); |
85bcc130 PO |
1822 | if (host->chip_id != 0) |
1823 | printk(" id %x", (int)host->chip_id); | |
1824 | printk(" at 0x%x irq %d", (int)host->base, (int)host->irq); | |
1825 | if (host->dma >= 0) | |
1826 | printk(" dma %d", (int)host->dma); | |
1827 | else | |
1828 | printk(" FIFO"); | |
1829 | if (pnp) | |
1830 | printk(" PnP"); | |
1831 | printk("\n"); | |
1da177e4 LT |
1832 | |
1833 | return 0; | |
1da177e4 LT |
1834 | } |
1835 | ||
cfa7f521 | 1836 | static void __devexit wbsd_shutdown(struct device *dev, int pnp) |
1da177e4 | 1837 | { |
cfa7f521 PO |
1838 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1839 | struct wbsd_host *host; | |
fecf92ba | 1840 | |
1da177e4 | 1841 | if (!mmc) |
85bcc130 | 1842 | return; |
1da177e4 LT |
1843 | |
1844 | host = mmc_priv(mmc); | |
fecf92ba | 1845 | |
1da177e4 LT |
1846 | mmc_remove_host(mmc); |
1847 | ||
19c1f3ca PO |
1848 | /* |
1849 | * Power down the SD/MMC function. | |
1850 | */ | |
85bcc130 | 1851 | if (!pnp) |
19c1f3ca | 1852 | wbsd_chip_poweroff(host); |
fecf92ba | 1853 | |
85bcc130 | 1854 | wbsd_release_resources(host); |
fecf92ba | 1855 | |
85bcc130 PO |
1856 | wbsd_free_mmc(dev); |
1857 | } | |
1da177e4 | 1858 | |
85bcc130 PO |
1859 | /* |
1860 | * Non-PnP | |
1861 | */ | |
1862 | ||
cfa7f521 | 1863 | static int __devinit wbsd_probe(struct platform_device *dev) |
85bcc130 | 1864 | { |
dd2c609c | 1865 | /* Use the module parameters for resources */ |
3ae5eaec | 1866 | return wbsd_init(&dev->dev, io, irq, dma, 0); |
85bcc130 PO |
1867 | } |
1868 | ||
cfa7f521 | 1869 | static int __devexit wbsd_remove(struct platform_device *dev) |
85bcc130 | 1870 | { |
3ae5eaec | 1871 | wbsd_shutdown(&dev->dev, 0); |
85bcc130 PO |
1872 | |
1873 | return 0; | |
1874 | } | |
1875 | ||
1876 | /* | |
1877 | * PnP | |
1878 | */ | |
1879 | ||
1880 | #ifdef CONFIG_PNP | |
1881 | ||
1882 | static int __devinit | |
cfa7f521 | 1883 | wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id) |
85bcc130 PO |
1884 | { |
1885 | int io, irq, dma; | |
fecf92ba | 1886 | |
85bcc130 PO |
1887 | /* |
1888 | * Get resources from PnP layer. | |
1889 | */ | |
1890 | io = pnp_port_start(pnpdev, 0); | |
1891 | irq = pnp_irq(pnpdev, 0); | |
1892 | if (pnp_dma_valid(pnpdev, 0)) | |
1893 | dma = pnp_dma(pnpdev, 0); | |
1894 | else | |
1895 | dma = -1; | |
fecf92ba | 1896 | |
85bcc130 | 1897 | DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); |
fecf92ba | 1898 | |
85bcc130 PO |
1899 | return wbsd_init(&pnpdev->dev, io, irq, dma, 1); |
1900 | } | |
1da177e4 | 1901 | |
cfa7f521 | 1902 | static void __devexit wbsd_pnp_remove(struct pnp_dev *dev) |
85bcc130 PO |
1903 | { |
1904 | wbsd_shutdown(&dev->dev, 1); | |
1da177e4 LT |
1905 | } |
1906 | ||
85bcc130 PO |
1907 | #endif /* CONFIG_PNP */ |
1908 | ||
1da177e4 LT |
1909 | /* |
1910 | * Power management | |
1911 | */ | |
1912 | ||
1913 | #ifdef CONFIG_PM | |
19c1f3ca | 1914 | |
5e68d95d PO |
1915 | static int wbsd_suspend(struct wbsd_host *host, pm_message_t state) |
1916 | { | |
1917 | BUG_ON(host == NULL); | |
1918 | ||
1919 | return mmc_suspend_host(host->mmc, state); | |
1920 | } | |
1921 | ||
1922 | static int wbsd_resume(struct wbsd_host *host) | |
1923 | { | |
1924 | BUG_ON(host == NULL); | |
1925 | ||
1926 | wbsd_init_device(host); | |
1927 | ||
1928 | return mmc_resume_host(host->mmc); | |
1929 | } | |
1930 | ||
cfa7f521 PO |
1931 | static int wbsd_platform_suspend(struct platform_device *dev, |
1932 | pm_message_t state) | |
1da177e4 | 1933 | { |
3ae5eaec | 1934 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca PO |
1935 | struct wbsd_host *host; |
1936 | int ret; | |
1937 | ||
5e68d95d | 1938 | if (mmc == NULL) |
19c1f3ca PO |
1939 | return 0; |
1940 | ||
5e68d95d | 1941 | DBGF("Suspending...\n"); |
19c1f3ca PO |
1942 | |
1943 | host = mmc_priv(mmc); | |
1944 | ||
5e68d95d PO |
1945 | ret = wbsd_suspend(host, state); |
1946 | if (ret) | |
1947 | return ret; | |
1948 | ||
19c1f3ca | 1949 | wbsd_chip_poweroff(host); |
1da177e4 LT |
1950 | |
1951 | return 0; | |
1952 | } | |
1953 | ||
5e68d95d | 1954 | static int wbsd_platform_resume(struct platform_device *dev) |
1da177e4 | 1955 | { |
3ae5eaec | 1956 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca | 1957 | struct wbsd_host *host; |
1da177e4 | 1958 | |
5e68d95d | 1959 | if (mmc == NULL) |
19c1f3ca PO |
1960 | return 0; |
1961 | ||
5e68d95d | 1962 | DBGF("Resuming...\n"); |
19c1f3ca PO |
1963 | |
1964 | host = mmc_priv(mmc); | |
1965 | ||
1966 | wbsd_chip_config(host); | |
1967 | ||
1968 | /* | |
1969 | * Allow device to initialise itself properly. | |
1970 | */ | |
1971 | mdelay(5); | |
1972 | ||
5e68d95d PO |
1973 | return wbsd_resume(host); |
1974 | } | |
1975 | ||
1976 | #ifdef CONFIG_PNP | |
1977 | ||
1978 | static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state) | |
1979 | { | |
1980 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1981 | struct wbsd_host *host; | |
1982 | ||
1983 | if (mmc == NULL) | |
1984 | return 0; | |
19c1f3ca | 1985 | |
5e68d95d PO |
1986 | DBGF("Suspending...\n"); |
1987 | ||
1988 | host = mmc_priv(mmc); | |
1989 | ||
1990 | return wbsd_suspend(host, state); | |
1da177e4 | 1991 | } |
19c1f3ca | 1992 | |
5e68d95d PO |
1993 | static int wbsd_pnp_resume(struct pnp_dev *pnp_dev) |
1994 | { | |
1995 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1996 | struct wbsd_host *host; | |
1997 | ||
1998 | if (mmc == NULL) | |
1999 | return 0; | |
2000 | ||
2001 | DBGF("Resuming...\n"); | |
2002 | ||
2003 | host = mmc_priv(mmc); | |
2004 | ||
2005 | /* | |
2006 | * See if chip needs to be configured. | |
2007 | */ | |
cfa7f521 PO |
2008 | if (host->config != 0) { |
2009 | if (!wbsd_chip_validate(host)) { | |
5e68d95d PO |
2010 | printk(KERN_WARNING DRIVER_NAME |
2011 | ": PnP active but chip not configured! " | |
2012 | "You probably have a buggy BIOS. " | |
2013 | "Configuring chip manually.\n"); | |
2014 | wbsd_chip_config(host); | |
2015 | } | |
2016 | } | |
2017 | ||
2018 | /* | |
2019 | * Allow device to initialise itself properly. | |
2020 | */ | |
2021 | mdelay(5); | |
2022 | ||
2023 | return wbsd_resume(host); | |
2024 | } | |
2025 | ||
2026 | #endif /* CONFIG_PNP */ | |
2027 | ||
19c1f3ca PO |
2028 | #else /* CONFIG_PM */ |
2029 | ||
5e68d95d PO |
2030 | #define wbsd_platform_suspend NULL |
2031 | #define wbsd_platform_resume NULL | |
2032 | ||
2033 | #define wbsd_pnp_suspend NULL | |
2034 | #define wbsd_pnp_resume NULL | |
19c1f3ca PO |
2035 | |
2036 | #endif /* CONFIG_PM */ | |
1da177e4 | 2037 | |
85bcc130 | 2038 | static struct platform_device *wbsd_device; |
1da177e4 | 2039 | |
3ae5eaec | 2040 | static struct platform_driver wbsd_driver = { |
1da177e4 | 2041 | .probe = wbsd_probe, |
93968d75 | 2042 | .remove = __devexit_p(wbsd_remove), |
fecf92ba | 2043 | |
5e68d95d PO |
2044 | .suspend = wbsd_platform_suspend, |
2045 | .resume = wbsd_platform_resume, | |
3ae5eaec RK |
2046 | .driver = { |
2047 | .name = DRIVER_NAME, | |
2048 | }, | |
1da177e4 LT |
2049 | }; |
2050 | ||
85bcc130 PO |
2051 | #ifdef CONFIG_PNP |
2052 | ||
2053 | static struct pnp_driver wbsd_pnp_driver = { | |
2054 | .name = DRIVER_NAME, | |
2055 | .id_table = pnp_dev_table, | |
2056 | .probe = wbsd_pnp_probe, | |
93968d75 | 2057 | .remove = __devexit_p(wbsd_pnp_remove), |
5e68d95d PO |
2058 | |
2059 | .suspend = wbsd_pnp_suspend, | |
2060 | .resume = wbsd_pnp_resume, | |
85bcc130 PO |
2061 | }; |
2062 | ||
2063 | #endif /* CONFIG_PNP */ | |
2064 | ||
1da177e4 LT |
2065 | /* |
2066 | * Module loading/unloading | |
2067 | */ | |
2068 | ||
2069 | static int __init wbsd_drv_init(void) | |
2070 | { | |
2071 | int result; | |
fecf92ba | 2072 | |
1da177e4 LT |
2073 | printk(KERN_INFO DRIVER_NAME |
2074 | ": Winbond W83L51xD SD/MMC card interface driver, " | |
2075 | DRIVER_VERSION "\n"); | |
2076 | printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); | |
1da177e4 | 2077 | |
85bcc130 PO |
2078 | #ifdef CONFIG_PNP |
2079 | ||
cfa7f521 | 2080 | if (!nopnp) { |
85bcc130 PO |
2081 | result = pnp_register_driver(&wbsd_pnp_driver); |
2082 | if (result < 0) | |
2083 | return result; | |
2084 | } | |
fecf92ba PO |
2085 | #endif /* CONFIG_PNP */ |
2086 | ||
cfa7f521 | 2087 | if (nopnp) { |
3ae5eaec | 2088 | result = platform_driver_register(&wbsd_driver); |
85bcc130 PO |
2089 | if (result < 0) |
2090 | return result; | |
2091 | ||
21500bb3 | 2092 | wbsd_device = platform_device_alloc(DRIVER_NAME, -1); |
cfa7f521 | 2093 | if (!wbsd_device) { |
21500bb3 DT |
2094 | platform_driver_unregister(&wbsd_driver); |
2095 | return -ENOMEM; | |
2096 | } | |
2097 | ||
2098 | result = platform_device_add(wbsd_device); | |
cfa7f521 | 2099 | if (result) { |
21500bb3 DT |
2100 | platform_device_put(wbsd_device); |
2101 | platform_driver_unregister(&wbsd_driver); | |
2102 | return result; | |
2103 | } | |
85bcc130 | 2104 | } |
1da177e4 LT |
2105 | |
2106 | return 0; | |
2107 | } | |
2108 | ||
2109 | static void __exit wbsd_drv_exit(void) | |
2110 | { | |
85bcc130 PO |
2111 | #ifdef CONFIG_PNP |
2112 | ||
2113 | if (!nopnp) | |
2114 | pnp_unregister_driver(&wbsd_pnp_driver); | |
fecf92ba PO |
2115 | |
2116 | #endif /* CONFIG_PNP */ | |
85bcc130 | 2117 | |
cfa7f521 | 2118 | if (nopnp) { |
85bcc130 | 2119 | platform_device_unregister(wbsd_device); |
fecf92ba | 2120 | |
3ae5eaec | 2121 | platform_driver_unregister(&wbsd_driver); |
85bcc130 | 2122 | } |
1da177e4 LT |
2123 | |
2124 | DBG("unloaded\n"); | |
2125 | } | |
2126 | ||
2127 | module_init(wbsd_drv_init); | |
2128 | module_exit(wbsd_drv_exit); | |
85bcc130 PO |
2129 | #ifdef CONFIG_PNP |
2130 | module_param(nopnp, uint, 0444); | |
2131 | #endif | |
1da177e4 LT |
2132 | module_param(io, uint, 0444); |
2133 | module_param(irq, uint, 0444); | |
2134 | module_param(dma, int, 0444); | |
2135 | ||
2136 | MODULE_LICENSE("GPL"); | |
de1d09e3 | 2137 | MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); |
1da177e4 LT |
2138 | MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver"); |
2139 | MODULE_VERSION(DRIVER_VERSION); | |
2140 | ||
85bcc130 PO |
2141 | #ifdef CONFIG_PNP |
2142 | MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)"); | |
2143 | #endif | |
1da177e4 LT |
2144 | MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)"); |
2145 | MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)"); | |
2146 | MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)"); |