[deliverable/linux.git] / drivers / mtd / chips / cfi_probe.c

/*
   Common Flash Interface probe code.
   (C) 2000 Red Hat. GPL'd.
*/

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
#include <asm/byteorder.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/interrupt.h>

#include <linux/mtd/xip.h>
#include <linux/mtd/map.h>
#include <linux/mtd/cfi.h>
#include <linux/mtd/gen_probe.h>

//#define DEBUG_CFI

#ifdef DEBUG_CFI
static void print_cfi_ident(struct cfi_ident *);
#endif

static int cfi_probe_chip(struct map_info *map, __u32 base,
			  unsigned long *chip_map, struct cfi_private *cfi);
static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);

struct mtd_info *cfi_probe(struct map_info *map);

#ifdef CONFIG_MTD_XIP

/* only needed for short periods, so this is rather simple */
#define xip_disable()	local_irq_disable()

#define xip_allowed(base, map) \
do { \
	(void) map_read(map, base); \
	xip_iprefetch(); \
	local_irq_enable(); \
} while (0)

#define xip_enable(base, map, cfi) \
do { \
	cfi_qry_mode_off(base, map, cfi);		\
	xip_allowed(base, map); \
} while (0)

#define xip_disable_qry(base, map, cfi) \
do { \
	xip_disable(); \
	cfi_qry_mode_on(base, map, cfi); \
} while (0)

#else

#define xip_disable()			do { } while (0)
#define xip_allowed(base, map)		do { } while (0)
#define xip_enable(base, map, cfi)	do { } while (0)
#define xip_disable_qry(base, map, cfi) do { } while (0)

#endif

/* check for QRY.
   in: interleave,type,mode
   ret: table index, <0 for error
 */

static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
				   unsigned long *chip_map, struct cfi_private *cfi)
{
	int i;

	if ((base + 0) >= map->size) {
		printk(KERN_NOTICE
			"Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
			(unsigned long)base, map->size -1);
		return 0;
	}
	if ((base + 0xff) >= map->size) {
		printk(KERN_NOTICE
			"Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
			(unsigned long)base + 0x55, map->size -1);
		return 0;
	}

	xip_disable();
	if (!cfi_qry_mode_on(base, map, cfi)) {
		xip_enable(base, map, cfi);
		return 0;
	}

	if (!cfi->numchips) {
		/* This is the first time we're called. Set up the CFI
		   stuff accordingly and return */
		return cfi_chip_setup(map, cfi);
	}

	/* Check each previous chip to see if it's an alias */
 	for (i=0; i < (base >> cfi->chipshift); i++) {
 		unsigned long start;
 		if(!test_bit(i, chip_map)) {
			/* Skip location; no valid chip at this address */
 			continue;
 		}
 		start = i << cfi->chipshift;
		/* This chip should be in read mode if it's one
		   we've already touched. */
		if (cfi_qry_present(map, start, cfi)) {
			/* Eep. This chip also had the QRY marker.
			 * Is it an alias for the new one? */
			cfi_qry_mode_off(start, map, cfi);

			/* If the QRY marker goes away, it's an alias */
			if (!cfi_qry_present(map, start, cfi)) {
				xip_allowed(base, map);
				printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
				       map->name, base, start);
				return 0;
			}
			/* Yes, it's actually got QRY for data. Most
			 * unfortunate. Stick the new chip in read mode
			 * too and if it's the same, assume it's an alias. */
			/* FIXME: Use other modes to do a proper check */
			cfi_qry_mode_off(base, map, cfi);

			if (cfi_qry_present(map, base, cfi)) {
				xip_allowed(base, map);
				printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
				       map->name, base, start);
				return 0;
			}
		}
	}

	/* OK, if we got to here, then none of the previous chips appear to
	   be aliases for the current one. */
	set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
	cfi->numchips++;

	/* Put it back into Read Mode */
	cfi_qry_mode_off(base, map, cfi);
	xip_allowed(base, map);

	printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
	       map->name, cfi->interleave, cfi->device_type*8, base,
	       map->bankwidth*8);

	return 1;
}

static int __xipram cfi_chip_setup(struct map_info *map,
				   struct cfi_private *cfi)
{
	int ofs_factor = cfi->interleave*cfi->device_type;
	__u32 base = 0;
	int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
	int i;
	int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;

	xip_enable(base, map, cfi);
#ifdef DEBUG_CFI
	printk("Number of erase regions: %d\n", num_erase_regions);
#endif
	if (!num_erase_regions)
		return 0;

	cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
	if (!cfi->cfiq)
		return 0;

	memset(cfi->cfiq,0,sizeof(struct cfi_ident));

	cfi->cfi_mode = CFI_MODE_CFI;

	cfi->sector_erase_cmd = CMD(0x30);

	/* Read the CFI info structure */
	xip_disable_qry(base, map, cfi);
	for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
		((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);

	/* Do any necessary byteswapping */
	cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);

	cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
	cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
	cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
	cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
	cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);

#ifdef DEBUG_CFI
	/* Dump the information therein */
	print_cfi_ident(cfi->cfiq);
#endif

	for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
		cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);

#ifdef DEBUG_CFI
		printk("  Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
		       i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
		       (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
#endif
	}

	if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
		addr_unlock1 = 0x5555;
		addr_unlock2 = 0x2AAA;
	}

	/*
	 * Note we put the device back into Read Mode BEFORE going into Auto
	 * Select Mode, as some devices support nesting of modes, others
	 * don't. This way should always work.
	 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
	 * so should be treated as nops or illegal (and so put the device
	 * back into Read Mode, which is a nop in this case).
	 */
	cfi_send_gen_cmd(0xf0,     0, base, map, cfi, cfi->device_type, NULL);
	cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
	cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
	cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
	cfi->mfr = cfi_read_query16(map, base);
	cfi->id = cfi_read_query16(map, base + ofs_factor);

	/* Get AMD/Spansion extended JEDEC ID */
	if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
		cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
			  cfi_read_query(map, base + 0xf * ofs_factor);

	/* Put it back into Read Mode */
	cfi_qry_mode_off(base, map, cfi);
	xip_allowed(base, map);

	printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n",
	       map->name, cfi->interleave, cfi->device_type*8, base,
	       map->bankwidth*8, cfi->mfr, cfi->id);

	return 1;
}

#ifdef DEBUG_CFI
static char *vendorname(__u16 vendor)
{
	switch (vendor) {
	case P_ID_NONE:
		return "None";

	case P_ID_INTEL_EXT:
		return "Intel/Sharp Extended";

	case P_ID_AMD_STD:
		return "AMD/Fujitsu Standard";

	case P_ID_INTEL_STD:
		return "Intel/Sharp Standard";

	case P_ID_AMD_EXT:
		return "AMD/Fujitsu Extended";

	case P_ID_WINBOND:
		return "Winbond Standard";

	case P_ID_ST_ADV:
		return "ST Advanced";

	case P_ID_MITSUBISHI_STD:
		return "Mitsubishi Standard";

	case P_ID_MITSUBISHI_EXT:
		return "Mitsubishi Extended";

	case P_ID_SST_PAGE:
		return "SST Page Write";

	case P_ID_SST_OLD:
		return "SST 39VF160x/39VF320x";

	case P_ID_INTEL_PERFORMANCE:
		return "Intel Performance Code";

	case P_ID_INTEL_DATA:
		return "Intel Data";

	case P_ID_RESERVED:
		return "Not Allowed / Reserved for Future Use";

	default:
		return "Unknown";
	}
}


static void print_cfi_ident(struct cfi_ident *cfip)
{
#if 0
	if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
		printk("Invalid CFI ident structure.\n");
		return;
	}
#endif
	printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
	if (cfip->P_ADR)
		printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
	else
		printk("No Primary Algorithm Table\n");

	printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
	if (cfip->A_ADR)
		printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
	else
		printk("No Alternate Algorithm Table\n");


	printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
	printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
	if (cfip->VppMin) {
		printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
		printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
	}
	else
		printk("No Vpp line\n");

	printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
	printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));

	if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
		printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
		printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
	}
	else
		printk("Full buffer write not supported\n");

	printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
	printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
	if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
		printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
		printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
	}
	else
		printk("Chip erase not supported\n");

	printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
	printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
	switch(cfip->InterfaceDesc) {
	case CFI_INTERFACE_X8_ASYNC:
		printk("  - x8-only asynchronous interface\n");
		break;

	case CFI_INTERFACE_X16_ASYNC:
		printk("  - x16-only asynchronous interface\n");
		break;

	case CFI_INTERFACE_X8_BY_X16_ASYNC:
		printk("  - supports x8 and x16 via BYTE# with asynchronous interface\n");
		break;

	case CFI_INTERFACE_X32_ASYNC:
		printk("  - x32-only asynchronous interface\n");
		break;

	case CFI_INTERFACE_X16_BY_X32_ASYNC:
		printk("  - supports x16 and x32 via Word# with asynchronous interface\n");
		break;

	case CFI_INTERFACE_NOT_ALLOWED:
		printk("  - Not Allowed / Reserved\n");
		break;

	default:
		printk("  - Unknown\n");
		break;
	}

	printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
	printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);

}
#endif /* DEBUG_CFI */

static struct chip_probe cfi_chip_probe = {
	.name		= "CFI",
	.probe_chip	= cfi_probe_chip
};

struct mtd_info *cfi_probe(struct map_info *map)
{
	/*
	 * Just use the generic probe stuff to call our CFI-specific
	 * chip_probe routine in all the possible permutations, etc.
	 */
	return mtd_do_chip_probe(map, &cfi_chip_probe);
}

static struct mtd_chip_driver cfi_chipdrv = {
	.probe		= cfi_probe,
	.name		= "cfi_probe",
	.module		= THIS_MODULE
};

static int __init cfi_probe_init(void)
{
	register_mtd_chip_driver(&cfi_chipdrv);
	return 0;
}

static void __exit cfi_probe_exit(void)
{
	unregister_mtd_chip_driver(&cfi_chipdrv);
}

module_init(cfi_probe_init);
module_exit(cfi_probe_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");
Commit	Line	Data
1f948b43	1	/*
1da177e4 LT	2	Common Flash Interface probe code.
1da177e4 LT	3	(C) 2000 Red Hat. GPL'd.
1da177e4 LT	4	*/
1da177e4 LT	5
1da177e4 LT	6	#include <linux/module.h>
	7	#include <linux/types.h>
	8	#include <linux/kernel.h>
	9	#include <linux/init.h>
	10	#include <asm/io.h>
	11	#include <asm/byteorder.h>
	12	#include <linux/errno.h>
	13	#include <linux/slab.h>
	14	#include <linux/interrupt.h>
	15
	16	#include <linux/mtd/xip.h>
	17	#include <linux/mtd/map.h>
	18	#include <linux/mtd/cfi.h>
	19	#include <linux/mtd/gen_probe.h>
	20
1f948b43	21	//#define DEBUG_CFI
1da177e4 LT	22
	23	#ifdef DEBUG_CFI
	24	static void print_cfi_ident(struct cfi_ident *);
	25	#endif
	26
	27	static int cfi_probe_chip(struct map_info *map, __u32 base,
	28	unsigned long chip_map, struct cfi_private cfi);
	29	static int cfi_chip_setup(struct map_info map, struct cfi_private cfi);
	30
	31	struct mtd_info cfi_probe(struct map_info map);
	32
	33	#ifdef CONFIG_MTD_XIP
	34
	35	/* only needed for short periods, so this is rather simple */
	36	#define xip_disable() local_irq_disable()
	37
	38	#define xip_allowed(base, map) \
	39	do { \
	40	(void) map_read(map, base); \
ca5c23c3	41	xip_iprefetch(); \
1da177e4 LT	42	local_irq_enable(); \
	43	} while (0)
	44
	45	#define xip_enable(base, map, cfi) \
	46	do { \
c314dfdc	47	cfi_qry_mode_off(base, map, cfi); \
1da177e4 LT	48	xip_allowed(base, map); \
	49	} while (0)
	50
	51	#define xip_disable_qry(base, map, cfi) \
	52	do { \
	53	xip_disable(); \
c314dfdc	54	cfi_qry_mode_on(base, map, cfi); \
1da177e4 LT	55	} while (0)
	56
	57	#else
	58
	59	#define xip_disable() do { } while (0)
	60	#define xip_allowed(base, map) do { } while (0)
	61	#define xip_enable(base, map, cfi) do { } while (0)
	62	#define xip_disable_qry(base, map, cfi) do { } while (0)
	63
	64	#endif
	65
	66	/* check for QRY.
	67	in: interleave,type,mode
	68	ret: table index, <0 for error
	69	*/
1da177e4 LT	70
	71	static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
	72	unsigned long chip_map, struct cfi_private cfi)
	73	{
	74	int i;
1f948b43	75
1da177e4 LT	76	if ((base + 0) >= map->size) {
	77	printk(KERN_NOTICE
	78	"Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
	79	(unsigned long)base, map->size -1);
	80	return 0;
	81	}
	82	if ((base + 0xff) >= map->size) {
	83	printk(KERN_NOTICE
	84	"Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
	85	(unsigned long)base + 0x55, map->size -1);
	86	return 0;
	87	}
	88
	89	xip_disable();
c314dfdc	90	if (!cfi_qry_mode_on(base, map, cfi)) {
1da177e4 LT	91	xip_enable(base, map, cfi);
	92	return 0;
	93	}
	94
	95	if (!cfi->numchips) {
1f948b43	96	/* This is the first time we're called. Set up the CFI
1da177e4 LT	97	stuff accordingly and return */
	98	return cfi_chip_setup(map, cfi);
	99	}
	100
	101	/* Check each previous chip to see if it's an alias */
	102	for (i=0; i < (base >> cfi->chipshift); i++) {
	103	unsigned long start;
	104	if(!test_bit(i, chip_map)) {
	105	/* Skip location; no valid chip at this address */
1f948b43	106	continue;
1da177e4 LT	107	}
	108	start = i << cfi->chipshift;
	109	/* This chip should be in read mode if it's one
	110	we've already touched. */
c314dfdc	111	if (cfi_qry_present(map, start, cfi)) {
1f948b43	112	/* Eep. This chip also had the QRY marker.
1da177e4	113	* Is it an alias for the new one? */
c314dfdc	114	cfi_qry_mode_off(start, map, cfi);
1da177e4 LT	115
1da177e4 LT	116	/* If the QRY marker goes away, it's an alias */
c314dfdc	117	if (!cfi_qry_present(map, start, cfi)) {
1da177e4 LT	118	xip_allowed(base, map);
	119	printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
	120	map->name, base, start);
	121	return 0;
	122	}
1f948b43	123	/* Yes, it's actually got QRY for data. Most
1da177e4 LT	124	* unfortunate. Stick the new chip in read mode
	125	* too and if it's the same, assume it's an alias. */
	126	/* FIXME: Use other modes to do a proper check */
c314dfdc	127	cfi_qry_mode_off(base, map, cfi);
1f948b43	128
c314dfdc	129	if (cfi_qry_present(map, base, cfi)) {
1da177e4 LT	130	xip_allowed(base, map);
	131	printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
	132	map->name, base, start);
	133	return 0;
	134	}
	135	}
	136	}
1f948b43	137
1da177e4 LT	138	/* OK, if we got to here, then none of the previous chips appear to
	139	be aliases for the current one. */
	140	set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
	141	cfi->numchips++;
1f948b43	142
1da177e4	143	/* Put it back into Read Mode */
c314dfdc	144	cfi_qry_mode_off(base, map, cfi);
1da177e4 LT	145	xip_allowed(base, map);
	146
	147	printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
	148	map->name, cfi->interleave, cfi->device_type*8, base,
	149	map->bankwidth*8);
1f948b43	150
1da177e4 LT	151	return 1;
	152	}
	153
1f948b43	154	static int __xipram cfi_chip_setup(struct map_info *map,
1da177e4 LT	155	struct cfi_private *cfi)
	156	{
	157	int ofs_factor = cfi->interleave*cfi->device_type;
	158	__u32 base = 0;
	159	int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
	160	int i;
ad7026fe	161	int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;
1da177e4 LT	162
	163	xip_enable(base, map, cfi);
	164	#ifdef DEBUG_CFI
	165	printk("Number of erase regions: %d\n", num_erase_regions);
	166	#endif
	167	if (!num_erase_regions)
	168	return 0;
	169
	170	cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
5c8b1fbb	171	if (!cfi->cfiq)
1da177e4	172	return 0;
1f948b43 TG	173
	174	memset(cfi->cfiq,0,sizeof(struct cfi_ident));
	175
1da177e4	176	cfi->cfi_mode = CFI_MODE_CFI;
1f948b43	177
08968041 GL	178	cfi->sector_erase_cmd = CMD(0x30);
08968041 GL	179
1da177e4 LT	180	/* Read the CFI info structure */
	181	xip_disable_qry(base, map, cfi);
	182	for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
	183	((unsigned char )cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)ofs_factor);
	184
1da177e4 LT	185	/* Do any necessary byteswapping */
	186	cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
	187
	188	cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
	189	cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
	190	cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
	191	cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
	192	cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
	193
	194	#ifdef DEBUG_CFI
	195	/* Dump the information therein */
	196	print_cfi_ident(cfi->cfiq);
	197	#endif
	198
	199	for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
	200	cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
1f948b43 TG	201
1f948b43 TG	202	#ifdef DEBUG_CFI
1da177e4	203	printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
1f948b43	204	i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
1da177e4 LT	205	(cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
	206	#endif
	207	}
	208
54b93a49 GL	209	if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
	210	addr_unlock1 = 0x5555;
	211	addr_unlock2 = 0x2AAA;
	212	}
	213
8473044d GL	214	/*
	215	* Note we put the device back into Read Mode BEFORE going into Auto
	216	* Select Mode, as some devices support nesting of modes, others
	217	* don't. This way should always work.
	218	* On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
	219	* so should be treated as nops or illegal (and so put the device
	220	* back into Read Mode, which is a nop in this case).
	221	*/
	222	cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
ad7026fe GL	223	cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
	224	cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
	225	cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
8473044d GL	226	cfi->mfr = cfi_read_query16(map, base);
	227	cfi->id = cfi_read_query16(map, base + ofs_factor);
	228
	229	/* Get AMD/Spansion extended JEDEC ID */
	230	if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
	231	cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 \|
	232	cfi_read_query(map, base + 0xf * ofs_factor);
	233
	234	/* Put it back into Read Mode */
	235	cfi_qry_mode_off(base, map, cfi);
	236	xip_allowed(base, map);
	237
771a115a	238	printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n",
1da177e4	239	map->name, cfi->interleave, cfi->device_type*8, base,
771a115a	240	map->bankwidth*8, cfi->mfr, cfi->id);
1da177e4 LT	241
	242	return 1;
	243	}
	244
	245	#ifdef DEBUG_CFI
1f948b43	246	static char *vendorname(__u16 vendor)
1da177e4 LT	247	{
	248	switch (vendor) {
	249	case P_ID_NONE:
	250	return "None";
1f948b43	251
1da177e4 LT	252	case P_ID_INTEL_EXT:
1da177e4 LT	253	return "Intel/Sharp Extended";
1f948b43	254
1da177e4 LT	255	case P_ID_AMD_STD:
1da177e4 LT	256	return "AMD/Fujitsu Standard";
1f948b43	257
1da177e4 LT	258	case P_ID_INTEL_STD:
1da177e4 LT	259	return "Intel/Sharp Standard";
1f948b43	260
1da177e4 LT	261	case P_ID_AMD_EXT:
	262	return "AMD/Fujitsu Extended";
	263
	264	case P_ID_WINBOND:
	265	return "Winbond Standard";
1f948b43	266
1da177e4 LT	267	case P_ID_ST_ADV:
	268	return "ST Advanced";
	269
	270	case P_ID_MITSUBISHI_STD:
	271	return "Mitsubishi Standard";
1f948b43	272
1da177e4 LT	273	case P_ID_MITSUBISHI_EXT:
	274	return "Mitsubishi Extended";
	275
	276	case P_ID_SST_PAGE:
	277	return "SST Page Write";
	278
54b93a49 GL	279	case P_ID_SST_OLD:
	280	return "SST 39VF160x/39VF320x";
	281
1da177e4 LT	282	case P_ID_INTEL_PERFORMANCE:
1da177e4 LT	283	return "Intel Performance Code";
1f948b43	284
1da177e4 LT	285	case P_ID_INTEL_DATA:
1da177e4 LT	286	return "Intel Data";
1f948b43	287
1da177e4 LT	288	case P_ID_RESERVED:
1da177e4 LT	289	return "Not Allowed / Reserved for Future Use";
1f948b43	290
1da177e4 LT	291	default:
	292	return "Unknown";
	293	}
	294	}
	295
	296
	297	static void print_cfi_ident(struct cfi_ident *cfip)
	298	{
	299	#if 0
	300	if (cfip->qry[0] != 'Q' \|\| cfip->qry[1] != 'R' \|\| cfip->qry[2] != 'Y') {
	301	printk("Invalid CFI ident structure.\n");
	302	return;
1f948b43 TG	303	}
1f948b43 TG	304	#endif
1da177e4 LT	305	printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
	306	if (cfip->P_ADR)
	307	printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
	308	else
	309	printk("No Primary Algorithm Table\n");
1f948b43	310
1da177e4 LT	311	printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
	312	if (cfip->A_ADR)
	313	printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
	314	else
	315	printk("No Alternate Algorithm Table\n");
1f948b43 TG	316
1f948b43 TG	317
1da177e4 LT	318	printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
	319	printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
	320	if (cfip->VppMin) {
	321	printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
	322	printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
	323	}
	324	else
	325	printk("No Vpp line\n");
1f948b43	326
151e7659 DW	327	printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
151e7659 DW	328	printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
1f948b43	329
1da177e4	330	if (cfip->BufWriteTimeoutTyp \|\| cfip->BufWriteTimeoutMax) {
151e7659 DW	331	printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
151e7659 DW	332	printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
1da177e4 LT	333	}
	334	else
	335	printk("Full buffer write not supported\n");
1f948b43	336
1da177e4 LT	337	printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
	338	printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
	339	if (cfip->ChipEraseTimeoutTyp \|\| cfip->ChipEraseTimeoutMax) {
1f948b43	340	printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
1da177e4 LT	341	printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
	342	}
	343	else
	344	printk("Chip erase not supported\n");
1f948b43	345
1da177e4 LT	346	printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
	347	printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
	348	switch(cfip->InterfaceDesc) {
de7921f0	349	case CFI_INTERFACE_X8_ASYNC:
1da177e4 LT	350	printk(" - x8-only asynchronous interface\n");
1da177e4 LT	351	break;
1f948b43	352
de7921f0	353	case CFI_INTERFACE_X16_ASYNC:
1da177e4 LT	354	printk(" - x16-only asynchronous interface\n");
1da177e4 LT	355	break;
1f948b43	356
de7921f0	357	case CFI_INTERFACE_X8_BY_X16_ASYNC:
1da177e4 LT	358	printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n");
1da177e4 LT	359	break;
1f948b43	360
de7921f0	361	case CFI_INTERFACE_X32_ASYNC:
1da177e4 LT	362	printk(" - x32-only asynchronous interface\n");
1da177e4 LT	363	break;
1f948b43	364
de7921f0	365	case CFI_INTERFACE_X16_BY_X32_ASYNC:
1da177e4 LT	366	printk(" - supports x16 and x32 via Word# with asynchronous interface\n");
1da177e4 LT	367	break;
1f948b43	368
de7921f0	369	case CFI_INTERFACE_NOT_ALLOWED:
1da177e4 LT	370	printk(" - Not Allowed / Reserved\n");
1da177e4 LT	371	break;
1f948b43	372
1da177e4 LT	373	default:
	374	printk(" - Unknown\n");
	375	break;
	376	}
1f948b43	377
1da177e4 LT	378	printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
1da177e4 LT	379	printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
1f948b43	380
1da177e4 LT	381	}
	382	#endif /* DEBUG_CFI */
	383
	384	static struct chip_probe cfi_chip_probe = {
	385	.name = "CFI",
	386	.probe_chip = cfi_probe_chip
	387	};
	388
	389	struct mtd_info cfi_probe(struct map_info map)
	390	{
	391	/*
	392	* Just use the generic probe stuff to call our CFI-specific
	393	* chip_probe routine in all the possible permutations, etc.
	394	*/
	395	return mtd_do_chip_probe(map, &cfi_chip_probe);
	396	}
	397
	398	static struct mtd_chip_driver cfi_chipdrv = {
	399	.probe = cfi_probe,
	400	.name = "cfi_probe",
	401	.module = THIS_MODULE
	402	};
	403
2b9175c1	404	static int __init cfi_probe_init(void)
1da177e4 LT	405	{
	406	register_mtd_chip_driver(&cfi_chipdrv);
	407	return 0;
	408	}
	409
	410	static void __exit cfi_probe_exit(void)
	411	{
	412	unregister_mtd_chip_driver(&cfi_chipdrv);
	413	}
	414
	415	module_init(cfi_probe_init);
	416	module_exit(cfi_probe_exit);
	417
	418	MODULE_LICENSE("GPL");
	419	MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
	420	MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");