[MTD] [NAND] support for pxa3xx
[deliverable/linux.git] / drivers / mtd / chips / cfi_probe.c
CommitLineData
1f948b43 1/*
1da177e4
LT
2 Common Flash Interface probe code.
3 (C) 2000 Red Hat. GPL'd.
2b9175c1 4 $Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $
1da177e4
LT
5*/
6
1da177e4
LT
7#include <linux/module.h>
8#include <linux/types.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <asm/io.h>
12#include <asm/byteorder.h>
13#include <linux/errno.h>
14#include <linux/slab.h>
15#include <linux/interrupt.h>
16
17#include <linux/mtd/xip.h>
18#include <linux/mtd/map.h>
19#include <linux/mtd/cfi.h>
20#include <linux/mtd/gen_probe.h>
21
1f948b43 22//#define DEBUG_CFI
1da177e4
LT
23
24#ifdef DEBUG_CFI
25static void print_cfi_ident(struct cfi_ident *);
26#endif
27
28static int cfi_probe_chip(struct map_info *map, __u32 base,
29 unsigned long *chip_map, struct cfi_private *cfi);
30static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
31
32struct mtd_info *cfi_probe(struct map_info *map);
33
34#ifdef CONFIG_MTD_XIP
35
36/* only needed for short periods, so this is rather simple */
37#define xip_disable() local_irq_disable()
38
39#define xip_allowed(base, map) \
40do { \
41 (void) map_read(map, base); \
42 asm volatile (".rep 8; nop; .endr"); \
43 local_irq_enable(); \
44} while (0)
45
46#define xip_enable(base, map, cfi) \
47do { \
48 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \
49 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \
50 xip_allowed(base, map); \
51} while (0)
52
53#define xip_disable_qry(base, map, cfi) \
54do { \
55 xip_disable(); \
56 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \
57 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \
58 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL); \
59} while (0)
60
61#else
62
63#define xip_disable() do { } while (0)
64#define xip_allowed(base, map) do { } while (0)
65#define xip_enable(base, map, cfi) do { } while (0)
66#define xip_disable_qry(base, map, cfi) do { } while (0)
67
68#endif
69
70/* check for QRY.
71 in: interleave,type,mode
72 ret: table index, <0 for error
73 */
74static int __xipram qry_present(struct map_info *map, __u32 base,
75 struct cfi_private *cfi)
76{
77 int osf = cfi->interleave * cfi->device_type; // scale factor
78 map_word val[3];
79 map_word qry[3];
80
81 qry[0] = cfi_build_cmd('Q', map, cfi);
82 qry[1] = cfi_build_cmd('R', map, cfi);
83 qry[2] = cfi_build_cmd('Y', map, cfi);
84
85 val[0] = map_read(map, base + osf*0x10);
86 val[1] = map_read(map, base + osf*0x11);
87 val[2] = map_read(map, base + osf*0x12);
88
89 if (!map_word_equal(map, qry[0], val[0]))
90 return 0;
91
92 if (!map_word_equal(map, qry[1], val[1]))
93 return 0;
94
95 if (!map_word_equal(map, qry[2], val[2]))
96 return 0;
97
98 return 1; // "QRY" found
99}
100
101static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
102 unsigned long *chip_map, struct cfi_private *cfi)
103{
104 int i;
1f948b43 105
1da177e4
LT
106 if ((base + 0) >= map->size) {
107 printk(KERN_NOTICE
108 "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
109 (unsigned long)base, map->size -1);
110 return 0;
111 }
112 if ((base + 0xff) >= map->size) {
113 printk(KERN_NOTICE
114 "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
115 (unsigned long)base + 0x55, map->size -1);
116 return 0;
117 }
118
119 xip_disable();
120 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
121 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
122 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL);
123
124 if (!qry_present(map,base,cfi)) {
125 xip_enable(base, map, cfi);
126 return 0;
127 }
128
129 if (!cfi->numchips) {
1f948b43 130 /* This is the first time we're called. Set up the CFI
1da177e4
LT
131 stuff accordingly and return */
132 return cfi_chip_setup(map, cfi);
133 }
134
135 /* Check each previous chip to see if it's an alias */
136 for (i=0; i < (base >> cfi->chipshift); i++) {
137 unsigned long start;
138 if(!test_bit(i, chip_map)) {
139 /* Skip location; no valid chip at this address */
1f948b43 140 continue;
1da177e4
LT
141 }
142 start = i << cfi->chipshift;
143 /* This chip should be in read mode if it's one
144 we've already touched. */
145 if (qry_present(map, start, cfi)) {
1f948b43 146 /* Eep. This chip also had the QRY marker.
1da177e4
LT
147 * Is it an alias for the new one? */
148 cfi_send_gen_cmd(0xF0, 0, start, map, cfi, cfi->device_type, NULL);
149 cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL);
150
151 /* If the QRY marker goes away, it's an alias */
152 if (!qry_present(map, start, cfi)) {
153 xip_allowed(base, map);
154 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
155 map->name, base, start);
156 return 0;
157 }
1f948b43 158 /* Yes, it's actually got QRY for data. Most
1da177e4
LT
159 * unfortunate. Stick the new chip in read mode
160 * too and if it's the same, assume it's an alias. */
161 /* FIXME: Use other modes to do a proper check */
162 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
163 cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL);
1f948b43 164
1da177e4
LT
165 if (qry_present(map, base, cfi)) {
166 xip_allowed(base, map);
167 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
168 map->name, base, start);
169 return 0;
170 }
171 }
172 }
1f948b43 173
1da177e4
LT
174 /* OK, if we got to here, then none of the previous chips appear to
175 be aliases for the current one. */
176 set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
177 cfi->numchips++;
1f948b43 178
1da177e4
LT
179 /* Put it back into Read Mode */
180 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
181 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
182 xip_allowed(base, map);
183
184 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
185 map->name, cfi->interleave, cfi->device_type*8, base,
186 map->bankwidth*8);
1f948b43 187
1da177e4
LT
188 return 1;
189}
190
1f948b43 191static int __xipram cfi_chip_setup(struct map_info *map,
1da177e4
LT
192 struct cfi_private *cfi)
193{
194 int ofs_factor = cfi->interleave*cfi->device_type;
195 __u32 base = 0;
196 int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
197 int i;
198
199 xip_enable(base, map, cfi);
200#ifdef DEBUG_CFI
201 printk("Number of erase regions: %d\n", num_erase_regions);
202#endif
203 if (!num_erase_regions)
204 return 0;
205
206 cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
207 if (!cfi->cfiq) {
208 printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
209 return 0;
210 }
1f948b43
TG
211
212 memset(cfi->cfiq,0,sizeof(struct cfi_ident));
213
1da177e4 214 cfi->cfi_mode = CFI_MODE_CFI;
1f948b43 215
1da177e4
LT
216 /* Read the CFI info structure */
217 xip_disable_qry(base, map, cfi);
218 for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
219 ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
220
221 /* Note we put the device back into Read Mode BEFORE going into Auto
222 * Select Mode, as some devices support nesting of modes, others
223 * don't. This way should always work.
224 * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
225 * so should be treated as nops or illegal (and so put the device
226 * back into Read Mode, which is a nop in this case).
227 */
228 cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
229 cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);
230 cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);
231 cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);
987d2401
TP
232 cfi->mfr = cfi_read_query16(map, base);
233 cfi->id = cfi_read_query16(map, base + ofs_factor);
1da177e4
LT
234
235 /* Put it back into Read Mode */
236 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
237 /* ... even if it's an Intel chip */
238 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
239 xip_allowed(base, map);
240
241 /* Do any necessary byteswapping */
242 cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
243
244 cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
245 cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
246 cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
247 cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
248 cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
249
250#ifdef DEBUG_CFI
251 /* Dump the information therein */
252 print_cfi_ident(cfi->cfiq);
253#endif
254
255 for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
256 cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
1f948b43
TG
257
258#ifdef DEBUG_CFI
1da177e4 259 printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
1f948b43 260 i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
1da177e4
LT
261 (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
262#endif
263 }
264
265 printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
266 map->name, cfi->interleave, cfi->device_type*8, base,
267 map->bankwidth*8);
268
269 return 1;
270}
271
272#ifdef DEBUG_CFI
1f948b43 273static char *vendorname(__u16 vendor)
1da177e4
LT
274{
275 switch (vendor) {
276 case P_ID_NONE:
277 return "None";
1f948b43 278
1da177e4
LT
279 case P_ID_INTEL_EXT:
280 return "Intel/Sharp Extended";
1f948b43 281
1da177e4
LT
282 case P_ID_AMD_STD:
283 return "AMD/Fujitsu Standard";
1f948b43 284
1da177e4
LT
285 case P_ID_INTEL_STD:
286 return "Intel/Sharp Standard";
1f948b43 287
1da177e4
LT
288 case P_ID_AMD_EXT:
289 return "AMD/Fujitsu Extended";
290
291 case P_ID_WINBOND:
292 return "Winbond Standard";
1f948b43 293
1da177e4
LT
294 case P_ID_ST_ADV:
295 return "ST Advanced";
296
297 case P_ID_MITSUBISHI_STD:
298 return "Mitsubishi Standard";
1f948b43 299
1da177e4
LT
300 case P_ID_MITSUBISHI_EXT:
301 return "Mitsubishi Extended";
302
303 case P_ID_SST_PAGE:
304 return "SST Page Write";
305
306 case P_ID_INTEL_PERFORMANCE:
307 return "Intel Performance Code";
1f948b43 308
1da177e4
LT
309 case P_ID_INTEL_DATA:
310 return "Intel Data";
1f948b43 311
1da177e4
LT
312 case P_ID_RESERVED:
313 return "Not Allowed / Reserved for Future Use";
1f948b43 314
1da177e4
LT
315 default:
316 return "Unknown";
317 }
318}
319
320
321static void print_cfi_ident(struct cfi_ident *cfip)
322{
323#if 0
324 if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
325 printk("Invalid CFI ident structure.\n");
326 return;
1f948b43
TG
327 }
328#endif
1da177e4
LT
329 printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
330 if (cfip->P_ADR)
331 printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
332 else
333 printk("No Primary Algorithm Table\n");
1f948b43 334
1da177e4
LT
335 printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
336 if (cfip->A_ADR)
337 printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
338 else
339 printk("No Alternate Algorithm Table\n");
1f948b43
TG
340
341
1da177e4
LT
342 printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
343 printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
344 if (cfip->VppMin) {
345 printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
346 printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
347 }
348 else
349 printk("No Vpp line\n");
1f948b43 350
151e7659
DW
351 printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
352 printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
1f948b43 353
1da177e4 354 if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
151e7659
DW
355 printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
356 printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
1da177e4
LT
357 }
358 else
359 printk("Full buffer write not supported\n");
1f948b43 360
1da177e4
LT
361 printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
362 printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
363 if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
1f948b43 364 printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
1da177e4
LT
365 printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
366 }
367 else
368 printk("Chip erase not supported\n");
1f948b43 369
1da177e4
LT
370 printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
371 printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
372 switch(cfip->InterfaceDesc) {
de7921f0 373 case CFI_INTERFACE_X8_ASYNC:
1da177e4
LT
374 printk(" - x8-only asynchronous interface\n");
375 break;
1f948b43 376
de7921f0 377 case CFI_INTERFACE_X16_ASYNC:
1da177e4
LT
378 printk(" - x16-only asynchronous interface\n");
379 break;
1f948b43 380
de7921f0 381 case CFI_INTERFACE_X8_BY_X16_ASYNC:
1da177e4
LT
382 printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n");
383 break;
1f948b43 384
de7921f0 385 case CFI_INTERFACE_X32_ASYNC:
1da177e4
LT
386 printk(" - x32-only asynchronous interface\n");
387 break;
1f948b43 388
de7921f0 389 case CFI_INTERFACE_X16_BY_X32_ASYNC:
1da177e4
LT
390 printk(" - supports x16 and x32 via Word# with asynchronous interface\n");
391 break;
1f948b43 392
de7921f0 393 case CFI_INTERFACE_NOT_ALLOWED:
1da177e4
LT
394 printk(" - Not Allowed / Reserved\n");
395 break;
1f948b43 396
1da177e4
LT
397 default:
398 printk(" - Unknown\n");
399 break;
400 }
1f948b43 401
1da177e4
LT
402 printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
403 printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
1f948b43 404
1da177e4
LT
405}
406#endif /* DEBUG_CFI */
407
408static struct chip_probe cfi_chip_probe = {
409 .name = "CFI",
410 .probe_chip = cfi_probe_chip
411};
412
413struct mtd_info *cfi_probe(struct map_info *map)
414{
415 /*
416 * Just use the generic probe stuff to call our CFI-specific
417 * chip_probe routine in all the possible permutations, etc.
418 */
419 return mtd_do_chip_probe(map, &cfi_chip_probe);
420}
421
422static struct mtd_chip_driver cfi_chipdrv = {
423 .probe = cfi_probe,
424 .name = "cfi_probe",
425 .module = THIS_MODULE
426};
427
2b9175c1 428static int __init cfi_probe_init(void)
1da177e4
LT
429{
430 register_mtd_chip_driver(&cfi_chipdrv);
431 return 0;
432}
433
434static void __exit cfi_probe_exit(void)
435{
436 unregister_mtd_chip_driver(&cfi_chipdrv);
437}
438
439module_init(cfi_probe_init);
440module_exit(cfi_probe_exit);
441
442MODULE_LICENSE("GPL");
443MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
444MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");
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