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1da177e4 LT |
1 | #ifndef FWH_LOCK_H |
2 | #define FWH_LOCK_H | |
3 | ||
4 | ||
5 | enum fwh_lock_state { | |
6 | FWH_UNLOCKED = 0, | |
7 | FWH_DENY_WRITE = 1, | |
8 | FWH_IMMUTABLE = 2, | |
9 | FWH_DENY_READ = 4, | |
10 | }; | |
11 | ||
12 | struct fwh_xxlock_thunk { | |
13 | enum fwh_lock_state val; | |
14 | flstate_t state; | |
15 | }; | |
16 | ||
17 | ||
18 | #define FWH_XXLOCK_ONEBLOCK_LOCK ((struct fwh_xxlock_thunk){ FWH_DENY_WRITE, FL_LOCKING}) | |
19 | #define FWH_XXLOCK_ONEBLOCK_UNLOCK ((struct fwh_xxlock_thunk){ FWH_UNLOCKED, FL_UNLOCKING}) | |
20 | ||
21 | /* | |
22 | * This locking/unlock is specific to firmware hub parts. Only one | |
23 | * is known that supports the Intel command set. Firmware | |
24 | * hub parts cannot be interleaved as they are on the LPC bus | |
25 | * so this code has not been tested with interleaved chips, | |
26 | * and will likely fail in that context. | |
27 | */ | |
1f948b43 | 28 | static int fwh_xxlock_oneblock(struct map_info *map, struct flchip *chip, |
1da177e4 LT |
29 | unsigned long adr, int len, void *thunk) |
30 | { | |
31 | struct cfi_private *cfi = map->fldrv_priv; | |
32 | struct fwh_xxlock_thunk *xxlt = (struct fwh_xxlock_thunk *)thunk; | |
33 | int ret; | |
34 | ||
35 | /* Refuse the operation if the we cannot look behind the chip */ | |
36 | if (chip->start < 0x400000) { | |
289c0522 | 37 | pr_debug( "MTD %s(): chip->start: %lx wanted >= 0x400000\n", |
1da177e4 LT |
38 | __func__, chip->start ); |
39 | return -EIO; | |
40 | } | |
41 | /* | |
42 | * lock block registers: | |
43 | * - on 64k boundariesand | |
44 | * - bit 1 set high | |
45 | * - block lock registers are 4MiB lower - overflow subtract (danger) | |
1f948b43 | 46 | * |
1da177e4 LT |
47 | * The address manipulation is first done on the logical address |
48 | * which is 0 at the start of the chip, and then the offset of | |
49 | * the individual chip is addted to it. Any other order a weird | |
50 | * map offset could cause problems. | |
51 | */ | |
52 | adr = (adr & ~0xffffUL) | 0x2; | |
53 | adr += chip->start - 0x400000; | |
54 | ||
55 | /* | |
56 | * This is easy because these are writes to registers and not writes | |
57 | * to flash memory - that means that we don't have to check status | |
58 | * and timeout. | |
59 | */ | |
c4e77376 | 60 | mutex_lock(&chip->mutex); |
1da177e4 LT |
61 | ret = get_chip(map, chip, adr, FL_LOCKING); |
62 | if (ret) { | |
c4e77376 | 63 | mutex_unlock(&chip->mutex); |
1da177e4 LT |
64 | return ret; |
65 | } | |
66 | ||
e6be133b | 67 | chip->oldstate = chip->state; |
1da177e4 LT |
68 | chip->state = xxlt->state; |
69 | map_write(map, CMD(xxlt->val), adr); | |
70 | ||
71 | /* Done and happy. */ | |
e6be133b | 72 | chip->state = chip->oldstate; |
1da177e4 | 73 | put_chip(map, chip, adr); |
c4e77376 | 74 | mutex_unlock(&chip->mutex); |
1da177e4 LT |
75 | return 0; |
76 | } | |
77 | ||
78 | ||
69423d99 | 79 | static int fwh_lock_varsize(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
1da177e4 LT |
80 | { |
81 | int ret; | |
82 | ||
83 | ret = cfi_varsize_frob(mtd, fwh_xxlock_oneblock, ofs, len, | |
84 | (void *)&FWH_XXLOCK_ONEBLOCK_LOCK); | |
85 | ||
86 | return ret; | |
87 | } | |
88 | ||
89 | ||
69423d99 | 90 | static int fwh_unlock_varsize(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
1da177e4 LT |
91 | { |
92 | int ret; | |
93 | ||
94 | ret = cfi_varsize_frob(mtd, fwh_xxlock_oneblock, ofs, len, | |
95 | (void *)&FWH_XXLOCK_ONEBLOCK_UNLOCK); | |
1f948b43 | 96 | |
1da177e4 LT |
97 | return ret; |
98 | } | |
99 | ||
cc318222 | 100 | static void fixup_use_fwh_lock(struct mtd_info *mtd) |
1da177e4 LT |
101 | { |
102 | printk(KERN_NOTICE "using fwh lock/unlock method\n"); | |
103 | /* Setup for the chips with the fwh lock method */ | |
3c3c10bb AB |
104 | mtd->_lock = fwh_lock_varsize; |
105 | mtd->_unlock = fwh_unlock_varsize; | |
1da177e4 LT |
106 | } |
107 | #endif /* FWH_LOCK_H */ |