Commit | Line | Data |
---|---|---|
1f948b43 | 1 | /* |
1da177e4 LT |
2 | Common Flash Interface probe code. |
3 | (C) 2000 Red Hat. GPL'd. | |
1f948b43 | 4 | $Id: jedec_probe.c,v 1.66 2005/11/07 11:14:23 gleixner Exp $ |
1da177e4 LT |
5 | See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5) |
6 | for the standard this probe goes back to. | |
7 | ||
8 | Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com | |
9 | */ | |
10 | ||
1da177e4 LT |
11 | #include <linux/module.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/types.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <asm/io.h> | |
16 | #include <asm/byteorder.h> | |
17 | #include <linux/errno.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/interrupt.h> | |
1da177e4 LT |
20 | |
21 | #include <linux/mtd/mtd.h> | |
22 | #include <linux/mtd/map.h> | |
23 | #include <linux/mtd/cfi.h> | |
24 | #include <linux/mtd/gen_probe.h> | |
25 | ||
26 | /* Manufacturers */ | |
27 | #define MANUFACTURER_AMD 0x0001 | |
28 | #define MANUFACTURER_ATMEL 0x001f | |
29 | #define MANUFACTURER_FUJITSU 0x0004 | |
30 | #define MANUFACTURER_HYUNDAI 0x00AD | |
31 | #define MANUFACTURER_INTEL 0x0089 | |
32 | #define MANUFACTURER_MACRONIX 0x00C2 | |
33 | #define MANUFACTURER_NEC 0x0010 | |
34 | #define MANUFACTURER_PMC 0x009D | |
a63ec1b7 | 35 | #define MANUFACTURER_SHARP 0x00b0 |
1da177e4 LT |
36 | #define MANUFACTURER_SST 0x00BF |
37 | #define MANUFACTURER_ST 0x0020 | |
38 | #define MANUFACTURER_TOSHIBA 0x0098 | |
39 | #define MANUFACTURER_WINBOND 0x00da | |
5c9c11e1 | 40 | #define CONTINUATION_CODE 0x007f |
1da177e4 LT |
41 | |
42 | ||
43 | /* AMD */ | |
44 | #define AM29DL800BB 0x22C8 | |
45 | #define AM29DL800BT 0x224A | |
46 | ||
47 | #define AM29F800BB 0x2258 | |
48 | #define AM29F800BT 0x22D6 | |
49 | #define AM29LV400BB 0x22BA | |
50 | #define AM29LV400BT 0x22B9 | |
51 | #define AM29LV800BB 0x225B | |
52 | #define AM29LV800BT 0x22DA | |
53 | #define AM29LV160DT 0x22C4 | |
54 | #define AM29LV160DB 0x2249 | |
55 | #define AM29F017D 0x003D | |
56 | #define AM29F016D 0x00AD | |
57 | #define AM29F080 0x00D5 | |
58 | #define AM29F040 0x00A4 | |
59 | #define AM29LV040B 0x004F | |
60 | #define AM29F032B 0x0041 | |
61 | #define AM29F002T 0x00B0 | |
8fd310a1 MR |
62 | #define AM29SL800DB 0x226B |
63 | #define AM29SL800DT 0x22EA | |
1da177e4 LT |
64 | |
65 | /* Atmel */ | |
66 | #define AT49BV512 0x0003 | |
67 | #define AT29LV512 0x003d | |
68 | #define AT49BV16X 0x00C0 | |
69 | #define AT49BV16XT 0x00C2 | |
70 | #define AT49BV32X 0x00C8 | |
71 | #define AT49BV32XT 0x00C9 | |
72 | ||
73 | /* Fujitsu */ | |
74 | #define MBM29F040C 0x00A4 | |
c9856e39 | 75 | #define MBM29F800BA 0x2258 |
1da177e4 LT |
76 | #define MBM29LV650UE 0x22D7 |
77 | #define MBM29LV320TE 0x22F6 | |
78 | #define MBM29LV320BE 0x22F9 | |
79 | #define MBM29LV160TE 0x22C4 | |
80 | #define MBM29LV160BE 0x2249 | |
81 | #define MBM29LV800BA 0x225B | |
82 | #define MBM29LV800TA 0x22DA | |
83 | #define MBM29LV400TC 0x22B9 | |
84 | #define MBM29LV400BC 0x22BA | |
85 | ||
86 | /* Hyundai */ | |
87 | #define HY29F002T 0x00B0 | |
88 | ||
89 | /* Intel */ | |
90 | #define I28F004B3T 0x00d4 | |
91 | #define I28F004B3B 0x00d5 | |
92 | #define I28F400B3T 0x8894 | |
93 | #define I28F400B3B 0x8895 | |
94 | #define I28F008S5 0x00a6 | |
95 | #define I28F016S5 0x00a0 | |
96 | #define I28F008SA 0x00a2 | |
97 | #define I28F008B3T 0x00d2 | |
98 | #define I28F008B3B 0x00d3 | |
99 | #define I28F800B3T 0x8892 | |
100 | #define I28F800B3B 0x8893 | |
101 | #define I28F016S3 0x00aa | |
102 | #define I28F016B3T 0x00d0 | |
103 | #define I28F016B3B 0x00d1 | |
104 | #define I28F160B3T 0x8890 | |
105 | #define I28F160B3B 0x8891 | |
106 | #define I28F320B3T 0x8896 | |
107 | #define I28F320B3B 0x8897 | |
108 | #define I28F640B3T 0x8898 | |
109 | #define I28F640B3B 0x8899 | |
110 | #define I82802AB 0x00ad | |
111 | #define I82802AC 0x00ac | |
112 | ||
113 | /* Macronix */ | |
114 | #define MX29LV040C 0x004F | |
115 | #define MX29LV160T 0x22C4 | |
116 | #define MX29LV160B 0x2249 | |
c4e6952f | 117 | #define MX29F040 0x00A4 |
1da177e4 LT |
118 | #define MX29F016 0x00AD |
119 | #define MX29F002T 0x00B0 | |
120 | #define MX29F004T 0x0045 | |
121 | #define MX29F004B 0x0046 | |
122 | ||
123 | /* NEC */ | |
124 | #define UPD29F064115 0x221C | |
125 | ||
126 | /* PMC */ | |
127 | #define PM49FL002 0x006D | |
128 | #define PM49FL004 0x006E | |
129 | #define PM49FL008 0x006A | |
130 | ||
a63ec1b7 PM |
131 | /* Sharp */ |
132 | #define LH28F640BF 0x00b0 | |
133 | ||
1da177e4 | 134 | /* ST - www.st.com */ |
c9856e39 | 135 | #define M29F800AB 0x0058 |
1da177e4 LT |
136 | #define M29W800DT 0x00D7 |
137 | #define M29W800DB 0x005B | |
30d6a24e GF |
138 | #define M29W400DT 0x00EE |
139 | #define M29W400DB 0x00EF | |
1da177e4 LT |
140 | #define M29W160DT 0x22C4 |
141 | #define M29W160DB 0x2249 | |
142 | #define M29W040B 0x00E3 | |
143 | #define M50FW040 0x002C | |
144 | #define M50FW080 0x002D | |
145 | #define M50FW016 0x002E | |
146 | #define M50LPW080 0x002F | |
deb1a5f1 NC |
147 | #define M50FLW080A 0x0080 |
148 | #define M50FLW080B 0x0081 | |
1da177e4 LT |
149 | |
150 | /* SST */ | |
151 | #define SST29EE020 0x0010 | |
152 | #define SST29LE020 0x0012 | |
153 | #define SST29EE512 0x005d | |
154 | #define SST29LE512 0x003d | |
155 | #define SST39LF800 0x2781 | |
156 | #define SST39LF160 0x2782 | |
88ec7c50 | 157 | #define SST39VF1601 0x234b |
1da177e4 LT |
158 | #define SST39LF512 0x00D4 |
159 | #define SST39LF010 0x00D5 | |
160 | #define SST39LF020 0x00D6 | |
161 | #define SST39LF040 0x00D7 | |
162 | #define SST39SF010A 0x00B5 | |
163 | #define SST39SF020A 0x00B6 | |
164 | #define SST49LF004B 0x0060 | |
89072ef9 | 165 | #define SST49LF040B 0x0050 |
1da177e4 LT |
166 | #define SST49LF008A 0x005a |
167 | #define SST49LF030A 0x001C | |
168 | #define SST49LF040A 0x0051 | |
169 | #define SST49LF080A 0x005B | |
1b0a062b | 170 | #define SST36VF3203 0x7354 |
1da177e4 LT |
171 | |
172 | /* Toshiba */ | |
173 | #define TC58FVT160 0x00C2 | |
174 | #define TC58FVB160 0x0043 | |
175 | #define TC58FVT321 0x009A | |
176 | #define TC58FVB321 0x009C | |
177 | #define TC58FVT641 0x0093 | |
178 | #define TC58FVB641 0x0095 | |
179 | ||
180 | /* Winbond */ | |
181 | #define W49V002A 0x00b0 | |
182 | ||
183 | ||
184 | /* | |
185 | * Unlock address sets for AMD command sets. | |
186 | * Intel command sets use the MTD_UADDR_UNNECESSARY. | |
187 | * Each identifier, except MTD_UADDR_UNNECESSARY, and | |
188 | * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[]. | |
189 | * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure | |
190 | * initialization need not require initializing all of the | |
191 | * unlock addresses for all bit widths. | |
192 | */ | |
193 | enum uaddr { | |
194 | MTD_UADDR_NOT_SUPPORTED = 0, /* data width not supported */ | |
195 | MTD_UADDR_0x0555_0x02AA, | |
196 | MTD_UADDR_0x0555_0x0AAA, | |
197 | MTD_UADDR_0x5555_0x2AAA, | |
198 | MTD_UADDR_0x0AAA_0x0555, | |
199 | MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */ | |
200 | MTD_UADDR_UNNECESSARY, /* Does not require any address */ | |
201 | }; | |
202 | ||
203 | ||
204 | struct unlock_addr { | |
5d3cce3b DW |
205 | uint32_t addr1; |
206 | uint32_t addr2; | |
1da177e4 LT |
207 | }; |
208 | ||
209 | ||
210 | /* | |
211 | * I don't like the fact that the first entry in unlock_addrs[] | |
212 | * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore, | |
213 | * should not be used. The problem is that structures with | |
214 | * initializers have extra fields initialized to 0. It is _very_ | |
215 | * desireable to have the unlock address entries for unsupported | |
216 | * data widths automatically initialized - that means that | |
217 | * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here | |
218 | * must go unused. | |
219 | */ | |
220 | static const struct unlock_addr unlock_addrs[] = { | |
221 | [MTD_UADDR_NOT_SUPPORTED] = { | |
222 | .addr1 = 0xffff, | |
223 | .addr2 = 0xffff | |
224 | }, | |
225 | ||
226 | [MTD_UADDR_0x0555_0x02AA] = { | |
227 | .addr1 = 0x0555, | |
228 | .addr2 = 0x02aa | |
229 | }, | |
230 | ||
231 | [MTD_UADDR_0x0555_0x0AAA] = { | |
232 | .addr1 = 0x0555, | |
233 | .addr2 = 0x0aaa | |
234 | }, | |
235 | ||
236 | [MTD_UADDR_0x5555_0x2AAA] = { | |
237 | .addr1 = 0x5555, | |
238 | .addr2 = 0x2aaa | |
239 | }, | |
240 | ||
241 | [MTD_UADDR_0x0AAA_0x0555] = { | |
242 | .addr1 = 0x0AAA, | |
243 | .addr2 = 0x0555 | |
244 | }, | |
245 | ||
246 | [MTD_UADDR_DONT_CARE] = { | |
247 | .addr1 = 0x0000, /* Doesn't matter which address */ | |
248 | .addr2 = 0x0000 /* is used - must be last entry */ | |
249 | }, | |
250 | ||
251 | [MTD_UADDR_UNNECESSARY] = { | |
252 | .addr1 = 0x0000, | |
253 | .addr2 = 0x0000 | |
254 | } | |
255 | }; | |
256 | ||
1da177e4 | 257 | struct amd_flash_info { |
1da177e4 | 258 | const char *name; |
5d3cce3b DW |
259 | const uint16_t mfr_id; |
260 | const uint16_t dev_id; | |
261 | const uint8_t dev_size; | |
262 | const uint8_t nr_regions; | |
263 | const uint16_t cmd_set; | |
264 | const uint32_t regions[6]; | |
265 | const uint8_t devtypes; /* Bitmask for x8, x16 etc. */ | |
266 | const uint8_t uaddr; /* unlock addrs for 8, 16, 32, 64 */ | |
1da177e4 LT |
267 | }; |
268 | ||
269 | #define ERASEINFO(size,blocks) (size<<8)|(blocks-1) | |
270 | ||
271 | #define SIZE_64KiB 16 | |
272 | #define SIZE_128KiB 17 | |
273 | #define SIZE_256KiB 18 | |
274 | #define SIZE_512KiB 19 | |
275 | #define SIZE_1MiB 20 | |
276 | #define SIZE_2MiB 21 | |
277 | #define SIZE_4MiB 22 | |
278 | #define SIZE_8MiB 23 | |
279 | ||
280 | ||
281 | /* | |
282 | * Please keep this list ordered by manufacturer! | |
283 | * Fortunately, the list isn't searched often and so a | |
284 | * slow, linear search isn't so bad. | |
285 | */ | |
286 | static const struct amd_flash_info jedec_table[] = { | |
287 | { | |
288 | .mfr_id = MANUFACTURER_AMD, | |
289 | .dev_id = AM29F032B, | |
290 | .name = "AMD AM29F032B", | |
5d3cce3b DW |
291 | .uaddr = MTD_UADDR_0x0555_0x02AA, |
292 | .devtypes = CFI_DEVICETYPE_X8, | |
293 | .dev_size = SIZE_4MiB, | |
294 | .cmd_set = P_ID_AMD_STD, | |
295 | .nr_regions = 1, | |
1da177e4 LT |
296 | .regions = { |
297 | ERASEINFO(0x10000,64) | |
298 | } | |
299 | }, { | |
300 | .mfr_id = MANUFACTURER_AMD, | |
301 | .dev_id = AM29LV160DT, | |
302 | .name = "AMD AM29LV160DT", | |
5d3cce3b DW |
303 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
304 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
305 | .dev_size = SIZE_2MiB, |
306 | .cmd_set = P_ID_AMD_STD, | |
307 | .nr_regions = 4, | |
1da177e4 LT |
308 | .regions = { |
309 | ERASEINFO(0x10000,31), | |
310 | ERASEINFO(0x08000,1), | |
311 | ERASEINFO(0x02000,2), | |
312 | ERASEINFO(0x04000,1) | |
313 | } | |
314 | }, { | |
315 | .mfr_id = MANUFACTURER_AMD, | |
316 | .dev_id = AM29LV160DB, | |
317 | .name = "AMD AM29LV160DB", | |
5d3cce3b DW |
318 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
319 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
320 | .dev_size = SIZE_2MiB, |
321 | .cmd_set = P_ID_AMD_STD, | |
322 | .nr_regions = 4, | |
1da177e4 LT |
323 | .regions = { |
324 | ERASEINFO(0x04000,1), | |
325 | ERASEINFO(0x02000,2), | |
326 | ERASEINFO(0x08000,1), | |
327 | ERASEINFO(0x10000,31) | |
328 | } | |
329 | }, { | |
330 | .mfr_id = MANUFACTURER_AMD, | |
331 | .dev_id = AM29LV400BB, | |
332 | .name = "AMD AM29LV400BB", | |
5d3cce3b DW |
333 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
334 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
335 | .dev_size = SIZE_512KiB, |
336 | .cmd_set = P_ID_AMD_STD, | |
337 | .nr_regions = 4, | |
1da177e4 LT |
338 | .regions = { |
339 | ERASEINFO(0x04000,1), | |
340 | ERASEINFO(0x02000,2), | |
341 | ERASEINFO(0x08000,1), | |
342 | ERASEINFO(0x10000,7) | |
343 | } | |
344 | }, { | |
345 | .mfr_id = MANUFACTURER_AMD, | |
346 | .dev_id = AM29LV400BT, | |
347 | .name = "AMD AM29LV400BT", | |
5d3cce3b DW |
348 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
349 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
350 | .dev_size = SIZE_512KiB, |
351 | .cmd_set = P_ID_AMD_STD, | |
352 | .nr_regions = 4, | |
1da177e4 LT |
353 | .regions = { |
354 | ERASEINFO(0x10000,7), | |
355 | ERASEINFO(0x08000,1), | |
356 | ERASEINFO(0x02000,2), | |
357 | ERASEINFO(0x04000,1) | |
358 | } | |
359 | }, { | |
360 | .mfr_id = MANUFACTURER_AMD, | |
361 | .dev_id = AM29LV800BB, | |
362 | .name = "AMD AM29LV800BB", | |
5d3cce3b DW |
363 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
364 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
365 | .dev_size = SIZE_1MiB, |
366 | .cmd_set = P_ID_AMD_STD, | |
367 | .nr_regions = 4, | |
1da177e4 LT |
368 | .regions = { |
369 | ERASEINFO(0x04000,1), | |
370 | ERASEINFO(0x02000,2), | |
371 | ERASEINFO(0x08000,1), | |
372 | ERASEINFO(0x10000,15), | |
373 | } | |
374 | }, { | |
375 | /* add DL */ | |
376 | .mfr_id = MANUFACTURER_AMD, | |
377 | .dev_id = AM29DL800BB, | |
378 | .name = "AMD AM29DL800BB", | |
5d3cce3b DW |
379 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
380 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
381 | .dev_size = SIZE_1MiB, |
382 | .cmd_set = P_ID_AMD_STD, | |
383 | .nr_regions = 6, | |
1da177e4 LT |
384 | .regions = { |
385 | ERASEINFO(0x04000,1), | |
386 | ERASEINFO(0x08000,1), | |
387 | ERASEINFO(0x02000,4), | |
388 | ERASEINFO(0x08000,1), | |
389 | ERASEINFO(0x04000,1), | |
390 | ERASEINFO(0x10000,14) | |
391 | } | |
392 | }, { | |
393 | .mfr_id = MANUFACTURER_AMD, | |
394 | .dev_id = AM29DL800BT, | |
395 | .name = "AMD AM29DL800BT", | |
5d3cce3b DW |
396 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
397 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
398 | .dev_size = SIZE_1MiB, |
399 | .cmd_set = P_ID_AMD_STD, | |
400 | .nr_regions = 6, | |
1da177e4 LT |
401 | .regions = { |
402 | ERASEINFO(0x10000,14), | |
403 | ERASEINFO(0x04000,1), | |
404 | ERASEINFO(0x08000,1), | |
405 | ERASEINFO(0x02000,4), | |
406 | ERASEINFO(0x08000,1), | |
407 | ERASEINFO(0x04000,1) | |
408 | } | |
409 | }, { | |
410 | .mfr_id = MANUFACTURER_AMD, | |
411 | .dev_id = AM29F800BB, | |
412 | .name = "AMD AM29F800BB", | |
5d3cce3b DW |
413 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
414 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
415 | .dev_size = SIZE_1MiB, |
416 | .cmd_set = P_ID_AMD_STD, | |
417 | .nr_regions = 4, | |
1da177e4 LT |
418 | .regions = { |
419 | ERASEINFO(0x04000,1), | |
420 | ERASEINFO(0x02000,2), | |
421 | ERASEINFO(0x08000,1), | |
422 | ERASEINFO(0x10000,15), | |
423 | } | |
424 | }, { | |
425 | .mfr_id = MANUFACTURER_AMD, | |
426 | .dev_id = AM29LV800BT, | |
427 | .name = "AMD AM29LV800BT", | |
5d3cce3b DW |
428 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
429 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
430 | .dev_size = SIZE_1MiB, |
431 | .cmd_set = P_ID_AMD_STD, | |
432 | .nr_regions = 4, | |
1da177e4 LT |
433 | .regions = { |
434 | ERASEINFO(0x10000,15), | |
435 | ERASEINFO(0x08000,1), | |
436 | ERASEINFO(0x02000,2), | |
437 | ERASEINFO(0x04000,1) | |
438 | } | |
439 | }, { | |
440 | .mfr_id = MANUFACTURER_AMD, | |
441 | .dev_id = AM29F800BT, | |
442 | .name = "AMD AM29F800BT", | |
5d3cce3b DW |
443 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
444 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
445 | .dev_size = SIZE_1MiB, |
446 | .cmd_set = P_ID_AMD_STD, | |
447 | .nr_regions = 4, | |
1da177e4 LT |
448 | .regions = { |
449 | ERASEINFO(0x10000,15), | |
450 | ERASEINFO(0x08000,1), | |
451 | ERASEINFO(0x02000,2), | |
452 | ERASEINFO(0x04000,1) | |
453 | } | |
454 | }, { | |
455 | .mfr_id = MANUFACTURER_AMD, | |
456 | .dev_id = AM29F017D, | |
457 | .name = "AMD AM29F017D", | |
5d3cce3b DW |
458 | .devtypes = CFI_DEVICETYPE_X8, |
459 | .uaddr = MTD_UADDR_DONT_CARE, | |
460 | .dev_size = SIZE_2MiB, | |
461 | .cmd_set = P_ID_AMD_STD, | |
462 | .nr_regions = 1, | |
1da177e4 LT |
463 | .regions = { |
464 | ERASEINFO(0x10000,32), | |
465 | } | |
466 | }, { | |
467 | .mfr_id = MANUFACTURER_AMD, | |
468 | .dev_id = AM29F016D, | |
469 | .name = "AMD AM29F016D", | |
5d3cce3b DW |
470 | .devtypes = CFI_DEVICETYPE_X8, |
471 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
472 | .dev_size = SIZE_2MiB, | |
473 | .cmd_set = P_ID_AMD_STD, | |
474 | .nr_regions = 1, | |
1da177e4 LT |
475 | .regions = { |
476 | ERASEINFO(0x10000,32), | |
477 | } | |
478 | }, { | |
479 | .mfr_id = MANUFACTURER_AMD, | |
480 | .dev_id = AM29F080, | |
481 | .name = "AMD AM29F080", | |
5d3cce3b DW |
482 | .devtypes = CFI_DEVICETYPE_X8, |
483 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
484 | .dev_size = SIZE_1MiB, | |
485 | .cmd_set = P_ID_AMD_STD, | |
486 | .nr_regions = 1, | |
1da177e4 LT |
487 | .regions = { |
488 | ERASEINFO(0x10000,16), | |
489 | } | |
490 | }, { | |
491 | .mfr_id = MANUFACTURER_AMD, | |
492 | .dev_id = AM29F040, | |
493 | .name = "AMD AM29F040", | |
5d3cce3b DW |
494 | .devtypes = CFI_DEVICETYPE_X8, |
495 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
496 | .dev_size = SIZE_512KiB, | |
497 | .cmd_set = P_ID_AMD_STD, | |
498 | .nr_regions = 1, | |
1da177e4 LT |
499 | .regions = { |
500 | ERASEINFO(0x10000,8), | |
501 | } | |
502 | }, { | |
503 | .mfr_id = MANUFACTURER_AMD, | |
504 | .dev_id = AM29LV040B, | |
505 | .name = "AMD AM29LV040B", | |
5d3cce3b DW |
506 | .devtypes = CFI_DEVICETYPE_X8, |
507 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
508 | .dev_size = SIZE_512KiB, | |
509 | .cmd_set = P_ID_AMD_STD, | |
510 | .nr_regions = 1, | |
1da177e4 LT |
511 | .regions = { |
512 | ERASEINFO(0x10000,8), | |
513 | } | |
514 | }, { | |
515 | .mfr_id = MANUFACTURER_AMD, | |
516 | .dev_id = AM29F002T, | |
517 | .name = "AMD AM29F002T", | |
5d3cce3b DW |
518 | .devtypes = CFI_DEVICETYPE_X8, |
519 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
520 | .dev_size = SIZE_256KiB, | |
521 | .cmd_set = P_ID_AMD_STD, | |
522 | .nr_regions = 4, | |
1da177e4 LT |
523 | .regions = { |
524 | ERASEINFO(0x10000,3), | |
525 | ERASEINFO(0x08000,1), | |
526 | ERASEINFO(0x02000,2), | |
527 | ERASEINFO(0x04000,1), | |
528 | } | |
8fd310a1 MR |
529 | }, { |
530 | .mfr_id = MANUFACTURER_AMD, | |
531 | .dev_id = AM29SL800DT, | |
532 | .name = "AMD AM29SL800DT", | |
533 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
534 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
535 | .dev_size = SIZE_1MiB, | |
536 | .cmd_set = P_ID_AMD_STD, | |
537 | .nr_regions = 4, | |
538 | .regions = { | |
539 | ERASEINFO(0x10000,15), | |
540 | ERASEINFO(0x08000,1), | |
541 | ERASEINFO(0x02000,2), | |
542 | ERASEINFO(0x04000,1), | |
543 | } | |
544 | }, { | |
545 | .mfr_id = MANUFACTURER_AMD, | |
546 | .dev_id = AM29SL800DB, | |
547 | .name = "AMD AM29SL800DB", | |
548 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
549 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
550 | .dev_size = SIZE_1MiB, | |
551 | .cmd_set = P_ID_AMD_STD, | |
552 | .nr_regions = 4, | |
553 | .regions = { | |
554 | ERASEINFO(0x04000,1), | |
555 | ERASEINFO(0x02000,2), | |
556 | ERASEINFO(0x08000,1), | |
557 | ERASEINFO(0x10000,15), | |
558 | } | |
1da177e4 LT |
559 | }, { |
560 | .mfr_id = MANUFACTURER_ATMEL, | |
561 | .dev_id = AT49BV512, | |
562 | .name = "Atmel AT49BV512", | |
5d3cce3b DW |
563 | .devtypes = CFI_DEVICETYPE_X8, |
564 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
565 | .dev_size = SIZE_64KiB, | |
566 | .cmd_set = P_ID_AMD_STD, | |
567 | .nr_regions = 1, | |
1da177e4 LT |
568 | .regions = { |
569 | ERASEINFO(0x10000,1) | |
570 | } | |
571 | }, { | |
572 | .mfr_id = MANUFACTURER_ATMEL, | |
573 | .dev_id = AT29LV512, | |
574 | .name = "Atmel AT29LV512", | |
5d3cce3b DW |
575 | .devtypes = CFI_DEVICETYPE_X8, |
576 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
577 | .dev_size = SIZE_64KiB, | |
578 | .cmd_set = P_ID_AMD_STD, | |
579 | .nr_regions = 1, | |
1da177e4 LT |
580 | .regions = { |
581 | ERASEINFO(0x80,256), | |
582 | ERASEINFO(0x80,256) | |
583 | } | |
584 | }, { | |
585 | .mfr_id = MANUFACTURER_ATMEL, | |
586 | .dev_id = AT49BV16X, | |
587 | .name = "Atmel AT49BV16X", | |
5d3cce3b | 588 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 589 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
590 | .dev_size = SIZE_2MiB, |
591 | .cmd_set = P_ID_AMD_STD, | |
592 | .nr_regions = 2, | |
1da177e4 LT |
593 | .regions = { |
594 | ERASEINFO(0x02000,8), | |
595 | ERASEINFO(0x10000,31) | |
596 | } | |
597 | }, { | |
598 | .mfr_id = MANUFACTURER_ATMEL, | |
599 | .dev_id = AT49BV16XT, | |
600 | .name = "Atmel AT49BV16XT", | |
5d3cce3b | 601 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 602 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
603 | .dev_size = SIZE_2MiB, |
604 | .cmd_set = P_ID_AMD_STD, | |
605 | .nr_regions = 2, | |
1da177e4 LT |
606 | .regions = { |
607 | ERASEINFO(0x10000,31), | |
608 | ERASEINFO(0x02000,8) | |
609 | } | |
610 | }, { | |
611 | .mfr_id = MANUFACTURER_ATMEL, | |
612 | .dev_id = AT49BV32X, | |
613 | .name = "Atmel AT49BV32X", | |
5d3cce3b | 614 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 615 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
616 | .dev_size = SIZE_4MiB, |
617 | .cmd_set = P_ID_AMD_STD, | |
618 | .nr_regions = 2, | |
1da177e4 LT |
619 | .regions = { |
620 | ERASEINFO(0x02000,8), | |
621 | ERASEINFO(0x10000,63) | |
622 | } | |
623 | }, { | |
624 | .mfr_id = MANUFACTURER_ATMEL, | |
625 | .dev_id = AT49BV32XT, | |
626 | .name = "Atmel AT49BV32XT", | |
5d3cce3b | 627 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 628 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
629 | .dev_size = SIZE_4MiB, |
630 | .cmd_set = P_ID_AMD_STD, | |
631 | .nr_regions = 2, | |
1da177e4 LT |
632 | .regions = { |
633 | ERASEINFO(0x10000,63), | |
634 | ERASEINFO(0x02000,8) | |
635 | } | |
636 | }, { | |
637 | .mfr_id = MANUFACTURER_FUJITSU, | |
638 | .dev_id = MBM29F040C, | |
639 | .name = "Fujitsu MBM29F040C", | |
5d3cce3b DW |
640 | .devtypes = CFI_DEVICETYPE_X8, |
641 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
642 | .dev_size = SIZE_512KiB, | |
643 | .cmd_set = P_ID_AMD_STD, | |
644 | .nr_regions = 1, | |
1da177e4 LT |
645 | .regions = { |
646 | ERASEINFO(0x10000,8) | |
647 | } | |
c9856e39 PDM |
648 | }, { |
649 | .mfr_id = MANUFACTURER_FUJITSU, | |
650 | .dev_id = MBM29F800BA, | |
651 | .name = "Fujitsu MBM29F800BA", | |
5d3cce3b DW |
652 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
653 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
654 | .dev_size = SIZE_1MiB, |
655 | .cmd_set = P_ID_AMD_STD, | |
656 | .nr_regions = 4, | |
c9856e39 PDM |
657 | .regions = { |
658 | ERASEINFO(0x04000,1), | |
659 | ERASEINFO(0x02000,2), | |
660 | ERASEINFO(0x08000,1), | |
661 | ERASEINFO(0x10000,15), | |
662 | } | |
1da177e4 LT |
663 | }, { |
664 | .mfr_id = MANUFACTURER_FUJITSU, | |
665 | .dev_id = MBM29LV650UE, | |
666 | .name = "Fujitsu MBM29LV650UE", | |
5d3cce3b DW |
667 | .devtypes = CFI_DEVICETYPE_X8, |
668 | .uaddr = MTD_UADDR_DONT_CARE, | |
669 | .dev_size = SIZE_8MiB, | |
670 | .cmd_set = P_ID_AMD_STD, | |
671 | .nr_regions = 1, | |
1da177e4 LT |
672 | .regions = { |
673 | ERASEINFO(0x10000,128) | |
674 | } | |
675 | }, { | |
676 | .mfr_id = MANUFACTURER_FUJITSU, | |
677 | .dev_id = MBM29LV320TE, | |
678 | .name = "Fujitsu MBM29LV320TE", | |
5d3cce3b DW |
679 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
680 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
681 | .dev_size = SIZE_4MiB, |
682 | .cmd_set = P_ID_AMD_STD, | |
683 | .nr_regions = 2, | |
1da177e4 LT |
684 | .regions = { |
685 | ERASEINFO(0x10000,63), | |
686 | ERASEINFO(0x02000,8) | |
687 | } | |
688 | }, { | |
689 | .mfr_id = MANUFACTURER_FUJITSU, | |
690 | .dev_id = MBM29LV320BE, | |
691 | .name = "Fujitsu MBM29LV320BE", | |
5d3cce3b DW |
692 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
693 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
694 | .dev_size = SIZE_4MiB, |
695 | .cmd_set = P_ID_AMD_STD, | |
696 | .nr_regions = 2, | |
1da177e4 LT |
697 | .regions = { |
698 | ERASEINFO(0x02000,8), | |
699 | ERASEINFO(0x10000,63) | |
700 | } | |
701 | }, { | |
702 | .mfr_id = MANUFACTURER_FUJITSU, | |
703 | .dev_id = MBM29LV160TE, | |
704 | .name = "Fujitsu MBM29LV160TE", | |
5d3cce3b DW |
705 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
706 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
707 | .dev_size = SIZE_2MiB, |
708 | .cmd_set = P_ID_AMD_STD, | |
709 | .nr_regions = 4, | |
1da177e4 LT |
710 | .regions = { |
711 | ERASEINFO(0x10000,31), | |
712 | ERASEINFO(0x08000,1), | |
713 | ERASEINFO(0x02000,2), | |
714 | ERASEINFO(0x04000,1) | |
715 | } | |
716 | }, { | |
717 | .mfr_id = MANUFACTURER_FUJITSU, | |
718 | .dev_id = MBM29LV160BE, | |
719 | .name = "Fujitsu MBM29LV160BE", | |
5d3cce3b DW |
720 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
721 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
722 | .dev_size = SIZE_2MiB, |
723 | .cmd_set = P_ID_AMD_STD, | |
724 | .nr_regions = 4, | |
1da177e4 LT |
725 | .regions = { |
726 | ERASEINFO(0x04000,1), | |
727 | ERASEINFO(0x02000,2), | |
728 | ERASEINFO(0x08000,1), | |
729 | ERASEINFO(0x10000,31) | |
730 | } | |
731 | }, { | |
732 | .mfr_id = MANUFACTURER_FUJITSU, | |
733 | .dev_id = MBM29LV800BA, | |
734 | .name = "Fujitsu MBM29LV800BA", | |
5d3cce3b DW |
735 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
736 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
737 | .dev_size = SIZE_1MiB, |
738 | .cmd_set = P_ID_AMD_STD, | |
739 | .nr_regions = 4, | |
1da177e4 LT |
740 | .regions = { |
741 | ERASEINFO(0x04000,1), | |
742 | ERASEINFO(0x02000,2), | |
743 | ERASEINFO(0x08000,1), | |
744 | ERASEINFO(0x10000,15) | |
745 | } | |
746 | }, { | |
747 | .mfr_id = MANUFACTURER_FUJITSU, | |
748 | .dev_id = MBM29LV800TA, | |
749 | .name = "Fujitsu MBM29LV800TA", | |
5d3cce3b DW |
750 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
751 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
752 | .dev_size = SIZE_1MiB, |
753 | .cmd_set = P_ID_AMD_STD, | |
754 | .nr_regions = 4, | |
1da177e4 LT |
755 | .regions = { |
756 | ERASEINFO(0x10000,15), | |
757 | ERASEINFO(0x08000,1), | |
758 | ERASEINFO(0x02000,2), | |
759 | ERASEINFO(0x04000,1) | |
760 | } | |
761 | }, { | |
762 | .mfr_id = MANUFACTURER_FUJITSU, | |
763 | .dev_id = MBM29LV400BC, | |
764 | .name = "Fujitsu MBM29LV400BC", | |
5d3cce3b DW |
765 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
766 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
767 | .dev_size = SIZE_512KiB, |
768 | .cmd_set = P_ID_AMD_STD, | |
769 | .nr_regions = 4, | |
1da177e4 LT |
770 | .regions = { |
771 | ERASEINFO(0x04000,1), | |
772 | ERASEINFO(0x02000,2), | |
773 | ERASEINFO(0x08000,1), | |
774 | ERASEINFO(0x10000,7) | |
775 | } | |
776 | }, { | |
777 | .mfr_id = MANUFACTURER_FUJITSU, | |
778 | .dev_id = MBM29LV400TC, | |
779 | .name = "Fujitsu MBM29LV400TC", | |
5d3cce3b DW |
780 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
781 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
782 | .dev_size = SIZE_512KiB, |
783 | .cmd_set = P_ID_AMD_STD, | |
784 | .nr_regions = 4, | |
1da177e4 LT |
785 | .regions = { |
786 | ERASEINFO(0x10000,7), | |
787 | ERASEINFO(0x08000,1), | |
788 | ERASEINFO(0x02000,2), | |
789 | ERASEINFO(0x04000,1) | |
790 | } | |
791 | }, { | |
792 | .mfr_id = MANUFACTURER_HYUNDAI, | |
793 | .dev_id = HY29F002T, | |
794 | .name = "Hyundai HY29F002T", | |
5d3cce3b DW |
795 | .devtypes = CFI_DEVICETYPE_X8, |
796 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
797 | .dev_size = SIZE_256KiB, | |
798 | .cmd_set = P_ID_AMD_STD, | |
799 | .nr_regions = 4, | |
1da177e4 LT |
800 | .regions = { |
801 | ERASEINFO(0x10000,3), | |
802 | ERASEINFO(0x08000,1), | |
803 | ERASEINFO(0x02000,2), | |
804 | ERASEINFO(0x04000,1), | |
805 | } | |
806 | }, { | |
807 | .mfr_id = MANUFACTURER_INTEL, | |
808 | .dev_id = I28F004B3B, | |
809 | .name = "Intel 28F004B3B", | |
5d3cce3b DW |
810 | .devtypes = CFI_DEVICETYPE_X8, |
811 | .uaddr = MTD_UADDR_UNNECESSARY, | |
812 | .dev_size = SIZE_512KiB, | |
813 | .cmd_set = P_ID_INTEL_STD, | |
814 | .nr_regions = 2, | |
1da177e4 LT |
815 | .regions = { |
816 | ERASEINFO(0x02000, 8), | |
817 | ERASEINFO(0x10000, 7), | |
818 | } | |
819 | }, { | |
820 | .mfr_id = MANUFACTURER_INTEL, | |
821 | .dev_id = I28F004B3T, | |
822 | .name = "Intel 28F004B3T", | |
5d3cce3b DW |
823 | .devtypes = CFI_DEVICETYPE_X8, |
824 | .uaddr = MTD_UADDR_UNNECESSARY, | |
825 | .dev_size = SIZE_512KiB, | |
826 | .cmd_set = P_ID_INTEL_STD, | |
827 | .nr_regions = 2, | |
1da177e4 LT |
828 | .regions = { |
829 | ERASEINFO(0x10000, 7), | |
830 | ERASEINFO(0x02000, 8), | |
831 | } | |
832 | }, { | |
833 | .mfr_id = MANUFACTURER_INTEL, | |
834 | .dev_id = I28F400B3B, | |
835 | .name = "Intel 28F400B3B", | |
5d3cce3b DW |
836 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
837 | .uaddr = MTD_UADDR_UNNECESSARY, | |
5d3cce3b DW |
838 | .dev_size = SIZE_512KiB, |
839 | .cmd_set = P_ID_INTEL_STD, | |
840 | .nr_regions = 2, | |
1da177e4 LT |
841 | .regions = { |
842 | ERASEINFO(0x02000, 8), | |
843 | ERASEINFO(0x10000, 7), | |
844 | } | |
845 | }, { | |
846 | .mfr_id = MANUFACTURER_INTEL, | |
847 | .dev_id = I28F400B3T, | |
848 | .name = "Intel 28F400B3T", | |
5d3cce3b DW |
849 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
850 | .uaddr = MTD_UADDR_UNNECESSARY, | |
5d3cce3b DW |
851 | .dev_size = SIZE_512KiB, |
852 | .cmd_set = P_ID_INTEL_STD, | |
853 | .nr_regions = 2, | |
1da177e4 LT |
854 | .regions = { |
855 | ERASEINFO(0x10000, 7), | |
856 | ERASEINFO(0x02000, 8), | |
857 | } | |
858 | }, { | |
859 | .mfr_id = MANUFACTURER_INTEL, | |
860 | .dev_id = I28F008B3B, | |
861 | .name = "Intel 28F008B3B", | |
5d3cce3b DW |
862 | .devtypes = CFI_DEVICETYPE_X8, |
863 | .uaddr = MTD_UADDR_UNNECESSARY, | |
864 | .dev_size = SIZE_1MiB, | |
865 | .cmd_set = P_ID_INTEL_STD, | |
866 | .nr_regions = 2, | |
1da177e4 LT |
867 | .regions = { |
868 | ERASEINFO(0x02000, 8), | |
869 | ERASEINFO(0x10000, 15), | |
870 | } | |
871 | }, { | |
872 | .mfr_id = MANUFACTURER_INTEL, | |
873 | .dev_id = I28F008B3T, | |
874 | .name = "Intel 28F008B3T", | |
5d3cce3b DW |
875 | .devtypes = CFI_DEVICETYPE_X8, |
876 | .uaddr = MTD_UADDR_UNNECESSARY, | |
877 | .dev_size = SIZE_1MiB, | |
878 | .cmd_set = P_ID_INTEL_STD, | |
879 | .nr_regions = 2, | |
1da177e4 LT |
880 | .regions = { |
881 | ERASEINFO(0x10000, 15), | |
882 | ERASEINFO(0x02000, 8), | |
883 | } | |
884 | }, { | |
885 | .mfr_id = MANUFACTURER_INTEL, | |
886 | .dev_id = I28F008S5, | |
887 | .name = "Intel 28F008S5", | |
5d3cce3b DW |
888 | .devtypes = CFI_DEVICETYPE_X8, |
889 | .uaddr = MTD_UADDR_UNNECESSARY, | |
890 | .dev_size = SIZE_1MiB, | |
891 | .cmd_set = P_ID_INTEL_EXT, | |
892 | .nr_regions = 1, | |
1da177e4 LT |
893 | .regions = { |
894 | ERASEINFO(0x10000,16), | |
895 | } | |
896 | }, { | |
897 | .mfr_id = MANUFACTURER_INTEL, | |
898 | .dev_id = I28F016S5, | |
899 | .name = "Intel 28F016S5", | |
5d3cce3b DW |
900 | .devtypes = CFI_DEVICETYPE_X8, |
901 | .uaddr = MTD_UADDR_UNNECESSARY, | |
902 | .dev_size = SIZE_2MiB, | |
903 | .cmd_set = P_ID_INTEL_EXT, | |
904 | .nr_regions = 1, | |
1da177e4 LT |
905 | .regions = { |
906 | ERASEINFO(0x10000,32), | |
907 | } | |
908 | }, { | |
909 | .mfr_id = MANUFACTURER_INTEL, | |
910 | .dev_id = I28F008SA, | |
911 | .name = "Intel 28F008SA", | |
5d3cce3b DW |
912 | .devtypes = CFI_DEVICETYPE_X8, |
913 | .uaddr = MTD_UADDR_UNNECESSARY, | |
914 | .dev_size = SIZE_1MiB, | |
915 | .cmd_set = P_ID_INTEL_STD, | |
916 | .nr_regions = 1, | |
1da177e4 LT |
917 | .regions = { |
918 | ERASEINFO(0x10000, 16), | |
919 | } | |
920 | }, { | |
921 | .mfr_id = MANUFACTURER_INTEL, | |
922 | .dev_id = I28F800B3B, | |
923 | .name = "Intel 28F800B3B", | |
5d3cce3b DW |
924 | .devtypes = CFI_DEVICETYPE_X16, |
925 | .uaddr = MTD_UADDR_UNNECESSARY, | |
926 | .dev_size = SIZE_1MiB, | |
927 | .cmd_set = P_ID_INTEL_STD, | |
928 | .nr_regions = 2, | |
1da177e4 LT |
929 | .regions = { |
930 | ERASEINFO(0x02000, 8), | |
931 | ERASEINFO(0x10000, 15), | |
932 | } | |
933 | }, { | |
934 | .mfr_id = MANUFACTURER_INTEL, | |
935 | .dev_id = I28F800B3T, | |
936 | .name = "Intel 28F800B3T", | |
5d3cce3b DW |
937 | .devtypes = CFI_DEVICETYPE_X16, |
938 | .uaddr = MTD_UADDR_UNNECESSARY, | |
939 | .dev_size = SIZE_1MiB, | |
940 | .cmd_set = P_ID_INTEL_STD, | |
941 | .nr_regions = 2, | |
1da177e4 LT |
942 | .regions = { |
943 | ERASEINFO(0x10000, 15), | |
944 | ERASEINFO(0x02000, 8), | |
945 | } | |
946 | }, { | |
947 | .mfr_id = MANUFACTURER_INTEL, | |
948 | .dev_id = I28F016B3B, | |
949 | .name = "Intel 28F016B3B", | |
5d3cce3b DW |
950 | .devtypes = CFI_DEVICETYPE_X8, |
951 | .uaddr = MTD_UADDR_UNNECESSARY, | |
952 | .dev_size = SIZE_2MiB, | |
953 | .cmd_set = P_ID_INTEL_STD, | |
954 | .nr_regions = 2, | |
1da177e4 LT |
955 | .regions = { |
956 | ERASEINFO(0x02000, 8), | |
957 | ERASEINFO(0x10000, 31), | |
958 | } | |
959 | }, { | |
960 | .mfr_id = MANUFACTURER_INTEL, | |
961 | .dev_id = I28F016S3, | |
962 | .name = "Intel I28F016S3", | |
5d3cce3b DW |
963 | .devtypes = CFI_DEVICETYPE_X8, |
964 | .uaddr = MTD_UADDR_UNNECESSARY, | |
965 | .dev_size = SIZE_2MiB, | |
966 | .cmd_set = P_ID_INTEL_STD, | |
967 | .nr_regions = 1, | |
1da177e4 LT |
968 | .regions = { |
969 | ERASEINFO(0x10000, 32), | |
970 | } | |
971 | }, { | |
972 | .mfr_id = MANUFACTURER_INTEL, | |
973 | .dev_id = I28F016B3T, | |
974 | .name = "Intel 28F016B3T", | |
5d3cce3b DW |
975 | .devtypes = CFI_DEVICETYPE_X8, |
976 | .uaddr = MTD_UADDR_UNNECESSARY, | |
977 | .dev_size = SIZE_2MiB, | |
978 | .cmd_set = P_ID_INTEL_STD, | |
979 | .nr_regions = 2, | |
1da177e4 LT |
980 | .regions = { |
981 | ERASEINFO(0x10000, 31), | |
982 | ERASEINFO(0x02000, 8), | |
983 | } | |
984 | }, { | |
985 | .mfr_id = MANUFACTURER_INTEL, | |
986 | .dev_id = I28F160B3B, | |
987 | .name = "Intel 28F160B3B", | |
5d3cce3b DW |
988 | .devtypes = CFI_DEVICETYPE_X16, |
989 | .uaddr = MTD_UADDR_UNNECESSARY, | |
990 | .dev_size = SIZE_2MiB, | |
991 | .cmd_set = P_ID_INTEL_STD, | |
992 | .nr_regions = 2, | |
1da177e4 LT |
993 | .regions = { |
994 | ERASEINFO(0x02000, 8), | |
995 | ERASEINFO(0x10000, 31), | |
996 | } | |
997 | }, { | |
998 | .mfr_id = MANUFACTURER_INTEL, | |
999 | .dev_id = I28F160B3T, | |
1000 | .name = "Intel 28F160B3T", | |
5d3cce3b DW |
1001 | .devtypes = CFI_DEVICETYPE_X16, |
1002 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1003 | .dev_size = SIZE_2MiB, | |
1004 | .cmd_set = P_ID_INTEL_STD, | |
1005 | .nr_regions = 2, | |
1da177e4 LT |
1006 | .regions = { |
1007 | ERASEINFO(0x10000, 31), | |
1008 | ERASEINFO(0x02000, 8), | |
1009 | } | |
1010 | }, { | |
1011 | .mfr_id = MANUFACTURER_INTEL, | |
1012 | .dev_id = I28F320B3B, | |
1013 | .name = "Intel 28F320B3B", | |
5d3cce3b DW |
1014 | .devtypes = CFI_DEVICETYPE_X16, |
1015 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1016 | .dev_size = SIZE_4MiB, | |
1017 | .cmd_set = P_ID_INTEL_STD, | |
1018 | .nr_regions = 2, | |
1da177e4 LT |
1019 | .regions = { |
1020 | ERASEINFO(0x02000, 8), | |
1021 | ERASEINFO(0x10000, 63), | |
1022 | } | |
1023 | }, { | |
1024 | .mfr_id = MANUFACTURER_INTEL, | |
1025 | .dev_id = I28F320B3T, | |
1026 | .name = "Intel 28F320B3T", | |
5d3cce3b DW |
1027 | .devtypes = CFI_DEVICETYPE_X16, |
1028 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1029 | .dev_size = SIZE_4MiB, | |
1030 | .cmd_set = P_ID_INTEL_STD, | |
1031 | .nr_regions = 2, | |
1da177e4 LT |
1032 | .regions = { |
1033 | ERASEINFO(0x10000, 63), | |
1034 | ERASEINFO(0x02000, 8), | |
1035 | } | |
1036 | }, { | |
1037 | .mfr_id = MANUFACTURER_INTEL, | |
1038 | .dev_id = I28F640B3B, | |
1039 | .name = "Intel 28F640B3B", | |
5d3cce3b DW |
1040 | .devtypes = CFI_DEVICETYPE_X16, |
1041 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1042 | .dev_size = SIZE_8MiB, | |
1043 | .cmd_set = P_ID_INTEL_STD, | |
1044 | .nr_regions = 2, | |
1da177e4 LT |
1045 | .regions = { |
1046 | ERASEINFO(0x02000, 8), | |
1047 | ERASEINFO(0x10000, 127), | |
1048 | } | |
1049 | }, { | |
1050 | .mfr_id = MANUFACTURER_INTEL, | |
1051 | .dev_id = I28F640B3T, | |
1052 | .name = "Intel 28F640B3T", | |
5d3cce3b DW |
1053 | .devtypes = CFI_DEVICETYPE_X16, |
1054 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1055 | .dev_size = SIZE_8MiB, | |
1056 | .cmd_set = P_ID_INTEL_STD, | |
1057 | .nr_regions = 2, | |
1da177e4 LT |
1058 | .regions = { |
1059 | ERASEINFO(0x10000, 127), | |
1060 | ERASEINFO(0x02000, 8), | |
1061 | } | |
1062 | }, { | |
1063 | .mfr_id = MANUFACTURER_INTEL, | |
1064 | .dev_id = I82802AB, | |
1065 | .name = "Intel 82802AB", | |
5d3cce3b DW |
1066 | .devtypes = CFI_DEVICETYPE_X8, |
1067 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1068 | .dev_size = SIZE_512KiB, | |
1069 | .cmd_set = P_ID_INTEL_EXT, | |
1070 | .nr_regions = 1, | |
1da177e4 LT |
1071 | .regions = { |
1072 | ERASEINFO(0x10000,8), | |
1073 | } | |
1074 | }, { | |
1075 | .mfr_id = MANUFACTURER_INTEL, | |
1076 | .dev_id = I82802AC, | |
1077 | .name = "Intel 82802AC", | |
5d3cce3b DW |
1078 | .devtypes = CFI_DEVICETYPE_X8, |
1079 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1080 | .dev_size = SIZE_1MiB, | |
1081 | .cmd_set = P_ID_INTEL_EXT, | |
1082 | .nr_regions = 1, | |
1da177e4 LT |
1083 | .regions = { |
1084 | ERASEINFO(0x10000,16), | |
1085 | } | |
1086 | }, { | |
1087 | .mfr_id = MANUFACTURER_MACRONIX, | |
1088 | .dev_id = MX29LV040C, | |
1089 | .name = "Macronix MX29LV040C", | |
5d3cce3b DW |
1090 | .devtypes = CFI_DEVICETYPE_X8, |
1091 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1092 | .dev_size = SIZE_512KiB, | |
1093 | .cmd_set = P_ID_AMD_STD, | |
1094 | .nr_regions = 1, | |
1da177e4 LT |
1095 | .regions = { |
1096 | ERASEINFO(0x10000,8), | |
1097 | } | |
1098 | }, { | |
1099 | .mfr_id = MANUFACTURER_MACRONIX, | |
1100 | .dev_id = MX29LV160T, | |
1101 | .name = "MXIC MX29LV160T", | |
5d3cce3b DW |
1102 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1103 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1104 | .dev_size = SIZE_2MiB, |
1105 | .cmd_set = P_ID_AMD_STD, | |
1106 | .nr_regions = 4, | |
1da177e4 LT |
1107 | .regions = { |
1108 | ERASEINFO(0x10000,31), | |
1109 | ERASEINFO(0x08000,1), | |
1110 | ERASEINFO(0x02000,2), | |
1111 | ERASEINFO(0x04000,1) | |
1112 | } | |
1113 | }, { | |
1114 | .mfr_id = MANUFACTURER_NEC, | |
1115 | .dev_id = UPD29F064115, | |
1116 | .name = "NEC uPD29F064115", | |
5d3cce3b | 1117 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1118 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
5d3cce3b DW |
1119 | .dev_size = SIZE_8MiB, |
1120 | .cmd_set = P_ID_AMD_STD, | |
1121 | .nr_regions = 3, | |
1da177e4 LT |
1122 | .regions = { |
1123 | ERASEINFO(0x2000,8), | |
1124 | ERASEINFO(0x10000,126), | |
1125 | ERASEINFO(0x2000,8), | |
1126 | } | |
1127 | }, { | |
1128 | .mfr_id = MANUFACTURER_MACRONIX, | |
1129 | .dev_id = MX29LV160B, | |
1130 | .name = "MXIC MX29LV160B", | |
5d3cce3b DW |
1131 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1132 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1133 | .dev_size = SIZE_2MiB, |
1134 | .cmd_set = P_ID_AMD_STD, | |
1135 | .nr_regions = 4, | |
1da177e4 LT |
1136 | .regions = { |
1137 | ERASEINFO(0x04000,1), | |
1138 | ERASEINFO(0x02000,2), | |
1139 | ERASEINFO(0x08000,1), | |
1140 | ERASEINFO(0x10000,31) | |
1141 | } | |
1142 | }, { | |
c4e6952f TY |
1143 | .mfr_id = MANUFACTURER_MACRONIX, |
1144 | .dev_id = MX29F040, | |
1145 | .name = "Macronix MX29F040", | |
5d3cce3b DW |
1146 | .devtypes = CFI_DEVICETYPE_X8, |
1147 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1148 | .dev_size = SIZE_512KiB, | |
1149 | .cmd_set = P_ID_AMD_STD, | |
1150 | .nr_regions = 1, | |
c4e6952f TY |
1151 | .regions = { |
1152 | ERASEINFO(0x10000,8), | |
1153 | } | |
35d086b1 | 1154 | }, { |
1da177e4 LT |
1155 | .mfr_id = MANUFACTURER_MACRONIX, |
1156 | .dev_id = MX29F016, | |
1157 | .name = "Macronix MX29F016", | |
5d3cce3b DW |
1158 | .devtypes = CFI_DEVICETYPE_X8, |
1159 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1160 | .dev_size = SIZE_2MiB, | |
1161 | .cmd_set = P_ID_AMD_STD, | |
1162 | .nr_regions = 1, | |
1da177e4 LT |
1163 | .regions = { |
1164 | ERASEINFO(0x10000,32), | |
1165 | } | |
35d086b1 | 1166 | }, { |
1da177e4 LT |
1167 | .mfr_id = MANUFACTURER_MACRONIX, |
1168 | .dev_id = MX29F004T, | |
1169 | .name = "Macronix MX29F004T", | |
5d3cce3b DW |
1170 | .devtypes = CFI_DEVICETYPE_X8, |
1171 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1172 | .dev_size = SIZE_512KiB, | |
1173 | .cmd_set = P_ID_AMD_STD, | |
1174 | .nr_regions = 4, | |
1da177e4 LT |
1175 | .regions = { |
1176 | ERASEINFO(0x10000,7), | |
1177 | ERASEINFO(0x08000,1), | |
1178 | ERASEINFO(0x02000,2), | |
1179 | ERASEINFO(0x04000,1), | |
1180 | } | |
35d086b1 | 1181 | }, { |
1da177e4 LT |
1182 | .mfr_id = MANUFACTURER_MACRONIX, |
1183 | .dev_id = MX29F004B, | |
1184 | .name = "Macronix MX29F004B", | |
5d3cce3b DW |
1185 | .devtypes = CFI_DEVICETYPE_X8, |
1186 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1187 | .dev_size = SIZE_512KiB, | |
1188 | .cmd_set = P_ID_AMD_STD, | |
1189 | .nr_regions = 4, | |
1da177e4 LT |
1190 | .regions = { |
1191 | ERASEINFO(0x04000,1), | |
1192 | ERASEINFO(0x02000,2), | |
1193 | ERASEINFO(0x08000,1), | |
1194 | ERASEINFO(0x10000,7), | |
1195 | } | |
1196 | }, { | |
1197 | .mfr_id = MANUFACTURER_MACRONIX, | |
1198 | .dev_id = MX29F002T, | |
1199 | .name = "Macronix MX29F002T", | |
5d3cce3b DW |
1200 | .devtypes = CFI_DEVICETYPE_X8, |
1201 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1202 | .dev_size = SIZE_256KiB, | |
1203 | .cmd_set = P_ID_AMD_STD, | |
1204 | .nr_regions = 4, | |
1da177e4 LT |
1205 | .regions = { |
1206 | ERASEINFO(0x10000,3), | |
1207 | ERASEINFO(0x08000,1), | |
1208 | ERASEINFO(0x02000,2), | |
1209 | ERASEINFO(0x04000,1), | |
1210 | } | |
1211 | }, { | |
1212 | .mfr_id = MANUFACTURER_PMC, | |
1213 | .dev_id = PM49FL002, | |
1214 | .name = "PMC Pm49FL002", | |
5d3cce3b DW |
1215 | .devtypes = CFI_DEVICETYPE_X8, |
1216 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1217 | .dev_size = SIZE_256KiB, | |
1218 | .cmd_set = P_ID_AMD_STD, | |
1219 | .nr_regions = 1, | |
1da177e4 LT |
1220 | .regions = { |
1221 | ERASEINFO( 0x01000, 64 ) | |
1222 | } | |
1223 | }, { | |
1224 | .mfr_id = MANUFACTURER_PMC, | |
1225 | .dev_id = PM49FL004, | |
1226 | .name = "PMC Pm49FL004", | |
5d3cce3b DW |
1227 | .devtypes = CFI_DEVICETYPE_X8, |
1228 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1229 | .dev_size = SIZE_512KiB, | |
1230 | .cmd_set = P_ID_AMD_STD, | |
1231 | .nr_regions = 1, | |
1da177e4 LT |
1232 | .regions = { |
1233 | ERASEINFO( 0x01000, 128 ) | |
1234 | } | |
1235 | }, { | |
1236 | .mfr_id = MANUFACTURER_PMC, | |
1237 | .dev_id = PM49FL008, | |
1238 | .name = "PMC Pm49FL008", | |
5d3cce3b DW |
1239 | .devtypes = CFI_DEVICETYPE_X8, |
1240 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1241 | .dev_size = SIZE_1MiB, | |
1242 | .cmd_set = P_ID_AMD_STD, | |
1243 | .nr_regions = 1, | |
1da177e4 LT |
1244 | .regions = { |
1245 | ERASEINFO( 0x01000, 256 ) | |
1246 | } | |
a63ec1b7 PM |
1247 | }, { |
1248 | .mfr_id = MANUFACTURER_SHARP, | |
1249 | .dev_id = LH28F640BF, | |
1250 | .name = "LH28F640BF", | |
5d3cce3b DW |
1251 | .devtypes = CFI_DEVICETYPE_X8, |
1252 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1253 | .dev_size = SIZE_4MiB, | |
1254 | .cmd_set = P_ID_INTEL_STD, | |
1255 | .nr_regions = 1, | |
1256 | .regions = { | |
a63ec1b7 PM |
1257 | ERASEINFO(0x40000,16), |
1258 | } | |
35d086b1 | 1259 | }, { |
1da177e4 LT |
1260 | .mfr_id = MANUFACTURER_SST, |
1261 | .dev_id = SST39LF512, | |
1262 | .name = "SST 39LF512", | |
5d3cce3b DW |
1263 | .devtypes = CFI_DEVICETYPE_X8, |
1264 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1265 | .dev_size = SIZE_64KiB, | |
1266 | .cmd_set = P_ID_AMD_STD, | |
1267 | .nr_regions = 1, | |
1da177e4 LT |
1268 | .regions = { |
1269 | ERASEINFO(0x01000,16), | |
1270 | } | |
35d086b1 | 1271 | }, { |
1da177e4 LT |
1272 | .mfr_id = MANUFACTURER_SST, |
1273 | .dev_id = SST39LF010, | |
1274 | .name = "SST 39LF010", | |
5d3cce3b DW |
1275 | .devtypes = CFI_DEVICETYPE_X8, |
1276 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1277 | .dev_size = SIZE_128KiB, | |
1278 | .cmd_set = P_ID_AMD_STD, | |
1279 | .nr_regions = 1, | |
1da177e4 LT |
1280 | .regions = { |
1281 | ERASEINFO(0x01000,32), | |
1282 | } | |
35d086b1 | 1283 | }, { |
1da177e4 LT |
1284 | .mfr_id = MANUFACTURER_SST, |
1285 | .dev_id = SST29EE020, | |
1286 | .name = "SST 29EE020", | |
5d3cce3b DW |
1287 | .devtypes = CFI_DEVICETYPE_X8, |
1288 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1289 | .dev_size = SIZE_256KiB, | |
1290 | .cmd_set = P_ID_SST_PAGE, | |
1291 | .nr_regions = 1, | |
1292 | .regions = {ERASEINFO(0x01000,64), | |
1293 | } | |
1294 | }, { | |
1da177e4 LT |
1295 | .mfr_id = MANUFACTURER_SST, |
1296 | .dev_id = SST29LE020, | |
1297 | .name = "SST 29LE020", | |
5d3cce3b DW |
1298 | .devtypes = CFI_DEVICETYPE_X8, |
1299 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1300 | .dev_size = SIZE_256KiB, | |
1301 | .cmd_set = P_ID_SST_PAGE, | |
1302 | .nr_regions = 1, | |
1303 | .regions = {ERASEINFO(0x01000,64), | |
1304 | } | |
1da177e4 LT |
1305 | }, { |
1306 | .mfr_id = MANUFACTURER_SST, | |
1307 | .dev_id = SST39LF020, | |
1308 | .name = "SST 39LF020", | |
5d3cce3b DW |
1309 | .devtypes = CFI_DEVICETYPE_X8, |
1310 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1311 | .dev_size = SIZE_256KiB, | |
1312 | .cmd_set = P_ID_AMD_STD, | |
1313 | .nr_regions = 1, | |
1da177e4 LT |
1314 | .regions = { |
1315 | ERASEINFO(0x01000,64), | |
1316 | } | |
35d086b1 | 1317 | }, { |
1da177e4 LT |
1318 | .mfr_id = MANUFACTURER_SST, |
1319 | .dev_id = SST39LF040, | |
1320 | .name = "SST 39LF040", | |
5d3cce3b DW |
1321 | .devtypes = CFI_DEVICETYPE_X8, |
1322 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1323 | .dev_size = SIZE_512KiB, | |
1324 | .cmd_set = P_ID_AMD_STD, | |
1325 | .nr_regions = 1, | |
1da177e4 LT |
1326 | .regions = { |
1327 | ERASEINFO(0x01000,128), | |
1328 | } | |
35d086b1 | 1329 | }, { |
1da177e4 LT |
1330 | .mfr_id = MANUFACTURER_SST, |
1331 | .dev_id = SST39SF010A, | |
1332 | .name = "SST 39SF010A", | |
5d3cce3b DW |
1333 | .devtypes = CFI_DEVICETYPE_X8, |
1334 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1335 | .dev_size = SIZE_128KiB, | |
1336 | .cmd_set = P_ID_AMD_STD, | |
1337 | .nr_regions = 1, | |
1da177e4 LT |
1338 | .regions = { |
1339 | ERASEINFO(0x01000,32), | |
1340 | } | |
35d086b1 | 1341 | }, { |
1da177e4 LT |
1342 | .mfr_id = MANUFACTURER_SST, |
1343 | .dev_id = SST39SF020A, | |
1344 | .name = "SST 39SF020A", | |
5d3cce3b DW |
1345 | .devtypes = CFI_DEVICETYPE_X8, |
1346 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1347 | .dev_size = SIZE_256KiB, | |
1348 | .cmd_set = P_ID_AMD_STD, | |
1349 | .nr_regions = 1, | |
1da177e4 LT |
1350 | .regions = { |
1351 | ERASEINFO(0x01000,64), | |
1352 | } | |
1353 | }, { | |
89072ef9 | 1354 | .mfr_id = MANUFACTURER_SST, |
5d3cce3b DW |
1355 | .dev_id = SST49LF040B, |
1356 | .name = "SST 49LF040B", | |
1357 | .devtypes = CFI_DEVICETYPE_X8, | |
1358 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1359 | .dev_size = SIZE_512KiB, | |
1360 | .cmd_set = P_ID_AMD_STD, | |
1361 | .nr_regions = 1, | |
1362 | .regions = { | |
89072ef9 RJ |
1363 | ERASEINFO(0x01000,128), |
1364 | } | |
1365 | }, { | |
1366 | ||
1da177e4 LT |
1367 | .mfr_id = MANUFACTURER_SST, |
1368 | .dev_id = SST49LF004B, | |
1369 | .name = "SST 49LF004B", | |
5d3cce3b DW |
1370 | .devtypes = CFI_DEVICETYPE_X8, |
1371 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1372 | .dev_size = SIZE_512KiB, | |
1373 | .cmd_set = P_ID_AMD_STD, | |
1374 | .nr_regions = 1, | |
1da177e4 LT |
1375 | .regions = { |
1376 | ERASEINFO(0x01000,128), | |
1377 | } | |
1378 | }, { | |
1379 | .mfr_id = MANUFACTURER_SST, | |
1380 | .dev_id = SST49LF008A, | |
1381 | .name = "SST 49LF008A", | |
5d3cce3b DW |
1382 | .devtypes = CFI_DEVICETYPE_X8, |
1383 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1384 | .dev_size = SIZE_1MiB, | |
1385 | .cmd_set = P_ID_AMD_STD, | |
1386 | .nr_regions = 1, | |
1da177e4 LT |
1387 | .regions = { |
1388 | ERASEINFO(0x01000,256), | |
1389 | } | |
1390 | }, { | |
1391 | .mfr_id = MANUFACTURER_SST, | |
1392 | .dev_id = SST49LF030A, | |
1393 | .name = "SST 49LF030A", | |
5d3cce3b DW |
1394 | .devtypes = CFI_DEVICETYPE_X8, |
1395 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1396 | .dev_size = SIZE_512KiB, | |
1397 | .cmd_set = P_ID_AMD_STD, | |
1398 | .nr_regions = 1, | |
1da177e4 LT |
1399 | .regions = { |
1400 | ERASEINFO(0x01000,96), | |
1401 | } | |
1402 | }, { | |
1403 | .mfr_id = MANUFACTURER_SST, | |
1404 | .dev_id = SST49LF040A, | |
1405 | .name = "SST 49LF040A", | |
5d3cce3b DW |
1406 | .devtypes = CFI_DEVICETYPE_X8, |
1407 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1408 | .dev_size = SIZE_512KiB, | |
1409 | .cmd_set = P_ID_AMD_STD, | |
1410 | .nr_regions = 1, | |
1da177e4 LT |
1411 | .regions = { |
1412 | ERASEINFO(0x01000,128), | |
1413 | } | |
1414 | }, { | |
1415 | .mfr_id = MANUFACTURER_SST, | |
1416 | .dev_id = SST49LF080A, | |
1417 | .name = "SST 49LF080A", | |
5d3cce3b DW |
1418 | .devtypes = CFI_DEVICETYPE_X8, |
1419 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1420 | .dev_size = SIZE_1MiB, | |
1421 | .cmd_set = P_ID_AMD_STD, | |
1422 | .nr_regions = 1, | |
1da177e4 LT |
1423 | .regions = { |
1424 | ERASEINFO(0x01000,256), | |
1425 | } | |
1426 | }, { | |
5d3cce3b DW |
1427 | .mfr_id = MANUFACTURER_SST, /* should be CFI */ |
1428 | .dev_id = SST39LF160, | |
1429 | .name = "SST 39LF160", | |
1430 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
cec80bf2 | 1431 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1432 | .dev_size = SIZE_2MiB, |
1433 | .cmd_set = P_ID_AMD_STD, | |
1434 | .nr_regions = 2, | |
1435 | .regions = { | |
1436 | ERASEINFO(0x1000,256), | |
1437 | ERASEINFO(0x1000,256) | |
1438 | } | |
1439 | }, { | |
1440 | .mfr_id = MANUFACTURER_SST, /* should be CFI */ | |
1441 | .dev_id = SST39VF1601, | |
1442 | .name = "SST 39VF1601", | |
1443 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
cec80bf2 | 1444 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1445 | .dev_size = SIZE_2MiB, |
1446 | .cmd_set = P_ID_AMD_STD, | |
1447 | .nr_regions = 2, | |
1448 | .regions = { | |
1449 | ERASEINFO(0x1000,256), | |
1450 | ERASEINFO(0x1000,256) | |
1451 | } | |
1b0a062b AD |
1452 | }, { |
1453 | .mfr_id = MANUFACTURER_SST, | |
1454 | .dev_id = SST36VF3203, | |
1455 | .name = "SST 36VF3203", | |
1456 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
1457 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
1458 | .dev_size = SIZE_4MiB, | |
1459 | .cmd_set = P_ID_AMD_STD, | |
1460 | .nr_regions = 1, | |
1461 | .regions = { | |
1462 | ERASEINFO(0x10000,64), | |
1463 | } | |
c9856e39 PDM |
1464 | }, { |
1465 | .mfr_id = MANUFACTURER_ST, | |
1466 | .dev_id = M29F800AB, | |
1467 | .name = "ST M29F800AB", | |
5d3cce3b DW |
1468 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1469 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1470 | .dev_size = SIZE_1MiB, |
1471 | .cmd_set = P_ID_AMD_STD, | |
1472 | .nr_regions = 4, | |
c9856e39 PDM |
1473 | .regions = { |
1474 | ERASEINFO(0x04000,1), | |
1475 | ERASEINFO(0x02000,2), | |
1476 | ERASEINFO(0x08000,1), | |
1477 | ERASEINFO(0x10000,15), | |
1478 | } | |
35d086b1 | 1479 | }, { |
1da177e4 LT |
1480 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ |
1481 | .dev_id = M29W800DT, | |
1482 | .name = "ST M29W800DT", | |
5d3cce3b | 1483 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1484 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1485 | .dev_size = SIZE_1MiB, |
1486 | .cmd_set = P_ID_AMD_STD, | |
1487 | .nr_regions = 4, | |
1da177e4 LT |
1488 | .regions = { |
1489 | ERASEINFO(0x10000,15), | |
1490 | ERASEINFO(0x08000,1), | |
1491 | ERASEINFO(0x02000,2), | |
1492 | ERASEINFO(0x04000,1) | |
1493 | } | |
1494 | }, { | |
1495 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
1496 | .dev_id = M29W800DB, | |
1497 | .name = "ST M29W800DB", | |
5d3cce3b | 1498 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1499 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1500 | .dev_size = SIZE_1MiB, |
1501 | .cmd_set = P_ID_AMD_STD, | |
1502 | .nr_regions = 4, | |
1da177e4 LT |
1503 | .regions = { |
1504 | ERASEINFO(0x04000,1), | |
1505 | ERASEINFO(0x02000,2), | |
1506 | ERASEINFO(0x08000,1), | |
1507 | ERASEINFO(0x10000,15) | |
1508 | } | |
30d6a24e GF |
1509 | }, { |
1510 | .mfr_id = MANUFACTURER_ST, | |
1511 | .dev_id = M29W400DT, | |
1512 | .name = "ST M29W400DT", | |
1513 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
1514 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
1515 | .dev_size = SIZE_512KiB, | |
1516 | .cmd_set = P_ID_AMD_STD, | |
1517 | .nr_regions = 4, | |
1518 | .regions = { | |
1519 | ERASEINFO(0x04000,7), | |
1520 | ERASEINFO(0x02000,1), | |
1521 | ERASEINFO(0x08000,2), | |
1522 | ERASEINFO(0x10000,1) | |
1523 | } | |
1524 | }, { | |
1525 | .mfr_id = MANUFACTURER_ST, | |
1526 | .dev_id = M29W400DB, | |
1527 | .name = "ST M29W400DB", | |
1528 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
1529 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
1530 | .dev_size = SIZE_512KiB, | |
1531 | .cmd_set = P_ID_AMD_STD, | |
1532 | .nr_regions = 4, | |
1533 | .regions = { | |
1534 | ERASEINFO(0x04000,1), | |
1535 | ERASEINFO(0x02000,2), | |
1536 | ERASEINFO(0x08000,1), | |
1537 | ERASEINFO(0x10000,7) | |
1538 | } | |
1da177e4 LT |
1539 | }, { |
1540 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
1541 | .dev_id = M29W160DT, | |
1542 | .name = "ST M29W160DT", | |
5d3cce3b | 1543 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1544 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
5d3cce3b DW |
1545 | .dev_size = SIZE_2MiB, |
1546 | .cmd_set = P_ID_AMD_STD, | |
1547 | .nr_regions = 4, | |
1da177e4 LT |
1548 | .regions = { |
1549 | ERASEINFO(0x10000,31), | |
1550 | ERASEINFO(0x08000,1), | |
1551 | ERASEINFO(0x02000,2), | |
1552 | ERASEINFO(0x04000,1) | |
1553 | } | |
1554 | }, { | |
1555 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
1556 | .dev_id = M29W160DB, | |
1557 | .name = "ST M29W160DB", | |
5d3cce3b | 1558 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1559 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
5d3cce3b DW |
1560 | .dev_size = SIZE_2MiB, |
1561 | .cmd_set = P_ID_AMD_STD, | |
1562 | .nr_regions = 4, | |
1da177e4 LT |
1563 | .regions = { |
1564 | ERASEINFO(0x04000,1), | |
1565 | ERASEINFO(0x02000,2), | |
1566 | ERASEINFO(0x08000,1), | |
1567 | ERASEINFO(0x10000,31) | |
1568 | } | |
35d086b1 | 1569 | }, { |
1da177e4 LT |
1570 | .mfr_id = MANUFACTURER_ST, |
1571 | .dev_id = M29W040B, | |
1572 | .name = "ST M29W040B", | |
5d3cce3b DW |
1573 | .devtypes = CFI_DEVICETYPE_X8, |
1574 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1575 | .dev_size = SIZE_512KiB, | |
1576 | .cmd_set = P_ID_AMD_STD, | |
1577 | .nr_regions = 1, | |
1da177e4 LT |
1578 | .regions = { |
1579 | ERASEINFO(0x10000,8), | |
1580 | } | |
35d086b1 | 1581 | }, { |
1da177e4 LT |
1582 | .mfr_id = MANUFACTURER_ST, |
1583 | .dev_id = M50FW040, | |
1584 | .name = "ST M50FW040", | |
5d3cce3b DW |
1585 | .devtypes = CFI_DEVICETYPE_X8, |
1586 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1587 | .dev_size = SIZE_512KiB, | |
1588 | .cmd_set = P_ID_INTEL_EXT, | |
1589 | .nr_regions = 1, | |
1da177e4 LT |
1590 | .regions = { |
1591 | ERASEINFO(0x10000,8), | |
1592 | } | |
35d086b1 | 1593 | }, { |
1da177e4 LT |
1594 | .mfr_id = MANUFACTURER_ST, |
1595 | .dev_id = M50FW080, | |
1596 | .name = "ST M50FW080", | |
5d3cce3b DW |
1597 | .devtypes = CFI_DEVICETYPE_X8, |
1598 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1599 | .dev_size = SIZE_1MiB, | |
1600 | .cmd_set = P_ID_INTEL_EXT, | |
1601 | .nr_regions = 1, | |
1da177e4 LT |
1602 | .regions = { |
1603 | ERASEINFO(0x10000,16), | |
1604 | } | |
35d086b1 | 1605 | }, { |
1da177e4 LT |
1606 | .mfr_id = MANUFACTURER_ST, |
1607 | .dev_id = M50FW016, | |
1608 | .name = "ST M50FW016", | |
5d3cce3b DW |
1609 | .devtypes = CFI_DEVICETYPE_X8, |
1610 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1611 | .dev_size = SIZE_2MiB, | |
1612 | .cmd_set = P_ID_INTEL_EXT, | |
1613 | .nr_regions = 1, | |
1da177e4 LT |
1614 | .regions = { |
1615 | ERASEINFO(0x10000,32), | |
1616 | } | |
1617 | }, { | |
1618 | .mfr_id = MANUFACTURER_ST, | |
1619 | .dev_id = M50LPW080, | |
1620 | .name = "ST M50LPW080", | |
5d3cce3b DW |
1621 | .devtypes = CFI_DEVICETYPE_X8, |
1622 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1623 | .dev_size = SIZE_1MiB, | |
1624 | .cmd_set = P_ID_INTEL_EXT, | |
1625 | .nr_regions = 1, | |
1da177e4 LT |
1626 | .regions = { |
1627 | ERASEINFO(0x10000,16), | |
deb1a5f1 NC |
1628 | }, |
1629 | }, { | |
1630 | .mfr_id = MANUFACTURER_ST, | |
1631 | .dev_id = M50FLW080A, | |
1632 | .name = "ST M50FLW080A", | |
1633 | .devtypes = CFI_DEVICETYPE_X8, | |
1634 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1635 | .dev_size = SIZE_1MiB, | |
1636 | .cmd_set = P_ID_INTEL_EXT, | |
1637 | .nr_regions = 4, | |
1638 | .regions = { | |
1639 | ERASEINFO(0x1000,16), | |
1640 | ERASEINFO(0x10000,13), | |
1641 | ERASEINFO(0x1000,16), | |
1642 | ERASEINFO(0x1000,16), | |
1643 | } | |
1644 | }, { | |
1645 | .mfr_id = MANUFACTURER_ST, | |
1646 | .dev_id = M50FLW080B, | |
1647 | .name = "ST M50FLW080B", | |
1648 | .devtypes = CFI_DEVICETYPE_X8, | |
1649 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1650 | .dev_size = SIZE_1MiB, | |
1651 | .cmd_set = P_ID_INTEL_EXT, | |
1652 | .nr_regions = 4, | |
1653 | .regions = { | |
1654 | ERASEINFO(0x1000,16), | |
1655 | ERASEINFO(0x1000,16), | |
1656 | ERASEINFO(0x10000,13), | |
1657 | ERASEINFO(0x1000,16), | |
1da177e4 LT |
1658 | } |
1659 | }, { | |
1660 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1661 | .dev_id = TC58FVT160, | |
1662 | .name = "Toshiba TC58FVT160", | |
5d3cce3b DW |
1663 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1664 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1665 | .dev_size = SIZE_2MiB, |
1666 | .cmd_set = P_ID_AMD_STD, | |
1667 | .nr_regions = 4, | |
1da177e4 LT |
1668 | .regions = { |
1669 | ERASEINFO(0x10000,31), | |
1670 | ERASEINFO(0x08000,1), | |
1671 | ERASEINFO(0x02000,2), | |
1672 | ERASEINFO(0x04000,1) | |
1673 | } | |
1674 | }, { | |
1675 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1676 | .dev_id = TC58FVB160, | |
1677 | .name = "Toshiba TC58FVB160", | |
5d3cce3b DW |
1678 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1679 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1680 | .dev_size = SIZE_2MiB, |
1681 | .cmd_set = P_ID_AMD_STD, | |
1682 | .nr_regions = 4, | |
1da177e4 LT |
1683 | .regions = { |
1684 | ERASEINFO(0x04000,1), | |
1685 | ERASEINFO(0x02000,2), | |
1686 | ERASEINFO(0x08000,1), | |
1687 | ERASEINFO(0x10000,31) | |
1688 | } | |
1689 | }, { | |
1690 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1691 | .dev_id = TC58FVB321, | |
1692 | .name = "Toshiba TC58FVB321", | |
5d3cce3b DW |
1693 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1694 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1695 | .dev_size = SIZE_4MiB, |
1696 | .cmd_set = P_ID_AMD_STD, | |
1697 | .nr_regions = 2, | |
1da177e4 LT |
1698 | .regions = { |
1699 | ERASEINFO(0x02000,8), | |
1700 | ERASEINFO(0x10000,63) | |
1701 | } | |
1702 | }, { | |
1703 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1704 | .dev_id = TC58FVT321, | |
1705 | .name = "Toshiba TC58FVT321", | |
5d3cce3b DW |
1706 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1707 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1708 | .dev_size = SIZE_4MiB, |
1709 | .cmd_set = P_ID_AMD_STD, | |
1710 | .nr_regions = 2, | |
1da177e4 LT |
1711 | .regions = { |
1712 | ERASEINFO(0x10000,63), | |
1713 | ERASEINFO(0x02000,8) | |
1714 | } | |
1715 | }, { | |
1716 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1717 | .dev_id = TC58FVB641, | |
1718 | .name = "Toshiba TC58FVB641", | |
5d3cce3b DW |
1719 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1720 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1721 | .dev_size = SIZE_8MiB, |
1722 | .cmd_set = P_ID_AMD_STD, | |
1723 | .nr_regions = 2, | |
1da177e4 LT |
1724 | .regions = { |
1725 | ERASEINFO(0x02000,8), | |
1726 | ERASEINFO(0x10000,127) | |
1727 | } | |
1728 | }, { | |
1729 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1730 | .dev_id = TC58FVT641, | |
1731 | .name = "Toshiba TC58FVT641", | |
5d3cce3b DW |
1732 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1733 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1734 | .dev_size = SIZE_8MiB, |
1735 | .cmd_set = P_ID_AMD_STD, | |
1736 | .nr_regions = 2, | |
1da177e4 LT |
1737 | .regions = { |
1738 | ERASEINFO(0x10000,127), | |
1739 | ERASEINFO(0x02000,8) | |
1740 | } | |
1741 | }, { | |
1742 | .mfr_id = MANUFACTURER_WINBOND, | |
1743 | .dev_id = W49V002A, | |
1744 | .name = "Winbond W49V002A", | |
5d3cce3b DW |
1745 | .devtypes = CFI_DEVICETYPE_X8, |
1746 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1747 | .dev_size = SIZE_256KiB, | |
1748 | .cmd_set = P_ID_AMD_STD, | |
1749 | .nr_regions = 4, | |
1da177e4 LT |
1750 | .regions = { |
1751 | ERASEINFO(0x10000, 3), | |
1752 | ERASEINFO(0x08000, 1), | |
1753 | ERASEINFO(0x02000, 2), | |
1754 | ERASEINFO(0x04000, 1), | |
1755 | } | |
1756 | } | |
1757 | }; | |
1758 | ||
5d3cce3b | 1759 | static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base, |
1da177e4 LT |
1760 | struct cfi_private *cfi) |
1761 | { | |
1762 | map_word result; | |
1763 | unsigned long mask; | |
5c9c11e1 MR |
1764 | int bank = 0; |
1765 | ||
1766 | /* According to JEDEC "Standard Manufacturer's Identification Code" | |
1767 | * (http://www.jedec.org/download/search/jep106W.pdf) | |
1768 | * several first banks can contain 0x7f instead of actual ID | |
1769 | */ | |
1770 | do { | |
1771 | uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), | |
1772 | cfi_interleave(cfi), | |
1773 | cfi->device_type); | |
1774 | mask = (1 << (cfi->device_type * 8)) - 1; | |
1775 | result = map_read(map, base + ofs); | |
1776 | bank++; | |
1777 | } while ((result.x[0] & mask) == CONTINUATION_CODE); | |
1778 | ||
1da177e4 LT |
1779 | return result.x[0] & mask; |
1780 | } | |
1781 | ||
5d3cce3b | 1782 | static inline u32 jedec_read_id(struct map_info *map, uint32_t base, |
1da177e4 LT |
1783 | struct cfi_private *cfi) |
1784 | { | |
1785 | map_word result; | |
1786 | unsigned long mask; | |
1787 | u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type); | |
1788 | mask = (1 << (cfi->device_type * 8)) -1; | |
1789 | result = map_read(map, base + ofs); | |
1790 | return result.x[0] & mask; | |
1791 | } | |
1792 | ||
53d88553 | 1793 | static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi) |
1da177e4 LT |
1794 | { |
1795 | /* Reset */ | |
1796 | ||
1797 | /* after checking the datasheets for SST, MACRONIX and ATMEL | |
1798 | * (oh and incidentaly the jedec spec - 3.5.3.3) the reset | |
1799 | * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at | |
1800 | * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips | |
1801 | * as they will ignore the writes and dont care what address | |
1802 | * the F0 is written to */ | |
cec80bf2 | 1803 | if (cfi->addr_unlock1) { |
1da177e4 LT |
1804 | DEBUG( MTD_DEBUG_LEVEL3, |
1805 | "reset unlock called %x %x \n", | |
1806 | cfi->addr_unlock1,cfi->addr_unlock2); | |
1807 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
1808 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
1809 | } | |
1810 | ||
1811 | cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
cec80bf2 | 1812 | /* Some misdesigned Intel chips do not respond for 0xF0 for a reset, |
1da177e4 LT |
1813 | * so ensure we're in read mode. Send both the Intel and the AMD command |
1814 | * for this. Intel uses 0xff for this, AMD uses 0xff for NOP, so | |
1815 | * this should be safe. | |
1f948b43 | 1816 | */ |
1da177e4 LT |
1817 | cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); |
1818 | /* FIXME - should have reset delay before continuing */ | |
1819 | } | |
1820 | ||
1821 | ||
1da177e4 LT |
1822 | static int cfi_jedec_setup(struct cfi_private *p_cfi, int index) |
1823 | { | |
1824 | int i,num_erase_regions; | |
5d3cce3b DW |
1825 | uint8_t uaddr; |
1826 | ||
1827 | if (! (jedec_table[index].devtypes & p_cfi->device_type)) { | |
1828 | DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n", | |
1829 | jedec_table[index].name, 4 * (1<<p_cfi->device_type)); | |
1830 | return 0; | |
1831 | } | |
1da177e4 | 1832 | |
5d3cce3b | 1833 | printk(KERN_INFO "Found: %s\n",jedec_table[index].name); |
1da177e4 | 1834 | |
5d3cce3b | 1835 | num_erase_regions = jedec_table[index].nr_regions; |
1f948b43 | 1836 | |
1da177e4 LT |
1837 | p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); |
1838 | if (!p_cfi->cfiq) { | |
1839 | //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name); | |
1840 | return 0; | |
1841 | } | |
1842 | ||
1f948b43 | 1843 | memset(p_cfi->cfiq,0,sizeof(struct cfi_ident)); |
1da177e4 | 1844 | |
5d3cce3b DW |
1845 | p_cfi->cfiq->P_ID = jedec_table[index].cmd_set; |
1846 | p_cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions; | |
1847 | p_cfi->cfiq->DevSize = jedec_table[index].dev_size; | |
1da177e4 LT |
1848 | p_cfi->cfi_mode = CFI_MODE_JEDEC; |
1849 | ||
1850 | for (i=0; i<num_erase_regions; i++){ | |
1851 | p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i]; | |
1852 | } | |
1853 | p_cfi->cmdset_priv = NULL; | |
1854 | ||
1855 | /* This may be redundant for some cases, but it doesn't hurt */ | |
1856 | p_cfi->mfr = jedec_table[index].mfr_id; | |
1857 | p_cfi->id = jedec_table[index].dev_id; | |
1858 | ||
5d3cce3b | 1859 | uaddr = jedec_table[index].uaddr; |
1da177e4 | 1860 | |
cec80bf2 DW |
1861 | /* The table has unlock addresses in _bytes_, and we try not to let |
1862 | our brains explode when we see the datasheets talking about address | |
1863 | lines numbered from A-1 to A18. The CFI table has unlock addresses | |
1864 | in device-words according to the mode the device is connected in */ | |
1865 | p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / p_cfi->device_type; | |
1866 | p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / p_cfi->device_type; | |
1da177e4 LT |
1867 | |
1868 | return 1; /* ok */ | |
1869 | } | |
1870 | ||
1871 | ||
1872 | /* | |
f33686b5 | 1873 | * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing |
1da177e4 LT |
1874 | * the mapped address, unlock addresses, and proper chip ID. This function |
1875 | * attempts to minimize errors. It is doubtfull that this probe will ever | |
1876 | * be perfect - consequently there should be some module parameters that | |
1877 | * could be manually specified to force the chip info. | |
1878 | */ | |
5d3cce3b | 1879 | static inline int jedec_match( uint32_t base, |
1da177e4 LT |
1880 | struct map_info *map, |
1881 | struct cfi_private *cfi, | |
1882 | const struct amd_flash_info *finfo ) | |
1883 | { | |
1884 | int rc = 0; /* failure until all tests pass */ | |
1885 | u32 mfr, id; | |
5d3cce3b | 1886 | uint8_t uaddr; |
1da177e4 LT |
1887 | |
1888 | /* | |
1889 | * The IDs must match. For X16 and X32 devices operating in | |
1890 | * a lower width ( X8 or X16 ), the device ID's are usually just | |
1891 | * the lower byte(s) of the larger device ID for wider mode. If | |
1892 | * a part is found that doesn't fit this assumption (device id for | |
1893 | * smaller width mode is completely unrealated to full-width mode) | |
1894 | * then the jedec_table[] will have to be augmented with the IDs | |
1895 | * for different widths. | |
1896 | */ | |
1897 | switch (cfi->device_type) { | |
1898 | case CFI_DEVICETYPE_X8: | |
5d3cce3b DW |
1899 | mfr = (uint8_t)finfo->mfr_id; |
1900 | id = (uint8_t)finfo->dev_id; | |
011b2a36 BD |
1901 | |
1902 | /* bjd: it seems that if we do this, we can end up | |
1903 | * detecting 16bit flashes as an 8bit device, even though | |
1904 | * there aren't. | |
1905 | */ | |
1906 | if (finfo->dev_id > 0xff) { | |
1907 | DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n", | |
1908 | __func__); | |
1909 | goto match_done; | |
1910 | } | |
1da177e4 LT |
1911 | break; |
1912 | case CFI_DEVICETYPE_X16: | |
5d3cce3b DW |
1913 | mfr = (uint16_t)finfo->mfr_id; |
1914 | id = (uint16_t)finfo->dev_id; | |
1da177e4 LT |
1915 | break; |
1916 | case CFI_DEVICETYPE_X32: | |
5d3cce3b DW |
1917 | mfr = (uint16_t)finfo->mfr_id; |
1918 | id = (uint32_t)finfo->dev_id; | |
1da177e4 LT |
1919 | break; |
1920 | default: | |
1921 | printk(KERN_WARNING | |
1922 | "MTD %s(): Unsupported device type %d\n", | |
1923 | __func__, cfi->device_type); | |
1924 | goto match_done; | |
1925 | } | |
1926 | if ( cfi->mfr != mfr || cfi->id != id ) { | |
1927 | goto match_done; | |
1928 | } | |
1929 | ||
1930 | /* the part size must fit in the memory window */ | |
1931 | DEBUG( MTD_DEBUG_LEVEL3, | |
1932 | "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n", | |
5d3cce3b DW |
1933 | __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) ); |
1934 | if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) { | |
1da177e4 LT |
1935 | DEBUG( MTD_DEBUG_LEVEL3, |
1936 | "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n", | |
1937 | __func__, finfo->mfr_id, finfo->dev_id, | |
5d3cce3b | 1938 | 1 << finfo->dev_size ); |
1da177e4 LT |
1939 | goto match_done; |
1940 | } | |
1941 | ||
5d3cce3b | 1942 | if (! (finfo->devtypes & cfi->device_type)) |
1da177e4 | 1943 | goto match_done; |
5d3cce3b DW |
1944 | |
1945 | uaddr = finfo->uaddr; | |
1da177e4 LT |
1946 | |
1947 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n", | |
1948 | __func__, cfi->addr_unlock1, cfi->addr_unlock2 ); | |
1949 | if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr | |
cec80bf2 DW |
1950 | && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 || |
1951 | unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) { | |
1da177e4 LT |
1952 | DEBUG( MTD_DEBUG_LEVEL3, |
1953 | "MTD %s(): 0x%.4x 0x%.4x did not match\n", | |
1954 | __func__, | |
1955 | unlock_addrs[uaddr].addr1, | |
1956 | unlock_addrs[uaddr].addr2); | |
1957 | goto match_done; | |
1958 | } | |
1959 | ||
1960 | /* | |
1961 | * Make sure the ID's dissappear when the device is taken out of | |
1962 | * ID mode. The only time this should fail when it should succeed | |
1963 | * is when the ID's are written as data to the same | |
1964 | * addresses. For this rare and unfortunate case the chip | |
1965 | * cannot be probed correctly. | |
1966 | * FIXME - write a driver that takes all of the chip info as | |
1967 | * module parameters, doesn't probe but forces a load. | |
1968 | */ | |
1969 | DEBUG( MTD_DEBUG_LEVEL3, | |
1970 | "MTD %s(): check ID's disappear when not in ID mode\n", | |
1971 | __func__ ); | |
1972 | jedec_reset( base, map, cfi ); | |
1973 | mfr = jedec_read_mfr( map, base, cfi ); | |
1974 | id = jedec_read_id( map, base, cfi ); | |
1975 | if ( mfr == cfi->mfr && id == cfi->id ) { | |
1976 | DEBUG( MTD_DEBUG_LEVEL3, | |
1977 | "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n" | |
1978 | "You might need to manually specify JEDEC parameters.\n", | |
1979 | __func__, cfi->mfr, cfi->id ); | |
1980 | goto match_done; | |
1981 | } | |
1982 | ||
1983 | /* all tests passed - mark as success */ | |
1984 | rc = 1; | |
1985 | ||
1986 | /* | |
1987 | * Put the device back in ID mode - only need to do this if we | |
1988 | * were truly frobbing a real device. | |
1989 | */ | |
1990 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ ); | |
cec80bf2 | 1991 | if (cfi->addr_unlock1) { |
1da177e4 LT |
1992 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); |
1993 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
1994 | } | |
1995 | cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
1996 | /* FIXME - should have a delay before continuing */ | |
1997 | ||
1f948b43 | 1998 | match_done: |
1da177e4 LT |
1999 | return rc; |
2000 | } | |
2001 | ||
2002 | ||
2003 | static int jedec_probe_chip(struct map_info *map, __u32 base, | |
2004 | unsigned long *chip_map, struct cfi_private *cfi) | |
2005 | { | |
2006 | int i; | |
2007 | enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED; | |
2008 | u32 probe_offset1, probe_offset2; | |
2009 | ||
2010 | retry: | |
2011 | if (!cfi->numchips) { | |
2012 | uaddr_idx++; | |
2013 | ||
2014 | if (MTD_UADDR_UNNECESSARY == uaddr_idx) | |
2015 | return 0; | |
2016 | ||
cec80bf2 DW |
2017 | cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 / cfi->device_type; |
2018 | cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 / cfi->device_type; | |
1da177e4 LT |
2019 | } |
2020 | ||
2021 | /* Make certain we aren't probing past the end of map */ | |
2022 | if (base >= map->size) { | |
2023 | printk(KERN_NOTICE | |
2024 | "Probe at base(0x%08x) past the end of the map(0x%08lx)\n", | |
2025 | base, map->size -1); | |
2026 | return 0; | |
1f948b43 | 2027 | |
1da177e4 LT |
2028 | } |
2029 | /* Ensure the unlock addresses we try stay inside the map */ | |
5d3cce3b | 2030 | probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type); |
f6f0f818 | 2031 | probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, cfi_interleave(cfi), cfi->device_type); |
1da177e4 LT |
2032 | if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) || |
2033 | ((base + probe_offset2 + map_bankwidth(map)) >= map->size)) | |
1da177e4 | 2034 | goto retry; |
1f948b43 | 2035 | |
1da177e4 LT |
2036 | /* Reset */ |
2037 | jedec_reset(base, map, cfi); | |
2038 | ||
2039 | /* Autoselect Mode */ | |
2040 | if(cfi->addr_unlock1) { | |
2041 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
2042 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
2043 | } | |
2044 | cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
2045 | /* FIXME - should have a delay before continuing */ | |
2046 | ||
2047 | if (!cfi->numchips) { | |
1f948b43 | 2048 | /* This is the first time we're called. Set up the CFI |
1da177e4 | 2049 | stuff accordingly and return */ |
1f948b43 | 2050 | |
1da177e4 LT |
2051 | cfi->mfr = jedec_read_mfr(map, base, cfi); |
2052 | cfi->id = jedec_read_id(map, base, cfi); | |
2053 | DEBUG(MTD_DEBUG_LEVEL3, | |
1f948b43 | 2054 | "Search for id:(%02x %02x) interleave(%d) type(%d)\n", |
1da177e4 | 2055 | cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type); |
87d10f3c | 2056 | for (i = 0; i < ARRAY_SIZE(jedec_table); i++) { |
1da177e4 LT |
2057 | if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) { |
2058 | DEBUG( MTD_DEBUG_LEVEL3, | |
2059 | "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n", | |
2060 | __func__, cfi->mfr, cfi->id, | |
2061 | cfi->addr_unlock1, cfi->addr_unlock2 ); | |
2062 | if (!cfi_jedec_setup(cfi, i)) | |
2063 | return 0; | |
2064 | goto ok_out; | |
2065 | } | |
2066 | } | |
2067 | goto retry; | |
2068 | } else { | |
5d3cce3b DW |
2069 | uint16_t mfr; |
2070 | uint16_t id; | |
1da177e4 LT |
2071 | |
2072 | /* Make sure it is a chip of the same manufacturer and id */ | |
2073 | mfr = jedec_read_mfr(map, base, cfi); | |
2074 | id = jedec_read_id(map, base, cfi); | |
2075 | ||
2076 | if ((mfr != cfi->mfr) || (id != cfi->id)) { | |
2077 | printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n", | |
2078 | map->name, mfr, id, base); | |
2079 | jedec_reset(base, map, cfi); | |
2080 | return 0; | |
2081 | } | |
2082 | } | |
1f948b43 | 2083 | |
1da177e4 LT |
2084 | /* Check each previous chip locations to see if it's an alias */ |
2085 | for (i=0; i < (base >> cfi->chipshift); i++) { | |
2086 | unsigned long start; | |
2087 | if(!test_bit(i, chip_map)) { | |
2088 | continue; /* Skip location; no valid chip at this address */ | |
2089 | } | |
2090 | start = i << cfi->chipshift; | |
2091 | if (jedec_read_mfr(map, start, cfi) == cfi->mfr && | |
2092 | jedec_read_id(map, start, cfi) == cfi->id) { | |
2093 | /* Eep. This chip also looks like it's in autoselect mode. | |
2094 | Is it an alias for the new one? */ | |
2095 | jedec_reset(start, map, cfi); | |
2096 | ||
2097 | /* If the device IDs go away, it's an alias */ | |
2098 | if (jedec_read_mfr(map, base, cfi) != cfi->mfr || | |
2099 | jedec_read_id(map, base, cfi) != cfi->id) { | |
2100 | printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", | |
2101 | map->name, base, start); | |
2102 | return 0; | |
2103 | } | |
1f948b43 | 2104 | |
1da177e4 LT |
2105 | /* Yes, it's actually got the device IDs as data. Most |
2106 | * unfortunate. Stick the new chip in read mode | |
2107 | * too and if it's the same, assume it's an alias. */ | |
2108 | /* FIXME: Use other modes to do a proper check */ | |
2109 | jedec_reset(base, map, cfi); | |
2110 | if (jedec_read_mfr(map, base, cfi) == cfi->mfr && | |
2111 | jedec_read_id(map, base, cfi) == cfi->id) { | |
2112 | printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", | |
2113 | map->name, base, start); | |
2114 | return 0; | |
2115 | } | |
2116 | } | |
2117 | } | |
1f948b43 | 2118 | |
1da177e4 LT |
2119 | /* OK, if we got to here, then none of the previous chips appear to |
2120 | be aliases for the current one. */ | |
2121 | set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */ | |
2122 | cfi->numchips++; | |
1f948b43 | 2123 | |
1da177e4 LT |
2124 | ok_out: |
2125 | /* Put it back into Read Mode */ | |
2126 | jedec_reset(base, map, cfi); | |
2127 | ||
2128 | printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", | |
1f948b43 | 2129 | map->name, cfi_interleave(cfi), cfi->device_type*8, base, |
1da177e4 | 2130 | map->bankwidth*8); |
1f948b43 | 2131 | |
1da177e4 LT |
2132 | return 1; |
2133 | } | |
2134 | ||
2135 | static struct chip_probe jedec_chip_probe = { | |
2136 | .name = "JEDEC", | |
2137 | .probe_chip = jedec_probe_chip | |
2138 | }; | |
2139 | ||
2140 | static struct mtd_info *jedec_probe(struct map_info *map) | |
2141 | { | |
2142 | /* | |
2143 | * Just use the generic probe stuff to call our CFI-specific | |
2144 | * chip_probe routine in all the possible permutations, etc. | |
2145 | */ | |
2146 | return mtd_do_chip_probe(map, &jedec_chip_probe); | |
2147 | } | |
2148 | ||
2149 | static struct mtd_chip_driver jedec_chipdrv = { | |
2150 | .probe = jedec_probe, | |
2151 | .name = "jedec_probe", | |
2152 | .module = THIS_MODULE | |
2153 | }; | |
2154 | ||
2155 | static int __init jedec_probe_init(void) | |
2156 | { | |
2157 | register_mtd_chip_driver(&jedec_chipdrv); | |
2158 | return 0; | |
2159 | } | |
2160 | ||
2161 | static void __exit jedec_probe_exit(void) | |
2162 | { | |
2163 | unregister_mtd_chip_driver(&jedec_chipdrv); | |
2164 | } | |
2165 | ||
2166 | module_init(jedec_probe_init); | |
2167 | module_exit(jedec_probe_exit); | |
2168 | ||
2169 | MODULE_LICENSE("GPL"); | |
2170 | MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al."); | |
2171 | MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips"); |