Commit | Line | Data |
---|---|---|
1f948b43 | 1 | /* |
1da177e4 LT |
2 | Common Flash Interface probe code. |
3 | (C) 2000 Red Hat. GPL'd. | |
1da177e4 LT |
4 | See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5) |
5 | for the standard this probe goes back to. | |
6 | ||
7 | Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com | |
8 | */ | |
9 | ||
1da177e4 LT |
10 | #include <linux/module.h> |
11 | #include <linux/init.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <asm/io.h> | |
15 | #include <asm/byteorder.h> | |
16 | #include <linux/errno.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/interrupt.h> | |
1da177e4 LT |
19 | |
20 | #include <linux/mtd/mtd.h> | |
21 | #include <linux/mtd/map.h> | |
22 | #include <linux/mtd/cfi.h> | |
23 | #include <linux/mtd/gen_probe.h> | |
24 | ||
25 | /* Manufacturers */ | |
26 | #define MANUFACTURER_AMD 0x0001 | |
27 | #define MANUFACTURER_ATMEL 0x001f | |
1b0b30ac | 28 | #define MANUFACTURER_EON 0x001c |
1da177e4 LT |
29 | #define MANUFACTURER_FUJITSU 0x0004 |
30 | #define MANUFACTURER_HYUNDAI 0x00AD | |
31 | #define MANUFACTURER_INTEL 0x0089 | |
32 | #define MANUFACTURER_MACRONIX 0x00C2 | |
33 | #define MANUFACTURER_NEC 0x0010 | |
34 | #define MANUFACTURER_PMC 0x009D | |
a63ec1b7 | 35 | #define MANUFACTURER_SHARP 0x00b0 |
1da177e4 LT |
36 | #define MANUFACTURER_SST 0x00BF |
37 | #define MANUFACTURER_ST 0x0020 | |
38 | #define MANUFACTURER_TOSHIBA 0x0098 | |
39 | #define MANUFACTURER_WINBOND 0x00da | |
5c9c11e1 | 40 | #define CONTINUATION_CODE 0x007f |
1da177e4 LT |
41 | |
42 | ||
43 | /* AMD */ | |
44 | #define AM29DL800BB 0x22C8 | |
45 | #define AM29DL800BT 0x224A | |
46 | ||
47 | #define AM29F800BB 0x2258 | |
48 | #define AM29F800BT 0x22D6 | |
49 | #define AM29LV400BB 0x22BA | |
50 | #define AM29LV400BT 0x22B9 | |
51 | #define AM29LV800BB 0x225B | |
52 | #define AM29LV800BT 0x22DA | |
53 | #define AM29LV160DT 0x22C4 | |
54 | #define AM29LV160DB 0x2249 | |
55 | #define AM29F017D 0x003D | |
56 | #define AM29F016D 0x00AD | |
57 | #define AM29F080 0x00D5 | |
58 | #define AM29F040 0x00A4 | |
59 | #define AM29LV040B 0x004F | |
60 | #define AM29F032B 0x0041 | |
61 | #define AM29F002T 0x00B0 | |
8fd310a1 MR |
62 | #define AM29SL800DB 0x226B |
63 | #define AM29SL800DT 0x22EA | |
1da177e4 LT |
64 | |
65 | /* Atmel */ | |
66 | #define AT49BV512 0x0003 | |
67 | #define AT29LV512 0x003d | |
68 | #define AT49BV16X 0x00C0 | |
69 | #define AT49BV16XT 0x00C2 | |
70 | #define AT49BV32X 0x00C8 | |
71 | #define AT49BV32XT 0x00C9 | |
72 | ||
1b0b30ac MR |
73 | /* Eon */ |
74 | #define EN29SL800BB 0x226B | |
75 | #define EN29SL800BT 0x22EA | |
76 | ||
1da177e4 LT |
77 | /* Fujitsu */ |
78 | #define MBM29F040C 0x00A4 | |
c9856e39 | 79 | #define MBM29F800BA 0x2258 |
1da177e4 LT |
80 | #define MBM29LV650UE 0x22D7 |
81 | #define MBM29LV320TE 0x22F6 | |
82 | #define MBM29LV320BE 0x22F9 | |
83 | #define MBM29LV160TE 0x22C4 | |
84 | #define MBM29LV160BE 0x2249 | |
85 | #define MBM29LV800BA 0x225B | |
86 | #define MBM29LV800TA 0x22DA | |
87 | #define MBM29LV400TC 0x22B9 | |
88 | #define MBM29LV400BC 0x22BA | |
89 | ||
90 | /* Hyundai */ | |
91 | #define HY29F002T 0x00B0 | |
92 | ||
93 | /* Intel */ | |
94 | #define I28F004B3T 0x00d4 | |
95 | #define I28F004B3B 0x00d5 | |
96 | #define I28F400B3T 0x8894 | |
97 | #define I28F400B3B 0x8895 | |
98 | #define I28F008S5 0x00a6 | |
99 | #define I28F016S5 0x00a0 | |
100 | #define I28F008SA 0x00a2 | |
101 | #define I28F008B3T 0x00d2 | |
102 | #define I28F008B3B 0x00d3 | |
103 | #define I28F800B3T 0x8892 | |
104 | #define I28F800B3B 0x8893 | |
105 | #define I28F016S3 0x00aa | |
106 | #define I28F016B3T 0x00d0 | |
107 | #define I28F016B3B 0x00d1 | |
108 | #define I28F160B3T 0x8890 | |
109 | #define I28F160B3B 0x8891 | |
110 | #define I28F320B3T 0x8896 | |
111 | #define I28F320B3B 0x8897 | |
112 | #define I28F640B3T 0x8898 | |
113 | #define I28F640B3B 0x8899 | |
114 | #define I82802AB 0x00ad | |
115 | #define I82802AC 0x00ac | |
116 | ||
117 | /* Macronix */ | |
118 | #define MX29LV040C 0x004F | |
119 | #define MX29LV160T 0x22C4 | |
120 | #define MX29LV160B 0x2249 | |
c4e6952f | 121 | #define MX29F040 0x00A4 |
1da177e4 LT |
122 | #define MX29F016 0x00AD |
123 | #define MX29F002T 0x00B0 | |
124 | #define MX29F004T 0x0045 | |
125 | #define MX29F004B 0x0046 | |
126 | ||
127 | /* NEC */ | |
128 | #define UPD29F064115 0x221C | |
129 | ||
130 | /* PMC */ | |
131 | #define PM49FL002 0x006D | |
132 | #define PM49FL004 0x006E | |
133 | #define PM49FL008 0x006A | |
134 | ||
a63ec1b7 PM |
135 | /* Sharp */ |
136 | #define LH28F640BF 0x00b0 | |
137 | ||
1da177e4 | 138 | /* ST - www.st.com */ |
c9856e39 | 139 | #define M29F800AB 0x0058 |
1da177e4 LT |
140 | #define M29W800DT 0x00D7 |
141 | #define M29W800DB 0x005B | |
30d6a24e GF |
142 | #define M29W400DT 0x00EE |
143 | #define M29W400DB 0x00EF | |
1da177e4 LT |
144 | #define M29W160DT 0x22C4 |
145 | #define M29W160DB 0x2249 | |
146 | #define M29W040B 0x00E3 | |
147 | #define M50FW040 0x002C | |
148 | #define M50FW080 0x002D | |
149 | #define M50FW016 0x002E | |
150 | #define M50LPW080 0x002F | |
deb1a5f1 NC |
151 | #define M50FLW080A 0x0080 |
152 | #define M50FLW080B 0x0081 | |
1da177e4 LT |
153 | |
154 | /* SST */ | |
155 | #define SST29EE020 0x0010 | |
156 | #define SST29LE020 0x0012 | |
157 | #define SST29EE512 0x005d | |
158 | #define SST29LE512 0x003d | |
159 | #define SST39LF800 0x2781 | |
160 | #define SST39LF160 0x2782 | |
88ec7c50 | 161 | #define SST39VF1601 0x234b |
1da177e4 LT |
162 | #define SST39LF512 0x00D4 |
163 | #define SST39LF010 0x00D5 | |
164 | #define SST39LF020 0x00D6 | |
165 | #define SST39LF040 0x00D7 | |
166 | #define SST39SF010A 0x00B5 | |
167 | #define SST39SF020A 0x00B6 | |
168 | #define SST49LF004B 0x0060 | |
89072ef9 | 169 | #define SST49LF040B 0x0050 |
1da177e4 LT |
170 | #define SST49LF008A 0x005a |
171 | #define SST49LF030A 0x001C | |
172 | #define SST49LF040A 0x0051 | |
173 | #define SST49LF080A 0x005B | |
1b0a062b | 174 | #define SST36VF3203 0x7354 |
1da177e4 LT |
175 | |
176 | /* Toshiba */ | |
177 | #define TC58FVT160 0x00C2 | |
178 | #define TC58FVB160 0x0043 | |
179 | #define TC58FVT321 0x009A | |
180 | #define TC58FVB321 0x009C | |
181 | #define TC58FVT641 0x0093 | |
182 | #define TC58FVB641 0x0095 | |
183 | ||
184 | /* Winbond */ | |
185 | #define W49V002A 0x00b0 | |
186 | ||
187 | ||
188 | /* | |
189 | * Unlock address sets for AMD command sets. | |
190 | * Intel command sets use the MTD_UADDR_UNNECESSARY. | |
191 | * Each identifier, except MTD_UADDR_UNNECESSARY, and | |
192 | * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[]. | |
193 | * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure | |
194 | * initialization need not require initializing all of the | |
195 | * unlock addresses for all bit widths. | |
196 | */ | |
197 | enum uaddr { | |
198 | MTD_UADDR_NOT_SUPPORTED = 0, /* data width not supported */ | |
199 | MTD_UADDR_0x0555_0x02AA, | |
200 | MTD_UADDR_0x0555_0x0AAA, | |
201 | MTD_UADDR_0x5555_0x2AAA, | |
202 | MTD_UADDR_0x0AAA_0x0555, | |
203 | MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */ | |
204 | MTD_UADDR_UNNECESSARY, /* Does not require any address */ | |
205 | }; | |
206 | ||
207 | ||
208 | struct unlock_addr { | |
5d3cce3b DW |
209 | uint32_t addr1; |
210 | uint32_t addr2; | |
1da177e4 LT |
211 | }; |
212 | ||
213 | ||
214 | /* | |
215 | * I don't like the fact that the first entry in unlock_addrs[] | |
216 | * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore, | |
217 | * should not be used. The problem is that structures with | |
218 | * initializers have extra fields initialized to 0. It is _very_ | |
219 | * desireable to have the unlock address entries for unsupported | |
220 | * data widths automatically initialized - that means that | |
221 | * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here | |
222 | * must go unused. | |
223 | */ | |
224 | static const struct unlock_addr unlock_addrs[] = { | |
225 | [MTD_UADDR_NOT_SUPPORTED] = { | |
226 | .addr1 = 0xffff, | |
227 | .addr2 = 0xffff | |
228 | }, | |
229 | ||
230 | [MTD_UADDR_0x0555_0x02AA] = { | |
231 | .addr1 = 0x0555, | |
232 | .addr2 = 0x02aa | |
233 | }, | |
234 | ||
235 | [MTD_UADDR_0x0555_0x0AAA] = { | |
236 | .addr1 = 0x0555, | |
237 | .addr2 = 0x0aaa | |
238 | }, | |
239 | ||
240 | [MTD_UADDR_0x5555_0x2AAA] = { | |
241 | .addr1 = 0x5555, | |
242 | .addr2 = 0x2aaa | |
243 | }, | |
244 | ||
245 | [MTD_UADDR_0x0AAA_0x0555] = { | |
246 | .addr1 = 0x0AAA, | |
247 | .addr2 = 0x0555 | |
248 | }, | |
249 | ||
250 | [MTD_UADDR_DONT_CARE] = { | |
251 | .addr1 = 0x0000, /* Doesn't matter which address */ | |
252 | .addr2 = 0x0000 /* is used - must be last entry */ | |
253 | }, | |
254 | ||
255 | [MTD_UADDR_UNNECESSARY] = { | |
256 | .addr1 = 0x0000, | |
257 | .addr2 = 0x0000 | |
258 | } | |
259 | }; | |
260 | ||
1da177e4 | 261 | struct amd_flash_info { |
1da177e4 | 262 | const char *name; |
5d3cce3b DW |
263 | const uint16_t mfr_id; |
264 | const uint16_t dev_id; | |
265 | const uint8_t dev_size; | |
266 | const uint8_t nr_regions; | |
267 | const uint16_t cmd_set; | |
268 | const uint32_t regions[6]; | |
269 | const uint8_t devtypes; /* Bitmask for x8, x16 etc. */ | |
270 | const uint8_t uaddr; /* unlock addrs for 8, 16, 32, 64 */ | |
1da177e4 LT |
271 | }; |
272 | ||
273 | #define ERASEINFO(size,blocks) (size<<8)|(blocks-1) | |
274 | ||
275 | #define SIZE_64KiB 16 | |
276 | #define SIZE_128KiB 17 | |
277 | #define SIZE_256KiB 18 | |
278 | #define SIZE_512KiB 19 | |
279 | #define SIZE_1MiB 20 | |
280 | #define SIZE_2MiB 21 | |
281 | #define SIZE_4MiB 22 | |
282 | #define SIZE_8MiB 23 | |
283 | ||
284 | ||
285 | /* | |
286 | * Please keep this list ordered by manufacturer! | |
287 | * Fortunately, the list isn't searched often and so a | |
288 | * slow, linear search isn't so bad. | |
289 | */ | |
290 | static const struct amd_flash_info jedec_table[] = { | |
291 | { | |
292 | .mfr_id = MANUFACTURER_AMD, | |
293 | .dev_id = AM29F032B, | |
294 | .name = "AMD AM29F032B", | |
5d3cce3b DW |
295 | .uaddr = MTD_UADDR_0x0555_0x02AA, |
296 | .devtypes = CFI_DEVICETYPE_X8, | |
297 | .dev_size = SIZE_4MiB, | |
298 | .cmd_set = P_ID_AMD_STD, | |
299 | .nr_regions = 1, | |
1da177e4 LT |
300 | .regions = { |
301 | ERASEINFO(0x10000,64) | |
302 | } | |
303 | }, { | |
304 | .mfr_id = MANUFACTURER_AMD, | |
305 | .dev_id = AM29LV160DT, | |
306 | .name = "AMD AM29LV160DT", | |
5d3cce3b DW |
307 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
308 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
309 | .dev_size = SIZE_2MiB, |
310 | .cmd_set = P_ID_AMD_STD, | |
311 | .nr_regions = 4, | |
1da177e4 LT |
312 | .regions = { |
313 | ERASEINFO(0x10000,31), | |
314 | ERASEINFO(0x08000,1), | |
315 | ERASEINFO(0x02000,2), | |
316 | ERASEINFO(0x04000,1) | |
317 | } | |
318 | }, { | |
319 | .mfr_id = MANUFACTURER_AMD, | |
320 | .dev_id = AM29LV160DB, | |
321 | .name = "AMD AM29LV160DB", | |
5d3cce3b DW |
322 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
323 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
324 | .dev_size = SIZE_2MiB, |
325 | .cmd_set = P_ID_AMD_STD, | |
326 | .nr_regions = 4, | |
1da177e4 LT |
327 | .regions = { |
328 | ERASEINFO(0x04000,1), | |
329 | ERASEINFO(0x02000,2), | |
330 | ERASEINFO(0x08000,1), | |
331 | ERASEINFO(0x10000,31) | |
332 | } | |
333 | }, { | |
334 | .mfr_id = MANUFACTURER_AMD, | |
335 | .dev_id = AM29LV400BB, | |
336 | .name = "AMD AM29LV400BB", | |
5d3cce3b DW |
337 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
338 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
339 | .dev_size = SIZE_512KiB, |
340 | .cmd_set = P_ID_AMD_STD, | |
341 | .nr_regions = 4, | |
1da177e4 LT |
342 | .regions = { |
343 | ERASEINFO(0x04000,1), | |
344 | ERASEINFO(0x02000,2), | |
345 | ERASEINFO(0x08000,1), | |
346 | ERASEINFO(0x10000,7) | |
347 | } | |
348 | }, { | |
349 | .mfr_id = MANUFACTURER_AMD, | |
350 | .dev_id = AM29LV400BT, | |
351 | .name = "AMD AM29LV400BT", | |
5d3cce3b DW |
352 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
353 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
354 | .dev_size = SIZE_512KiB, |
355 | .cmd_set = P_ID_AMD_STD, | |
356 | .nr_regions = 4, | |
1da177e4 LT |
357 | .regions = { |
358 | ERASEINFO(0x10000,7), | |
359 | ERASEINFO(0x08000,1), | |
360 | ERASEINFO(0x02000,2), | |
361 | ERASEINFO(0x04000,1) | |
362 | } | |
363 | }, { | |
364 | .mfr_id = MANUFACTURER_AMD, | |
365 | .dev_id = AM29LV800BB, | |
366 | .name = "AMD AM29LV800BB", | |
5d3cce3b DW |
367 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
368 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
369 | .dev_size = SIZE_1MiB, |
370 | .cmd_set = P_ID_AMD_STD, | |
371 | .nr_regions = 4, | |
1da177e4 LT |
372 | .regions = { |
373 | ERASEINFO(0x04000,1), | |
374 | ERASEINFO(0x02000,2), | |
375 | ERASEINFO(0x08000,1), | |
376 | ERASEINFO(0x10000,15), | |
377 | } | |
378 | }, { | |
379 | /* add DL */ | |
380 | .mfr_id = MANUFACTURER_AMD, | |
381 | .dev_id = AM29DL800BB, | |
382 | .name = "AMD AM29DL800BB", | |
5d3cce3b DW |
383 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
384 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
385 | .dev_size = SIZE_1MiB, |
386 | .cmd_set = P_ID_AMD_STD, | |
387 | .nr_regions = 6, | |
1da177e4 LT |
388 | .regions = { |
389 | ERASEINFO(0x04000,1), | |
390 | ERASEINFO(0x08000,1), | |
391 | ERASEINFO(0x02000,4), | |
392 | ERASEINFO(0x08000,1), | |
393 | ERASEINFO(0x04000,1), | |
394 | ERASEINFO(0x10000,14) | |
395 | } | |
396 | }, { | |
397 | .mfr_id = MANUFACTURER_AMD, | |
398 | .dev_id = AM29DL800BT, | |
399 | .name = "AMD AM29DL800BT", | |
5d3cce3b DW |
400 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
401 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
402 | .dev_size = SIZE_1MiB, |
403 | .cmd_set = P_ID_AMD_STD, | |
404 | .nr_regions = 6, | |
1da177e4 LT |
405 | .regions = { |
406 | ERASEINFO(0x10000,14), | |
407 | ERASEINFO(0x04000,1), | |
408 | ERASEINFO(0x08000,1), | |
409 | ERASEINFO(0x02000,4), | |
410 | ERASEINFO(0x08000,1), | |
411 | ERASEINFO(0x04000,1) | |
412 | } | |
413 | }, { | |
414 | .mfr_id = MANUFACTURER_AMD, | |
415 | .dev_id = AM29F800BB, | |
416 | .name = "AMD AM29F800BB", | |
5d3cce3b DW |
417 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
418 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
419 | .dev_size = SIZE_1MiB, |
420 | .cmd_set = P_ID_AMD_STD, | |
421 | .nr_regions = 4, | |
1da177e4 LT |
422 | .regions = { |
423 | ERASEINFO(0x04000,1), | |
424 | ERASEINFO(0x02000,2), | |
425 | ERASEINFO(0x08000,1), | |
426 | ERASEINFO(0x10000,15), | |
427 | } | |
428 | }, { | |
429 | .mfr_id = MANUFACTURER_AMD, | |
430 | .dev_id = AM29LV800BT, | |
431 | .name = "AMD AM29LV800BT", | |
5d3cce3b DW |
432 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
433 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
434 | .dev_size = SIZE_1MiB, |
435 | .cmd_set = P_ID_AMD_STD, | |
436 | .nr_regions = 4, | |
1da177e4 LT |
437 | .regions = { |
438 | ERASEINFO(0x10000,15), | |
439 | ERASEINFO(0x08000,1), | |
440 | ERASEINFO(0x02000,2), | |
441 | ERASEINFO(0x04000,1) | |
442 | } | |
443 | }, { | |
444 | .mfr_id = MANUFACTURER_AMD, | |
445 | .dev_id = AM29F800BT, | |
446 | .name = "AMD AM29F800BT", | |
5d3cce3b DW |
447 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
448 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
449 | .dev_size = SIZE_1MiB, |
450 | .cmd_set = P_ID_AMD_STD, | |
451 | .nr_regions = 4, | |
1da177e4 LT |
452 | .regions = { |
453 | ERASEINFO(0x10000,15), | |
454 | ERASEINFO(0x08000,1), | |
455 | ERASEINFO(0x02000,2), | |
456 | ERASEINFO(0x04000,1) | |
457 | } | |
458 | }, { | |
459 | .mfr_id = MANUFACTURER_AMD, | |
460 | .dev_id = AM29F017D, | |
461 | .name = "AMD AM29F017D", | |
5d3cce3b DW |
462 | .devtypes = CFI_DEVICETYPE_X8, |
463 | .uaddr = MTD_UADDR_DONT_CARE, | |
464 | .dev_size = SIZE_2MiB, | |
465 | .cmd_set = P_ID_AMD_STD, | |
466 | .nr_regions = 1, | |
1da177e4 LT |
467 | .regions = { |
468 | ERASEINFO(0x10000,32), | |
469 | } | |
470 | }, { | |
471 | .mfr_id = MANUFACTURER_AMD, | |
472 | .dev_id = AM29F016D, | |
473 | .name = "AMD AM29F016D", | |
5d3cce3b DW |
474 | .devtypes = CFI_DEVICETYPE_X8, |
475 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
476 | .dev_size = SIZE_2MiB, | |
477 | .cmd_set = P_ID_AMD_STD, | |
478 | .nr_regions = 1, | |
1da177e4 LT |
479 | .regions = { |
480 | ERASEINFO(0x10000,32), | |
481 | } | |
482 | }, { | |
483 | .mfr_id = MANUFACTURER_AMD, | |
484 | .dev_id = AM29F080, | |
485 | .name = "AMD AM29F080", | |
5d3cce3b DW |
486 | .devtypes = CFI_DEVICETYPE_X8, |
487 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
488 | .dev_size = SIZE_1MiB, | |
489 | .cmd_set = P_ID_AMD_STD, | |
490 | .nr_regions = 1, | |
1da177e4 LT |
491 | .regions = { |
492 | ERASEINFO(0x10000,16), | |
493 | } | |
494 | }, { | |
495 | .mfr_id = MANUFACTURER_AMD, | |
496 | .dev_id = AM29F040, | |
497 | .name = "AMD AM29F040", | |
5d3cce3b DW |
498 | .devtypes = CFI_DEVICETYPE_X8, |
499 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
500 | .dev_size = SIZE_512KiB, | |
501 | .cmd_set = P_ID_AMD_STD, | |
502 | .nr_regions = 1, | |
1da177e4 LT |
503 | .regions = { |
504 | ERASEINFO(0x10000,8), | |
505 | } | |
506 | }, { | |
507 | .mfr_id = MANUFACTURER_AMD, | |
508 | .dev_id = AM29LV040B, | |
509 | .name = "AMD AM29LV040B", | |
5d3cce3b DW |
510 | .devtypes = CFI_DEVICETYPE_X8, |
511 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
512 | .dev_size = SIZE_512KiB, | |
513 | .cmd_set = P_ID_AMD_STD, | |
514 | .nr_regions = 1, | |
1da177e4 LT |
515 | .regions = { |
516 | ERASEINFO(0x10000,8), | |
517 | } | |
518 | }, { | |
519 | .mfr_id = MANUFACTURER_AMD, | |
520 | .dev_id = AM29F002T, | |
521 | .name = "AMD AM29F002T", | |
5d3cce3b DW |
522 | .devtypes = CFI_DEVICETYPE_X8, |
523 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
524 | .dev_size = SIZE_256KiB, | |
525 | .cmd_set = P_ID_AMD_STD, | |
526 | .nr_regions = 4, | |
1da177e4 LT |
527 | .regions = { |
528 | ERASEINFO(0x10000,3), | |
529 | ERASEINFO(0x08000,1), | |
530 | ERASEINFO(0x02000,2), | |
531 | ERASEINFO(0x04000,1), | |
532 | } | |
8fd310a1 MR |
533 | }, { |
534 | .mfr_id = MANUFACTURER_AMD, | |
535 | .dev_id = AM29SL800DT, | |
536 | .name = "AMD AM29SL800DT", | |
537 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
538 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
539 | .dev_size = SIZE_1MiB, | |
540 | .cmd_set = P_ID_AMD_STD, | |
541 | .nr_regions = 4, | |
542 | .regions = { | |
543 | ERASEINFO(0x10000,15), | |
544 | ERASEINFO(0x08000,1), | |
545 | ERASEINFO(0x02000,2), | |
546 | ERASEINFO(0x04000,1), | |
547 | } | |
548 | }, { | |
549 | .mfr_id = MANUFACTURER_AMD, | |
550 | .dev_id = AM29SL800DB, | |
551 | .name = "AMD AM29SL800DB", | |
552 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
553 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
554 | .dev_size = SIZE_1MiB, | |
555 | .cmd_set = P_ID_AMD_STD, | |
556 | .nr_regions = 4, | |
557 | .regions = { | |
558 | ERASEINFO(0x04000,1), | |
559 | ERASEINFO(0x02000,2), | |
560 | ERASEINFO(0x08000,1), | |
561 | ERASEINFO(0x10000,15), | |
562 | } | |
1da177e4 LT |
563 | }, { |
564 | .mfr_id = MANUFACTURER_ATMEL, | |
565 | .dev_id = AT49BV512, | |
566 | .name = "Atmel AT49BV512", | |
5d3cce3b DW |
567 | .devtypes = CFI_DEVICETYPE_X8, |
568 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
569 | .dev_size = SIZE_64KiB, | |
570 | .cmd_set = P_ID_AMD_STD, | |
571 | .nr_regions = 1, | |
1da177e4 LT |
572 | .regions = { |
573 | ERASEINFO(0x10000,1) | |
574 | } | |
575 | }, { | |
576 | .mfr_id = MANUFACTURER_ATMEL, | |
577 | .dev_id = AT29LV512, | |
578 | .name = "Atmel AT29LV512", | |
5d3cce3b DW |
579 | .devtypes = CFI_DEVICETYPE_X8, |
580 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
581 | .dev_size = SIZE_64KiB, | |
582 | .cmd_set = P_ID_AMD_STD, | |
583 | .nr_regions = 1, | |
1da177e4 LT |
584 | .regions = { |
585 | ERASEINFO(0x80,256), | |
586 | ERASEINFO(0x80,256) | |
587 | } | |
588 | }, { | |
589 | .mfr_id = MANUFACTURER_ATMEL, | |
590 | .dev_id = AT49BV16X, | |
591 | .name = "Atmel AT49BV16X", | |
5d3cce3b | 592 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 593 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
594 | .dev_size = SIZE_2MiB, |
595 | .cmd_set = P_ID_AMD_STD, | |
596 | .nr_regions = 2, | |
1da177e4 LT |
597 | .regions = { |
598 | ERASEINFO(0x02000,8), | |
599 | ERASEINFO(0x10000,31) | |
600 | } | |
601 | }, { | |
602 | .mfr_id = MANUFACTURER_ATMEL, | |
603 | .dev_id = AT49BV16XT, | |
604 | .name = "Atmel AT49BV16XT", | |
5d3cce3b | 605 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 606 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
607 | .dev_size = SIZE_2MiB, |
608 | .cmd_set = P_ID_AMD_STD, | |
609 | .nr_regions = 2, | |
1da177e4 LT |
610 | .regions = { |
611 | ERASEINFO(0x10000,31), | |
612 | ERASEINFO(0x02000,8) | |
613 | } | |
614 | }, { | |
615 | .mfr_id = MANUFACTURER_ATMEL, | |
616 | .dev_id = AT49BV32X, | |
617 | .name = "Atmel AT49BV32X", | |
5d3cce3b | 618 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 619 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
620 | .dev_size = SIZE_4MiB, |
621 | .cmd_set = P_ID_AMD_STD, | |
622 | .nr_regions = 2, | |
1da177e4 LT |
623 | .regions = { |
624 | ERASEINFO(0x02000,8), | |
625 | ERASEINFO(0x10000,63) | |
626 | } | |
627 | }, { | |
628 | .mfr_id = MANUFACTURER_ATMEL, | |
629 | .dev_id = AT49BV32XT, | |
630 | .name = "Atmel AT49BV32XT", | |
5d3cce3b | 631 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 632 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
5d3cce3b DW |
633 | .dev_size = SIZE_4MiB, |
634 | .cmd_set = P_ID_AMD_STD, | |
635 | .nr_regions = 2, | |
1da177e4 LT |
636 | .regions = { |
637 | ERASEINFO(0x10000,63), | |
638 | ERASEINFO(0x02000,8) | |
639 | } | |
1b0b30ac MR |
640 | }, { |
641 | .mfr_id = MANUFACTURER_EON, | |
642 | .dev_id = EN29SL800BT, | |
643 | .name = "Eon EN29SL800BT", | |
644 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
645 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
646 | .dev_size = SIZE_1MiB, | |
647 | .cmd_set = P_ID_AMD_STD, | |
648 | .nr_regions = 4, | |
649 | .regions = { | |
650 | ERASEINFO(0x10000,15), | |
651 | ERASEINFO(0x08000,1), | |
652 | ERASEINFO(0x02000,2), | |
653 | ERASEINFO(0x04000,1), | |
654 | } | |
655 | }, { | |
656 | .mfr_id = MANUFACTURER_EON, | |
657 | .dev_id = EN29SL800BB, | |
658 | .name = "Eon EN29SL800BB", | |
659 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
660 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
661 | .dev_size = SIZE_1MiB, | |
662 | .cmd_set = P_ID_AMD_STD, | |
663 | .nr_regions = 4, | |
664 | .regions = { | |
665 | ERASEINFO(0x04000,1), | |
666 | ERASEINFO(0x02000,2), | |
667 | ERASEINFO(0x08000,1), | |
668 | ERASEINFO(0x10000,15), | |
669 | } | |
1da177e4 LT |
670 | }, { |
671 | .mfr_id = MANUFACTURER_FUJITSU, | |
672 | .dev_id = MBM29F040C, | |
673 | .name = "Fujitsu MBM29F040C", | |
5d3cce3b DW |
674 | .devtypes = CFI_DEVICETYPE_X8, |
675 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
676 | .dev_size = SIZE_512KiB, | |
677 | .cmd_set = P_ID_AMD_STD, | |
678 | .nr_regions = 1, | |
1da177e4 LT |
679 | .regions = { |
680 | ERASEINFO(0x10000,8) | |
681 | } | |
c9856e39 PDM |
682 | }, { |
683 | .mfr_id = MANUFACTURER_FUJITSU, | |
684 | .dev_id = MBM29F800BA, | |
685 | .name = "Fujitsu MBM29F800BA", | |
5d3cce3b DW |
686 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
687 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
688 | .dev_size = SIZE_1MiB, |
689 | .cmd_set = P_ID_AMD_STD, | |
690 | .nr_regions = 4, | |
c9856e39 PDM |
691 | .regions = { |
692 | ERASEINFO(0x04000,1), | |
693 | ERASEINFO(0x02000,2), | |
694 | ERASEINFO(0x08000,1), | |
695 | ERASEINFO(0x10000,15), | |
696 | } | |
1da177e4 LT |
697 | }, { |
698 | .mfr_id = MANUFACTURER_FUJITSU, | |
699 | .dev_id = MBM29LV650UE, | |
700 | .name = "Fujitsu MBM29LV650UE", | |
5d3cce3b DW |
701 | .devtypes = CFI_DEVICETYPE_X8, |
702 | .uaddr = MTD_UADDR_DONT_CARE, | |
703 | .dev_size = SIZE_8MiB, | |
704 | .cmd_set = P_ID_AMD_STD, | |
705 | .nr_regions = 1, | |
1da177e4 LT |
706 | .regions = { |
707 | ERASEINFO(0x10000,128) | |
708 | } | |
709 | }, { | |
710 | .mfr_id = MANUFACTURER_FUJITSU, | |
711 | .dev_id = MBM29LV320TE, | |
712 | .name = "Fujitsu MBM29LV320TE", | |
5d3cce3b DW |
713 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
714 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
715 | .dev_size = SIZE_4MiB, |
716 | .cmd_set = P_ID_AMD_STD, | |
717 | .nr_regions = 2, | |
1da177e4 LT |
718 | .regions = { |
719 | ERASEINFO(0x10000,63), | |
720 | ERASEINFO(0x02000,8) | |
721 | } | |
722 | }, { | |
723 | .mfr_id = MANUFACTURER_FUJITSU, | |
724 | .dev_id = MBM29LV320BE, | |
725 | .name = "Fujitsu MBM29LV320BE", | |
5d3cce3b DW |
726 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
727 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
728 | .dev_size = SIZE_4MiB, |
729 | .cmd_set = P_ID_AMD_STD, | |
730 | .nr_regions = 2, | |
1da177e4 LT |
731 | .regions = { |
732 | ERASEINFO(0x02000,8), | |
733 | ERASEINFO(0x10000,63) | |
734 | } | |
735 | }, { | |
736 | .mfr_id = MANUFACTURER_FUJITSU, | |
737 | .dev_id = MBM29LV160TE, | |
738 | .name = "Fujitsu MBM29LV160TE", | |
5d3cce3b DW |
739 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
740 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
741 | .dev_size = SIZE_2MiB, |
742 | .cmd_set = P_ID_AMD_STD, | |
743 | .nr_regions = 4, | |
1da177e4 LT |
744 | .regions = { |
745 | ERASEINFO(0x10000,31), | |
746 | ERASEINFO(0x08000,1), | |
747 | ERASEINFO(0x02000,2), | |
748 | ERASEINFO(0x04000,1) | |
749 | } | |
750 | }, { | |
751 | .mfr_id = MANUFACTURER_FUJITSU, | |
752 | .dev_id = MBM29LV160BE, | |
753 | .name = "Fujitsu MBM29LV160BE", | |
5d3cce3b DW |
754 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
755 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
756 | .dev_size = SIZE_2MiB, |
757 | .cmd_set = P_ID_AMD_STD, | |
758 | .nr_regions = 4, | |
1da177e4 LT |
759 | .regions = { |
760 | ERASEINFO(0x04000,1), | |
761 | ERASEINFO(0x02000,2), | |
762 | ERASEINFO(0x08000,1), | |
763 | ERASEINFO(0x10000,31) | |
764 | } | |
765 | }, { | |
766 | .mfr_id = MANUFACTURER_FUJITSU, | |
767 | .dev_id = MBM29LV800BA, | |
768 | .name = "Fujitsu MBM29LV800BA", | |
5d3cce3b DW |
769 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
770 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
771 | .dev_size = SIZE_1MiB, |
772 | .cmd_set = P_ID_AMD_STD, | |
773 | .nr_regions = 4, | |
1da177e4 LT |
774 | .regions = { |
775 | ERASEINFO(0x04000,1), | |
776 | ERASEINFO(0x02000,2), | |
777 | ERASEINFO(0x08000,1), | |
778 | ERASEINFO(0x10000,15) | |
779 | } | |
780 | }, { | |
781 | .mfr_id = MANUFACTURER_FUJITSU, | |
782 | .dev_id = MBM29LV800TA, | |
783 | .name = "Fujitsu MBM29LV800TA", | |
5d3cce3b DW |
784 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
785 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
786 | .dev_size = SIZE_1MiB, |
787 | .cmd_set = P_ID_AMD_STD, | |
788 | .nr_regions = 4, | |
1da177e4 LT |
789 | .regions = { |
790 | ERASEINFO(0x10000,15), | |
791 | ERASEINFO(0x08000,1), | |
792 | ERASEINFO(0x02000,2), | |
793 | ERASEINFO(0x04000,1) | |
794 | } | |
795 | }, { | |
796 | .mfr_id = MANUFACTURER_FUJITSU, | |
797 | .dev_id = MBM29LV400BC, | |
798 | .name = "Fujitsu MBM29LV400BC", | |
5d3cce3b DW |
799 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
800 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
801 | .dev_size = SIZE_512KiB, |
802 | .cmd_set = P_ID_AMD_STD, | |
803 | .nr_regions = 4, | |
1da177e4 LT |
804 | .regions = { |
805 | ERASEINFO(0x04000,1), | |
806 | ERASEINFO(0x02000,2), | |
807 | ERASEINFO(0x08000,1), | |
808 | ERASEINFO(0x10000,7) | |
809 | } | |
810 | }, { | |
811 | .mfr_id = MANUFACTURER_FUJITSU, | |
812 | .dev_id = MBM29LV400TC, | |
813 | .name = "Fujitsu MBM29LV400TC", | |
5d3cce3b DW |
814 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
815 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
816 | .dev_size = SIZE_512KiB, |
817 | .cmd_set = P_ID_AMD_STD, | |
818 | .nr_regions = 4, | |
1da177e4 LT |
819 | .regions = { |
820 | ERASEINFO(0x10000,7), | |
821 | ERASEINFO(0x08000,1), | |
822 | ERASEINFO(0x02000,2), | |
823 | ERASEINFO(0x04000,1) | |
824 | } | |
825 | }, { | |
826 | .mfr_id = MANUFACTURER_HYUNDAI, | |
827 | .dev_id = HY29F002T, | |
828 | .name = "Hyundai HY29F002T", | |
5d3cce3b DW |
829 | .devtypes = CFI_DEVICETYPE_X8, |
830 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
831 | .dev_size = SIZE_256KiB, | |
832 | .cmd_set = P_ID_AMD_STD, | |
833 | .nr_regions = 4, | |
1da177e4 LT |
834 | .regions = { |
835 | ERASEINFO(0x10000,3), | |
836 | ERASEINFO(0x08000,1), | |
837 | ERASEINFO(0x02000,2), | |
838 | ERASEINFO(0x04000,1), | |
839 | } | |
840 | }, { | |
841 | .mfr_id = MANUFACTURER_INTEL, | |
842 | .dev_id = I28F004B3B, | |
843 | .name = "Intel 28F004B3B", | |
5d3cce3b DW |
844 | .devtypes = CFI_DEVICETYPE_X8, |
845 | .uaddr = MTD_UADDR_UNNECESSARY, | |
846 | .dev_size = SIZE_512KiB, | |
847 | .cmd_set = P_ID_INTEL_STD, | |
848 | .nr_regions = 2, | |
1da177e4 LT |
849 | .regions = { |
850 | ERASEINFO(0x02000, 8), | |
851 | ERASEINFO(0x10000, 7), | |
852 | } | |
853 | }, { | |
854 | .mfr_id = MANUFACTURER_INTEL, | |
855 | .dev_id = I28F004B3T, | |
856 | .name = "Intel 28F004B3T", | |
5d3cce3b DW |
857 | .devtypes = CFI_DEVICETYPE_X8, |
858 | .uaddr = MTD_UADDR_UNNECESSARY, | |
859 | .dev_size = SIZE_512KiB, | |
860 | .cmd_set = P_ID_INTEL_STD, | |
861 | .nr_regions = 2, | |
1da177e4 LT |
862 | .regions = { |
863 | ERASEINFO(0x10000, 7), | |
864 | ERASEINFO(0x02000, 8), | |
865 | } | |
866 | }, { | |
867 | .mfr_id = MANUFACTURER_INTEL, | |
868 | .dev_id = I28F400B3B, | |
869 | .name = "Intel 28F400B3B", | |
5d3cce3b DW |
870 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
871 | .uaddr = MTD_UADDR_UNNECESSARY, | |
5d3cce3b DW |
872 | .dev_size = SIZE_512KiB, |
873 | .cmd_set = P_ID_INTEL_STD, | |
874 | .nr_regions = 2, | |
1da177e4 LT |
875 | .regions = { |
876 | ERASEINFO(0x02000, 8), | |
877 | ERASEINFO(0x10000, 7), | |
878 | } | |
879 | }, { | |
880 | .mfr_id = MANUFACTURER_INTEL, | |
881 | .dev_id = I28F400B3T, | |
882 | .name = "Intel 28F400B3T", | |
5d3cce3b DW |
883 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
884 | .uaddr = MTD_UADDR_UNNECESSARY, | |
5d3cce3b DW |
885 | .dev_size = SIZE_512KiB, |
886 | .cmd_set = P_ID_INTEL_STD, | |
887 | .nr_regions = 2, | |
1da177e4 LT |
888 | .regions = { |
889 | ERASEINFO(0x10000, 7), | |
890 | ERASEINFO(0x02000, 8), | |
891 | } | |
892 | }, { | |
893 | .mfr_id = MANUFACTURER_INTEL, | |
894 | .dev_id = I28F008B3B, | |
895 | .name = "Intel 28F008B3B", | |
5d3cce3b DW |
896 | .devtypes = CFI_DEVICETYPE_X8, |
897 | .uaddr = MTD_UADDR_UNNECESSARY, | |
898 | .dev_size = SIZE_1MiB, | |
899 | .cmd_set = P_ID_INTEL_STD, | |
900 | .nr_regions = 2, | |
1da177e4 LT |
901 | .regions = { |
902 | ERASEINFO(0x02000, 8), | |
903 | ERASEINFO(0x10000, 15), | |
904 | } | |
905 | }, { | |
906 | .mfr_id = MANUFACTURER_INTEL, | |
907 | .dev_id = I28F008B3T, | |
908 | .name = "Intel 28F008B3T", | |
5d3cce3b DW |
909 | .devtypes = CFI_DEVICETYPE_X8, |
910 | .uaddr = MTD_UADDR_UNNECESSARY, | |
911 | .dev_size = SIZE_1MiB, | |
912 | .cmd_set = P_ID_INTEL_STD, | |
913 | .nr_regions = 2, | |
1da177e4 LT |
914 | .regions = { |
915 | ERASEINFO(0x10000, 15), | |
916 | ERASEINFO(0x02000, 8), | |
917 | } | |
918 | }, { | |
919 | .mfr_id = MANUFACTURER_INTEL, | |
920 | .dev_id = I28F008S5, | |
921 | .name = "Intel 28F008S5", | |
5d3cce3b DW |
922 | .devtypes = CFI_DEVICETYPE_X8, |
923 | .uaddr = MTD_UADDR_UNNECESSARY, | |
924 | .dev_size = SIZE_1MiB, | |
925 | .cmd_set = P_ID_INTEL_EXT, | |
926 | .nr_regions = 1, | |
1da177e4 LT |
927 | .regions = { |
928 | ERASEINFO(0x10000,16), | |
929 | } | |
930 | }, { | |
931 | .mfr_id = MANUFACTURER_INTEL, | |
932 | .dev_id = I28F016S5, | |
933 | .name = "Intel 28F016S5", | |
5d3cce3b DW |
934 | .devtypes = CFI_DEVICETYPE_X8, |
935 | .uaddr = MTD_UADDR_UNNECESSARY, | |
936 | .dev_size = SIZE_2MiB, | |
937 | .cmd_set = P_ID_INTEL_EXT, | |
938 | .nr_regions = 1, | |
1da177e4 LT |
939 | .regions = { |
940 | ERASEINFO(0x10000,32), | |
941 | } | |
942 | }, { | |
943 | .mfr_id = MANUFACTURER_INTEL, | |
944 | .dev_id = I28F008SA, | |
945 | .name = "Intel 28F008SA", | |
5d3cce3b DW |
946 | .devtypes = CFI_DEVICETYPE_X8, |
947 | .uaddr = MTD_UADDR_UNNECESSARY, | |
948 | .dev_size = SIZE_1MiB, | |
949 | .cmd_set = P_ID_INTEL_STD, | |
950 | .nr_regions = 1, | |
1da177e4 LT |
951 | .regions = { |
952 | ERASEINFO(0x10000, 16), | |
953 | } | |
954 | }, { | |
955 | .mfr_id = MANUFACTURER_INTEL, | |
956 | .dev_id = I28F800B3B, | |
957 | .name = "Intel 28F800B3B", | |
5d3cce3b DW |
958 | .devtypes = CFI_DEVICETYPE_X16, |
959 | .uaddr = MTD_UADDR_UNNECESSARY, | |
960 | .dev_size = SIZE_1MiB, | |
961 | .cmd_set = P_ID_INTEL_STD, | |
962 | .nr_regions = 2, | |
1da177e4 LT |
963 | .regions = { |
964 | ERASEINFO(0x02000, 8), | |
965 | ERASEINFO(0x10000, 15), | |
966 | } | |
967 | }, { | |
968 | .mfr_id = MANUFACTURER_INTEL, | |
969 | .dev_id = I28F800B3T, | |
970 | .name = "Intel 28F800B3T", | |
5d3cce3b DW |
971 | .devtypes = CFI_DEVICETYPE_X16, |
972 | .uaddr = MTD_UADDR_UNNECESSARY, | |
973 | .dev_size = SIZE_1MiB, | |
974 | .cmd_set = P_ID_INTEL_STD, | |
975 | .nr_regions = 2, | |
1da177e4 LT |
976 | .regions = { |
977 | ERASEINFO(0x10000, 15), | |
978 | ERASEINFO(0x02000, 8), | |
979 | } | |
980 | }, { | |
981 | .mfr_id = MANUFACTURER_INTEL, | |
982 | .dev_id = I28F016B3B, | |
983 | .name = "Intel 28F016B3B", | |
5d3cce3b DW |
984 | .devtypes = CFI_DEVICETYPE_X8, |
985 | .uaddr = MTD_UADDR_UNNECESSARY, | |
986 | .dev_size = SIZE_2MiB, | |
987 | .cmd_set = P_ID_INTEL_STD, | |
988 | .nr_regions = 2, | |
1da177e4 LT |
989 | .regions = { |
990 | ERASEINFO(0x02000, 8), | |
991 | ERASEINFO(0x10000, 31), | |
992 | } | |
993 | }, { | |
994 | .mfr_id = MANUFACTURER_INTEL, | |
995 | .dev_id = I28F016S3, | |
996 | .name = "Intel I28F016S3", | |
5d3cce3b DW |
997 | .devtypes = CFI_DEVICETYPE_X8, |
998 | .uaddr = MTD_UADDR_UNNECESSARY, | |
999 | .dev_size = SIZE_2MiB, | |
1000 | .cmd_set = P_ID_INTEL_STD, | |
1001 | .nr_regions = 1, | |
1da177e4 LT |
1002 | .regions = { |
1003 | ERASEINFO(0x10000, 32), | |
1004 | } | |
1005 | }, { | |
1006 | .mfr_id = MANUFACTURER_INTEL, | |
1007 | .dev_id = I28F016B3T, | |
1008 | .name = "Intel 28F016B3T", | |
5d3cce3b DW |
1009 | .devtypes = CFI_DEVICETYPE_X8, |
1010 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1011 | .dev_size = SIZE_2MiB, | |
1012 | .cmd_set = P_ID_INTEL_STD, | |
1013 | .nr_regions = 2, | |
1da177e4 LT |
1014 | .regions = { |
1015 | ERASEINFO(0x10000, 31), | |
1016 | ERASEINFO(0x02000, 8), | |
1017 | } | |
1018 | }, { | |
1019 | .mfr_id = MANUFACTURER_INTEL, | |
1020 | .dev_id = I28F160B3B, | |
1021 | .name = "Intel 28F160B3B", | |
5d3cce3b DW |
1022 | .devtypes = CFI_DEVICETYPE_X16, |
1023 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1024 | .dev_size = SIZE_2MiB, | |
1025 | .cmd_set = P_ID_INTEL_STD, | |
1026 | .nr_regions = 2, | |
1da177e4 LT |
1027 | .regions = { |
1028 | ERASEINFO(0x02000, 8), | |
1029 | ERASEINFO(0x10000, 31), | |
1030 | } | |
1031 | }, { | |
1032 | .mfr_id = MANUFACTURER_INTEL, | |
1033 | .dev_id = I28F160B3T, | |
1034 | .name = "Intel 28F160B3T", | |
5d3cce3b DW |
1035 | .devtypes = CFI_DEVICETYPE_X16, |
1036 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1037 | .dev_size = SIZE_2MiB, | |
1038 | .cmd_set = P_ID_INTEL_STD, | |
1039 | .nr_regions = 2, | |
1da177e4 LT |
1040 | .regions = { |
1041 | ERASEINFO(0x10000, 31), | |
1042 | ERASEINFO(0x02000, 8), | |
1043 | } | |
1044 | }, { | |
1045 | .mfr_id = MANUFACTURER_INTEL, | |
1046 | .dev_id = I28F320B3B, | |
1047 | .name = "Intel 28F320B3B", | |
5d3cce3b DW |
1048 | .devtypes = CFI_DEVICETYPE_X16, |
1049 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1050 | .dev_size = SIZE_4MiB, | |
1051 | .cmd_set = P_ID_INTEL_STD, | |
1052 | .nr_regions = 2, | |
1da177e4 LT |
1053 | .regions = { |
1054 | ERASEINFO(0x02000, 8), | |
1055 | ERASEINFO(0x10000, 63), | |
1056 | } | |
1057 | }, { | |
1058 | .mfr_id = MANUFACTURER_INTEL, | |
1059 | .dev_id = I28F320B3T, | |
1060 | .name = "Intel 28F320B3T", | |
5d3cce3b DW |
1061 | .devtypes = CFI_DEVICETYPE_X16, |
1062 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1063 | .dev_size = SIZE_4MiB, | |
1064 | .cmd_set = P_ID_INTEL_STD, | |
1065 | .nr_regions = 2, | |
1da177e4 LT |
1066 | .regions = { |
1067 | ERASEINFO(0x10000, 63), | |
1068 | ERASEINFO(0x02000, 8), | |
1069 | } | |
1070 | }, { | |
1071 | .mfr_id = MANUFACTURER_INTEL, | |
1072 | .dev_id = I28F640B3B, | |
1073 | .name = "Intel 28F640B3B", | |
5d3cce3b DW |
1074 | .devtypes = CFI_DEVICETYPE_X16, |
1075 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1076 | .dev_size = SIZE_8MiB, | |
1077 | .cmd_set = P_ID_INTEL_STD, | |
1078 | .nr_regions = 2, | |
1da177e4 LT |
1079 | .regions = { |
1080 | ERASEINFO(0x02000, 8), | |
1081 | ERASEINFO(0x10000, 127), | |
1082 | } | |
1083 | }, { | |
1084 | .mfr_id = MANUFACTURER_INTEL, | |
1085 | .dev_id = I28F640B3T, | |
1086 | .name = "Intel 28F640B3T", | |
5d3cce3b DW |
1087 | .devtypes = CFI_DEVICETYPE_X16, |
1088 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1089 | .dev_size = SIZE_8MiB, | |
1090 | .cmd_set = P_ID_INTEL_STD, | |
1091 | .nr_regions = 2, | |
1da177e4 LT |
1092 | .regions = { |
1093 | ERASEINFO(0x10000, 127), | |
1094 | ERASEINFO(0x02000, 8), | |
1095 | } | |
1096 | }, { | |
1097 | .mfr_id = MANUFACTURER_INTEL, | |
1098 | .dev_id = I82802AB, | |
1099 | .name = "Intel 82802AB", | |
5d3cce3b DW |
1100 | .devtypes = CFI_DEVICETYPE_X8, |
1101 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1102 | .dev_size = SIZE_512KiB, | |
1103 | .cmd_set = P_ID_INTEL_EXT, | |
1104 | .nr_regions = 1, | |
1da177e4 LT |
1105 | .regions = { |
1106 | ERASEINFO(0x10000,8), | |
1107 | } | |
1108 | }, { | |
1109 | .mfr_id = MANUFACTURER_INTEL, | |
1110 | .dev_id = I82802AC, | |
1111 | .name = "Intel 82802AC", | |
5d3cce3b DW |
1112 | .devtypes = CFI_DEVICETYPE_X8, |
1113 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1114 | .dev_size = SIZE_1MiB, | |
1115 | .cmd_set = P_ID_INTEL_EXT, | |
1116 | .nr_regions = 1, | |
1da177e4 LT |
1117 | .regions = { |
1118 | ERASEINFO(0x10000,16), | |
1119 | } | |
1120 | }, { | |
1121 | .mfr_id = MANUFACTURER_MACRONIX, | |
1122 | .dev_id = MX29LV040C, | |
1123 | .name = "Macronix MX29LV040C", | |
5d3cce3b DW |
1124 | .devtypes = CFI_DEVICETYPE_X8, |
1125 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1126 | .dev_size = SIZE_512KiB, | |
1127 | .cmd_set = P_ID_AMD_STD, | |
1128 | .nr_regions = 1, | |
1da177e4 LT |
1129 | .regions = { |
1130 | ERASEINFO(0x10000,8), | |
1131 | } | |
1132 | }, { | |
1133 | .mfr_id = MANUFACTURER_MACRONIX, | |
1134 | .dev_id = MX29LV160T, | |
1135 | .name = "MXIC MX29LV160T", | |
5d3cce3b DW |
1136 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1137 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1138 | .dev_size = SIZE_2MiB, |
1139 | .cmd_set = P_ID_AMD_STD, | |
1140 | .nr_regions = 4, | |
1da177e4 LT |
1141 | .regions = { |
1142 | ERASEINFO(0x10000,31), | |
1143 | ERASEINFO(0x08000,1), | |
1144 | ERASEINFO(0x02000,2), | |
1145 | ERASEINFO(0x04000,1) | |
1146 | } | |
1147 | }, { | |
1148 | .mfr_id = MANUFACTURER_NEC, | |
1149 | .dev_id = UPD29F064115, | |
1150 | .name = "NEC uPD29F064115", | |
5d3cce3b | 1151 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1152 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
5d3cce3b DW |
1153 | .dev_size = SIZE_8MiB, |
1154 | .cmd_set = P_ID_AMD_STD, | |
1155 | .nr_regions = 3, | |
1da177e4 LT |
1156 | .regions = { |
1157 | ERASEINFO(0x2000,8), | |
1158 | ERASEINFO(0x10000,126), | |
1159 | ERASEINFO(0x2000,8), | |
1160 | } | |
1161 | }, { | |
1162 | .mfr_id = MANUFACTURER_MACRONIX, | |
1163 | .dev_id = MX29LV160B, | |
1164 | .name = "MXIC MX29LV160B", | |
5d3cce3b DW |
1165 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1166 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1167 | .dev_size = SIZE_2MiB, |
1168 | .cmd_set = P_ID_AMD_STD, | |
1169 | .nr_regions = 4, | |
1da177e4 LT |
1170 | .regions = { |
1171 | ERASEINFO(0x04000,1), | |
1172 | ERASEINFO(0x02000,2), | |
1173 | ERASEINFO(0x08000,1), | |
1174 | ERASEINFO(0x10000,31) | |
1175 | } | |
1176 | }, { | |
c4e6952f TY |
1177 | .mfr_id = MANUFACTURER_MACRONIX, |
1178 | .dev_id = MX29F040, | |
1179 | .name = "Macronix MX29F040", | |
5d3cce3b DW |
1180 | .devtypes = CFI_DEVICETYPE_X8, |
1181 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1182 | .dev_size = SIZE_512KiB, | |
1183 | .cmd_set = P_ID_AMD_STD, | |
1184 | .nr_regions = 1, | |
c4e6952f TY |
1185 | .regions = { |
1186 | ERASEINFO(0x10000,8), | |
1187 | } | |
35d086b1 | 1188 | }, { |
1da177e4 LT |
1189 | .mfr_id = MANUFACTURER_MACRONIX, |
1190 | .dev_id = MX29F016, | |
1191 | .name = "Macronix MX29F016", | |
5d3cce3b DW |
1192 | .devtypes = CFI_DEVICETYPE_X8, |
1193 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1194 | .dev_size = SIZE_2MiB, | |
1195 | .cmd_set = P_ID_AMD_STD, | |
1196 | .nr_regions = 1, | |
1da177e4 LT |
1197 | .regions = { |
1198 | ERASEINFO(0x10000,32), | |
1199 | } | |
35d086b1 | 1200 | }, { |
1da177e4 LT |
1201 | .mfr_id = MANUFACTURER_MACRONIX, |
1202 | .dev_id = MX29F004T, | |
1203 | .name = "Macronix MX29F004T", | |
5d3cce3b DW |
1204 | .devtypes = CFI_DEVICETYPE_X8, |
1205 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1206 | .dev_size = SIZE_512KiB, | |
1207 | .cmd_set = P_ID_AMD_STD, | |
1208 | .nr_regions = 4, | |
1da177e4 LT |
1209 | .regions = { |
1210 | ERASEINFO(0x10000,7), | |
1211 | ERASEINFO(0x08000,1), | |
1212 | ERASEINFO(0x02000,2), | |
1213 | ERASEINFO(0x04000,1), | |
1214 | } | |
35d086b1 | 1215 | }, { |
1da177e4 LT |
1216 | .mfr_id = MANUFACTURER_MACRONIX, |
1217 | .dev_id = MX29F004B, | |
1218 | .name = "Macronix MX29F004B", | |
5d3cce3b DW |
1219 | .devtypes = CFI_DEVICETYPE_X8, |
1220 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1221 | .dev_size = SIZE_512KiB, | |
1222 | .cmd_set = P_ID_AMD_STD, | |
1223 | .nr_regions = 4, | |
1da177e4 LT |
1224 | .regions = { |
1225 | ERASEINFO(0x04000,1), | |
1226 | ERASEINFO(0x02000,2), | |
1227 | ERASEINFO(0x08000,1), | |
1228 | ERASEINFO(0x10000,7), | |
1229 | } | |
1230 | }, { | |
1231 | .mfr_id = MANUFACTURER_MACRONIX, | |
1232 | .dev_id = MX29F002T, | |
1233 | .name = "Macronix MX29F002T", | |
5d3cce3b DW |
1234 | .devtypes = CFI_DEVICETYPE_X8, |
1235 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1236 | .dev_size = SIZE_256KiB, | |
1237 | .cmd_set = P_ID_AMD_STD, | |
1238 | .nr_regions = 4, | |
1da177e4 LT |
1239 | .regions = { |
1240 | ERASEINFO(0x10000,3), | |
1241 | ERASEINFO(0x08000,1), | |
1242 | ERASEINFO(0x02000,2), | |
1243 | ERASEINFO(0x04000,1), | |
1244 | } | |
1245 | }, { | |
1246 | .mfr_id = MANUFACTURER_PMC, | |
1247 | .dev_id = PM49FL002, | |
1248 | .name = "PMC Pm49FL002", | |
5d3cce3b DW |
1249 | .devtypes = CFI_DEVICETYPE_X8, |
1250 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1251 | .dev_size = SIZE_256KiB, | |
1252 | .cmd_set = P_ID_AMD_STD, | |
1253 | .nr_regions = 1, | |
1da177e4 LT |
1254 | .regions = { |
1255 | ERASEINFO( 0x01000, 64 ) | |
1256 | } | |
1257 | }, { | |
1258 | .mfr_id = MANUFACTURER_PMC, | |
1259 | .dev_id = PM49FL004, | |
1260 | .name = "PMC Pm49FL004", | |
5d3cce3b DW |
1261 | .devtypes = CFI_DEVICETYPE_X8, |
1262 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1263 | .dev_size = SIZE_512KiB, | |
1264 | .cmd_set = P_ID_AMD_STD, | |
1265 | .nr_regions = 1, | |
1da177e4 LT |
1266 | .regions = { |
1267 | ERASEINFO( 0x01000, 128 ) | |
1268 | } | |
1269 | }, { | |
1270 | .mfr_id = MANUFACTURER_PMC, | |
1271 | .dev_id = PM49FL008, | |
1272 | .name = "PMC Pm49FL008", | |
5d3cce3b DW |
1273 | .devtypes = CFI_DEVICETYPE_X8, |
1274 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1275 | .dev_size = SIZE_1MiB, | |
1276 | .cmd_set = P_ID_AMD_STD, | |
1277 | .nr_regions = 1, | |
1da177e4 LT |
1278 | .regions = { |
1279 | ERASEINFO( 0x01000, 256 ) | |
1280 | } | |
a63ec1b7 PM |
1281 | }, { |
1282 | .mfr_id = MANUFACTURER_SHARP, | |
1283 | .dev_id = LH28F640BF, | |
1284 | .name = "LH28F640BF", | |
5d3cce3b DW |
1285 | .devtypes = CFI_DEVICETYPE_X8, |
1286 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1287 | .dev_size = SIZE_4MiB, | |
1288 | .cmd_set = P_ID_INTEL_STD, | |
1289 | .nr_regions = 1, | |
1290 | .regions = { | |
a63ec1b7 PM |
1291 | ERASEINFO(0x40000,16), |
1292 | } | |
35d086b1 | 1293 | }, { |
1da177e4 LT |
1294 | .mfr_id = MANUFACTURER_SST, |
1295 | .dev_id = SST39LF512, | |
1296 | .name = "SST 39LF512", | |
5d3cce3b DW |
1297 | .devtypes = CFI_DEVICETYPE_X8, |
1298 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1299 | .dev_size = SIZE_64KiB, | |
1300 | .cmd_set = P_ID_AMD_STD, | |
1301 | .nr_regions = 1, | |
1da177e4 LT |
1302 | .regions = { |
1303 | ERASEINFO(0x01000,16), | |
1304 | } | |
35d086b1 | 1305 | }, { |
1da177e4 LT |
1306 | .mfr_id = MANUFACTURER_SST, |
1307 | .dev_id = SST39LF010, | |
1308 | .name = "SST 39LF010", | |
5d3cce3b DW |
1309 | .devtypes = CFI_DEVICETYPE_X8, |
1310 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1311 | .dev_size = SIZE_128KiB, | |
1312 | .cmd_set = P_ID_AMD_STD, | |
1313 | .nr_regions = 1, | |
1da177e4 LT |
1314 | .regions = { |
1315 | ERASEINFO(0x01000,32), | |
1316 | } | |
35d086b1 | 1317 | }, { |
1da177e4 LT |
1318 | .mfr_id = MANUFACTURER_SST, |
1319 | .dev_id = SST29EE020, | |
1320 | .name = "SST 29EE020", | |
5d3cce3b DW |
1321 | .devtypes = CFI_DEVICETYPE_X8, |
1322 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1323 | .dev_size = SIZE_256KiB, | |
1324 | .cmd_set = P_ID_SST_PAGE, | |
1325 | .nr_regions = 1, | |
1326 | .regions = {ERASEINFO(0x01000,64), | |
1327 | } | |
1328 | }, { | |
1da177e4 LT |
1329 | .mfr_id = MANUFACTURER_SST, |
1330 | .dev_id = SST29LE020, | |
1331 | .name = "SST 29LE020", | |
5d3cce3b DW |
1332 | .devtypes = CFI_DEVICETYPE_X8, |
1333 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1334 | .dev_size = SIZE_256KiB, | |
1335 | .cmd_set = P_ID_SST_PAGE, | |
1336 | .nr_regions = 1, | |
1337 | .regions = {ERASEINFO(0x01000,64), | |
1338 | } | |
1da177e4 LT |
1339 | }, { |
1340 | .mfr_id = MANUFACTURER_SST, | |
1341 | .dev_id = SST39LF020, | |
1342 | .name = "SST 39LF020", | |
5d3cce3b DW |
1343 | .devtypes = CFI_DEVICETYPE_X8, |
1344 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1345 | .dev_size = SIZE_256KiB, | |
1346 | .cmd_set = P_ID_AMD_STD, | |
1347 | .nr_regions = 1, | |
1da177e4 LT |
1348 | .regions = { |
1349 | ERASEINFO(0x01000,64), | |
1350 | } | |
35d086b1 | 1351 | }, { |
1da177e4 LT |
1352 | .mfr_id = MANUFACTURER_SST, |
1353 | .dev_id = SST39LF040, | |
1354 | .name = "SST 39LF040", | |
5d3cce3b DW |
1355 | .devtypes = CFI_DEVICETYPE_X8, |
1356 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1357 | .dev_size = SIZE_512KiB, | |
1358 | .cmd_set = P_ID_AMD_STD, | |
1359 | .nr_regions = 1, | |
1da177e4 LT |
1360 | .regions = { |
1361 | ERASEINFO(0x01000,128), | |
1362 | } | |
35d086b1 | 1363 | }, { |
1da177e4 LT |
1364 | .mfr_id = MANUFACTURER_SST, |
1365 | .dev_id = SST39SF010A, | |
1366 | .name = "SST 39SF010A", | |
5d3cce3b DW |
1367 | .devtypes = CFI_DEVICETYPE_X8, |
1368 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1369 | .dev_size = SIZE_128KiB, | |
1370 | .cmd_set = P_ID_AMD_STD, | |
1371 | .nr_regions = 1, | |
1da177e4 LT |
1372 | .regions = { |
1373 | ERASEINFO(0x01000,32), | |
1374 | } | |
35d086b1 | 1375 | }, { |
1da177e4 LT |
1376 | .mfr_id = MANUFACTURER_SST, |
1377 | .dev_id = SST39SF020A, | |
1378 | .name = "SST 39SF020A", | |
5d3cce3b DW |
1379 | .devtypes = CFI_DEVICETYPE_X8, |
1380 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1381 | .dev_size = SIZE_256KiB, | |
1382 | .cmd_set = P_ID_AMD_STD, | |
1383 | .nr_regions = 1, | |
1da177e4 LT |
1384 | .regions = { |
1385 | ERASEINFO(0x01000,64), | |
1386 | } | |
1387 | }, { | |
89072ef9 | 1388 | .mfr_id = MANUFACTURER_SST, |
5d3cce3b DW |
1389 | .dev_id = SST49LF040B, |
1390 | .name = "SST 49LF040B", | |
1391 | .devtypes = CFI_DEVICETYPE_X8, | |
1392 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1393 | .dev_size = SIZE_512KiB, | |
1394 | .cmd_set = P_ID_AMD_STD, | |
1395 | .nr_regions = 1, | |
1396 | .regions = { | |
89072ef9 RJ |
1397 | ERASEINFO(0x01000,128), |
1398 | } | |
1399 | }, { | |
1400 | ||
1da177e4 LT |
1401 | .mfr_id = MANUFACTURER_SST, |
1402 | .dev_id = SST49LF004B, | |
1403 | .name = "SST 49LF004B", | |
5d3cce3b DW |
1404 | .devtypes = CFI_DEVICETYPE_X8, |
1405 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1406 | .dev_size = SIZE_512KiB, | |
1407 | .cmd_set = P_ID_AMD_STD, | |
1408 | .nr_regions = 1, | |
1da177e4 LT |
1409 | .regions = { |
1410 | ERASEINFO(0x01000,128), | |
1411 | } | |
1412 | }, { | |
1413 | .mfr_id = MANUFACTURER_SST, | |
1414 | .dev_id = SST49LF008A, | |
1415 | .name = "SST 49LF008A", | |
5d3cce3b DW |
1416 | .devtypes = CFI_DEVICETYPE_X8, |
1417 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1418 | .dev_size = SIZE_1MiB, | |
1419 | .cmd_set = P_ID_AMD_STD, | |
1420 | .nr_regions = 1, | |
1da177e4 LT |
1421 | .regions = { |
1422 | ERASEINFO(0x01000,256), | |
1423 | } | |
1424 | }, { | |
1425 | .mfr_id = MANUFACTURER_SST, | |
1426 | .dev_id = SST49LF030A, | |
1427 | .name = "SST 49LF030A", | |
5d3cce3b DW |
1428 | .devtypes = CFI_DEVICETYPE_X8, |
1429 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1430 | .dev_size = SIZE_512KiB, | |
1431 | .cmd_set = P_ID_AMD_STD, | |
1432 | .nr_regions = 1, | |
1da177e4 LT |
1433 | .regions = { |
1434 | ERASEINFO(0x01000,96), | |
1435 | } | |
1436 | }, { | |
1437 | .mfr_id = MANUFACTURER_SST, | |
1438 | .dev_id = SST49LF040A, | |
1439 | .name = "SST 49LF040A", | |
5d3cce3b DW |
1440 | .devtypes = CFI_DEVICETYPE_X8, |
1441 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1442 | .dev_size = SIZE_512KiB, | |
1443 | .cmd_set = P_ID_AMD_STD, | |
1444 | .nr_regions = 1, | |
1da177e4 LT |
1445 | .regions = { |
1446 | ERASEINFO(0x01000,128), | |
1447 | } | |
1448 | }, { | |
1449 | .mfr_id = MANUFACTURER_SST, | |
1450 | .dev_id = SST49LF080A, | |
1451 | .name = "SST 49LF080A", | |
5d3cce3b DW |
1452 | .devtypes = CFI_DEVICETYPE_X8, |
1453 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1454 | .dev_size = SIZE_1MiB, | |
1455 | .cmd_set = P_ID_AMD_STD, | |
1456 | .nr_regions = 1, | |
1da177e4 LT |
1457 | .regions = { |
1458 | ERASEINFO(0x01000,256), | |
1459 | } | |
1460 | }, { | |
5d3cce3b DW |
1461 | .mfr_id = MANUFACTURER_SST, /* should be CFI */ |
1462 | .dev_id = SST39LF160, | |
1463 | .name = "SST 39LF160", | |
1464 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
cec80bf2 | 1465 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1466 | .dev_size = SIZE_2MiB, |
1467 | .cmd_set = P_ID_AMD_STD, | |
1468 | .nr_regions = 2, | |
1469 | .regions = { | |
1470 | ERASEINFO(0x1000,256), | |
1471 | ERASEINFO(0x1000,256) | |
1472 | } | |
1473 | }, { | |
1474 | .mfr_id = MANUFACTURER_SST, /* should be CFI */ | |
1475 | .dev_id = SST39VF1601, | |
1476 | .name = "SST 39VF1601", | |
1477 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
cec80bf2 | 1478 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1479 | .dev_size = SIZE_2MiB, |
1480 | .cmd_set = P_ID_AMD_STD, | |
1481 | .nr_regions = 2, | |
1482 | .regions = { | |
1483 | ERASEINFO(0x1000,256), | |
1484 | ERASEINFO(0x1000,256) | |
1485 | } | |
1b0a062b AD |
1486 | }, { |
1487 | .mfr_id = MANUFACTURER_SST, | |
1488 | .dev_id = SST36VF3203, | |
1489 | .name = "SST 36VF3203", | |
1490 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
1491 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
1492 | .dev_size = SIZE_4MiB, | |
1493 | .cmd_set = P_ID_AMD_STD, | |
1494 | .nr_regions = 1, | |
1495 | .regions = { | |
1496 | ERASEINFO(0x10000,64), | |
1497 | } | |
c9856e39 PDM |
1498 | }, { |
1499 | .mfr_id = MANUFACTURER_ST, | |
1500 | .dev_id = M29F800AB, | |
1501 | .name = "ST M29F800AB", | |
5d3cce3b DW |
1502 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1503 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1504 | .dev_size = SIZE_1MiB, |
1505 | .cmd_set = P_ID_AMD_STD, | |
1506 | .nr_regions = 4, | |
c9856e39 PDM |
1507 | .regions = { |
1508 | ERASEINFO(0x04000,1), | |
1509 | ERASEINFO(0x02000,2), | |
1510 | ERASEINFO(0x08000,1), | |
1511 | ERASEINFO(0x10000,15), | |
1512 | } | |
35d086b1 | 1513 | }, { |
1da177e4 LT |
1514 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ |
1515 | .dev_id = M29W800DT, | |
1516 | .name = "ST M29W800DT", | |
5d3cce3b | 1517 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1518 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1519 | .dev_size = SIZE_1MiB, |
1520 | .cmd_set = P_ID_AMD_STD, | |
1521 | .nr_regions = 4, | |
1da177e4 LT |
1522 | .regions = { |
1523 | ERASEINFO(0x10000,15), | |
1524 | ERASEINFO(0x08000,1), | |
1525 | ERASEINFO(0x02000,2), | |
1526 | ERASEINFO(0x04000,1) | |
1527 | } | |
1528 | }, { | |
1529 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
1530 | .dev_id = M29W800DB, | |
1531 | .name = "ST M29W800DB", | |
5d3cce3b | 1532 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1533 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
5d3cce3b DW |
1534 | .dev_size = SIZE_1MiB, |
1535 | .cmd_set = P_ID_AMD_STD, | |
1536 | .nr_regions = 4, | |
1da177e4 LT |
1537 | .regions = { |
1538 | ERASEINFO(0x04000,1), | |
1539 | ERASEINFO(0x02000,2), | |
1540 | ERASEINFO(0x08000,1), | |
1541 | ERASEINFO(0x10000,15) | |
1542 | } | |
30d6a24e GF |
1543 | }, { |
1544 | .mfr_id = MANUFACTURER_ST, | |
1545 | .dev_id = M29W400DT, | |
1546 | .name = "ST M29W400DT", | |
1547 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
1548 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
1549 | .dev_size = SIZE_512KiB, | |
1550 | .cmd_set = P_ID_AMD_STD, | |
1551 | .nr_regions = 4, | |
1552 | .regions = { | |
1553 | ERASEINFO(0x04000,7), | |
1554 | ERASEINFO(0x02000,1), | |
1555 | ERASEINFO(0x08000,2), | |
1556 | ERASEINFO(0x10000,1) | |
1557 | } | |
1558 | }, { | |
1559 | .mfr_id = MANUFACTURER_ST, | |
1560 | .dev_id = M29W400DB, | |
1561 | .name = "ST M29W400DB", | |
1562 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | |
1563 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
1564 | .dev_size = SIZE_512KiB, | |
1565 | .cmd_set = P_ID_AMD_STD, | |
1566 | .nr_regions = 4, | |
1567 | .regions = { | |
1568 | ERASEINFO(0x04000,1), | |
1569 | ERASEINFO(0x02000,2), | |
1570 | ERASEINFO(0x08000,1), | |
1571 | ERASEINFO(0x10000,7) | |
1572 | } | |
1da177e4 LT |
1573 | }, { |
1574 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
1575 | .dev_id = M29W160DT, | |
1576 | .name = "ST M29W160DT", | |
5d3cce3b | 1577 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1578 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
5d3cce3b DW |
1579 | .dev_size = SIZE_2MiB, |
1580 | .cmd_set = P_ID_AMD_STD, | |
1581 | .nr_regions = 4, | |
1da177e4 LT |
1582 | .regions = { |
1583 | ERASEINFO(0x10000,31), | |
1584 | ERASEINFO(0x08000,1), | |
1585 | ERASEINFO(0x02000,2), | |
1586 | ERASEINFO(0x04000,1) | |
1587 | } | |
1588 | }, { | |
1589 | .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ | |
1590 | .dev_id = M29W160DB, | |
1591 | .name = "ST M29W160DB", | |
5d3cce3b | 1592 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
cec80bf2 | 1593 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
5d3cce3b DW |
1594 | .dev_size = SIZE_2MiB, |
1595 | .cmd_set = P_ID_AMD_STD, | |
1596 | .nr_regions = 4, | |
1da177e4 LT |
1597 | .regions = { |
1598 | ERASEINFO(0x04000,1), | |
1599 | ERASEINFO(0x02000,2), | |
1600 | ERASEINFO(0x08000,1), | |
1601 | ERASEINFO(0x10000,31) | |
1602 | } | |
35d086b1 | 1603 | }, { |
1da177e4 LT |
1604 | .mfr_id = MANUFACTURER_ST, |
1605 | .dev_id = M29W040B, | |
1606 | .name = "ST M29W040B", | |
5d3cce3b DW |
1607 | .devtypes = CFI_DEVICETYPE_X8, |
1608 | .uaddr = MTD_UADDR_0x0555_0x02AA, | |
1609 | .dev_size = SIZE_512KiB, | |
1610 | .cmd_set = P_ID_AMD_STD, | |
1611 | .nr_regions = 1, | |
1da177e4 LT |
1612 | .regions = { |
1613 | ERASEINFO(0x10000,8), | |
1614 | } | |
35d086b1 | 1615 | }, { |
1da177e4 LT |
1616 | .mfr_id = MANUFACTURER_ST, |
1617 | .dev_id = M50FW040, | |
1618 | .name = "ST M50FW040", | |
5d3cce3b DW |
1619 | .devtypes = CFI_DEVICETYPE_X8, |
1620 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1621 | .dev_size = SIZE_512KiB, | |
1622 | .cmd_set = P_ID_INTEL_EXT, | |
1623 | .nr_regions = 1, | |
1da177e4 LT |
1624 | .regions = { |
1625 | ERASEINFO(0x10000,8), | |
1626 | } | |
35d086b1 | 1627 | }, { |
1da177e4 LT |
1628 | .mfr_id = MANUFACTURER_ST, |
1629 | .dev_id = M50FW080, | |
1630 | .name = "ST M50FW080", | |
5d3cce3b DW |
1631 | .devtypes = CFI_DEVICETYPE_X8, |
1632 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1633 | .dev_size = SIZE_1MiB, | |
1634 | .cmd_set = P_ID_INTEL_EXT, | |
1635 | .nr_regions = 1, | |
1da177e4 LT |
1636 | .regions = { |
1637 | ERASEINFO(0x10000,16), | |
1638 | } | |
35d086b1 | 1639 | }, { |
1da177e4 LT |
1640 | .mfr_id = MANUFACTURER_ST, |
1641 | .dev_id = M50FW016, | |
1642 | .name = "ST M50FW016", | |
5d3cce3b DW |
1643 | .devtypes = CFI_DEVICETYPE_X8, |
1644 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1645 | .dev_size = SIZE_2MiB, | |
1646 | .cmd_set = P_ID_INTEL_EXT, | |
1647 | .nr_regions = 1, | |
1da177e4 LT |
1648 | .regions = { |
1649 | ERASEINFO(0x10000,32), | |
1650 | } | |
1651 | }, { | |
1652 | .mfr_id = MANUFACTURER_ST, | |
1653 | .dev_id = M50LPW080, | |
1654 | .name = "ST M50LPW080", | |
5d3cce3b DW |
1655 | .devtypes = CFI_DEVICETYPE_X8, |
1656 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1657 | .dev_size = SIZE_1MiB, | |
1658 | .cmd_set = P_ID_INTEL_EXT, | |
1659 | .nr_regions = 1, | |
1da177e4 LT |
1660 | .regions = { |
1661 | ERASEINFO(0x10000,16), | |
deb1a5f1 NC |
1662 | }, |
1663 | }, { | |
1664 | .mfr_id = MANUFACTURER_ST, | |
1665 | .dev_id = M50FLW080A, | |
1666 | .name = "ST M50FLW080A", | |
1667 | .devtypes = CFI_DEVICETYPE_X8, | |
1668 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1669 | .dev_size = SIZE_1MiB, | |
1670 | .cmd_set = P_ID_INTEL_EXT, | |
1671 | .nr_regions = 4, | |
1672 | .regions = { | |
1673 | ERASEINFO(0x1000,16), | |
1674 | ERASEINFO(0x10000,13), | |
1675 | ERASEINFO(0x1000,16), | |
1676 | ERASEINFO(0x1000,16), | |
1677 | } | |
1678 | }, { | |
1679 | .mfr_id = MANUFACTURER_ST, | |
1680 | .dev_id = M50FLW080B, | |
1681 | .name = "ST M50FLW080B", | |
1682 | .devtypes = CFI_DEVICETYPE_X8, | |
1683 | .uaddr = MTD_UADDR_UNNECESSARY, | |
1684 | .dev_size = SIZE_1MiB, | |
1685 | .cmd_set = P_ID_INTEL_EXT, | |
1686 | .nr_regions = 4, | |
1687 | .regions = { | |
1688 | ERASEINFO(0x1000,16), | |
1689 | ERASEINFO(0x1000,16), | |
1690 | ERASEINFO(0x10000,13), | |
1691 | ERASEINFO(0x1000,16), | |
1da177e4 LT |
1692 | } |
1693 | }, { | |
1694 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1695 | .dev_id = TC58FVT160, | |
1696 | .name = "Toshiba TC58FVT160", | |
5d3cce3b DW |
1697 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1698 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1699 | .dev_size = SIZE_2MiB, |
1700 | .cmd_set = P_ID_AMD_STD, | |
1701 | .nr_regions = 4, | |
1da177e4 LT |
1702 | .regions = { |
1703 | ERASEINFO(0x10000,31), | |
1704 | ERASEINFO(0x08000,1), | |
1705 | ERASEINFO(0x02000,2), | |
1706 | ERASEINFO(0x04000,1) | |
1707 | } | |
1708 | }, { | |
1709 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1710 | .dev_id = TC58FVB160, | |
1711 | .name = "Toshiba TC58FVB160", | |
5d3cce3b DW |
1712 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1713 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1714 | .dev_size = SIZE_2MiB, |
1715 | .cmd_set = P_ID_AMD_STD, | |
1716 | .nr_regions = 4, | |
1da177e4 LT |
1717 | .regions = { |
1718 | ERASEINFO(0x04000,1), | |
1719 | ERASEINFO(0x02000,2), | |
1720 | ERASEINFO(0x08000,1), | |
1721 | ERASEINFO(0x10000,31) | |
1722 | } | |
1723 | }, { | |
1724 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1725 | .dev_id = TC58FVB321, | |
1726 | .name = "Toshiba TC58FVB321", | |
5d3cce3b DW |
1727 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1728 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1729 | .dev_size = SIZE_4MiB, |
1730 | .cmd_set = P_ID_AMD_STD, | |
1731 | .nr_regions = 2, | |
1da177e4 LT |
1732 | .regions = { |
1733 | ERASEINFO(0x02000,8), | |
1734 | ERASEINFO(0x10000,63) | |
1735 | } | |
1736 | }, { | |
1737 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1738 | .dev_id = TC58FVT321, | |
1739 | .name = "Toshiba TC58FVT321", | |
5d3cce3b DW |
1740 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1741 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1742 | .dev_size = SIZE_4MiB, |
1743 | .cmd_set = P_ID_AMD_STD, | |
1744 | .nr_regions = 2, | |
1da177e4 LT |
1745 | .regions = { |
1746 | ERASEINFO(0x10000,63), | |
1747 | ERASEINFO(0x02000,8) | |
1748 | } | |
1749 | }, { | |
1750 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1751 | .dev_id = TC58FVB641, | |
1752 | .name = "Toshiba TC58FVB641", | |
5d3cce3b DW |
1753 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1754 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1755 | .dev_size = SIZE_8MiB, |
1756 | .cmd_set = P_ID_AMD_STD, | |
1757 | .nr_regions = 2, | |
1da177e4 LT |
1758 | .regions = { |
1759 | ERASEINFO(0x02000,8), | |
1760 | ERASEINFO(0x10000,127) | |
1761 | } | |
1762 | }, { | |
1763 | .mfr_id = MANUFACTURER_TOSHIBA, | |
1764 | .dev_id = TC58FVT641, | |
1765 | .name = "Toshiba TC58FVT641", | |
5d3cce3b DW |
1766 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1767 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | |
5d3cce3b DW |
1768 | .dev_size = SIZE_8MiB, |
1769 | .cmd_set = P_ID_AMD_STD, | |
1770 | .nr_regions = 2, | |
1da177e4 LT |
1771 | .regions = { |
1772 | ERASEINFO(0x10000,127), | |
1773 | ERASEINFO(0x02000,8) | |
1774 | } | |
1775 | }, { | |
1776 | .mfr_id = MANUFACTURER_WINBOND, | |
1777 | .dev_id = W49V002A, | |
1778 | .name = "Winbond W49V002A", | |
5d3cce3b DW |
1779 | .devtypes = CFI_DEVICETYPE_X8, |
1780 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | |
1781 | .dev_size = SIZE_256KiB, | |
1782 | .cmd_set = P_ID_AMD_STD, | |
1783 | .nr_regions = 4, | |
1da177e4 LT |
1784 | .regions = { |
1785 | ERASEINFO(0x10000, 3), | |
1786 | ERASEINFO(0x08000, 1), | |
1787 | ERASEINFO(0x02000, 2), | |
1788 | ERASEINFO(0x04000, 1), | |
1789 | } | |
1790 | } | |
1791 | }; | |
1792 | ||
5d3cce3b | 1793 | static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base, |
1da177e4 LT |
1794 | struct cfi_private *cfi) |
1795 | { | |
1796 | map_word result; | |
1797 | unsigned long mask; | |
5c9c11e1 MR |
1798 | int bank = 0; |
1799 | ||
1800 | /* According to JEDEC "Standard Manufacturer's Identification Code" | |
1801 | * (http://www.jedec.org/download/search/jep106W.pdf) | |
1802 | * several first banks can contain 0x7f instead of actual ID | |
1803 | */ | |
1804 | do { | |
1805 | uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), | |
1806 | cfi_interleave(cfi), | |
1807 | cfi->device_type); | |
1808 | mask = (1 << (cfi->device_type * 8)) - 1; | |
1809 | result = map_read(map, base + ofs); | |
1810 | bank++; | |
1811 | } while ((result.x[0] & mask) == CONTINUATION_CODE); | |
1812 | ||
1da177e4 LT |
1813 | return result.x[0] & mask; |
1814 | } | |
1815 | ||
5d3cce3b | 1816 | static inline u32 jedec_read_id(struct map_info *map, uint32_t base, |
1da177e4 LT |
1817 | struct cfi_private *cfi) |
1818 | { | |
1819 | map_word result; | |
1820 | unsigned long mask; | |
1821 | u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type); | |
1822 | mask = (1 << (cfi->device_type * 8)) -1; | |
1823 | result = map_read(map, base + ofs); | |
1824 | return result.x[0] & mask; | |
1825 | } | |
1826 | ||
53d88553 | 1827 | static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi) |
1da177e4 LT |
1828 | { |
1829 | /* Reset */ | |
1830 | ||
1831 | /* after checking the datasheets for SST, MACRONIX and ATMEL | |
1832 | * (oh and incidentaly the jedec spec - 3.5.3.3) the reset | |
1833 | * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at | |
1834 | * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips | |
1835 | * as they will ignore the writes and dont care what address | |
1836 | * the F0 is written to */ | |
cec80bf2 | 1837 | if (cfi->addr_unlock1) { |
1da177e4 LT |
1838 | DEBUG( MTD_DEBUG_LEVEL3, |
1839 | "reset unlock called %x %x \n", | |
1840 | cfi->addr_unlock1,cfi->addr_unlock2); | |
1841 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
1842 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
1843 | } | |
1844 | ||
1845 | cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
cec80bf2 | 1846 | /* Some misdesigned Intel chips do not respond for 0xF0 for a reset, |
1da177e4 LT |
1847 | * so ensure we're in read mode. Send both the Intel and the AMD command |
1848 | * for this. Intel uses 0xff for this, AMD uses 0xff for NOP, so | |
1849 | * this should be safe. | |
1f948b43 | 1850 | */ |
1da177e4 LT |
1851 | cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); |
1852 | /* FIXME - should have reset delay before continuing */ | |
1853 | } | |
1854 | ||
1855 | ||
1da177e4 LT |
1856 | static int cfi_jedec_setup(struct cfi_private *p_cfi, int index) |
1857 | { | |
1858 | int i,num_erase_regions; | |
5d3cce3b DW |
1859 | uint8_t uaddr; |
1860 | ||
1861 | if (! (jedec_table[index].devtypes & p_cfi->device_type)) { | |
1862 | DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n", | |
1863 | jedec_table[index].name, 4 * (1<<p_cfi->device_type)); | |
1864 | return 0; | |
1865 | } | |
1da177e4 | 1866 | |
5d3cce3b | 1867 | printk(KERN_INFO "Found: %s\n",jedec_table[index].name); |
1da177e4 | 1868 | |
5d3cce3b | 1869 | num_erase_regions = jedec_table[index].nr_regions; |
1f948b43 | 1870 | |
1da177e4 LT |
1871 | p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); |
1872 | if (!p_cfi->cfiq) { | |
1873 | //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name); | |
1874 | return 0; | |
1875 | } | |
1876 | ||
1f948b43 | 1877 | memset(p_cfi->cfiq,0,sizeof(struct cfi_ident)); |
1da177e4 | 1878 | |
5d3cce3b DW |
1879 | p_cfi->cfiq->P_ID = jedec_table[index].cmd_set; |
1880 | p_cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions; | |
1881 | p_cfi->cfiq->DevSize = jedec_table[index].dev_size; | |
1da177e4 LT |
1882 | p_cfi->cfi_mode = CFI_MODE_JEDEC; |
1883 | ||
1884 | for (i=0; i<num_erase_regions; i++){ | |
1885 | p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i]; | |
1886 | } | |
1887 | p_cfi->cmdset_priv = NULL; | |
1888 | ||
1889 | /* This may be redundant for some cases, but it doesn't hurt */ | |
1890 | p_cfi->mfr = jedec_table[index].mfr_id; | |
1891 | p_cfi->id = jedec_table[index].dev_id; | |
1892 | ||
5d3cce3b | 1893 | uaddr = jedec_table[index].uaddr; |
1da177e4 | 1894 | |
cec80bf2 DW |
1895 | /* The table has unlock addresses in _bytes_, and we try not to let |
1896 | our brains explode when we see the datasheets talking about address | |
1897 | lines numbered from A-1 to A18. The CFI table has unlock addresses | |
1898 | in device-words according to the mode the device is connected in */ | |
1899 | p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / p_cfi->device_type; | |
1900 | p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / p_cfi->device_type; | |
1da177e4 LT |
1901 | |
1902 | return 1; /* ok */ | |
1903 | } | |
1904 | ||
1905 | ||
1906 | /* | |
f33686b5 | 1907 | * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing |
1da177e4 LT |
1908 | * the mapped address, unlock addresses, and proper chip ID. This function |
1909 | * attempts to minimize errors. It is doubtfull that this probe will ever | |
1910 | * be perfect - consequently there should be some module parameters that | |
1911 | * could be manually specified to force the chip info. | |
1912 | */ | |
5d3cce3b | 1913 | static inline int jedec_match( uint32_t base, |
1da177e4 LT |
1914 | struct map_info *map, |
1915 | struct cfi_private *cfi, | |
1916 | const struct amd_flash_info *finfo ) | |
1917 | { | |
1918 | int rc = 0; /* failure until all tests pass */ | |
1919 | u32 mfr, id; | |
5d3cce3b | 1920 | uint8_t uaddr; |
1da177e4 LT |
1921 | |
1922 | /* | |
1923 | * The IDs must match. For X16 and X32 devices operating in | |
1924 | * a lower width ( X8 or X16 ), the device ID's are usually just | |
1925 | * the lower byte(s) of the larger device ID for wider mode. If | |
1926 | * a part is found that doesn't fit this assumption (device id for | |
1927 | * smaller width mode is completely unrealated to full-width mode) | |
1928 | * then the jedec_table[] will have to be augmented with the IDs | |
1929 | * for different widths. | |
1930 | */ | |
1931 | switch (cfi->device_type) { | |
1932 | case CFI_DEVICETYPE_X8: | |
5d3cce3b DW |
1933 | mfr = (uint8_t)finfo->mfr_id; |
1934 | id = (uint8_t)finfo->dev_id; | |
011b2a36 BD |
1935 | |
1936 | /* bjd: it seems that if we do this, we can end up | |
1937 | * detecting 16bit flashes as an 8bit device, even though | |
1938 | * there aren't. | |
1939 | */ | |
1940 | if (finfo->dev_id > 0xff) { | |
1941 | DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n", | |
1942 | __func__); | |
1943 | goto match_done; | |
1944 | } | |
1da177e4 LT |
1945 | break; |
1946 | case CFI_DEVICETYPE_X16: | |
5d3cce3b DW |
1947 | mfr = (uint16_t)finfo->mfr_id; |
1948 | id = (uint16_t)finfo->dev_id; | |
1da177e4 LT |
1949 | break; |
1950 | case CFI_DEVICETYPE_X32: | |
5d3cce3b DW |
1951 | mfr = (uint16_t)finfo->mfr_id; |
1952 | id = (uint32_t)finfo->dev_id; | |
1da177e4 LT |
1953 | break; |
1954 | default: | |
1955 | printk(KERN_WARNING | |
1956 | "MTD %s(): Unsupported device type %d\n", | |
1957 | __func__, cfi->device_type); | |
1958 | goto match_done; | |
1959 | } | |
1960 | if ( cfi->mfr != mfr || cfi->id != id ) { | |
1961 | goto match_done; | |
1962 | } | |
1963 | ||
1964 | /* the part size must fit in the memory window */ | |
1965 | DEBUG( MTD_DEBUG_LEVEL3, | |
1966 | "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n", | |
5d3cce3b DW |
1967 | __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) ); |
1968 | if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) { | |
1da177e4 LT |
1969 | DEBUG( MTD_DEBUG_LEVEL3, |
1970 | "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n", | |
1971 | __func__, finfo->mfr_id, finfo->dev_id, | |
5d3cce3b | 1972 | 1 << finfo->dev_size ); |
1da177e4 LT |
1973 | goto match_done; |
1974 | } | |
1975 | ||
5d3cce3b | 1976 | if (! (finfo->devtypes & cfi->device_type)) |
1da177e4 | 1977 | goto match_done; |
5d3cce3b DW |
1978 | |
1979 | uaddr = finfo->uaddr; | |
1da177e4 LT |
1980 | |
1981 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n", | |
1982 | __func__, cfi->addr_unlock1, cfi->addr_unlock2 ); | |
1983 | if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr | |
cec80bf2 DW |
1984 | && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 || |
1985 | unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) { | |
1da177e4 LT |
1986 | DEBUG( MTD_DEBUG_LEVEL3, |
1987 | "MTD %s(): 0x%.4x 0x%.4x did not match\n", | |
1988 | __func__, | |
1989 | unlock_addrs[uaddr].addr1, | |
1990 | unlock_addrs[uaddr].addr2); | |
1991 | goto match_done; | |
1992 | } | |
1993 | ||
1994 | /* | |
1995 | * Make sure the ID's dissappear when the device is taken out of | |
1996 | * ID mode. The only time this should fail when it should succeed | |
1997 | * is when the ID's are written as data to the same | |
1998 | * addresses. For this rare and unfortunate case the chip | |
1999 | * cannot be probed correctly. | |
2000 | * FIXME - write a driver that takes all of the chip info as | |
2001 | * module parameters, doesn't probe but forces a load. | |
2002 | */ | |
2003 | DEBUG( MTD_DEBUG_LEVEL3, | |
2004 | "MTD %s(): check ID's disappear when not in ID mode\n", | |
2005 | __func__ ); | |
2006 | jedec_reset( base, map, cfi ); | |
2007 | mfr = jedec_read_mfr( map, base, cfi ); | |
2008 | id = jedec_read_id( map, base, cfi ); | |
2009 | if ( mfr == cfi->mfr && id == cfi->id ) { | |
2010 | DEBUG( MTD_DEBUG_LEVEL3, | |
2011 | "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n" | |
2012 | "You might need to manually specify JEDEC parameters.\n", | |
2013 | __func__, cfi->mfr, cfi->id ); | |
2014 | goto match_done; | |
2015 | } | |
2016 | ||
2017 | /* all tests passed - mark as success */ | |
2018 | rc = 1; | |
2019 | ||
2020 | /* | |
2021 | * Put the device back in ID mode - only need to do this if we | |
2022 | * were truly frobbing a real device. | |
2023 | */ | |
2024 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ ); | |
cec80bf2 | 2025 | if (cfi->addr_unlock1) { |
1da177e4 LT |
2026 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); |
2027 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
2028 | } | |
2029 | cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
2030 | /* FIXME - should have a delay before continuing */ | |
2031 | ||
1f948b43 | 2032 | match_done: |
1da177e4 LT |
2033 | return rc; |
2034 | } | |
2035 | ||
2036 | ||
2037 | static int jedec_probe_chip(struct map_info *map, __u32 base, | |
2038 | unsigned long *chip_map, struct cfi_private *cfi) | |
2039 | { | |
2040 | int i; | |
2041 | enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED; | |
2042 | u32 probe_offset1, probe_offset2; | |
2043 | ||
2044 | retry: | |
2045 | if (!cfi->numchips) { | |
2046 | uaddr_idx++; | |
2047 | ||
2048 | if (MTD_UADDR_UNNECESSARY == uaddr_idx) | |
2049 | return 0; | |
2050 | ||
cec80bf2 DW |
2051 | cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 / cfi->device_type; |
2052 | cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 / cfi->device_type; | |
1da177e4 LT |
2053 | } |
2054 | ||
2055 | /* Make certain we aren't probing past the end of map */ | |
2056 | if (base >= map->size) { | |
2057 | printk(KERN_NOTICE | |
2058 | "Probe at base(0x%08x) past the end of the map(0x%08lx)\n", | |
2059 | base, map->size -1); | |
2060 | return 0; | |
1f948b43 | 2061 | |
1da177e4 LT |
2062 | } |
2063 | /* Ensure the unlock addresses we try stay inside the map */ | |
5d3cce3b | 2064 | probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type); |
f6f0f818 | 2065 | probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, cfi_interleave(cfi), cfi->device_type); |
1da177e4 LT |
2066 | if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) || |
2067 | ((base + probe_offset2 + map_bankwidth(map)) >= map->size)) | |
1da177e4 | 2068 | goto retry; |
1f948b43 | 2069 | |
1da177e4 LT |
2070 | /* Reset */ |
2071 | jedec_reset(base, map, cfi); | |
2072 | ||
2073 | /* Autoselect Mode */ | |
2074 | if(cfi->addr_unlock1) { | |
2075 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
2076 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | |
2077 | } | |
2078 | cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | |
2079 | /* FIXME - should have a delay before continuing */ | |
2080 | ||
2081 | if (!cfi->numchips) { | |
1f948b43 | 2082 | /* This is the first time we're called. Set up the CFI |
1da177e4 | 2083 | stuff accordingly and return */ |
1f948b43 | 2084 | |
1da177e4 LT |
2085 | cfi->mfr = jedec_read_mfr(map, base, cfi); |
2086 | cfi->id = jedec_read_id(map, base, cfi); | |
2087 | DEBUG(MTD_DEBUG_LEVEL3, | |
1f948b43 | 2088 | "Search for id:(%02x %02x) interleave(%d) type(%d)\n", |
1da177e4 | 2089 | cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type); |
87d10f3c | 2090 | for (i = 0; i < ARRAY_SIZE(jedec_table); i++) { |
1da177e4 LT |
2091 | if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) { |
2092 | DEBUG( MTD_DEBUG_LEVEL3, | |
2093 | "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n", | |
2094 | __func__, cfi->mfr, cfi->id, | |
2095 | cfi->addr_unlock1, cfi->addr_unlock2 ); | |
2096 | if (!cfi_jedec_setup(cfi, i)) | |
2097 | return 0; | |
2098 | goto ok_out; | |
2099 | } | |
2100 | } | |
2101 | goto retry; | |
2102 | } else { | |
5d3cce3b DW |
2103 | uint16_t mfr; |
2104 | uint16_t id; | |
1da177e4 LT |
2105 | |
2106 | /* Make sure it is a chip of the same manufacturer and id */ | |
2107 | mfr = jedec_read_mfr(map, base, cfi); | |
2108 | id = jedec_read_id(map, base, cfi); | |
2109 | ||
2110 | if ((mfr != cfi->mfr) || (id != cfi->id)) { | |
2111 | printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n", | |
2112 | map->name, mfr, id, base); | |
2113 | jedec_reset(base, map, cfi); | |
2114 | return 0; | |
2115 | } | |
2116 | } | |
1f948b43 | 2117 | |
1da177e4 LT |
2118 | /* Check each previous chip locations to see if it's an alias */ |
2119 | for (i=0; i < (base >> cfi->chipshift); i++) { | |
2120 | unsigned long start; | |
2121 | if(!test_bit(i, chip_map)) { | |
2122 | continue; /* Skip location; no valid chip at this address */ | |
2123 | } | |
2124 | start = i << cfi->chipshift; | |
2125 | if (jedec_read_mfr(map, start, cfi) == cfi->mfr && | |
2126 | jedec_read_id(map, start, cfi) == cfi->id) { | |
2127 | /* Eep. This chip also looks like it's in autoselect mode. | |
2128 | Is it an alias for the new one? */ | |
2129 | jedec_reset(start, map, cfi); | |
2130 | ||
2131 | /* If the device IDs go away, it's an alias */ | |
2132 | if (jedec_read_mfr(map, base, cfi) != cfi->mfr || | |
2133 | jedec_read_id(map, base, cfi) != cfi->id) { | |
2134 | printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", | |
2135 | map->name, base, start); | |
2136 | return 0; | |
2137 | } | |
1f948b43 | 2138 | |
1da177e4 LT |
2139 | /* Yes, it's actually got the device IDs as data. Most |
2140 | * unfortunate. Stick the new chip in read mode | |
2141 | * too and if it's the same, assume it's an alias. */ | |
2142 | /* FIXME: Use other modes to do a proper check */ | |
2143 | jedec_reset(base, map, cfi); | |
2144 | if (jedec_read_mfr(map, base, cfi) == cfi->mfr && | |
2145 | jedec_read_id(map, base, cfi) == cfi->id) { | |
2146 | printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n", | |
2147 | map->name, base, start); | |
2148 | return 0; | |
2149 | } | |
2150 | } | |
2151 | } | |
1f948b43 | 2152 | |
1da177e4 LT |
2153 | /* OK, if we got to here, then none of the previous chips appear to |
2154 | be aliases for the current one. */ | |
2155 | set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */ | |
2156 | cfi->numchips++; | |
1f948b43 | 2157 | |
1da177e4 LT |
2158 | ok_out: |
2159 | /* Put it back into Read Mode */ | |
2160 | jedec_reset(base, map, cfi); | |
2161 | ||
2162 | printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", | |
1f948b43 | 2163 | map->name, cfi_interleave(cfi), cfi->device_type*8, base, |
1da177e4 | 2164 | map->bankwidth*8); |
1f948b43 | 2165 | |
1da177e4 LT |
2166 | return 1; |
2167 | } | |
2168 | ||
2169 | static struct chip_probe jedec_chip_probe = { | |
2170 | .name = "JEDEC", | |
2171 | .probe_chip = jedec_probe_chip | |
2172 | }; | |
2173 | ||
2174 | static struct mtd_info *jedec_probe(struct map_info *map) | |
2175 | { | |
2176 | /* | |
2177 | * Just use the generic probe stuff to call our CFI-specific | |
2178 | * chip_probe routine in all the possible permutations, etc. | |
2179 | */ | |
2180 | return mtd_do_chip_probe(map, &jedec_chip_probe); | |
2181 | } | |
2182 | ||
2183 | static struct mtd_chip_driver jedec_chipdrv = { | |
2184 | .probe = jedec_probe, | |
2185 | .name = "jedec_probe", | |
2186 | .module = THIS_MODULE | |
2187 | }; | |
2188 | ||
2189 | static int __init jedec_probe_init(void) | |
2190 | { | |
2191 | register_mtd_chip_driver(&jedec_chipdrv); | |
2192 | return 0; | |
2193 | } | |
2194 | ||
2195 | static void __exit jedec_probe_exit(void) | |
2196 | { | |
2197 | unregister_mtd_chip_driver(&jedec_chipdrv); | |
2198 | } | |
2199 | ||
2200 | module_init(jedec_probe_init); | |
2201 | module_exit(jedec_probe_exit); | |
2202 | ||
2203 | MODULE_LICENSE("GPL"); | |
2204 | MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al."); | |
2205 | MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips"); |