projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
mtd: rename MTD_OOB_* to MTD_OPS_*
[deliverable/linux.git] / drivers / mtd / devices / doc2001.c
CommitLineData
1da177e4
LT		 1
2/*
3 * Linux driver for Disk-On-Chip Millennium
4 * (c) 1999 Machine Vision Holdings, Inc.
5 * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
1da177e4
LT		 6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <asm/errno.h>
11#include <asm/io.h>
12#include <asm/uaccess.h>
1da177e4
LT		 13#include <linux/delay.h>
14#include <linux/slab.h>
1da177e4
LT		 15#include <linux/init.h>
16#include <linux/types.h>
17#include <linux/bitops.h>
18
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/doc2000.h>
22
23/* #define ECC_DEBUG */
24
25/* I have no idea why some DoC chips can not use memcop_form|to_io().
26 * This may be due to the different revisions of the ASIC controller built-in or
27 * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment
28 * this:*/
29#undef USE_MEMCPY
30
31static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
32 size_t *retlen, u_char *buf);
33static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
34 size_t *retlen, const u_char *buf);
8593fbc6
TG		 35static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
36 struct mtd_oob_ops *ops);
37static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
38 struct mtd_oob_ops *ops);
1da177e4
LT		 39static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);
40
41static struct mtd_info *docmillist = NULL;
42
43/* Perform the required delay cycles by reading from the NOP register */
44static void DoC_Delay(void __iomem * docptr, unsigned short cycles)
45{
46 volatile char dummy;
47 int i;
48
49 for (i = 0; i < cycles; i++)
50 dummy = ReadDOC(docptr, NOP);
51}
52
53/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
54static int _DoC_WaitReady(void __iomem * docptr)
55{
56 unsigned short c = 0xffff;
57
289c0522 58 pr_debug("_DoC_WaitReady called for out-of-line wait\n");
1da177e4
LT		 59
60 /* Out-of-line routine to wait for chip response */
61 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
62 ;
63
64 if (c == 0)
289c0522 65 pr_debug("_DoC_WaitReady timed out.\n");
1da177e4
LT		 66
67 return (c == 0);
68}
69
70static inline int DoC_WaitReady(void __iomem * docptr)
71{
72 /* This is inline, to optimise the common case, where it's ready instantly */
73 int ret = 0;
74
75 /* 4 read form NOP register should be issued in prior to the read from CDSNControl
76 see Software Requirement 11.4 item 2. */
77 DoC_Delay(docptr, 4);
78
79 if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
80 /* Call the out-of-line routine to wait */
81 ret = _DoC_WaitReady(docptr);
82
83 /* issue 2 read from NOP register after reading from CDSNControl register
84 see Software Requirement 11.4 item 2. */
85 DoC_Delay(docptr, 2);
86
87 return ret;
88}
89
90/* DoC_Command: Send a flash command to the flash chip through the CDSN IO register
91 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
92 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
93
858119e1 94static void DoC_Command(void __iomem * docptr, unsigned char command,
1da177e4
LT		 95 unsigned char xtraflags)
96{
97 /* Assert the CLE (Command Latch Enable) line to the flash chip */
98 WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
99 DoC_Delay(docptr, 4);
100
101 /* Send the command */
102 WriteDOC(command, docptr, Mil_CDSN_IO);
103 WriteDOC(0x00, docptr, WritePipeTerm);
104
105 /* Lower the CLE line */
106 WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
107 DoC_Delay(docptr, 4);
108}
109
110/* DoC_Address: Set the current address for the flash chip through the CDSN IO register
111 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
112 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
113
114static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs,
115 unsigned char xtraflags1, unsigned char xtraflags2)
116{
117 /* Assert the ALE (Address Latch Enable) line to the flash chip */
118 WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
119 DoC_Delay(docptr, 4);
120
121 /* Send the address */
122 switch (numbytes)
123 {
124 case 1:
125 /* Send single byte, bits 0-7. */
126 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
127 WriteDOC(0x00, docptr, WritePipeTerm);
128 break;
129 case 2:
130 /* Send bits 9-16 followed by 17-23 */
131 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
132 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
133 WriteDOC(0x00, docptr, WritePipeTerm);
134 break;
135 case 3:
136 /* Send 0-7, 9-16, then 17-23 */
137 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
138 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
139 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
140 WriteDOC(0x00, docptr, WritePipeTerm);
141 break;
142 default:
143 return;
144 }
145
146 /* Lower the ALE line */
147 WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl);
148 DoC_Delay(docptr, 4);
149}
150
151/* DoC_SelectChip: Select a given flash chip within the current floor */
152static int DoC_SelectChip(void __iomem * docptr, int chip)
153{
154 /* Select the individual flash chip requested */
155 WriteDOC(chip, docptr, CDSNDeviceSelect);
156 DoC_Delay(docptr, 4);
157
158 /* Wait for it to be ready */
159 return DoC_WaitReady(docptr);
160}
161
162/* DoC_SelectFloor: Select a given floor (bank of flash chips) */
163static int DoC_SelectFloor(void __iomem * docptr, int floor)
164{
165 /* Select the floor (bank) of chips required */
166 WriteDOC(floor, docptr, FloorSelect);
167
168 /* Wait for the chip to be ready */
169 return DoC_WaitReady(docptr);
170}
171
172/* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
173static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
174{
175 int mfr, id, i, j;
176 volatile char dummy;
177
178 /* Page in the required floor/chip
179 FIXME: is this supported by Millennium ?? */
180 DoC_SelectFloor(doc->virtadr, floor);
181 DoC_SelectChip(doc->virtadr, chip);
182
183 /* Reset the chip, see Software Requirement 11.4 item 1. */
184 DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP);
185 DoC_WaitReady(doc->virtadr);
186
e5580fbe 187 /* Read the NAND chip ID: 1. Send ReadID command */
1da177e4
LT		 188 DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP);
189
e5580fbe 190 /* Read the NAND chip ID: 2. Send address byte zero */
1da177e4
LT		 191 DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00);
192
193 /* Read the manufacturer and device id codes of the flash device through
194 CDSN IO register see Software Requirement 11.4 item 5.*/
195 dummy = ReadDOC(doc->virtadr, ReadPipeInit);
196 DoC_Delay(doc->virtadr, 2);
197 mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO);
198
199 DoC_Delay(doc->virtadr, 2);
200 id = ReadDOC(doc->virtadr, Mil_CDSN_IO);
201 dummy = ReadDOC(doc->virtadr, LastDataRead);
202
203 /* No response - return failure */
204 if (mfr == 0xff || mfr == 0)
205 return 0;
206
207 /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */
208 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
209 if ( id == nand_flash_ids[i].id) {
210 /* Try to identify manufacturer */
211 for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
212 if (nand_manuf_ids[j].id == mfr)
213 break;
e5580fbe 214 }
1da177e4
LT		 215 printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "
216 "Chip ID: %2.2X (%s:%s)\n",
217 mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name);
218 doc->mfr = mfr;
219 doc->id = id;
220 doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;
221 break;
222 }
223 }
224
225 if (nand_flash_ids[i].name == NULL)
226 return 0;
227 else
228 return 1;
229}
230
231/* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
232static void DoC_ScanChips(struct DiskOnChip *this)
233{
234 int floor, chip;
235 int numchips[MAX_FLOORS_MIL];
236 int ret;
237
238 this->numchips = 0;
239 this->mfr = 0;
240 this->id = 0;
241
242 /* For each floor, find the number of valid chips it contains */
243 for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) {
244 numchips[floor] = 0;
245 for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) {
246 ret = DoC_IdentChip(this, floor, chip);
247 if (ret) {
248 numchips[floor]++;
249 this->numchips++;
250 }
251 }
252 }
253 /* If there are none at all that we recognise, bail */
254 if (!this->numchips) {
255 printk("No flash chips recognised.\n");
256 return;
257 }
258
259 /* Allocate an array to hold the information for each chip */
260 this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL);
261 if (!this->chips){
262 printk("No memory for allocating chip info structures\n");
263 return;
264 }
265
e5580fbe 266 /* Fill out the chip array with {floor, chipno} for each
1da177e4
LT		 267 * detected chip in the device. */
268 for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) {
269 for (chip = 0 ; chip < numchips[floor] ; chip++) {
270 this->chips[ret].floor = floor;
271 this->chips[ret].chip = chip;
272 this->chips[ret].curadr = 0;
273 this->chips[ret].curmode = 0x50;
274 ret++;
275 }
276 }
277
278 /* Calculate and print the total size of the device */
279 this->totlen = this->numchips * (1 << this->chipshift);
280 printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n",
281 this->numchips ,this->totlen >> 20);
282}
283
284static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2)
285{
286 int tmp1, tmp2, retval;
287
288 if (doc1->physadr == doc2->physadr)
289 return 1;
290
291 /* Use the alias resolution register which was set aside for this
292 * purpose. If it's value is the same on both chips, they might
293 * be the same chip, and we write to one and check for a change in
294 * the other. It's unclear if this register is usuable in the
295 * DoC 2000 (it's in the Millenium docs), but it seems to work. */
296 tmp1 = ReadDOC(doc1->virtadr, AliasResolution);
297 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
298 if (tmp1 != tmp2)
299 return 0;
e5580fbe 300
1da177e4
LT		 301 WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution);
302 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
303 if (tmp2 == (tmp1+1) % 0xff)
304 retval = 1;
305 else
306 retval = 0;
307
308 /* Restore register contents. May not be necessary, but do it just to
309 * be safe. */
310 WriteDOC(tmp1, doc1->virtadr, AliasResolution);
311
312 return retval;
313}
314
5e535429
DW		 315/* This routine is found from the docprobe code by symbol_get(),
316 * which will bump the use count of this module. */
317void DoCMil_init(struct mtd_info *mtd)
1da177e4
LT		 318{
319 struct DiskOnChip *this = mtd->priv;
320 struct DiskOnChip *old = NULL;
321
322 /* We must avoid being called twice for the same device. */
323 if (docmillist)
324 old = docmillist->priv;
325
326 while (old) {
327 if (DoCMil_is_alias(this, old)) {
328 printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at "
329 "0x%lX - already configured\n", this->physadr);
330 iounmap(this->virtadr);
331 kfree(mtd);
332 return;
333 }
334 if (old->nextdoc)
335 old = old->nextdoc->priv;
336 else
337 old = NULL;
338 }
339
340 mtd->name = "DiskOnChip Millennium";
341 printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n",
342 this->physadr);
343
344 mtd->type = MTD_NANDFLASH;
345 mtd->flags = MTD_CAP_NANDFLASH;
1da177e4
LT		 346 mtd->size = 0;
347
348 /* FIXME: erase size is not always 8KiB */
349 mtd->erasesize = 0x2000;
350
28318776 351 mtd->writesize = 512;
1da177e4
LT		 352 mtd->oobsize = 16;
353 mtd->owner = THIS_MODULE;
354 mtd->erase = doc_erase;
355 mtd->point = NULL;
356 mtd->unpoint = NULL;
357 mtd->read = doc_read;
358 mtd->write = doc_write;
1da177e4
LT		 359 mtd->read_oob = doc_read_oob;
360 mtd->write_oob = doc_write_oob;
361 mtd->sync = NULL;
362
363 this->totlen = 0;
364 this->numchips = 0;
365 this->curfloor = -1;
366 this->curchip = -1;
367
368 /* Ident all the chips present. */
369 DoC_ScanChips(this);
370
371 if (!this->totlen) {
372 kfree(mtd);
373 iounmap(this->virtadr);
374 } else {
375 this->nextdoc = docmillist;
376 docmillist = mtd;
377 mtd->size = this->totlen;
ee0e87b1 378 mtd_device_register(mtd, NULL, 0);
1da177e4
LT		 379 return;
380 }
381}
f0ad11d0 382EXPORT_SYMBOL_GPL(DoCMil_init);
1da177e4
LT		 383
384static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
385 size_t *retlen, u_char *buf)
1da177e4
LT		 386{
387 int i, ret;
388 volatile char dummy;
7f8a8940 389 unsigned char syndrome[6], eccbuf[6];
1da177e4
LT		 390 struct DiskOnChip *this = mtd->priv;
391 void __iomem *docptr = this->virtadr;
392 struct Nand *mychip = &this->chips[from >> (this->chipshift)];
393
394 /* Don't allow read past end of device */
395 if (from >= this->totlen)
396 return -EINVAL;
397
398 /* Don't allow a single read to cross a 512-byte block boundary */
e5580fbe 399 if (from + len > ((from | 0x1ff) + 1))
1da177e4
LT		 400 len = ((from | 0x1ff) + 1) - from;
401
402 /* Find the chip which is to be used and select it */
403 if (this->curfloor != mychip->floor) {
404 DoC_SelectFloor(docptr, mychip->floor);
405 DoC_SelectChip(docptr, mychip->chip);
406 } else if (this->curchip != mychip->chip) {
407 DoC_SelectChip(docptr, mychip->chip);
408 }
409 this->curfloor = mychip->floor;
410 this->curchip = mychip->chip;
411
412 /* issue the Read0 or Read1 command depend on which half of the page
413 we are accessing. Polling the Flash Ready bit after issue 3 bytes
414 address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/
415 DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP);
416 DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00);
417 DoC_WaitReady(docptr);
418
7f8a8940
TG		 419 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
420 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
421 WriteDOC (DOC_ECC_EN, docptr, ECCConf);
1da177e4
LT		 422
423 /* Read the data via the internal pipeline through CDSN IO register,
424 see Pipelined Read Operations 11.3 */
425 dummy = ReadDOC(docptr, ReadPipeInit);
426#ifndef USE_MEMCPY
427 for (i = 0; i < len-1; i++) {
428 /* N.B. you have to increase the source address in this way or the
429 ECC logic will not work properly */
430 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
431 }
432#else
433 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
434#endif
435 buf[len - 1] = ReadDOC(docptr, LastDataRead);
436
437 /* Let the caller know we completed it */
438 *retlen = len;
439 ret = 0;
440
7f8a8940
TG		 441 /* Read the ECC data from Spare Data Area,
442 see Reed-Solomon EDC/ECC 11.1 */
443 dummy = ReadDOC(docptr, ReadPipeInit);
1da177e4 444#ifndef USE_MEMCPY
7f8a8940
TG		 445 for (i = 0; i < 5; i++) {
446 /* N.B. you have to increase the source address in this way or the
447 ECC logic will not work properly */
448 eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
449 }
1da177e4 450#else
7f8a8940 451 memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5);
1da177e4 452#endif
7f8a8940 453 eccbuf[5] = ReadDOC(docptr, LastDataRead);
1da177e4 454
7f8a8940
TG		 455 /* Flush the pipeline */
456 dummy = ReadDOC(docptr, ECCConf);
457 dummy = ReadDOC(docptr, ECCConf);
1da177e4 458
7f8a8940
TG		 459 /* Check the ECC Status */
460 if (ReadDOC(docptr, ECCConf) & 0x80) {
461 int nb_errors;
462 /* There was an ECC error */
1da177e4 463#ifdef ECC_DEBUG
7f8a8940 464 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
1da177e4 465#endif
7854d3f7 466 /* Read the ECC syndrome through the DiskOnChip ECC logic.
7f8a8940
TG		 467 These syndrome will be all ZERO when there is no error */
468 for (i = 0; i < 6; i++) {
469 syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
470 }
471 nb_errors = doc_decode_ecc(buf, syndrome);
1da177e4 472#ifdef ECC_DEBUG
7f8a8940 473 printk("ECC Errors corrected: %x\n", nb_errors);
1da177e4 474#endif
7f8a8940
TG		 475 if (nb_errors < 0) {
476 /* We return error, but have actually done the read. Not that
477 this can be told to user-space, via sys_read(), but at least
478 MTD-aware stuff can know about it by checking *retlen */
479 ret = -EIO;
1da177e4 480 }
7f8a8940 481 }
1da177e4
LT		 482
483#ifdef PSYCHO_DEBUG
7f8a8940
TG		 484 printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
485 (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
486 eccbuf[4], eccbuf[5]);
1da177e4
LT		 487#endif
488
7f8a8940
TG		 489 /* disable the ECC engine */
490 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
1da177e4
LT		 491
492 return ret;
493}
494
495static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
496 size_t *retlen, const u_char *buf)
1da177e4
LT		 497{
498 int i,ret = 0;
7f8a8940 499 char eccbuf[6];
1da177e4
LT		 500 volatile char dummy;
501 struct DiskOnChip *this = mtd->priv;
502 void __iomem *docptr = this->virtadr;
503 struct Nand *mychip = &this->chips[to >> (this->chipshift)];
504
505 /* Don't allow write past end of device */
506 if (to >= this->totlen)
507 return -EINVAL;
508
509#if 0
510 /* Don't allow a single write to cross a 512-byte block boundary */
e5580fbe 511 if (to + len > ( (to | 0x1ff) + 1))
1da177e4
LT		 512 len = ((to | 0x1ff) + 1) - to;
513#else
514 /* Don't allow writes which aren't exactly one block */
515 if (to & 0x1ff || len != 0x200)
516 return -EINVAL;
517#endif
518
519 /* Find the chip which is to be used and select it */
520 if (this->curfloor != mychip->floor) {
521 DoC_SelectFloor(docptr, mychip->floor);
522 DoC_SelectChip(docptr, mychip->chip);
523 } else if (this->curchip != mychip->chip) {
524 DoC_SelectChip(docptr, mychip->chip);
525 }
526 this->curfloor = mychip->floor;
527 this->curchip = mychip->chip;
528
529 /* Reset the chip, see Software Requirement 11.4 item 1. */
530 DoC_Command(docptr, NAND_CMD_RESET, 0x00);
531 DoC_WaitReady(docptr);
532 /* Set device to main plane of flash */
533 DoC_Command(docptr, NAND_CMD_READ0, 0x00);
534
535 /* issue the Serial Data In command to initial the Page Program process */
536 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
537 DoC_Address(docptr, 3, to, 0x00, 0x00);
538 DoC_WaitReady(docptr);
539
7f8a8940
TG		 540 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
541 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
542 WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
1da177e4
LT		 543
544 /* Write the data via the internal pipeline through CDSN IO register,
545 see Pipelined Write Operations 11.2 */
546#ifndef USE_MEMCPY
547 for (i = 0; i < len; i++) {
548 /* N.B. you have to increase the source address in this way or the
549 ECC logic will not work properly */
550 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
551 }
552#else
553 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
554#endif
555 WriteDOC(0x00, docptr, WritePipeTerm);
556
7f8a8940
TG		 557 /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic
558 see Reed-Solomon EDC/ECC 11.1 */
559 WriteDOC(0, docptr, NOP);
560 WriteDOC(0, docptr, NOP);
561 WriteDOC(0, docptr, NOP);
1da177e4 562
7f8a8940
TG		 563 /* Read the ECC data through the DiskOnChip ECC logic */
564 for (i = 0; i < 6; i++) {
565 eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i);
566 }
1da177e4 567
7f8a8940
TG		 568 /* ignore the ECC engine */
569 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
1da177e4
LT		 570
571#ifndef USE_MEMCPY
7f8a8940
TG		 572 /* Write the ECC data to flash */
573 for (i = 0; i < 6; i++) {
574 /* N.B. you have to increase the source address in this way or the
575 ECC logic will not work properly */
576 WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i);
577 }
1da177e4 578#else
7f8a8940 579 memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6);
1da177e4
LT		 580#endif
581
7f8a8940
TG		 582 /* write the block status BLOCK_USED (0x5555) at the end of ECC data
583 FIXME: this is only a hack for programming the IPL area for LinuxBIOS
584 and should be replace with proper codes in user space utilities */
585 WriteDOC(0x55, docptr, Mil_CDSN_IO);
586 WriteDOC(0x55, docptr, Mil_CDSN_IO + 1);
1da177e4 587
7f8a8940 588 WriteDOC(0x00, docptr, WritePipeTerm);
1da177e4
LT		 589
590#ifdef PSYCHO_DEBUG
7f8a8940
TG		 591 printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
592 (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
593 eccbuf[4], eccbuf[5]);
1da177e4 594#endif
1da177e4
LT		 595
596 /* Commit the Page Program command and wait for ready
597 see Software Requirement 11.4 item 1.*/
598 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
599 DoC_WaitReady(docptr);
600
601 /* Read the status of the flash device through CDSN IO register
602 see Software Requirement 11.4 item 5.*/
603 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
604 dummy = ReadDOC(docptr, ReadPipeInit);
605 DoC_Delay(docptr, 2);
606 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
607 printk("Error programming flash\n");
608 /* Error in programming
609 FIXME: implement Bad Block Replacement (in nftl.c ??) */
610 *retlen = 0;
611 ret = -EIO;
612 }
613 dummy = ReadDOC(docptr, LastDataRead);
614
615 /* Let the caller know we completed it */
616 *retlen = len;
617
618 return ret;
619}
620
8593fbc6
TG		 621static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
622 struct mtd_oob_ops *ops)
1da177e4
LT		 623{
624#ifndef USE_MEMCPY
625 int i;
626#endif
627 volatile char dummy;
628 struct DiskOnChip *this = mtd->priv;
629 void __iomem *docptr = this->virtadr;
630 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
8593fbc6
TG		 631 uint8_t *buf = ops->oobbuf;
632 size_t len = ops->len;
633
0612b9dd 634 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB);
8593fbc6
TG		 635
636 ofs += ops->ooboffs;
1da177e4
LT		 637
638 /* Find the chip which is to be used and select it */
639 if (this->curfloor != mychip->floor) {
640 DoC_SelectFloor(docptr, mychip->floor);
641 DoC_SelectChip(docptr, mychip->chip);
642 } else if (this->curchip != mychip->chip) {
643 DoC_SelectChip(docptr, mychip->chip);
644 }
645 this->curfloor = mychip->floor;
646 this->curchip = mychip->chip;
647
648 /* disable the ECC engine */
649 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
650 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
651
652 /* issue the Read2 command to set the pointer to the Spare Data Area.
653 Polling the Flash Ready bit after issue 3 bytes address in
654 Sequence Read Mode, see Software Requirement 11.4 item 1.*/
655 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
656 DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00);
657 DoC_WaitReady(docptr);
658
659 /* Read the data out via the internal pipeline through CDSN IO register,
660 see Pipelined Read Operations 11.3 */
661 dummy = ReadDOC(docptr, ReadPipeInit);
662#ifndef USE_MEMCPY
663 for (i = 0; i < len-1; i++) {
664 /* N.B. you have to increase the source address in this way or the
665 ECC logic will not work properly */
666 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
667 }
668#else
669 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
670#endif
671 buf[len - 1] = ReadDOC(docptr, LastDataRead);
672
8593fbc6 673 ops->retlen = len;
1da177e4
LT		 674
675 return 0;
676}
677
8593fbc6
TG		 678static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
679 struct mtd_oob_ops *ops)
1da177e4
LT		 680{
681#ifndef USE_MEMCPY
682 int i;
683#endif
684 volatile char dummy;
685 int ret = 0;
686 struct DiskOnChip *this = mtd->priv;
687 void __iomem *docptr = this->virtadr;
688 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
8593fbc6
TG		 689 uint8_t *buf = ops->oobbuf;
690 size_t len = ops->len;
691
0612b9dd 692 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB);
8593fbc6
TG		 693
694 ofs += ops->ooboffs;
1da177e4
LT		 695
696 /* Find the chip which is to be used and select it */
697 if (this->curfloor != mychip->floor) {
698 DoC_SelectFloor(docptr, mychip->floor);
699 DoC_SelectChip(docptr, mychip->chip);
700 } else if (this->curchip != mychip->chip) {
701 DoC_SelectChip(docptr, mychip->chip);
702 }
703 this->curfloor = mychip->floor;
704 this->curchip = mychip->chip;
705
706 /* disable the ECC engine */
707 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
708 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
709
710 /* Reset the chip, see Software Requirement 11.4 item 1. */
711 DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP);
712 DoC_WaitReady(docptr);
713 /* issue the Read2 command to set the pointer to the Spare Data Area. */
714 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
715
716 /* issue the Serial Data In command to initial the Page Program process */
717 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
718 DoC_Address(docptr, 3, ofs, 0x00, 0x00);
719
720 /* Write the data via the internal pipeline through CDSN IO register,
721 see Pipelined Write Operations 11.2 */
722#ifndef USE_MEMCPY
723 for (i = 0; i < len; i++) {
724 /* N.B. you have to increase the source address in this way or the
725 ECC logic will not work properly */
726 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
727 }
728#else
729 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
730#endif
731 WriteDOC(0x00, docptr, WritePipeTerm);
732
733 /* Commit the Page Program command and wait for ready
734 see Software Requirement 11.4 item 1.*/
735 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
736 DoC_WaitReady(docptr);
737
738 /* Read the status of the flash device through CDSN IO register
739 see Software Requirement 11.4 item 5.*/
740 DoC_Command(docptr, NAND_CMD_STATUS, 0x00);
741 dummy = ReadDOC(docptr, ReadPipeInit);
742 DoC_Delay(docptr, 2);
743 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
744 printk("Error programming oob data\n");
745 /* FIXME: implement Bad Block Replacement (in nftl.c ??) */
8593fbc6 746 ops->retlen = 0;
1da177e4
LT		 747 ret = -EIO;
748 }
749 dummy = ReadDOC(docptr, LastDataRead);
750
8593fbc6 751 ops->retlen = len;
1da177e4
LT		 752
753 return ret;
754}
755
756int doc_erase (struct mtd_info *mtd, struct erase_info *instr)
757{
758 volatile char dummy;
759 struct DiskOnChip *this = mtd->priv;
760 __u32 ofs = instr->addr;
761 __u32 len = instr->len;
762 void __iomem *docptr = this->virtadr;
763 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
764
e5580fbe 765 if (len != mtd->erasesize)
1da177e4
LT		 766 printk(KERN_WARNING "Erase not right size (%x != %x)n",
767 len, mtd->erasesize);
768
769 /* Find the chip which is to be used and select it */
770 if (this->curfloor != mychip->floor) {
771 DoC_SelectFloor(docptr, mychip->floor);
772 DoC_SelectChip(docptr, mychip->chip);
773 } else if (this->curchip != mychip->chip) {
774 DoC_SelectChip(docptr, mychip->chip);
775 }
776 this->curfloor = mychip->floor;
777 this->curchip = mychip->chip;
778
779 instr->state = MTD_ERASE_PENDING;
780
781 /* issue the Erase Setup command */
782 DoC_Command(docptr, NAND_CMD_ERASE1, 0x00);
783 DoC_Address(docptr, 2, ofs, 0x00, 0x00);
784
785 /* Commit the Erase Start command and wait for ready
786 see Software Requirement 11.4 item 1.*/
787 DoC_Command(docptr, NAND_CMD_ERASE2, 0x00);
788 DoC_WaitReady(docptr);
789
790 instr->state = MTD_ERASING;
791
792 /* Read the status of the flash device through CDSN IO register
793 see Software Requirement 11.4 item 5.
794 FIXME: it seems that we are not wait long enough, some blocks are not
795 erased fully */
796 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
797 dummy = ReadDOC(docptr, ReadPipeInit);
798 DoC_Delay(docptr, 2);
799 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
800 printk("Error Erasing at 0x%x\n", ofs);
801 /* There was an error
802 FIXME: implement Bad Block Replacement (in nftl.c ??) */
803 instr->state = MTD_ERASE_FAILED;
804 } else
805 instr->state = MTD_ERASE_DONE;
806 dummy = ReadDOC(docptr, LastDataRead);
807
808 mtd_erase_callback(instr);
809
810 return 0;
811}
812
813/****************************************************************************
814 *
815 * Module stuff
816 *
817 ****************************************************************************/
818
1da177e4
LT		 819static void __exit cleanup_doc2001(void)
820{
821 struct mtd_info *mtd;
822 struct DiskOnChip *this;
823
824 while ((mtd=docmillist)) {
825 this = mtd->priv;
826 docmillist = this->nextdoc;
e5580fbe 827
ee0e87b1 828 mtd_device_unregister(mtd);
e5580fbe 829
1da177e4
LT		 830 iounmap(this->virtadr);
831 kfree(this->chips);
832 kfree(mtd);
833 }
1da177e4
LT		 834}
835
836module_exit(cleanup_doc2001);
1da177e4
LT		 837
838MODULE_LICENSE("GPL");
839MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
840MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium");
Linux kernel - Deliverables
This page took 0.617592 seconds and 5 git commands to generate.