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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2001, 2003 Maciej W. Rozycki | |
3 | * | |
4 | * DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for | |
5 | * DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260 | |
6 | * systems. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * as published by the Free Software Foundation; either version | |
11 | * 2 of the License, or (at your option) any later version. | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/ioport.h> | |
15 | #include <linux/mtd/mtd.h> | |
16 | ||
17 | /* | |
18 | * Addresses are decoded as follows: | |
19 | * | |
20 | * 0x000000 - 0x3fffff SRAM | |
21 | * 0x400000 - 0x7fffff CSR | |
22 | * | |
23 | * Within the SRAM area the following ranges are forced by the system | |
24 | * firmware: | |
25 | * | |
26 | * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot | |
27 | * 0x000400 - ENDofRAM storage area, available to operating systems | |
28 | * | |
29 | * but we can't really use the available area right from 0x000400 as | |
30 | * the first word is used by the firmware as a status flag passed | |
31 | * from an operating system. If anything but the valid data magic | |
32 | * ID value is found, the firmware considers the SRAM clean, i.e. | |
33 | * containing no valid data, and disables the battery resulting in | |
34 | * data being erased as soon as power is switched off. So the choice | |
35 | * for the start address of the user-available is 0x001000 which is | |
36 | * nicely page aligned. The area between 0x000404 and 0x000fff may | |
37 | * be used by the driver for own needs. | |
38 | * | |
39 | * The diagnostic area defines two status words to be read by an | |
40 | * operating system, a magic ID to distinguish a MS02-NV board from | |
41 | * anything else and a status information providing results of tests | |
42 | * as well as the size of SRAM available, which can be 1MiB or 2MiB | |
43 | * (that's what the firmware handles; no idea if 2MiB modules ever | |
44 | * existed). | |
45 | * | |
46 | * The firmware only handles the MS02-NV board if installed in the | |
47 | * last (15th) slot, so for any other location the status information | |
48 | * stored in the SRAM cannot be relied upon. But from the hardware | |
49 | * point of view there is no problem using up to 14 such boards in a | |
50 | * system -- only the 1st slot needs to be filled with a DRAM module. | |
51 | * The MS02-NV board is ECC-protected, like other MS02 memory boards. | |
52 | * | |
53 | * The state of the battery as provided by the CSR is reflected on | |
54 | * the two onboard LEDs. When facing the battery side of the board, | |
55 | * with the LEDs at the top left and the battery at the bottom right | |
56 | * (i.e. looking from the back side of the system box), their meaning | |
57 | * is as follows (the system has to be powered on): | |
58 | * | |
59 | * left LED battery disable status: lit = enabled | |
60 | * right LED battery condition status: lit = OK | |
61 | */ | |
62 | ||
63 | /* MS02-NV iomem register offsets. */ | |
64 | #define MS02NV_CSR 0x400000 /* control & status register */ | |
65 | ||
66 | /* MS02-NV CSR status bits. */ | |
67 | #define MS02NV_CSR_BATT_OK 0x01 /* battery OK */ | |
68 | #define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */ | |
69 | ||
70 | ||
71 | /* MS02-NV memory offsets. */ | |
72 | #define MS02NV_DIAG 0x0003f8 /* diagnostic status */ | |
73 | #define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */ | |
74 | #define MS02NV_VALID 0x000400 /* valid data magic ID */ | |
75 | #define MS02NV_RAM 0x001000 /* user-exposed RAM start */ | |
76 | ||
77 | /* MS02-NV diagnostic status bits. */ | |
78 | #define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */ | |
79 | #define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */ | |
80 | #define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */ | |
81 | #define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */ | |
82 | #define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */ | |
83 | #define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */ | |
84 | ||
85 | /* MS02-NV general constants. */ | |
86 | #define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */ | |
87 | #define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */ | |
88 | #define MS02NV_SLOT_SIZE 0x800000 /* size of the address space | |
89 | decoded by the module */ | |
90 | ||
91 | ||
92 | typedef volatile u32 ms02nv_uint; | |
93 | ||
94 | struct ms02nv_private { | |
95 | struct mtd_info *next; | |
96 | struct { | |
97 | struct resource *module; | |
98 | struct resource *diag_ram; | |
99 | struct resource *user_ram; | |
100 | struct resource *csr; | |
101 | } resource; | |
102 | u_char *addr; | |
103 | size_t size; | |
104 | u_char *uaddr; | |
105 | }; |