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[MTD] [NOR] cfi_cmdset_0001: Timeouts for erase, write and unlock operations
[deliverable/linux.git] / drivers / mtd / devices / mtd_dataflash.c
CommitLineData
1d6432fe
DB		 1/*
2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
3 *
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11*/
1d6432fe
DB		 12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/slab.h>
15#include <linux/delay.h>
16#include <linux/device.h>
ec9ce52e 17#include <linux/mutex.h>
771999b6 18#include <linux/err.h>
19
1d6432fe
DB		 20#include <linux/spi/spi.h>
21#include <linux/spi/flash.h>
22
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/partitions.h>
25
26
27/*
28 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
29 * each chip, which may be used for double buffered I/O; but this driver
30 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
31 *
32 * Sometimes DataFlash is packaged in MMC-format cards, although the
33 * MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash
34 * protocols during enumeration.
35 */
36
37#define CONFIG_DATAFLASH_WRITE_VERIFY
38
39/* reads can bypass the buffers */
40#define OP_READ_CONTINUOUS 0xE8
41#define OP_READ_PAGE 0xD2
42
43/* group B requests can run even while status reports "busy" */
44#define OP_READ_STATUS 0xD7 /* group B */
45
46/* move data between host and buffer */
47#define OP_READ_BUFFER1 0xD4 /* group B */
48#define OP_READ_BUFFER2 0xD6 /* group B */
49#define OP_WRITE_BUFFER1 0x84 /* group B */
50#define OP_WRITE_BUFFER2 0x87 /* group B */
51
52/* erasing flash */
53#define OP_ERASE_PAGE 0x81
54#define OP_ERASE_BLOCK 0x50
55
56/* move data between buffer and flash */
57#define OP_TRANSFER_BUF1 0x53
58#define OP_TRANSFER_BUF2 0x55
59#define OP_MREAD_BUFFER1 0xD4
60#define OP_MREAD_BUFFER2 0xD6
61#define OP_MWERASE_BUFFER1 0x83
62#define OP_MWERASE_BUFFER2 0x86
63#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
64#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
65
66/* write to buffer, then write-erase to flash */
67#define OP_PROGRAM_VIA_BUF1 0x82
68#define OP_PROGRAM_VIA_BUF2 0x85
69
70/* compare buffer to flash */
71#define OP_COMPARE_BUF1 0x60
72#define OP_COMPARE_BUF2 0x61
73
74/* read flash to buffer, then write-erase to flash */
75#define OP_REWRITE_VIA_BUF1 0x58
76#define OP_REWRITE_VIA_BUF2 0x59
77
78/* newer chips report JEDEC manufacturer and device IDs; chip
79 * serial number and OTP bits; and per-sector writeprotect.
80 */
81#define OP_READ_ID 0x9F
82#define OP_READ_SECURITY 0x77
34a82443
DB		 83#define OP_WRITE_SECURITY_REVC 0x9A
84#define OP_WRITE_SECURITY 0x9B /* revision D */
1d6432fe
DB		 85
86
87struct dataflash {
271c5c59 88 uint8_t command[4];
1d6432fe
DB		 89 char name[24];
90
91 unsigned partitioned:1;
92
93 unsigned short page_offset; /* offset in flash address */
94 unsigned int page_size; /* of bytes per page */
95
ec9ce52e 96 struct mutex lock;
1d6432fe
DB		 97 struct spi_device *spi;
98
99 struct mtd_info mtd;
100};
101
102#ifdef CONFIG_MTD_PARTITIONS
103#define mtd_has_partitions() (1)
104#else
105#define mtd_has_partitions() (0)
106#endif
107
108/* ......................................................................... */
109
110/*
111 * Return the status of the DataFlash device.
112 */
113static inline int dataflash_status(struct spi_device *spi)
114{
115 /* NOTE: at45db321c over 25 MHz wants to write
116 * a dummy byte after the opcode...
117 */
118 return spi_w8r8(spi, OP_READ_STATUS);
119}
120
121/*
122 * Poll the DataFlash device until it is READY.
123 * This usually takes 5-20 msec or so; more for sector erase.
124 */
125static int dataflash_waitready(struct spi_device *spi)
126{
127 int status;
128
129 for (;;) {
130 status = dataflash_status(spi);
131 if (status < 0) {
132 DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n",
133 spi->dev.bus_id, status);
134 status = 0;
135 }
136
137 if (status & (1 << 7)) /* RDY/nBSY */
138 return status;
139
140 msleep(3);
141 }
142}
143
144/* ......................................................................... */
145
146/*
147 * Erase pages of flash.
148 */
149static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
150{
151 struct dataflash *priv = (struct dataflash *)mtd->priv;
152 struct spi_device *spi = priv->spi;
8275c642 153 struct spi_transfer x = { .tx_dma = 0, };
1d6432fe
DB		 154 struct spi_message msg;
155 unsigned blocksize = priv->page_size << 3;
271c5c59 156 uint8_t *command;
1d6432fe
DB		 157
158 DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n",
159 spi->dev.bus_id,
160 instr->addr, instr->len);
161
162 /* Sanity checks */
163 if ((instr->addr + instr->len) > mtd->size
164 || (instr->len % priv->page_size) != 0
165 || (instr->addr % priv->page_size) != 0)
166 return -EINVAL;
167
8275c642
VW		 168 spi_message_init(&msg);
169
170 x.tx_buf = command = priv->command;
171 x.len = 4;
172 spi_message_add_tail(&x, &msg);
1d6432fe 173
ec9ce52e 174 mutex_lock(&priv->lock);
1d6432fe
DB		 175 while (instr->len > 0) {
176 unsigned int pageaddr;
177 int status;
178 int do_block;
179
180 /* Calculate flash page address; use block erase (for speed) if
181 * we're at a block boundary and need to erase the whole block.
182 */
183 pageaddr = instr->addr / priv->page_size;
3cb4f09f 184 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
1d6432fe
DB		 185 pageaddr = pageaddr << priv->page_offset;
186
187 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
271c5c59
DW		 188 command[1] = (uint8_t)(pageaddr >> 16);
189 command[2] = (uint8_t)(pageaddr >> 8);
1d6432fe
DB		 190 command[3] = 0;
191
192 DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
193 do_block ? "block" : "page",
194 command[0], command[1], command[2], command[3],
195 pageaddr);
196
197 status = spi_sync(spi, &msg);
198 (void) dataflash_waitready(spi);
199
200 if (status < 0) {
201 printk(KERN_ERR "%s: erase %x, err %d\n",
202 spi->dev.bus_id, pageaddr, status);
203 /* REVISIT: can retry instr->retries times; or
204 * giveup and instr->fail_addr = instr->addr;
205 */
206 continue;
207 }
208
209 if (do_block) {
210 instr->addr += blocksize;
211 instr->len -= blocksize;
212 } else {
213 instr->addr += priv->page_size;
214 instr->len -= priv->page_size;
215 }
216 }
ec9ce52e 217 mutex_unlock(&priv->lock);
1d6432fe
DB		 218
219 /* Inform MTD subsystem that erase is complete */
220 instr->state = MTD_ERASE_DONE;
221 mtd_erase_callback(instr);
222
223 return 0;
224}
225
226/*
227 * Read from the DataFlash device.
228 * from : Start offset in flash device
229 * len : Amount to read
230 * retlen : About of data actually read
231 * buf : Buffer containing the data
232 */
233static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
234 size_t *retlen, u_char *buf)
235{
236 struct dataflash *priv = (struct dataflash *)mtd->priv;
237 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
238 struct spi_message msg;
239 unsigned int addr;
271c5c59 240 uint8_t *command;
1d6432fe
DB		 241 int status;
242
243 DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
244 priv->spi->dev.bus_id, (unsigned)from, (unsigned)(from + len));
245
246 *retlen = 0;
247
248 /* Sanity checks */
249 if (!len)
250 return 0;
251 if (from + len > mtd->size)
252 return -EINVAL;
253
254 /* Calculate flash page/byte address */
255 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
256 + ((unsigned)from % priv->page_size);
257
258 command = priv->command;
259
260 DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n",
261 command[0], command[1], command[2], command[3]);
262
8275c642
VW		 263 spi_message_init(&msg);
264
1d6432fe
DB		 265 x[0].tx_buf = command;
266 x[0].len = 8;
8275c642
VW		 267 spi_message_add_tail(&x[0], &msg);
268
1d6432fe
DB		 269 x[1].rx_buf = buf;
270 x[1].len = len;
8275c642 271 spi_message_add_tail(&x[1], &msg);
1d6432fe 272
ec9ce52e 273 mutex_lock(&priv->lock);
1d6432fe
DB		 274
275 /* Continuous read, max clock = f(car) which may be less than
276 * the peak rate available. Some chips support commands with
277 * fewer "don't care" bytes. Both buffers stay unchanged.
278 */
279 command[0] = OP_READ_CONTINUOUS;
271c5c59
DW		 280 command[1] = (uint8_t)(addr >> 16);
281 command[2] = (uint8_t)(addr >> 8);
282 command[3] = (uint8_t)(addr >> 0);
1d6432fe
DB		 283 /* plus 4 "don't care" bytes */
284
285 status = spi_sync(priv->spi, &msg);
ec9ce52e 286 mutex_unlock(&priv->lock);
1d6432fe
DB		 287
288 if (status >= 0) {
289 *retlen = msg.actual_length - 8;
290 status = 0;
291 } else
292 DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n",
293 priv->spi->dev.bus_id,
294 (unsigned)from, (unsigned)(from + len),
295 status);
296 return status;
297}
298
299/*
300 * Write to the DataFlash device.
301 * to : Start offset in flash device
302 * len : Amount to write
303 * retlen : Amount of data actually written
304 * buf : Buffer containing the data
305 */
306static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
307 size_t * retlen, const u_char * buf)
308{
309 struct dataflash *priv = (struct dataflash *)mtd->priv;
310 struct spi_device *spi = priv->spi;
311 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
312 struct spi_message msg;
313 unsigned int pageaddr, addr, offset, writelen;
314 size_t remaining = len;
315 u_char *writebuf = (u_char *) buf;
316 int status = -EINVAL;
271c5c59 317 uint8_t *command;
1d6432fe
DB		 318
319 DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
320 spi->dev.bus_id, (unsigned)to, (unsigned)(to + len));
321
322 *retlen = 0;
323
324 /* Sanity checks */
325 if (!len)
326 return 0;
327 if ((to + len) > mtd->size)
328 return -EINVAL;
329
8275c642
VW		 330 spi_message_init(&msg);
331
1d6432fe
DB		 332 x[0].tx_buf = command = priv->command;
333 x[0].len = 4;
8275c642 334 spi_message_add_tail(&x[0], &msg);
1d6432fe
DB		 335
336 pageaddr = ((unsigned)to / priv->page_size);
337 offset = ((unsigned)to % priv->page_size);
338 if (offset + len > priv->page_size)
339 writelen = priv->page_size - offset;
340 else
341 writelen = len;
342
ec9ce52e 343 mutex_lock(&priv->lock);
1d6432fe
DB		 344 while (remaining > 0) {
345 DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n",
346 pageaddr, offset, writelen);
347
348 /* REVISIT:
349 * (a) each page in a sector must be rewritten at least
350 * once every 10K sibling erase/program operations.
351 * (b) for pages that are already erased, we could
352 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
353 * (c) WRITE to buffer could be done while waiting for
354 * a previous MWRITE/MWERASE to complete ...
355 * (d) error handling here seems to be mostly missing.
356 *
357 * Two persistent bits per page, plus a per-sector counter,
358 * could support (a) and (b) ... we might consider using
359 * the second half of sector zero, which is just one block,
360 * to track that state. (On AT91, that sector should also
361 * support boot-from-DataFlash.)
362 */
363
364 addr = pageaddr << priv->page_offset;
365
366 /* (1) Maybe transfer partial page to Buffer1 */
367 if (writelen != priv->page_size) {
368 command[0] = OP_TRANSFER_BUF1;
369 command[1] = (addr & 0x00FF0000) >> 16;
370 command[2] = (addr & 0x0000FF00) >> 8;
371 command[3] = 0;
372
373 DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n",
374 command[0], command[1], command[2], command[3]);
375
1d6432fe
DB		 376 status = spi_sync(spi, &msg);
377 if (status < 0)
378 DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n",
379 spi->dev.bus_id, addr, status);
380
381 (void) dataflash_waitready(priv->spi);
382 }
383
384 /* (2) Program full page via Buffer1 */
385 addr += offset;
386 command[0] = OP_PROGRAM_VIA_BUF1;
387 command[1] = (addr & 0x00FF0000) >> 16;
388 command[2] = (addr & 0x0000FF00) >> 8;
389 command[3] = (addr & 0x000000FF);
390
391 DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n",
392 command[0], command[1], command[2], command[3]);
393
394 x[1].tx_buf = writebuf;
395 x[1].len = writelen;
8275c642 396 spi_message_add_tail(x + 1, &msg);
1d6432fe 397 status = spi_sync(spi, &msg);
8275c642 398 spi_transfer_del(x + 1);
1d6432fe
DB		 399 if (status < 0)
400 DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n",
401 spi->dev.bus_id, addr, writelen, status);
402
403 (void) dataflash_waitready(priv->spi);
404
8275c642 405
1d6432fe
DB		 406#ifdef CONFIG_DATAFLASH_WRITE_VERIFY
407
408 /* (3) Compare to Buffer1 */
409 addr = pageaddr << priv->page_offset;
410 command[0] = OP_COMPARE_BUF1;
411 command[1] = (addr & 0x00FF0000) >> 16;
412 command[2] = (addr & 0x0000FF00) >> 8;
413 command[3] = 0;
414
415 DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n",
416 command[0], command[1], command[2], command[3]);
417
1d6432fe
DB		 418 status = spi_sync(spi, &msg);
419 if (status < 0)
420 DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n",
421 spi->dev.bus_id, addr, status);
422
423 status = dataflash_waitready(priv->spi);
424
425 /* Check result of the compare operation */
cccb45d4 426 if (status & (1 << 6)) {
1d6432fe
DB		 427 printk(KERN_ERR "%s: compare page %u, err %d\n",
428 spi->dev.bus_id, pageaddr, status);
429 remaining = 0;
430 status = -EIO;
431 break;
432 } else
433 status = 0;
434
435#endif /* CONFIG_DATAFLASH_WRITE_VERIFY */
436
437 remaining = remaining - writelen;
438 pageaddr++;
439 offset = 0;
440 writebuf += writelen;
441 *retlen += writelen;
442
443 if (remaining > priv->page_size)
444 writelen = priv->page_size;
445 else
446 writelen = remaining;
447 }
ec9ce52e 448 mutex_unlock(&priv->lock);
1d6432fe
DB		 449
450 return status;
451}
452
453/* ......................................................................... */
454
34a82443
DB		 455#ifdef CONFIG_MTD_DATAFLASH_OTP
456
457static int dataflash_get_otp_info(struct mtd_info *mtd,
458 struct otp_info *info, size_t len)
459{
460 /* Report both blocks as identical: bytes 0..64, locked.
461 * Unless the user block changed from all-ones, we can't
462 * tell whether it's still writable; so we assume it isn't.
463 */
464 info->start = 0;
465 info->length = 64;
466 info->locked = 1;
467 return sizeof(*info);
468}
469
470static ssize_t otp_read(struct spi_device *spi, unsigned base,
471 uint8_t *buf, loff_t off, size_t len)
472{
473 struct spi_message m;
474 size_t l;
475 uint8_t *scratch;
476 struct spi_transfer t;
477 int status;
478
479 if (off > 64)
480 return -EINVAL;
481
482 if ((off + len) > 64)
483 len = 64 - off;
484 if (len == 0)
485 return len;
486
487 spi_message_init(&m);
488
489 l = 4 + base + off + len;
490 scratch = kzalloc(l, GFP_KERNEL);
491 if (!scratch)
492 return -ENOMEM;
493
494 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
495 * IN: ignore 4 bytes, data bytes 0..N (max 127)
496 */
497 scratch[0] = OP_READ_SECURITY;
498
499 memset(&t, 0, sizeof t);
500 t.tx_buf = scratch;
501 t.rx_buf = scratch;
502 t.len = l;
503 spi_message_add_tail(&t, &m);
504
505 dataflash_waitready(spi);
506
507 status = spi_sync(spi, &m);
508 if (status >= 0) {
509 memcpy(buf, scratch + 4 + base + off, len);
510 status = len;
511 }
512
513 kfree(scratch);
514 return status;
515}
516
517static int dataflash_read_fact_otp(struct mtd_info *mtd,
518 loff_t from, size_t len, size_t *retlen, u_char *buf)
519{
520 struct dataflash *priv = (struct dataflash *)mtd->priv;
521 int status;
522
523 /* 64 bytes, from 0..63 ... start at 64 on-chip */
524 mutex_lock(&priv->lock);
525 status = otp_read(priv->spi, 64, buf, from, len);
526 mutex_unlock(&priv->lock);
527
528 if (status < 0)
529 return status;
530 *retlen = status;
531 return 0;
532}
533
534static int dataflash_read_user_otp(struct mtd_info *mtd,
535 loff_t from, size_t len, size_t *retlen, u_char *buf)
536{
537 struct dataflash *priv = (struct dataflash *)mtd->priv;
538 int status;
539
540 /* 64 bytes, from 0..63 ... start at 0 on-chip */
541 mutex_lock(&priv->lock);
542 status = otp_read(priv->spi, 0, buf, from, len);
543 mutex_unlock(&priv->lock);
544
545 if (status < 0)
546 return status;
547 *retlen = status;
548 return 0;
549}
550
551static int dataflash_write_user_otp(struct mtd_info *mtd,
552 loff_t from, size_t len, size_t *retlen, u_char *buf)
553{
554 struct spi_message m;
555 const size_t l = 4 + 64;
556 uint8_t *scratch;
557 struct spi_transfer t;
558 struct dataflash *priv = (struct dataflash *)mtd->priv;
559 int status;
560
561 if (len > 64)
562 return -EINVAL;
563
564 /* Strictly speaking, we *could* truncate the write ... but
565 * let's not do that for the only write that's ever possible.
566 */
567 if ((from + len) > 64)
568 return -EINVAL;
569
570 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
571 * IN: ignore all
572 */
573 scratch = kzalloc(l, GFP_KERNEL);
574 if (!scratch)
575 return -ENOMEM;
576 scratch[0] = OP_WRITE_SECURITY;
577 memcpy(scratch + 4 + from, buf, len);
578
579 spi_message_init(&m);
580
581 memset(&t, 0, sizeof t);
582 t.tx_buf = scratch;
583 t.len = l;
584 spi_message_add_tail(&t, &m);
585
586 /* Write the OTP bits, if they've not yet been written.
587 * This modifies SRAM buffer1.
588 */
589 mutex_lock(&priv->lock);
590 dataflash_waitready(priv->spi);
591 status = spi_sync(priv->spi, &m);
592 mutex_unlock(&priv->lock);
593
594 kfree(scratch);
595
596 if (status >= 0) {
597 status = 0;
598 *retlen = len;
599 }
600 return status;
601}
602
603static char *otp_setup(struct mtd_info *device, char revision)
604{
605 device->get_fact_prot_info = dataflash_get_otp_info;
606 device->read_fact_prot_reg = dataflash_read_fact_otp;
607 device->get_user_prot_info = dataflash_get_otp_info;
608 device->read_user_prot_reg = dataflash_read_user_otp;
609
610 /* rev c parts (at45db321c and at45db1281 only!) use a
611 * different write procedure; not (yet?) implemented.
612 */
613 if (revision > 'c')
614 device->write_user_prot_reg = dataflash_write_user_otp;
615
616 return ", OTP";
617}
618
619#else
620
621static char *otp_setup(struct mtd_info *device)
622{
623 return " (OTP)";
624}
625
626#endif
627
628/* ......................................................................... */
629
1d6432fe
DB		 630/*
631 * Register DataFlash device with MTD subsystem.
632 */
633static int __devinit
34a82443
DB		 634add_dataflash_otp(struct spi_device *spi, char *name,
635 int nr_pages, int pagesize, int pageoffset, char revision)
1d6432fe
DB		 636{
637 struct dataflash *priv;
638 struct mtd_info *device;
639 struct flash_platform_data *pdata = spi->dev.platform_data;
34a82443 640 char *otp_tag = "";
1d6432fe 641
5cbded58 642 priv = kzalloc(sizeof *priv, GFP_KERNEL);
1d6432fe
DB		 643 if (!priv)
644 return -ENOMEM;
645
ec9ce52e 646 mutex_init(&priv->lock);
1d6432fe
DB		 647 priv->spi = spi;
648 priv->page_size = pagesize;
649 priv->page_offset = pageoffset;
650
651 /* name must be usable with cmdlinepart */
652 sprintf(priv->name, "spi%d.%d-%s",
653 spi->master->bus_num, spi->chip_select,
654 name);
655
656 device = &priv->mtd;
657 device->name = (pdata && pdata->name) ? pdata->name : priv->name;
658 device->size = nr_pages * pagesize;
659 device->erasesize = pagesize;
17ffc7ba 660 device->writesize = pagesize;
1d6432fe
DB		 661 device->owner = THIS_MODULE;
662 device->type = MTD_DATAFLASH;
6c33cafc 663 device->flags = MTD_WRITEABLE;
1d6432fe
DB		 664 device->erase = dataflash_erase;
665 device->read = dataflash_read;
666 device->write = dataflash_write;
667 device->priv = priv;
668
34a82443
DB		 669 if (revision >= 'c')
670 otp_tag = otp_setup(device, revision);
671
672 dev_info(&spi->dev, "%s (%d KBytes) pagesize %d bytes%s\n",
673 name, DIV_ROUND_UP(device->size, 1024),
674 pagesize, otp_tag);
1d6432fe
DB		 675 dev_set_drvdata(&spi->dev, priv);
676
677 if (mtd_has_partitions()) {
678 struct mtd_partition *parts;
679 int nr_parts = 0;
680
681#ifdef CONFIG_MTD_CMDLINE_PARTS
682 static const char *part_probes[] = { "cmdlinepart", NULL, };
683
684 nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0);
685#endif
686
687 if (nr_parts <= 0 && pdata && pdata->parts) {
688 parts = pdata->parts;
689 nr_parts = pdata->nr_parts;
690 }
691
692 if (nr_parts > 0) {
693 priv->partitioned = 1;
694 return add_mtd_partitions(device, parts, nr_parts);
695 }
7111763d 696 } else if (pdata && pdata->nr_parts)
1d6432fe
DB		 697 dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
698 pdata->nr_parts, device->name);
699
700 return add_mtd_device(device) == 1 ? -ENODEV : 0;
701}
702
34a82443
DB		 703static inline int __devinit
704add_dataflash(struct spi_device *spi, char *name,
705 int nr_pages, int pagesize, int pageoffset)
706{
707 return add_dataflash_otp(spi, name, nr_pages, pagesize,
708 pageoffset, 0);
709}
710
e9d42227
MH		 711struct flash_info {
712 char *name;
713
771999b6 714 /* JEDEC id has a high byte of zero plus three data bytes:
715 * the manufacturer id, then a two byte device id.
e9d42227 716 */
271c5c59 717 uint32_t jedec_id;
e9d42227 718
771999b6 719 /* The size listed here is what works with OP_ERASE_PAGE. */
e9d42227 720 unsigned nr_pages;
271c5c59
DW		 721 uint16_t pagesize;
722 uint16_t pageoffset;
e9d42227 723
271c5c59 724 uint16_t flags;
771999b6 725#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
726#define IS_POW2PS 0x0001 /* uses 2^N byte pages */
e9d42227
MH		 727};
728
729static struct flash_info __devinitdata dataflash_data [] = {
730
771999b6 731 /*
732 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
733 * one with IS_POW2PS and the other without. The entry with the
734 * non-2^N byte page size can't name exact chip revisions without
735 * losing backwards compatibility for cmdlinepart.
736 *
737 * These newer chips also support 128-byte security registers (with
738 * 64 bytes one-time-programmable) and software write-protection.
739 */
740 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
e9d42227
MH		 741 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
742
771999b6 743 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
e9d42227
MH		 744 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
745
771999b6 746 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
e9d42227
MH		 747 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
748
771999b6 749 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
e9d42227
MH		 750 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
751
771999b6 752 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
e9d42227
MH		 753 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
754
771999b6 755 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
e9d42227 756
771999b6 757 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
e9d42227
MH		 758 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
759
771999b6 760 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
761 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
e9d42227
MH		 762};
763
764static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
765{
766 int tmp;
271c5c59
DW		 767 uint8_t code = OP_READ_ID;
768 uint8_t id[3];
769 uint32_t jedec;
e9d42227
MH		 770 struct flash_info *info;
771 int status;
772
e9d42227
MH		 773 /* JEDEC also defines an optional "extended device information"
774 * string for after vendor-specific data, after the three bytes
775 * we use here. Supporting some chips might require using it.
771999b6 776 *
777 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
778 * That's not an error; only rev C and newer chips handle it, and
779 * only Atmel sells these chips.
e9d42227
MH		 780 */
781 tmp = spi_write_then_read(spi, &code, 1, id, 3);
782 if (tmp < 0) {
783 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
784 spi->dev.bus_id, tmp);
771999b6 785 return ERR_PTR(tmp);
e9d42227 786 }
771999b6 787 if (id[0] != 0x1f)
788 return NULL;
789
e9d42227
MH		 790 jedec = id[0];
791 jedec = jedec << 8;
792 jedec |= id[1];
793 jedec = jedec << 8;
794 jedec |= id[2];
795
796 for (tmp = 0, info = dataflash_data;
797 tmp < ARRAY_SIZE(dataflash_data);
798 tmp++, info++) {
799 if (info->jedec_id == jedec) {
771999b6 800 DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
801 dev_name(&spi->dev),
802 (info->flags & SUP_POW2PS)
803 ? ", binary pagesize" : ""
804 );
e9d42227
MH		 805 if (info->flags & SUP_POW2PS) {
806 status = dataflash_status(spi);
771999b6 807 if (status < 0) {
808 DEBUG(MTD_DEBUG_LEVEL1,
809 "%s: status error %d\n",
810 dev_name(&spi->dev), status);
811 return ERR_PTR(status);
812 }
813 if (status & 0x1) {
814 if (info->flags & IS_POW2PS)
815 return info;
816 } else {
817 if (!(info->flags & IS_POW2PS))
818 return info;
819 }
e9d42227
MH		 820 }
821 }
822 }
771999b6 823
824 /*
825 * Treat other chips as errors ... we won't know the right page
826 * size (it might be binary) even when we can tell which density
827 * class is involved (legacy chip id scheme).
828 */
829 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
830 return ERR_PTR(-ENODEV);
e9d42227
MH		 831}
832
771999b6 833/*
834 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
835 * or else the ID code embedded in the status bits:
836 *
837 * Device Density ID code #Pages PageSize Offset
838 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
839 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
840 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
841 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
842 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
843 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
844 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
845 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
846 */
1d6432fe
DB		 847static int __devinit dataflash_probe(struct spi_device *spi)
848{
849 int status;
e9d42227
MH		 850 struct flash_info *info;
851
852 /*
853 * Try to detect dataflash by JEDEC ID.
854 * If it succeeds we know we have either a C or D part.
855 * D will support power of 2 pagesize option.
34a82443
DB		 856 * Both support the security register, though with different
857 * write procedures.
e9d42227 858 */
e9d42227 859 info = jedec_probe(spi);
771999b6 860 if (IS_ERR(info))
861 return PTR_ERR(info);
e9d42227 862 if (info != NULL)
34a82443
DB		 863 return add_dataflash_otp(spi, info->name, info->nr_pages,
864 info->pagesize, info->pageoffset,
865 (info->flags & SUP_POW2PS) ? 'd' : 'c');
e9d42227 866
771999b6 867 /*
868 * Older chips support only legacy commands, identifing
869 * capacity using bits in the status byte.
870 */
1d6432fe
DB		 871 status = dataflash_status(spi);
872 if (status <= 0 || status == 0xff) {
873 DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
874 spi->dev.bus_id, status);
de4fa992 875 if (status == 0 || status == 0xff)
1d6432fe
DB		 876 status = -ENODEV;
877 return status;
878 }
879
880 /* if there's a device there, assume it's dataflash.
881 * board setup should have set spi->max_speed_max to
882 * match f(car) for continuous reads, mode 0 or 3.
883 */
884 switch (status & 0x3c) {
885 case 0x0c: /* 0 0 1 1 x x */
886 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
887 break;
888 case 0x14: /* 0 1 0 1 x x */
e9d42227 889 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
1d6432fe
DB		 890 break;
891 case 0x1c: /* 0 1 1 1 x x */
771999b6 892 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
1d6432fe
DB		 893 break;
894 case 0x24: /* 1 0 0 1 x x */
895 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
896 break;
897 case 0x2c: /* 1 0 1 1 x x */
771999b6 898 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
1d6432fe
DB		 899 break;
900 case 0x34: /* 1 1 0 1 x x */
901 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
902 break;
903 case 0x38: /* 1 1 1 x x x */
904 case 0x3c:
905 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
906 break;
907 /* obsolete AT45DB1282 not (yet?) supported */
908 default:
909 DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n",
910 spi->dev.bus_id, status & 0x3c);
911 status = -ENODEV;
912 }
913
914 if (status < 0)
915 DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n",
916 spi->dev.bus_id, status);
917
918 return status;
919}
920
921static int __devexit dataflash_remove(struct spi_device *spi)
922{
923 struct dataflash *flash = dev_get_drvdata(&spi->dev);
924 int status;
925
926 DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", spi->dev.bus_id);
927
928 if (mtd_has_partitions() && flash->partitioned)
929 status = del_mtd_partitions(&flash->mtd);
930 else
931 status = del_mtd_device(&flash->mtd);
932 if (status == 0)
933 kfree(flash);
934 return status;
935}
936
937static struct spi_driver dataflash_driver = {
938 .driver = {
939 .name = "mtd_dataflash",
940 .bus = &spi_bus_type,
941 .owner = THIS_MODULE,
942 },
943
944 .probe = dataflash_probe,
945 .remove = __devexit_p(dataflash_remove),
946
947 /* FIXME: investigate suspend and resume... */
948};
949
950static int __init dataflash_init(void)
951{
952 return spi_register_driver(&dataflash_driver);
953}
954module_init(dataflash_init);
955
956static void __exit dataflash_exit(void)
957{
958 spi_unregister_driver(&dataflash_driver);
959}
960module_exit(dataflash_exit);
961
962
963MODULE_LICENSE("GPL");
964MODULE_AUTHOR("Andrew Victor, David Brownell");
965MODULE_DESCRIPTION("MTD DataFlash driver");
Linux kernel - Deliverables
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