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1da177e4 | 1 | /* |
e5580fbe | 2 | * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $ |
1da177e4 LT |
3 | * |
4 | * PMC551 PCI Mezzanine Ram Device | |
5 | * | |
6 | * Author: | |
7 | * Mark Ferrell <mferrell@mvista.com> | |
8 | * Copyright 1999,2000 Nortel Networks | |
9 | * | |
10 | * License: | |
11 | * As part of this driver was derived from the slram.c driver it | |
12 | * falls under the same license, which is GNU General Public | |
13 | * License v2 | |
14 | * | |
15 | * Description: | |
16 | * This driver is intended to support the PMC551 PCI Ram device | |
17 | * from Ramix Inc. The PMC551 is a PMC Mezzanine module for | |
18 | * cPCI embedded systems. The device contains a single SROM | |
19 | * that initially programs the V370PDC chipset onboard the | |
20 | * device, and various banks of DRAM/SDRAM onboard. This driver | |
21 | * implements this PCI Ram device as an MTD (Memory Technology | |
22 | * Device) so that it can be used to hold a file system, or for | |
23 | * added swap space in embedded systems. Since the memory on | |
24 | * this board isn't as fast as main memory we do not try to hook | |
25 | * it into main memory as that would simply reduce performance | |
26 | * on the system. Using it as a block device allows us to use | |
27 | * it as high speed swap or for a high speed disk device of some | |
28 | * sort. Which becomes very useful on diskless systems in the | |
29 | * embedded market I might add. | |
e5580fbe | 30 | * |
1da177e4 LT |
31 | * Notes: |
32 | * Due to what I assume is more buggy SROM, the 64M PMC551 I | |
33 | * have available claims that all 4 of it's DRAM banks have 64M | |
34 | * of ram configured (making a grand total of 256M onboard). | |
35 | * This is slightly annoying since the BAR0 size reflects the | |
36 | * aperture size, not the dram size, and the V370PDC supplies no | |
37 | * other method for memory size discovery. This problem is | |
38 | * mostly only relevant when compiled as a module, as the | |
39 | * unloading of the module with an aperture size smaller then | |
40 | * the ram will cause the driver to detect the onboard memory | |
41 | * size to be equal to the aperture size when the module is | |
42 | * reloaded. Soooo, to help, the module supports an msize | |
43 | * option to allow the specification of the onboard memory, and | |
44 | * an asize option, to allow the specification of the aperture | |
45 | * size. The aperture must be equal to or less then the memory | |
46 | * size, the driver will correct this if you screw it up. This | |
47 | * problem is not relevant for compiled in drivers as compiled | |
48 | * in drivers only init once. | |
49 | * | |
50 | * Credits: | |
51 | * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the | |
52 | * initial example code of how to initialize this device and for | |
53 | * help with questions I had concerning operation of the device. | |
54 | * | |
55 | * Most of the MTD code for this driver was originally written | |
56 | * for the slram.o module in the MTD drivers package which | |
57 | * allows the mapping of system memory into an MTD device. | |
58 | * Since the PMC551 memory module is accessed in the same | |
59 | * fashion as system memory, the slram.c code became a very nice | |
60 | * fit to the needs of this driver. All we added was PCI | |
61 | * detection/initialization to the driver and automatically figure | |
62 | * out the size via the PCI detection.o, later changes by Corey | |
63 | * Minyard set up the card to utilize a 1M sliding apature. | |
64 | * | |
65 | * Corey Minyard <minyard@nortelnetworks.com> | |
e5580fbe | 66 | * * Modified driver to utilize a sliding aperture instead of |
1da177e4 LT |
67 | * mapping all memory into kernel space which turned out to |
68 | * be very wasteful. | |
e5580fbe | 69 | * * Located a bug in the SROM's initialization sequence that |
1da177e4 LT |
70 | * made the memory unusable, added a fix to code to touch up |
71 | * the DRAM some. | |
72 | * | |
73 | * Bugs/FIXME's: | |
74 | * * MUST fix the init function to not spin on a register | |
75 | * waiting for it to set .. this does not safely handle busted | |
76 | * devices that never reset the register correctly which will | |
77 | * cause the system to hang w/ a reboot being the only chance at | |
78 | * recover. [sort of fixed, could be better] | |
79 | * * Add I2C handling of the SROM so we can read the SROM's information | |
80 | * about the aperture size. This should always accurately reflect the | |
81 | * onboard memory size. | |
82 | * * Comb the init routine. It's still a bit cludgy on a few things. | |
83 | */ | |
84 | ||
1da177e4 LT |
85 | #include <linux/config.h> |
86 | #include <linux/kernel.h> | |
87 | #include <linux/module.h> | |
88 | #include <asm/uaccess.h> | |
89 | #include <linux/types.h> | |
90 | #include <linux/sched.h> | |
91 | #include <linux/init.h> | |
92 | #include <linux/ptrace.h> | |
93 | #include <linux/slab.h> | |
94 | #include <linux/string.h> | |
95 | #include <linux/timer.h> | |
96 | #include <linux/major.h> | |
97 | #include <linux/fs.h> | |
98 | #include <linux/ioctl.h> | |
99 | #include <asm/io.h> | |
100 | #include <asm/system.h> | |
101 | #include <linux/pci.h> | |
102 | ||
103 | #ifndef CONFIG_PCI | |
104 | #error Enable PCI in your kernel config | |
105 | #endif | |
106 | ||
107 | #include <linux/mtd/mtd.h> | |
108 | #include <linux/mtd/pmc551.h> | |
109 | #include <linux/mtd/compatmac.h> | |
110 | ||
111 | static struct mtd_info *pmc551list; | |
112 | ||
113 | static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr) | |
114 | { | |
115 | struct mypriv *priv = mtd->priv; | |
116 | u32 soff_hi, soff_lo; /* start address offset hi/lo */ | |
117 | u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ | |
118 | unsigned long end; | |
119 | u_char *ptr; | |
120 | size_t retlen; | |
121 | ||
122 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
123 | printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len); | |
124 | #endif | |
125 | ||
126 | end = instr->addr + instr->len - 1; | |
127 | ||
128 | /* Is it past the end? */ | |
129 | if ( end > mtd->size ) { | |
130 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
131 | printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size); | |
132 | #endif | |
133 | return -EINVAL; | |
134 | } | |
135 | ||
136 | eoff_hi = end & ~(priv->asize - 1); | |
137 | soff_hi = instr->addr & ~(priv->asize - 1); | |
138 | eoff_lo = end & (priv->asize - 1); | |
139 | soff_lo = instr->addr & (priv->asize - 1); | |
140 | ||
141 | pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr); | |
142 | ||
143 | if ( soff_hi == eoff_hi || mtd->size == priv->asize) { | |
144 | /* The whole thing fits within one access, so just one shot | |
145 | will do it. */ | |
146 | memset(ptr, 0xff, instr->len); | |
147 | } else { | |
148 | /* We have to do multiple writes to get all the data | |
149 | written. */ | |
150 | while (soff_hi != eoff_hi) { | |
151 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
152 | printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); | |
153 | #endif | |
154 | memset(ptr, 0xff, priv->asize); | |
155 | if (soff_hi + priv->asize >= mtd->size) { | |
156 | goto out; | |
157 | } | |
158 | soff_hi += priv->asize; | |
159 | pmc551_point (mtd,(priv->base_map0|soff_hi), | |
160 | priv->asize, &retlen, &ptr); | |
161 | } | |
162 | memset (ptr, 0xff, eoff_lo); | |
163 | } | |
164 | ||
165 | out: | |
166 | instr->state = MTD_ERASE_DONE; | |
167 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
168 | printk(KERN_DEBUG "pmc551_erase() done\n"); | |
169 | #endif | |
170 | ||
171 | mtd_erase_callback(instr); | |
172 | return 0; | |
173 | } | |
174 | ||
175 | ||
176 | static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf) | |
177 | { | |
178 | struct mypriv *priv = mtd->priv; | |
179 | u32 soff_hi; | |
180 | u32 soff_lo; | |
181 | ||
182 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
183 | printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len); | |
184 | #endif | |
185 | ||
186 | if (from + len > mtd->size) { | |
187 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
188 | printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size); | |
189 | #endif | |
190 | return -EINVAL; | |
191 | } | |
192 | ||
193 | soff_hi = from & ~(priv->asize - 1); | |
194 | soff_lo = from & (priv->asize - 1); | |
195 | ||
196 | /* Cheap hack optimization */ | |
197 | if( priv->curr_map0 != from ) { | |
198 | pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0, | |
199 | (priv->base_map0 | soff_hi) ); | |
200 | priv->curr_map0 = soff_hi; | |
201 | } | |
202 | ||
203 | *mtdbuf = priv->start + soff_lo; | |
204 | *retlen = len; | |
205 | return 0; | |
206 | } | |
207 | ||
208 | ||
209 | static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len) | |
210 | { | |
211 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
212 | printk(KERN_DEBUG "pmc551_unpoint()\n"); | |
213 | #endif | |
214 | } | |
215 | ||
216 | ||
217 | static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) | |
218 | { | |
219 | struct mypriv *priv = mtd->priv; | |
220 | u32 soff_hi, soff_lo; /* start address offset hi/lo */ | |
221 | u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ | |
222 | unsigned long end; | |
223 | u_char *ptr; | |
224 | u_char *copyto = buf; | |
225 | ||
226 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
227 | printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize); | |
228 | #endif | |
229 | ||
230 | end = from + len - 1; | |
231 | ||
232 | /* Is it past the end? */ | |
233 | if (end > mtd->size) { | |
234 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
235 | printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size); | |
236 | #endif | |
237 | return -EINVAL; | |
238 | } | |
239 | ||
240 | soff_hi = from & ~(priv->asize - 1); | |
241 | eoff_hi = end & ~(priv->asize - 1); | |
242 | soff_lo = from & (priv->asize - 1); | |
243 | eoff_lo = end & (priv->asize - 1); | |
244 | ||
245 | pmc551_point (mtd, from, len, retlen, &ptr); | |
246 | ||
247 | if (soff_hi == eoff_hi) { | |
248 | /* The whole thing fits within one access, so just one shot | |
249 | will do it. */ | |
250 | memcpy(copyto, ptr, len); | |
251 | copyto += len; | |
252 | } else { | |
253 | /* We have to do multiple writes to get all the data | |
254 | written. */ | |
255 | while (soff_hi != eoff_hi) { | |
256 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
257 | printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); | |
258 | #endif | |
259 | memcpy(copyto, ptr, priv->asize); | |
260 | copyto += priv->asize; | |
261 | if (soff_hi + priv->asize >= mtd->size) { | |
262 | goto out; | |
263 | } | |
264 | soff_hi += priv->asize; | |
265 | pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr); | |
266 | } | |
267 | memcpy(copyto, ptr, eoff_lo); | |
268 | copyto += eoff_lo; | |
269 | } | |
270 | ||
271 | out: | |
272 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
273 | printk(KERN_DEBUG "pmc551_read() done\n"); | |
274 | #endif | |
275 | *retlen = copyto - buf; | |
276 | return 0; | |
277 | } | |
278 | ||
279 | static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf) | |
280 | { | |
281 | struct mypriv *priv = mtd->priv; | |
282 | u32 soff_hi, soff_lo; /* start address offset hi/lo */ | |
283 | u32 eoff_hi, eoff_lo; /* end address offset hi/lo */ | |
284 | unsigned long end; | |
285 | u_char *ptr; | |
286 | const u_char *copyfrom = buf; | |
287 | ||
288 | ||
289 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
290 | printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize); | |
291 | #endif | |
292 | ||
293 | end = to + len - 1; | |
294 | /* Is it past the end? or did the u32 wrap? */ | |
295 | if (end > mtd->size ) { | |
296 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
297 | printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to); | |
298 | #endif | |
299 | return -EINVAL; | |
300 | } | |
301 | ||
302 | soff_hi = to & ~(priv->asize - 1); | |
303 | eoff_hi = end & ~(priv->asize - 1); | |
304 | soff_lo = to & (priv->asize - 1); | |
305 | eoff_lo = end & (priv->asize - 1); | |
306 | ||
307 | pmc551_point (mtd, to, len, retlen, &ptr); | |
308 | ||
309 | if (soff_hi == eoff_hi) { | |
310 | /* The whole thing fits within one access, so just one shot | |
311 | will do it. */ | |
312 | memcpy(ptr, copyfrom, len); | |
313 | copyfrom += len; | |
314 | } else { | |
315 | /* We have to do multiple writes to get all the data | |
316 | written. */ | |
317 | while (soff_hi != eoff_hi) { | |
318 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
319 | printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi); | |
320 | #endif | |
321 | memcpy(ptr, copyfrom, priv->asize); | |
322 | copyfrom += priv->asize; | |
323 | if (soff_hi >= mtd->size) { | |
324 | goto out; | |
325 | } | |
326 | soff_hi += priv->asize; | |
327 | pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr); | |
328 | } | |
329 | memcpy(ptr, copyfrom, eoff_lo); | |
330 | copyfrom += eoff_lo; | |
331 | } | |
332 | ||
333 | out: | |
334 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
335 | printk(KERN_DEBUG "pmc551_write() done\n"); | |
336 | #endif | |
337 | *retlen = copyfrom - buf; | |
338 | return 0; | |
339 | } | |
340 | ||
341 | /* | |
342 | * Fixup routines for the V370PDC | |
343 | * PCI device ID 0x020011b0 | |
344 | * | |
345 | * This function basicly kick starts the DRAM oboard the card and gets it | |
346 | * ready to be used. Before this is done the device reads VERY erratic, so | |
347 | * much that it can crash the Linux 2.2.x series kernels when a user cat's | |
348 | * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL | |
349 | * register. FIXME: stop spinning on registers .. must implement a timeout | |
350 | * mechanism | |
351 | * returns the size of the memory region found. | |
352 | */ | |
353 | static u32 fixup_pmc551 (struct pci_dev *dev) | |
354 | { | |
355 | #ifdef CONFIG_MTD_PMC551_BUGFIX | |
356 | u32 dram_data; | |
357 | #endif | |
358 | u32 size, dcmd, cfg, dtmp; | |
359 | u16 cmd, tmp, i; | |
360 | u8 bcmd, counter; | |
361 | ||
362 | /* Sanity Check */ | |
363 | if(!dev) { | |
364 | return -ENODEV; | |
365 | } | |
366 | ||
367 | /* | |
368 | * Attempt to reset the card | |
369 | * FIXME: Stop Spinning registers | |
370 | */ | |
371 | counter=0; | |
372 | /* unlock registers */ | |
373 | pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 ); | |
374 | /* read in old data */ | |
375 | pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd ); | |
376 | /* bang the reset line up and down for a few */ | |
377 | for(i=0;i<10;i++) { | |
378 | counter=0; | |
379 | bcmd &= ~0x80; | |
380 | while(counter++ < 100) { | |
381 | pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd); | |
382 | } | |
383 | counter=0; | |
384 | bcmd |= 0x80; | |
385 | while(counter++ < 100) { | |
386 | pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd); | |
387 | } | |
388 | } | |
389 | bcmd |= (0x40|0x20); | |
390 | pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd); | |
391 | ||
e5580fbe | 392 | /* |
1da177e4 LT |
393 | * Take care and turn off the memory on the device while we |
394 | * tweak the configurations | |
395 | */ | |
396 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | |
397 | tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY); | |
398 | pci_write_config_word(dev, PCI_COMMAND, tmp); | |
399 | ||
400 | /* | |
401 | * Disable existing aperture before probing memory size | |
402 | */ | |
403 | pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd); | |
404 | dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN); | |
405 | pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp); | |
406 | /* | |
407 | * Grab old BAR0 config so that we can figure out memory size | |
408 | * This is another bit of kludge going on. The reason for the | |
409 | * redundancy is I am hoping to retain the original configuration | |
e5580fbe | 410 | * previously assigned to the card by the BIOS or some previous |
1da177e4 LT |
411 | * fixup routine in the kernel. So we read the old config into cfg, |
412 | * then write all 1's to the memory space, read back the result into | |
413 | * "size", and then write back all the old config. | |
414 | */ | |
415 | pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg ); | |
416 | #ifndef CONFIG_MTD_PMC551_BUGFIX | |
417 | pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 ); | |
418 | pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size ); | |
419 | size = (size&PCI_BASE_ADDRESS_MEM_MASK); | |
420 | size &= ~(size-1); | |
421 | pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg ); | |
422 | #else | |
423 | /* | |
424 | * Get the size of the memory by reading all the DRAM size values | |
425 | * and adding them up. | |
426 | * | |
427 | * KLUDGE ALERT: the boards we are using have invalid column and | |
428 | * row mux values. We fix them here, but this will break other | |
429 | * memory configurations. | |
430 | */ | |
431 | pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data); | |
432 | size = PMC551_DRAM_BLK_GET_SIZE(dram_data); | |
433 | dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); | |
434 | dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); | |
435 | pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data); | |
436 | ||
437 | pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data); | |
438 | size += PMC551_DRAM_BLK_GET_SIZE(dram_data); | |
439 | dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); | |
440 | dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); | |
441 | pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data); | |
442 | ||
443 | pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data); | |
444 | size += PMC551_DRAM_BLK_GET_SIZE(dram_data); | |
445 | dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); | |
446 | dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); | |
447 | pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data); | |
448 | ||
449 | pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data); | |
450 | size += PMC551_DRAM_BLK_GET_SIZE(dram_data); | |
451 | dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5); | |
452 | dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9); | |
453 | pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data); | |
454 | ||
455 | /* | |
456 | * Oops .. something went wrong | |
457 | */ | |
458 | if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) { | |
459 | return -ENODEV; | |
460 | } | |
461 | #endif /* CONFIG_MTD_PMC551_BUGFIX */ | |
462 | ||
463 | if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) { | |
464 | return -ENODEV; | |
465 | } | |
466 | ||
467 | /* | |
468 | * Precharge Dram | |
469 | */ | |
470 | pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 ); | |
471 | pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf ); | |
472 | ||
473 | /* | |
474 | * Wait until command has gone through | |
475 | * FIXME: register spinning issue | |
476 | */ | |
477 | do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd ); | |
478 | if(counter++ > 100)break; | |
479 | } while ( (PCI_COMMAND_IO) & cmd ); | |
480 | ||
481 | /* | |
e5580fbe | 482 | * Turn on auto refresh |
1da177e4 LT |
483 | * The loop is taken directly from Ramix's example code. I assume that |
484 | * this must be held high for some duration of time, but I can find no | |
485 | * documentation refrencing the reasons why. | |
486 | */ | |
487 | for ( i = 1; i<=8 ; i++) { | |
488 | pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df); | |
489 | ||
490 | /* | |
491 | * Make certain command has gone through | |
492 | * FIXME: register spinning issue | |
493 | */ | |
494 | counter=0; | |
495 | do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd); | |
496 | if(counter++ > 100)break; | |
497 | } while ( (PCI_COMMAND_IO) & cmd ); | |
498 | } | |
499 | ||
500 | pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020); | |
501 | pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff); | |
502 | ||
503 | /* | |
504 | * Wait until command completes | |
505 | * FIXME: register spinning issue | |
506 | */ | |
507 | counter=0; | |
508 | do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd); | |
509 | if(counter++ > 100)break; | |
510 | } while ( (PCI_COMMAND_IO) & cmd ); | |
511 | ||
512 | pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd); | |
513 | dcmd |= 0x02000000; | |
514 | pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd); | |
515 | ||
516 | /* | |
517 | * Check to make certain fast back-to-back, if not | |
518 | * then set it so | |
519 | */ | |
520 | pci_read_config_word( dev, PCI_STATUS, &cmd); | |
521 | if((cmd&PCI_COMMAND_FAST_BACK) == 0) { | |
522 | cmd |= PCI_COMMAND_FAST_BACK; | |
523 | pci_write_config_word( dev, PCI_STATUS, cmd); | |
524 | } | |
525 | ||
526 | /* | |
527 | * Check to make certain the DEVSEL is set correctly, this device | |
528 | * has a tendancy to assert DEVSEL and TRDY when a write is performed | |
529 | * to the memory when memory is read-only | |
530 | */ | |
531 | if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) { | |
532 | cmd &= ~PCI_STATUS_DEVSEL_MASK; | |
533 | pci_write_config_word( dev, PCI_STATUS, cmd ); | |
534 | } | |
535 | /* | |
536 | * Set to be prefetchable and put everything back based on old cfg. | |
537 | * it's possible that the reset of the V370PDC nuked the original | |
538 | * setup | |
539 | */ | |
540 | /* | |
541 | cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH; | |
542 | pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg ); | |
543 | */ | |
544 | ||
545 | /* | |
546 | * Turn PCI memory and I/O bus access back on | |
547 | */ | |
548 | pci_write_config_word( dev, PCI_COMMAND, | |
549 | PCI_COMMAND_MEMORY | PCI_COMMAND_IO ); | |
550 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
551 | /* | |
552 | * Some screen fun | |
553 | */ | |
554 | printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%lx\n", | |
555 | (size<1024)?size:(size<1048576)?size>>10:size>>20, | |
556 | (size<1024)?'B':(size<1048576)?'K':'M', | |
557 | size, ((dcmd&(0x1<<3)) == 0)?"non-":"", | |
558 | (dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK ); | |
559 | ||
560 | /* | |
561 | * Check to see the state of the memory | |
562 | */ | |
563 | pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd ); | |
564 | printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n" | |
565 | "pmc551: DRAM_BLK0 Size: %d at %d\n" | |
566 | "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n", | |
567 | (((0x1<<1)&dcmd) == 0)?"RW":"RO", | |
568 | (((0x1<<0)&dcmd) == 0)?"Off":"On", | |
569 | PMC551_DRAM_BLK_GET_SIZE(dcmd), | |
570 | ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); | |
571 | ||
572 | pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd ); | |
573 | printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n" | |
574 | "pmc551: DRAM_BLK1 Size: %d at %d\n" | |
575 | "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n", | |
576 | (((0x1<<1)&dcmd) == 0)?"RW":"RO", | |
577 | (((0x1<<0)&dcmd) == 0)?"Off":"On", | |
578 | PMC551_DRAM_BLK_GET_SIZE(dcmd), | |
579 | ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); | |
580 | ||
581 | pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd ); | |
582 | printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n" | |
583 | "pmc551: DRAM_BLK2 Size: %d at %d\n" | |
584 | "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n", | |
585 | (((0x1<<1)&dcmd) == 0)?"RW":"RO", | |
586 | (((0x1<<0)&dcmd) == 0)?"Off":"On", | |
587 | PMC551_DRAM_BLK_GET_SIZE(dcmd), | |
588 | ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); | |
589 | ||
590 | pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd ); | |
591 | printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n" | |
592 | "pmc551: DRAM_BLK3 Size: %d at %d\n" | |
593 | "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n", | |
594 | (((0x1<<1)&dcmd) == 0)?"RW":"RO", | |
595 | (((0x1<<0)&dcmd) == 0)?"Off":"On", | |
596 | PMC551_DRAM_BLK_GET_SIZE(dcmd), | |
597 | ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) ); | |
598 | ||
599 | pci_read_config_word( dev, PCI_COMMAND, &cmd ); | |
600 | printk( KERN_DEBUG "pmc551: Memory Access %s\n", | |
601 | (((0x1<<1)&cmd) == 0)?"off":"on" ); | |
602 | printk( KERN_DEBUG "pmc551: I/O Access %s\n", | |
603 | (((0x1<<0)&cmd) == 0)?"off":"on" ); | |
604 | ||
605 | pci_read_config_word( dev, PCI_STATUS, &cmd ); | |
606 | printk( KERN_DEBUG "pmc551: Devsel %s\n", | |
607 | ((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast": | |
608 | ((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium": | |
609 | ((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" ); | |
610 | ||
611 | printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n", | |
612 | ((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" ); | |
613 | ||
614 | pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd ); | |
615 | printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n" | |
616 | "pmc551: System Control Register is %slocked to PCI access\n" | |
e5580fbe | 617 | "pmc551: System Control Register is %slocked to EEPROM access\n", |
1da177e4 LT |
618 | (bcmd&0x1)?"software":"hardware", |
619 | (bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un"); | |
620 | #endif | |
621 | return size; | |
622 | } | |
623 | ||
624 | /* | |
625 | * Kernel version specific module stuffages | |
626 | */ | |
627 | ||
628 | ||
629 | MODULE_LICENSE("GPL"); | |
630 | MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>"); | |
631 | MODULE_DESCRIPTION(PMC551_VERSION); | |
632 | ||
633 | /* | |
634 | * Stuff these outside the ifdef so as to not bust compiled in driver support | |
635 | */ | |
636 | static int msize=0; | |
637 | #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE) | |
638 | static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE | |
639 | #else | |
640 | static int asize=0; | |
641 | #endif | |
642 | ||
643 | module_param(msize, int, 0); | |
644 | MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]"); | |
645 | module_param(asize, int, 0); | |
646 | MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]"); | |
647 | ||
648 | /* | |
649 | * PMC551 Card Initialization | |
650 | */ | |
651 | static int __init init_pmc551(void) | |
652 | { | |
653 | struct pci_dev *PCI_Device = NULL; | |
654 | struct mypriv *priv; | |
655 | int count, found=0; | |
656 | struct mtd_info *mtd; | |
657 | u32 length = 0; | |
658 | ||
659 | if(msize) { | |
660 | msize = (1 << (ffs(msize) - 1))<<20; | |
661 | if (msize > (1<<30)) { | |
662 | printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize); | |
663 | return -EINVAL; | |
664 | } | |
665 | } | |
666 | ||
667 | if(asize) { | |
668 | asize = (1 << (ffs(asize) - 1))<<20; | |
669 | if (asize > (1<<30) ) { | |
670 | printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize); | |
671 | return -EINVAL; | |
672 | } | |
673 | } | |
674 | ||
675 | printk(KERN_INFO PMC551_VERSION); | |
676 | ||
677 | /* | |
678 | * PCU-bus chipset probe. | |
679 | */ | |
680 | for( count = 0; count < MAX_MTD_DEVICES; count++ ) { | |
681 | ||
682 | if ((PCI_Device = pci_find_device(PCI_VENDOR_ID_V3_SEMI, | |
683 | PCI_DEVICE_ID_V3_SEMI_V370PDC, | |
684 | PCI_Device ) ) == NULL) { | |
685 | break; | |
686 | } | |
687 | ||
688 | printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%lX\n", | |
689 | PCI_Device->resource[0].start); | |
690 | ||
691 | /* | |
692 | * The PMC551 device acts VERY weird if you don't init it | |
693 | * first. i.e. it will not correctly report devsel. If for | |
694 | * some reason the sdram is in a wrote-protected state the | |
695 | * device will DEVSEL when it is written to causing problems | |
696 | * with the oldproc.c driver in | |
697 | * some kernels (2.2.*) | |
698 | */ | |
699 | if((length = fixup_pmc551(PCI_Device)) <= 0) { | |
700 | printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n"); | |
701 | break; | |
702 | } | |
703 | ||
704 | /* | |
705 | * This is needed until the driver is capable of reading the | |
706 | * onboard I2C SROM to discover the "real" memory size. | |
707 | */ | |
708 | if(msize) { | |
709 | length = msize; | |
710 | printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length); | |
711 | } else { | |
712 | msize = length; | |
713 | } | |
714 | ||
715 | mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL); | |
716 | if (!mtd) { | |
717 | printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n"); | |
718 | break; | |
719 | } | |
720 | ||
721 | memset(mtd, 0, sizeof(struct mtd_info)); | |
722 | ||
723 | priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL); | |
724 | if (!priv) { | |
725 | printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n"); | |
726 | kfree(mtd); | |
727 | break; | |
728 | } | |
729 | memset(priv, 0, sizeof(*priv)); | |
730 | mtd->priv = priv; | |
731 | priv->dev = PCI_Device; | |
732 | ||
733 | if(asize > length) { | |
734 | printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20); | |
735 | priv->asize = asize = length; | |
736 | } else if (asize == 0 || asize == length) { | |
737 | printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20); | |
738 | priv->asize = asize = length; | |
739 | } else { | |
740 | printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20); | |
741 | priv->asize = asize; | |
742 | } | |
743 | priv->start = ioremap(((PCI_Device->resource[0].start) | |
744 | & PCI_BASE_ADDRESS_MEM_MASK), | |
745 | priv->asize); | |
e5580fbe | 746 | |
1da177e4 LT |
747 | if (!priv->start) { |
748 | printk(KERN_NOTICE "pmc551: Unable to map IO space\n"); | |
749 | kfree(mtd->priv); | |
750 | kfree(mtd); | |
751 | break; | |
752 | } | |
753 | ||
754 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
755 | printk( KERN_DEBUG "pmc551: setting aperture to %d\n", | |
756 | ffs(priv->asize>>20)-1); | |
757 | #endif | |
758 | ||
759 | priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN | |
760 | | PMC551_PCI_MEM_MAP_ENABLE | |
761 | | (ffs(priv->asize>>20)-1)<<4 ); | |
762 | priv->curr_map0 = priv->base_map0; | |
763 | pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0, | |
764 | priv->curr_map0 ); | |
765 | ||
766 | #ifdef CONFIG_MTD_PMC551_DEBUG | |
e5580fbe | 767 | printk( KERN_DEBUG "pmc551: aperture set to %d\n", |
1da177e4 LT |
768 | (priv->base_map0 & 0xF0)>>4 ); |
769 | #endif | |
770 | ||
771 | mtd->size = msize; | |
772 | mtd->flags = MTD_CAP_RAM; | |
773 | mtd->erase = pmc551_erase; | |
774 | mtd->read = pmc551_read; | |
775 | mtd->write = pmc551_write; | |
776 | mtd->point = pmc551_point; | |
777 | mtd->unpoint = pmc551_unpoint; | |
21c8db9e | 778 | mtd->type = MTD_RAM; |
1da177e4 LT |
779 | mtd->name = "PMC551 RAM board"; |
780 | mtd->erasesize = 0x10000; | |
781 | mtd->owner = THIS_MODULE; | |
782 | ||
783 | if (add_mtd_device(mtd)) { | |
784 | printk(KERN_NOTICE "pmc551: Failed to register new device\n"); | |
785 | iounmap(priv->start); | |
786 | kfree(mtd->priv); | |
787 | kfree(mtd); | |
788 | break; | |
789 | } | |
790 | printk(KERN_NOTICE "Registered pmc551 memory device.\n"); | |
791 | printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n", | |
792 | priv->asize>>20, | |
793 | priv->start, | |
794 | priv->start + priv->asize); | |
795 | printk(KERN_NOTICE "Total memory is %d%c\n", | |
796 | (length<1024)?length: | |
797 | (length<1048576)?length>>10:length>>20, | |
798 | (length<1024)?'B':(length<1048576)?'K':'M'); | |
799 | priv->nextpmc551 = pmc551list; | |
800 | pmc551list = mtd; | |
801 | found++; | |
802 | } | |
803 | ||
804 | if( !pmc551list ) { | |
805 | printk(KERN_NOTICE "pmc551: not detected\n"); | |
806 | return -ENODEV; | |
807 | } else { | |
808 | printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found); | |
809 | return 0; | |
810 | } | |
811 | } | |
812 | ||
813 | /* | |
814 | * PMC551 Card Cleanup | |
815 | */ | |
816 | static void __exit cleanup_pmc551(void) | |
817 | { | |
818 | int found=0; | |
819 | struct mtd_info *mtd; | |
820 | struct mypriv *priv; | |
821 | ||
822 | while((mtd=pmc551list)) { | |
823 | priv = mtd->priv; | |
824 | pmc551list = priv->nextpmc551; | |
e5580fbe | 825 | |
1da177e4 LT |
826 | if(priv->start) { |
827 | printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n", | |
828 | priv->asize>>20, priv->start); | |
829 | iounmap (priv->start); | |
830 | } | |
e5580fbe | 831 | |
1da177e4 LT |
832 | kfree (mtd->priv); |
833 | del_mtd_device (mtd); | |
834 | kfree (mtd); | |
835 | found++; | |
836 | } | |
837 | ||
838 | printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found); | |
839 | } | |
840 | ||
841 | module_init(init_pmc551); | |
842 | module_exit(cleanup_pmc551); |